/**
 * \brief Instance header file for ATSAMD21J18A
 *
 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
 * terms applicable to your use of third party software (including open source software) that may
 * accompany Microchip software.
 *
 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY,
 * APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND
 * FITNESS FOR A PARTICULAR PURPOSE.
 *
 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
 * MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT
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 */

/* file generated from device description version 2019-11-25T06:52:33Z */
#ifndef _SAMD21_TCC1_INSTANCE_
#define _SAMD21_TCC1_INSTANCE_


/* ========== Instance Parameter definitions for TCC1 peripheral ========== */
#define TCC1_CC_NUM                              _UL_(2)    /* Number of Compare/Capture units */
#define TCC1_DITHERING                           _UL_(1)    /* Dithering feature implemented */
#define TCC1_DMAC_ID_OVF                         _UL_(18)   /* DMA overflow/underflow/retrigger trigger */
#define TCC1_DMAC_ID_MC0                         _UL_(19)   /* DMA Match/Compare 0 trigger */
#define TCC1_DMAC_ID_MC1                         _UL_(20)   /* DMA Match/Compare 1 trigger */
#define TCC1_DTI                                 _UL_(0)    /* Dead-Time-Insertion feature implemented */
#define TCC1_EXT                                 _UL_(24)   /* Coding of implemented extended features */
#define TCC1_GCLK_ID                             _UL_(26)   /* Index of Generic Clock */
#define TCC1_OTMX                                _UL_(0)    /* Output Matrix feature implemented */
#define TCC1_OW_NUM                              _UL_(4)    /* Number of Output Waveforms */
#define TCC1_PG                                  _UL_(1)    /* Pattern Generation feature implemented */
#define TCC1_SIZE                                _UL_(24)   
#define TCC1_SWAP                                _UL_(0)    /* DTI outputs swap feature implemented */
#define TCC1_TYPE                                _UL_(0)    /* TCC type 0 : NA, 1 : Master, 2 : Slave */
#define TCC1_INSTANCE_ID                         _UL_(73)   

#endif /* _SAMD21_TCC1_INSTANCE_ */