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- /**
- * \brief Instance header file for ATSAMD21J18A
- *
- * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
- *
- * Subject to your compliance with these terms, you may use Microchip software and any derivatives
- * exclusively with Microchip products. It is your responsibility to comply with third party license
- * terms applicable to your use of third party software (including open source software) that may
- * accompany Microchip software.
- *
- * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY,
- * APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND
- * FITNESS FOR A PARTICULAR PURPOSE.
- *
- * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
- * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
- * MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
- * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT
- * EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
- *
- */
- /* file generated from device description version 2019-11-25T06:52:33Z */
- #ifndef _SAMD21_NVMCTRL_INSTANCE_
- #define _SAMD21_NVMCTRL_INSTANCE_
- /* ========== Instance Parameter definitions for NVMCTRL peripheral ========== */
- #define NVMCTRL_FACTORY_WORD_IMPLEMENTED_MASK _UL_(0xC0000007FFFFFFFF)
- #define NVMCTRL_PMSB _UL_(3)
- #define NVMCTRL_PSZ_BITS _UL_(6)
- #define NVMCTRL_ROW_PAGES _UL_(4)
- #define NVMCTRL_USER_PAGE_OFFSET _UL_(0x00800000)
- #define NVMCTRL_USER_WORD_IMPLEMENTED_MASK _UL_(0xC01FFFFFFFFFFFFF)
- #define NVMCTRL_FLASH_SIZE _UL_(262144)
- #define NVMCTRL_PAGE_SIZE _UL_(64)
- #define NVMCTRL_PAGES _UL_(4096)
- #define NVMCTRL_PAGES_PR_REGION _UL_(256)
- #define NVMCTRL_PSM_0_FRMFW_FWS_1_MAX_FREQ _UL_(12000000)
- #define NVMCTRL_PSM_0_FRMLP_FWS_0_MAX_FREQ _UL_(18000000)
- #define NVMCTRL_PSM_0_FRMLP_FWS_1_MAX_FREQ _UL_(36000000)
- #define NVMCTRL_PSM_0_FRMHS_FWS_0_MAX_FREQ _UL_(25000000)
- #define NVMCTRL_PSM_0_FRMHS_FWS_1_MAX_FREQ _UL_(50000000)
- #define NVMCTRL_PSM_1_FRMFW_FWS_1_MAX_FREQ _UL_(12000000)
- #define NVMCTRL_PSM_1_FRMLP_FWS_0_MAX_FREQ _UL_(8000000)
- #define NVMCTRL_PSM_1_FRMLP_FWS_1_MAX_FREQ _UL_(12000000)
- #define NVMCTRL_INSTANCE_ID _UL_(34)
- #endif /* _SAMD21_NVMCTRL_INSTANCE_ */
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