evalsoc.rst 13 KB

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  1. .. _design_soc_evalsoc:
  2. Nuclei Eval SoC
  3. ===============
  4. .. note::
  5. Nuclei CPU IP now with iregion feature will use totally new evaluation SoC,
  6. this SoC is different from previous Demo SoC, please take care.
  7. Nuclei DemoSoC is now removed in 0.5.0 release, and please use evalsoc now.
  8. Nuclei Eval SoC is an evaluation FPGA SoC from Nuclei
  9. for customer to evaluate Nuclei RISC-V Process Core, and it is a successor for Demo SoC.
  10. .. _design_soc_evalsoc_overview:
  11. Overview
  12. --------
  13. To easy user to evaluate Nuclei Processor Core, the prototype
  14. SoC (called Nuclei Eval SoC) is provided for evaluation purpose.
  15. This prototype SoC includes:
  16. * Processor Core, it can be Nuclei N class, NX class or UX class Processor Core.
  17. * On-Chip SRAMs for instruction and data.
  18. * The SoC buses.
  19. * The basic peripherals, such as UART, SPI etc.
  20. With this prototype SoC, user can run simulations, map it into the FPGA board,
  21. and run with real embedded application examples.
  22. If you want to learn more about this evaluation SoC, please get the
  23. ``<Nuclei_Eval_SoC_Intro.pdf>`` from `Nuclei`_.
  24. .. _design_soc_evalsoc_boards:
  25. Supported Boards
  26. ----------------
  27. In Nuclei SDK, we support the following boards based on **Nuclei Evaluation SoC**, see:
  28. * :ref:`design_board_nuclei_fpga_eval`, default Board when this SoC selected.
  29. .. _design_soc_evalsoc_usage:
  30. Usage
  31. -----
  32. .. note::
  33. To ensure compatibility when using Nuclei EvalSoC(FPGA), please verify with our Application Engineer (AE) the specific CPU configuration to confirm if the EvalSoC's CPU possesses the features you intend to test.
  34. You can utilize the :ref:`design_app_cpuinfo` application to determine the available CPU features on your system and cross-reference this information with the Nuclei ISA specifications.
  35. .. note::
  36. In latest CPU RTL generation flow, it will also generate an Nuclei SDK to match CPU
  37. and EvalSoC RTL configuration, please use the generated Nuclei SDK to evaluate your
  38. CPU and EvalSoC feature.
  39. The generated Nuclei SDK by **nuclei_gen** will do the following tasks:
  40. - Generate ``SoC/evalsoc/cpufeature.mk``: which will define **CORE**, **ARCH_EXT**, **QEMU_SOCCFG** or **SIMULATION** default value.
  41. - Generate ``SoC/evalsoc/Common/Include/cpufeature.h``: which will define current cpu feature macros.
  42. - Generate ``SoC/evalsoc/evalsoc.json``: which will define current qemu soc configuration according to the evalsoc and cpu configuration.
  43. - Generate ``SoC/evalsoc/Board/nuclei_fpga_eval/Source/GCC/evalsoc.memory``: which will define the ilm/dlm/flash/ddr/sram base address and size.
  44. - Modify ``SoC/evalsoc/Board/nuclei_fpga_eval/openocd_evalsoc.cfg``: Mainly change ``workmem_base/workmem_size/flashxip_base/xipnuspi_base`` to adapt the evalsoc configuration.
  45. If you want to use the generated Nuclei SDK by **nuclei_gen** In Nuclei Studio IDE, you need to zip it first,
  46. and then **import** it using ``RV-Tools -> NPK Package Management`` in Nuclei Studio IDE's menu, and when
  47. creating a IDE project using ``New Nuclei RISC-V C/C++ Project``, please select the correct sdk and version which
  48. you can check it in the ``<SDK>/npk.yml`` file, and in the project example configuration wizard window, you should
  49. configure the **Nuclei RISC-V Core** and **ARCH Extensions**, **Nuclei Cache Extensions**
  50. according to your configured CPU ISA, and CPU feature defined in generated ``cpufeature.h``.
  51. **WARNING**: Currently you still need to modify IAR linker script(``*.icf``) by yourself, it is not automatically modified.
  52. If you want to use this **Nuclei Evaluation SoC** in Nuclei SDK, you need to set the
  53. :ref:`develop_buildsystem_var_soc` Makefile variable to ``evalsoc``.
  54. .. note::
  55. IAR support is done by prebuilt IAR projects not through Makefile based build system, please check https://github.com/Nuclei-Software/nuclei-sdk/blob/master/ideprojects/iar/README.md for detailed usage.
  56. Extra make variables supported only in this SoC and used internally only by Nuclei, not designed for widely used:
  57. * **RUNMODE**: it is used internally by Nuclei, used to control ILM/DLM/ICache/DCache enable or disable
  58. via make variable, please check ``SoC/evalsoc/runmode.mk`` for details. It is not functional by default,
  59. unless you set a non-empty variable to this ``RUNMODE`` variable, it can be used with different **ILM_EN/DLM_EN/IC_EN/DC_EN/CCM_EN**.
  60. * **L2_EN**: it is used internally by Nuclei, used to control L2 cache enable or disable, introduced in 0.6.0 release.
  61. * **LDSPEC_EN**: it is used internally by Nuclei, used to control load speculative enable or disable, introduced in 0.6.0 release.
  62. * **BPU_EN**: it is used internally by Nuclei, used to control branch prediction unit enable or disable, introduced in 0.6.0 release.
  63. * **ECC_EN**: it is used internally by Nuclei, used to control (ilm/dlm/L1 I/Dcache)ecc unit enable or disable, introduced in 0.7.0 release.
  64. * **CODESIZE**: it is used to control whether remove all template routine code for interrupt and exception and banner print code to measure basic code size requirement for evalsoc when ``CODESIZE=1``
  65. * **SYSCLK**: it is used together with ``CODESIZE=1`` to overwrite default ``SYSTEM_CLOCK`` macro value for different bitstream, eg. ``SYSCLK=50000000 CODESIZE=1``, it will set default SYSTEM_CLOCK to 50000000.
  66. * **QEMU_MC_EXTOPT** is used to pass extra options to Nuclei Qemu ``-M`` machine options for evalsoc,
  67. please dont pass any extra ``,`` to this make variable, you can pass such as ``QEMU_MC_EXTOPT=debug=1`` but not pass ``QEMU_MC_EXTOPT=,debug=1``
  68. * **QEMU_CPU_EXTOPT** is used to pass extra options to Nuclei Qemu ``-cpu`` cpu options for evalsoc,
  69. please dont pass any extra ``,`` to this make variable, you can pass such as ``QEMU_CPU_EXTOPT=vlen=512`` but
  70. not pass ``QEMU_CPU_EXTOPT=,vlen=512``
  71. * **XLCFG_xxx** make variables such as **XLCFG_CIDU**, **XLCFG_CCM**, **XLCFG_TEE** and **XLCFG_SMPU** which are used to overwrite default macros defined in ``cpufeature.h`` which will affect **XXX_PRESENT** macros in ``evalsoc.h``, introduced in 0.7.0 release, and these variables now moved from ``runmode.mk`` to a new ``cpuconfig.mk`` and if ``cpufeature.mk`` is generated by ``nuclei_gen``, then it will not be effective from 0.9.0 release, please see ``cpufeature.h`` header file.
  72. * **XLCFG_ECLIC**: it is used to control ECLIC configuration in ``cpufeature.h``, when ``XLCFG_ECLIC=0`` it will undefine ``CFG_HAS_CLIC``, when ``XLCFG_ECLIC=1`` it will define ``CFG_HAS_CLIC``, and when ``XLCFG_ECLIC=2`` it will define both ``CFG_HAS_ECLICV2`` and ``CFG_HAS_CLIC`` for ECLICv2 support, introduced in 0.9.0 release.
  73. * **ECLIC_HWCTX**: it is used to enable ECLIC hardware context auto-save feature, when ``ECLIC_HWCTX=1`` it will define ``ECLIC_HW_CTX_AUTO`` macro, introduced in 0.9.0 release.
  74. .. code-block:: shell
  75. # Choose SoC to be evalsoc
  76. # the following command will build application
  77. # using default evalsoc SoC based board
  78. # defined in Build System and application Makefile
  79. make SOC=evalsoc info # you can check current working SDK configuration information
  80. make SOC=evalsoc clean
  81. make SOC=evalsoc all
  82. .. _design_soc_evalsoc_build_modularization:
  83. Build System Modularization
  84. ---------------------------
  85. Starting from version 0.9.0, the Nuclei EvalSoC build system has been refactored to improve modularity by splitting the original ``build.mk`` file into multiple specialized makefiles:
  86. **Modularized Components:**
  87. * **build.mk (original)**: Now focuses primarily on core build-related configurations and OpenOCD debugging configurations, including linker script handling, compiler flags, and debug interface setup.
  88. * **cpuconfig.mk**: Contains CPU configuration options (``XLCFG_xxx``) that control which CPU features are enabled/disabled at build time, affecting ``cpufeature.h`` and ``evalsoc.h`` definitions to adapt for different CPU RTL configurations without changing source code.
  89. * **qemu.mk**: Contains QEMU emulation options including machine and CPU configurations for functional simulation.
  90. * **xlmodel.mk**: Contains Nuclei Near Cycle Model (xlmodel) emulation options for near-cycle accurate model simulation.
  91. * **runmode.mk**: Contains **RUN mode** options such as ``IC_EN/DC_EN`` to control ILM/DLM/ICACHE/DCACHE enable or disable during ``_premain_init`` for internal testing purposes.
  92. **Benefits:**
  93. * Improved maintainability by separating concerns into dedicated files
  94. * Better organization of configuration options
  95. * Easier to extend and customize individual components
  96. * Allows selective implementation - users without QEMU or xlmodel support can reference the build system without implementing those features
  97. * Facilitates internal development and regression workflows by enabling more adaptable configuration flows
  98. * Reduces customer porting effort by isolating platform-specific configurations
  99. **Note:** When ``cpufeature.mk`` is generated by ``nuclei_gen``, the ``XLCFG_xxx`` variables in ``cpuconfig.mk`` will not be effective, as the generated file takes precedence.
  100. .. _design_soc_evalsoc_eclicv2:
  101. ECLICv2 Support
  102. ---------------
  103. Starting from version 0.9.0, Nuclei EvalSoC provides support for ECLICv2 with hardware context auto-save feature.
  104. **Features:**
  105. * Hardware context auto-save/restore for non-vector interrupt and exception handlers
  106. * Automatic task stack pointer switching
  107. * Support for both M-mode and S-mode operation
  108. * Conditional compilation for backward compatibility
  109. **Configuration:**
  110. To enable ECLICv2 support with hardware context auto-save:
  111. * **MUST**: Nuclei RISC-V CPU must have ECLICv2 feature configured
  112. * Set ``XLCFG_ECLIC=2`` to enable ECLICv2 configuration or ``cpufeature.h`` contains ``CFG_HAS_ECLICV2`` macro
  113. * Set ``ECLIC_HWCTX=1`` to enable hardware context auto-save feature
  114. * When both options are enabled, the hardware will automatically save/restore context and handle stack pointer switching
  115. **Example:**
  116. .. code-block:: shell
  117. # Enable ECLICv2 with hardware context auto-save
  118. # eg. you are running on Nuclei N300 RISC-V CPU with ECLICv2 feature present
  119. # Test baremetal eclic v2 auto-save/restore feature, trap sp auto switch not enabled
  120. cd application/baremetal/demo_eclic
  121. # Test freertos eclic v2 auto-save/restore feature, trap sp auto switch enabled, since interrupt/exception need seperated stack besides task stack
  122. # cd application/freertos/demo
  123. make SOC=evalsoc CORE=n300 XLCFG_ECLIC=2 ECLIC_HWCTX=1 clean
  124. make SOC=evalsoc CORE=n300 XLCFG_ECLIC=2 ECLIC_HWCTX=1 all
  125. .. _design_soc_evalsoc_ecc:
  126. ECC Error Injection
  127. -------------------
  128. The ECC (Error Checking and Correction) mechanism supports:
  129. - Detection and correction of **single-bit errors**,
  130. - Raising an exception upon detection of a **double-bit error**,
  131. - **No guarantee** of correct behavior when **three or more bits** are corrupted.
  132. To verify ECC functionality, ECC error injection is used to simulate memory errors.
  133. This technique bypasses the hardware-generated ECC code and instead writes a deliberately
  134. corrupted ECC code into memory.
  135. Depending on the hardware implementation, **only one** of the following two injection methods is
  136. supported. This choice is **fixed in hardware** and **not configurable by software**.
  137. Therefore, before performing ECC error injection tests, you must determine which method your target
  138. hardware supports.
  139. **Supported Injection Modes:**
  140. 1. **Direct Write Mode (Legacy)**
  141. Manually compute the full ECC code, including intentional errors, and write the complete data+ECC word directly to memory.
  142. 2. **XOR Mode (New)**
  143. Provide an **ECC mask** instead of a full ECC code. The hardware automatically XORs this mask with the correct (golden) ECC code to flip the specified bits, thereby injecting errors.
  144. **Configuration:**
  145. To run applications with appropriate injection mode:
  146. .. note::
  147. **XLCFG_ECC** is only valid when ``cpufeature.h`` and ``cpufeature.mk`` is not generated by ``nuclei_gen``, it will define macro to affect the cpu feature macros defined in ``cpufeature.h``
  148. - Use **Direct Write Mode** if: ``XLCFG_ECC=1`` is set, **or** ``cpufeature.h`` defines ``CFG_HAS_ECC`` but **does not define** ``CFG_ECC_CODE_XOR``.
  149. - Use **XOR Mode** if: ``XLCFG_ECC=2`` is set, **or** ``cpufeature.h`` defines both ``CFG_HAS_ECC`` and ``CFG_ECC_CODE_XOR``.
  150. **Example:**
  151. For more information, refer to the :ref:`design_app_demo_ecc` application.
  152. .. code-block:: shell
  153. # change to application/baremetal/demo_ecc
  154. cd application/baremetal/demo_ecc
  155. # Example 1: Test ECC error injection on ILM/DLM using Direct Write Mode
  156. # (e.g., N300 core with legacy ECC support)
  157. make SOC=evalsoc BOARD=nuclei_fpga_eval CORE=n300 DOWNLOAD=ilm XLCFG_ECC=1 clean
  158. make SOC=evalsoc BOARD=nuclei_fpga_eval CORE=n300 DOWNLOAD=ilm XLCFG_ECC=1 all
  159. # Example 2: Test ECC error injection on cache using XOR Mode
  160. # (e.g., UX900 core with modern ECC support)
  161. make SOC=evalsoc BOARD=nuclei_fpga_eval CORE=ux900 DOWNLOAD=ddr CCM_EN=1 XLCFG_ECC=2 clean
  162. make SOC=evalsoc BOARD=nuclei_fpga_eval CORE=ux900 DOWNLOAD=ddr CCM_EN=1 XLCFG_ECC=2 all
  163. .. _Nuclei: https://nucleisys.com/