Merge pull request #53 from sakumisu/master

feat(cherryecat): add cherryecat demo

.github/workflows/action.yml

@@ -76,6 +76,7 @@ jobs:
          - {RTT_BSP: "etherkit_profinet_pnet"}
          - {RTT_BSP: "etherkit_ethernetip_opener"}
          - {RTT_BSP: "etherkit_factory"}
+         - {RTT_BSP: "etherkit_ethercat_cherryecat"}
     steps:
       - uses: actions/checkout@v2
       - name: Set up Python

README.md

@@ -34,6 +34,7 @@ $ sdk-bsp-rzn2l-etherkit
 │   ├── etherkit_driver_rs485
 │   ├── etherkit_driver_spi
 │   ├── etherkit_driver_wdt
+│   ├── etherkit_ethercat_cherryecat
 │   ├── etherkit_driver_hyperram
 │   ├── etherkit_ethernet
 │   ├── etherkit_usb_pcdc

README_zh.md

@@ -36,6 +36,7 @@ $ sdk-bsp-rzn2l-etherkit
 │   ├── etherkit_driver_rs485
 │   ├── etherkit_driver_spi
 │   ├── etherkit_driver_wdt
+│   ├── etherkit_ethercat_cherryecat
 │   ├── etherkit_driver_hyperram
 │   ├── etherkit_ethernet
 │   ├── etherkit_usb_pcdc

projects/etherkit_driver_ethernet/project.ewp

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+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkOverrideProgramEntryLabel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabelSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabel</name>
+                    <state>system_init</state>
+                </option>
+                <option>
+                    <name>DoFill</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FillerByte</name>
+                    <state>0xFF</state>
+                </option>
+                <option>
+                    <name>FillerStart</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>FillerEnd</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>CrcSize</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlign</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcPoly</name>
+                    <state>0x11021</state>
+                </option>
+                <option>
+                    <name>CrcCompl</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcBitOrder</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcInitialValue</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>DoCrc</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkBufferedTerminalOutput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkStdoutInterfaceSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcFullSize</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIElfToolPostProcess</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogAutoLibSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogRedirSymbols</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogUnusedFragments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcReverseByteOrder</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcUseAsInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptInline</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOptExceptionsAllow</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptExceptionsForce</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptMergeDuplSections</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOptUseVfe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptForceVfe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackAnalysisEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackControlFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkStackCallGraphFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile_AltDefault</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>template_import_lib.o</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkFpuProcessor</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IARCHIVE</name>
+            <archiveVersion>0</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>IarchiveInputs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IarchiveOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Unitialized###</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>BUILDACTION</name>
+            <archiveVersion>2</archiveVersion>
+            <data />
+        </settings>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
         <debug>0</debug>
-        <option>
-          <name>IlinkLogCrtRoutineSelection</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogFragmentInfo</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogInlining</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogMerging</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkDemangle</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkWrapperFileEnable</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkWrapperFile</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkLibIOConfig</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkInputFileSlave</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkOutputFile</name>
-          <state>###Unitialized###</state>
-        </option>
-        <option>
-          <name>IlinkDebugInfoEnable</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkKeepSymbols</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinaryFile</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinarySymbol</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinarySegment</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinaryAlign</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkDefines</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkConfigDefines</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkMapFile</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkLogFile</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogInitialization</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogModule</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogSection</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogVeneer</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkIcfOverride</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkIcfFile</name>
-          <state>$PROJ_DIR$/script/fsp_xspi0_boot.icf</state>
-        </option>
-        <option>
-          <name>IlinkIcfFileSlave</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkEnableRemarks</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkSuppressDiags</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkTreatAsRem</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkTreatAsWarn</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkTreatAsErr</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkWarningsAreErrors</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkUseExtraOptions</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkExtraOptions</name>
-          <state>--config_search "$PROJ_DIR$"</state>
-        </option>
-        <option>
-          <name>IlinkLowLevelInterfaceSlave</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkAutoLibEnable</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkAdditionalLibs</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkOverrideProgramEntryLabel</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkProgramEntryLabelSelect</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkProgramEntryLabel</name>
-          <state>system_init</state>
-        </option>
-        <option>
-          <name>DoFill</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>FillerByte</name>
-          <state>0xFF</state>
-        </option>
-        <option>
-          <name>FillerStart</name>
-          <state>0x0</state>
-        </option>
-        <option>
-          <name>FillerEnd</name>
-          <state>0x0</state>
-        </option>
-        <option>
-          <name>CrcSize</name>
-          <version>0</version>
-          <state>1</state>
-        </option>
-        <option>
-          <name>CrcAlign</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>CrcPoly</name>
-          <state>0x11021</state>
-        </option>
-        <option>
-          <name>CrcCompl</name>
-          <version>0</version>
-          <state>0</state>
-        </option>
-        <option>
-          <name>CrcBitOrder</name>
-          <version>0</version>
-          <state>0</state>
-        </option>
-        <option>
-          <name>CrcInitialValue</name>
-          <state>0x0</state>
-        </option>
-        <option>
-          <name>DoCrc</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkBE8Slave</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkBufferedTerminalOutput</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkStdoutInterfaceSlave</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>CrcFullSize</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkIElfToolPostProcess</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogAutoLibSelect</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogRedirSymbols</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkLogUnusedFragments</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkCrcReverseByteOrder</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkCrcUseAsInput</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkOptInline</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkOptExceptionsAllow</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkOptExceptionsForce</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkCmsis</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkOptMergeDuplSections</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkOptUseVfe</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkOptForceVfe</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkStackAnalysisEnable</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkStackControlFile</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkStackCallGraphFile</name>
-          <state />
-        </option>
-        <option>
-          <name>CrcAlgorithm</name>
-          <version>1</version>
-          <state>1</state>
-        </option>
-        <option>
-          <name>CrcUnitSize</name>
-          <version>0</version>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkThreadsSlave</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkLogCallGraph</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkIcfFile_AltDefault</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkEncInput</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkEncOutput</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IlinkEncOutputBom</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkHeapSelect</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkLocaleSelect</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkTrustzoneImportLibraryOut</name>
-          <state>###Unitialized###</state>
-        </option>
-        <option>
-          <name>OILinkExtraOption</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkRawBinaryFile2</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinarySymbol2</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinarySegment2</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkRawBinaryAlign2</name>
-          <state />
-        </option>
-        <option>
-          <name>IlinkProcessor</name>
-          <state>1</state>
-        </option>
-        <option>
-          <name>IlinkFpuProcessor</name>
-          <state>1</state>
-        </option>
-      </data>
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-    <settings>
-      <name>IARCHIVE</name>
-      <archiveVersion>0</archiveVersion>
-      <data>
-        <version>0</version>
-        <wantNonLocal>1</wantNonLocal>
-        <debug>0</debug>
-        <option>
-          <name>IarchiveInputs</name>
-          <state />
-        </option>
-        <option>
-          <name>IarchiveOverride</name>
-          <state>0</state>
-        </option>
-        <option>
-          <name>IarchiveOutput</name>
-          <state>###Unitialized###</state>
-        </option>
-      </data>
-    </settings>
-    <settings>
-      <name>BUILDACTION</name>
-      <archiveVersion>2</archiveVersion>
-      <data>
-        <buildActions>
-          <buildAction>
-            <cmdline>cmd /c ""$PROJ_DIR$\rasc_launcher.bat" "$PROJ_DIR$\rasc_version.txt" -nosplash --launcher.suppressErrors --generate --compiler IAR --devicefamily $RASC_DEVICE_FAMILY$ "$PROJ_DIR$\configuration.xml" 2&gt; "$BUILD_FILES_DIR$\.rasc_stderr.txt" &amp;&amp; echo. &gt; "$BUILD_FILES_DIR$\$TARGET_BNAME$.rasc""</cmdline>
-            <workingDirectory>$PROJ_DIR$</workingDirectory>
-            <buildSequence>preCompile</buildSequence>
-            <outputs>
-              <file>
-                <name>$BUILD_FILES_DIR$/$TARGET_BNAME$.rasc</name>
-              </file>
-            </outputs>
-            <dependencies>
-              <file>
-                <name>configuration.xml</name>
-              </file>
-            </dependencies>
-          </buildAction>
-          <buildAction>
-            <cmdline>cmd /c ""$PROJ_DIR$\rasc_launcher.bat" "$PROJ_DIR$\rasc_version.txt" -nosplash --launcher.suppressErrors --gensmartbundle --compiler IAR --devicefamily $RASC_DEVICE_FAMILY$ "$PROJ_DIR$\configuration.xml" "$TARGET_PATH$" 2&gt; "$BUILD_FILES_DIR$\.rasc_stderr.txt""</cmdline>
-            <workingDirectory>$PROJ_DIR$</workingDirectory>
-            <buildSequence>postLink</buildSequence>
-            <outputs>
-              <file>
-                <name>$TARGET_BPATH$.sbd</name>
-              </file>
-            </outputs>
-            <dependencies>
-              <file>
-                <name>$TARGET_PATH$</name>
-              </file>
-            </dependencies>
-          </buildAction>
-        </buildActions>
-      </data>
-    </settings>
-  </configuration>
-  <file>
-    <name>$PROJ_DIR$\buildinfo.ipcf</name>
-    <tag>IAR.ControlFile</tag>
-  </file>
-  <group>
-    <name>Applications</name>
-    <file>
-      <name>$PROJ_DIR$\src\hal_entry.c</name>
-    </file>
-  </group>
-  <group>
-    <name>Compiler</name>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cctype.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cstdlib.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cstring.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\ctime.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cunistd.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cwchar.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\environ.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_close.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_lseek.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_mem.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_open.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_read.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_remove.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_write.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscalls.c</name>
-    </file>
-  </group>
-  <group>
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-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\context_iar.S</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\gicv3.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\interrupt.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\backtrace.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\stack.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\trap.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\start_iar.S</name>
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+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabel</name>
+                    <state>system_init</state>
+                </option>
+                <option>
+                    <name>DoFill</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FillerByte</name>
+                    <state>0xFF</state>
+                </option>
+                <option>
+                    <name>FillerStart</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>FillerEnd</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>CrcSize</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlign</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcPoly</name>
+                    <state>0x11021</state>
+                </option>
+                <option>
+                    <name>CrcCompl</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcBitOrder</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcInitialValue</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>DoCrc</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkBufferedTerminalOutput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkStdoutInterfaceSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcFullSize</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIElfToolPostProcess</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogAutoLibSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogRedirSymbols</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogUnusedFragments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcReverseByteOrder</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcUseAsInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptInline</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptExceptionsAllow</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptExceptionsForce</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptMergeDuplSections</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOptUseVfe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptForceVfe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackAnalysisEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackControlFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkStackCallGraphFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile_AltDefault</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkFpuProcessor</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IARCHIVE</name>
+            <archiveVersion>0</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>IarchiveInputs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IarchiveOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Unitialized###</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>BUILDACTION</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <buildActions>
+                    <buildAction>
+                        <cmdline>cmd /c ""$PROJ_DIR$\rasc_launcher.bat" "$PROJ_DIR$\rasc_version.txt" -nosplash --launcher.suppressErrors --generate --compiler IAR --devicefamily $RASC_DEVICE_FAMILY$ "$PROJ_DIR$\configuration.xml" 2&gt; "$BUILD_FILES_DIR$\.rasc_stderr.txt" &amp;&amp; echo. &gt; "$BUILD_FILES_DIR$\$TARGET_BNAME$.rasc""</cmdline>
+                        <workingDirectory>$PROJ_DIR$</workingDirectory>
+                        <buildSequence>preCompile</buildSequence>
+                        <outputs>
+                            <file>
+                                <name>$BUILD_FILES_DIR$/$TARGET_BNAME$.rasc</name>
+                            </file>
+                        </outputs>
+                        <dependencies>
+                            <file>
+                                <name>configuration.xml</name>
+                            </file>
+                        </dependencies>
+                    </buildAction>
+                    <buildAction>
+                        <cmdline>cmd /c ""$PROJ_DIR$\rasc_launcher.bat" "$PROJ_DIR$\rasc_version.txt" -nosplash --launcher.suppressErrors --gensmartbundle --compiler IAR --devicefamily $RASC_DEVICE_FAMILY$ "$PROJ_DIR$\configuration.xml" "$TARGET_PATH$" 2&gt; "$BUILD_FILES_DIR$\.rasc_stderr.txt""</cmdline>
+                        <workingDirectory>$PROJ_DIR$</workingDirectory>
+                        <buildSequence>postLink</buildSequence>
+                        <outputs>
+                            <file>
+                                <name>$TARGET_BPATH$.sbd</name>
+                            </file>
+                        </outputs>
+                        <dependencies>
+                            <file>
+                                <name>$TARGET_PATH$</name>
+                            </file>
+                        </dependencies>
+                    </buildAction>
+                </buildActions>
+            </data>
+        </settings>
+    </configuration>
+    <group>
+        <name>Applications</name>
+        <file>
+            <name>$PROJ_DIR$\src\hal_entry.c</name>
+        </file>
+    </group>
+    <group>
+        <name>Compiler</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cctype.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cstdlib.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cstring.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\ctime.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cunistd.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\cwchar.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\environ.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_close.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_lseek.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_mem.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_open.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_read.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_remove.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_write.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscalls.c</name>
+        </file>
+    </group>
+    <group>
+        <name>CPU</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\backtrace.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\context_iar.S</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\cpuport.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\gicv3.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\interrupt.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\stack.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\start_iar.S</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\trap.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\vector_iar.S</name>
+        </file>
+    </group>
+    <group>
+        <name>DeviceDrivers</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\completion.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\condvar.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\dataqueue.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\core\device.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\pin\pin.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\pipe.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\ringblk_buf.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\ringbuffer.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\serial\serial_v2.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\waitqueue.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\drivers\ipc\workqueue.c</name>
+        </file>
+    </group>
+    <group>
+        <name>Drivers</name>
+        <file>
+            <name>$PROJ_DIR$\libraries\HAL_Drivers\drv_common.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\libraries\HAL_Drivers\drv_eth.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\libraries\HAL_Drivers\drv_gpio.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\libraries\HAL_Drivers\drv_usart_v2.c</name>
+        </file>
+    </group>
+    <group>
+        <name>Finsh</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\finsh\cmd.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\finsh\msh.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\finsh\msh_parse.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\finsh\shell.c</name>
+        </file>
+    </group>
+    <group>
+        <name>Kernel</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\clock.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\components.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\idle.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\ipc.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\irq.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\kservice.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\klibc\kstdio.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\klibc\kstring.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\mem.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\mempool.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\object.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\scheduler_comm.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\scheduler_up.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\thread.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\src\timer.c</name>
+        </file>
+    </group>
+    <group>
+        <name>libcpu</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\common\atomic_arm.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\common\div0.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\libcpu\arm\common\showmem.c</name>
+        </file>
+    </group>
+    <group>
+        <name>lwIP</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\api_lib.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\api_msg.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\autoip.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\def.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\dhcp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\dns.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\err.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\etharp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\netif\ethernet.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\port\ethernetif.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\icmp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\igmp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\inet_chksum.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\init.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ip.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4_addr.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4_frag.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\netif\lowpan6.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\memp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\netbuf.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\netdb.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\netif.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\netifapi.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\pbuf.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\apps\ping\ping.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\raw.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\sockets.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\stats.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\sys.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\port\sys_arch.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\tcp.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\tcp_in.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\tcp_out.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\api\tcpip.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\timeouts.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\lwip\lwip-2.0.3\src\core\udp.c</name>
+        </file>
+    </group>
+    <group>
+        <name>POSIX</name>
+    </group>
+    <group>
+        <name>RZN</name>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_address_expander.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_cache.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\cr\bsp_cache_core.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_clocks.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_common.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_ddr.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_ddr_fw_param.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_delay.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\cr\bsp_delay_core.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_io.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_irq.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\cr\bsp_irq_core.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\rzn2l\bsp_irq_sense.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\rzn2l\bsp_loader_param.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_register_protection.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_reset.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_sbrk.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_semaphore.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_slave_stop.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\mcu\all\bsp_tzc400.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_ether_phy\r_ether_phy.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_ether_selector\r_ether_selector.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_ethsw\r_ethsw.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_gmac\r_gmac.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_ioport\r_ioport.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\r_sci_uart\r_sci_uart.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\cmsis\Device\RENESAS\Source\startup.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\cmsis\Device\RENESAS\Source\cr\startup_core.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\cmsis\Device\RENESAS\Source\system.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn\fsp\src\bsp\cmsis\Device\RENESAS\Source\cr\system_core.c</name>
+        </file>
+    </group>
+    <group>
+        <name>RZN_cfg</name>
+    </group>
+    <group>
+        <name>RZN_gen</name>
+        <file>
+            <name>$PROJ_DIR$\rzn_gen\common_data.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn_gen\hal_data.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn_gen\main.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn_gen\pin_data.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rzn_gen\vector_data.c</name>
+        </file>
+    </group>
+    <group>
+        <name>SAL</name>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\sal\impl\af_inet_lwip.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\sal\socket\net_netdb.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\netdev\src\netdev.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\netdev\src\netdev_ipaddr.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\rt-thread\components\net\sal\src\sal_socket.c</name>
+        </file>
+    </group>
+    <file>
+        <name>$PROJ_DIR$\buildinfo.ipcf</name>
+        <tag>IAR.ControlFile</tag>
     </file>
-  </group>
 </project>

projects/etherkit_ethercat_cherryecat/.api_xml

@@ -0,0 +1,2 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<ddscApi/>

projects/etherkit_ethercat_cherryecat/.config

@@ -0,0 +1,1332 @@
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=16
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_AMP is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_CPUS_NR=1
+CONFIG_RT_ALIGN_SIZE=8
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_HOOK_USING_FUNC_PTR=y
+# CONFIG_RT_USING_HOOKLIST is not set
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=1024
+# CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_TINY_FFS is not set
+CONFIG_RT_KPRINTF_USING_LONGLONG=y
+# end of kservice optimization
+
+CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_COLOR=y
+CONFIG_RT_DEBUGING_CONTEXT=y
+# CONFIG_RT_DEBUGING_AUTO_INIT is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
+# CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP is not set
+CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_SLAB_AS_HEAP is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+# CONFIG_RT_USING_HEAP_ISR is not set
+CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+# CONFIG_RT_USING_THREADSAFE_PRINTF is not set
+# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=512
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
+CONFIG_RT_VER_NUM=0x50100
+# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
+# end of RT-Thread Kernel
+
+CONFIG_RT_USING_HW_ATOMIC=y
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_ARM_CORTEX_R=y
+CONFIG_ARCH_ARM_CORTEX_R52=y
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+# CONFIG_RT_USING_LEGACY is not set
+CONFIG_RT_USING_MSH=y
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_CMD_SIZE=80
+CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_ARG_MAX=10
+CONFIG_FINSH_USING_OPTION_COMPLETION=y
+
+#
+# DFS: device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
+# CONFIG_RT_USING_FAL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_RT_USING_DM is not set
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_UNAMED_PIPE_NUMBER=64
+CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
+CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
+CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_USING_SERIAL_V1 is not set
+CONFIG_RT_USING_SERIAL_V2=y
+CONFIG_RT_SERIAL_USING_DMA=y
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_NULL is not set
+# CONFIG_RT_USING_ZERO is not set
+# CONFIG_RT_USING_RANDOM is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_LCD is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_DEV_BUS is not set
+# CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_VIRTIO is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_KTIME is not set
+CONFIG_RT_USING_HWTIMER=y
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB
+# end of Device Drivers
+
+#
+# C/C++ and POSIX layer
+#
+
+#
+# ISO-ANSI C layer
+#
+
+#
+# Timezone and Daylight Saving Time
+#
+# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set
+# CONFIG_RT_LIBC_USING_LIGHT_TZ_DST is not set
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
+
+#
+# POSIX (Portable Operating System Interface) layer
+#
+# CONFIG_RT_USING_POSIX_FS is not set
+# CONFIG_RT_USING_POSIX_DELAY is not set
+# CONFIG_RT_USING_POSIX_CLOCK is not set
+# CONFIG_RT_USING_POSIX_TIMER is not set
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Interprocess Communication (IPC)
+#
+# CONFIG_RT_USING_POSIX_PIPE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
+
+#
+# Socket is in the 'Network' category
+#
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
+# CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
+
+#
+# Network
+#
+# CONFIG_RT_USING_SAL is not set
+# CONFIG_RT_USING_NETDEV is not set
+# CONFIG_RT_USING_LWIP is not set
+# CONFIG_RT_USING_AT is not set
+# end of Network
+
+#
+# Memory protection
+#
+# CONFIG_RT_USING_MEM_PROTECTION is not set
+# CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_VAR_EXPORT is not set
+# CONFIG_RT_USING_RESOURCE_ID is not set
+# CONFIG_RT_USING_ADT is not set
+# CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
+# CONFIG_RT_USING_VBUS is not set
+# end of RT-Thread Components
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
+# CONFIG_PKG_USING_ESP_HOSTED is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
+# CONFIG_PKG_USING_RW007 is not set
+
+#
+# CYW43012 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
+
+#
+# BL808 WiFi
+#
+# CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
+
+#
+# CYW43439 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+# CONFIG_PKG_USING_ZB_COORDINATOR is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_BT_CYW43012 is not set
+# CONFIG_PKG_USING_CYW43XX is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+# CONFIG_PKG_USING_RT_LINK_HW is not set
+# CONFIG_PKG_USING_RYANMQTT is not set
+# CONFIG_PKG_USING_RYANW5500 is not set
+# CONFIG_PKG_USING_LORA_PKT_FWD is not set
+# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
+# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
+# CONFIG_PKG_USING_HM is not set
+# CONFIG_PKG_USING_SMALL_MODBUS is not set
+# CONFIG_PKG_USING_NET_SERVER is not set
+# CONFIG_PKG_USING_ZFTP is not set
+# CONFIG_PKG_USING_WOL is not set
+# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
+# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
+# CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# CONFIG_PKG_USING_PNET is not set
+# CONFIG_PKG_USING_OPENER is not set
+# CONFIG_PKG_USING_FREEMQTT is not set
+# end of IoT - internet of things
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_LIBSODIUM is not set
+# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
+
+#
+# language packages
+#
+
+#
+# JSON: JavaScript Object Notation, a lightweight data-interchange format
+#
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PARSON is not set
+# CONFIG_PKG_USING_RYAN_JSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
+
+#
+# XML: Extensible Markup Language
+#
+# CONFIG_PKG_USING_SIMPLE_XML is not set
+# CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
+# CONFIG_PKG_USING_LUATOS_SOC is not set
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+# CONFIG_PKG_USING_PIKASCRIPT is not set
+# CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
+
+#
+# multimedia packages
+#
+
+#
+# LVGL: powerful and easy-to-use embedded GUI library
+#
+# CONFIG_PKG_USING_LVGL is not set
+# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
+# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
+
+#
+# u8g2: a monochrome graphic library
+#
+# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
+# CONFIG_PKG_USING_UGUI is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_TERMBOX is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_MCOREDUMP is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
+# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
+# CONFIG_PKG_USING_FDT is not set
+# CONFIG_PKG_USING_CBOX is not set
+# CONFIG_PKG_USING_SNOWFLAKE is not set
+# CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
+# CONFIG_PKG_USING_VOFA_PLUS is not set
+# CONFIG_PKG_USING_ZDEBUG is not set
+# CONFIG_PKG_USING_RVBACKTRACE is not set
+# CONFIG_PKG_USING_HPATCHLITE is not set
+# CONFIG_PKG_USING_THREAD_METRIC is not set
+# end of tools packages
+
+#
+# system packages
+#
+
+#
+# enhanced kernel services
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
+
+#
+# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
+#
+# CONFIG_PKG_USING_CMSIS_5 is not set
+# CONFIG_PKG_USING_CMSIS_CORE is not set
+# CONFIG_PKG_USING_CMSIS_NN is not set
+# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
+# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_LITEOS_SDK is not set
+# CONFIG_PKG_USING_TZ_DATABASE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_PERF_COUNTER is not set
+# CONFIG_PKG_USING_FILEX is not set
+# CONFIG_PKG_USING_LEVELX is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RPMSG_LITE is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+# CONFIG_PKG_USING_ARM_2D is not set
+# CONFIG_PKG_USING_MCUBOOT is not set
+# CONFIG_PKG_USING_TINYUSB is not set
+# CONFIG_PKG_USING_CHERRYUSB is not set
+# CONFIG_PKG_USING_KMULTI_RTIMER is not set
+# CONFIG_PKG_USING_TFDB is not set
+# CONFIG_PKG_USING_QPC is not set
+# CONFIG_PKG_USING_AGILE_UPGRADE is not set
+# CONFIG_PKG_USING_FLASH_BLOB is not set
+# CONFIG_PKG_USING_MLIBC is not set
+# CONFIG_PKG_USING_TASK_MSG_BUS is not set
+# CONFIG_PKG_USING_UART_FRAMEWORK is not set
+# CONFIG_PKG_USING_SFDB is not set
+# CONFIG_PKG_USING_RTP is not set
+# CONFIG_PKG_USING_REB is not set
+# CONFIG_PKG_USING_RMP is not set
+# CONFIG_PKG_USING_R_RHEALSTONE is not set
+# CONFIG_PKG_USING_HEARTBEAT is not set
+# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
+CONFIG_PKG_USING_CHERRYECAT=y
+# CONFIG_PKG_CHERRYECAT_NETDEV_CUSTOM is not set
+# CONFIG_PKG_CHERRYECAT_NETDEV_HPMICRO is not set
+CONFIG_PKG_CHERRYECAT_NETDEV_RENESAS=y
+CONFIG_PKG_CHERRYECAT_PATH="/packages/system/CherryECAT"
+CONFIG_PKG_USING_CHERRYECAT_LATEST_VERSION=y
+CONFIG_PKG_CHERRYECAT_VER="latest"
+# end of system packages
+
+#
+# peripheral libraries and drivers
+#
+
+#
+# HAL & SDK Drivers
+#
+
+#
+# STM32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_ESP_IDF is not set
+
+#
+# Kendryte SDK
+#
+# CONFIG_PKG_USING_K210_SDK is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set
+# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# CONFIG_PKG_USING_MM32 is not set
+
+#
+# WCH HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_CH32V20x_SDK is not set
+# CONFIG_PKG_USING_CH32V307_SDK is not set
+# end of WCH HAL & SDK Drivers
+
+#
+# AT32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set
+# end of AT32 HAL & SDK Drivers
+
+#
+# HC32 DDL Drivers
+#
+# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set
+# end of HC32 DDL Drivers
+
+#
+# NXP HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set
+# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
+# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
+# end of NXP HAL & SDK Drivers
+
+#
+# NUVOTON Drivers
+#
+# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set
+# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set
+# end of NUVOTON Drivers
+
+#
+# GD32 Drivers
+#
+# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
+# end of GD32 Drivers
+
+#
+# HPMicro SDK
+#
+# CONFIG_PKG_USING_HPM_SDK is not set
+# end of HPMicro SDK
+# end of HAL & SDK Drivers
+
+#
+# sensors drivers
+#
+# CONFIG_PKG_USING_LSM6DSM is not set
+# CONFIG_PKG_USING_LSM6DSL is not set
+# CONFIG_PKG_USING_LPS22HB is not set
+# CONFIG_PKG_USING_HTS221 is not set
+# CONFIG_PKG_USING_LSM303AGR is not set
+# CONFIG_PKG_USING_BME280 is not set
+# CONFIG_PKG_USING_BME680 is not set
+# CONFIG_PKG_USING_BMA400 is not set
+# CONFIG_PKG_USING_BMI160_BMX160 is not set
+# CONFIG_PKG_USING_SPL0601 is not set
+# CONFIG_PKG_USING_MS5805 is not set
+# CONFIG_PKG_USING_DA270 is not set
+# CONFIG_PKG_USING_DF220 is not set
+# CONFIG_PKG_USING_HSHCAL001 is not set
+# CONFIG_PKG_USING_BH1750 is not set
+# CONFIG_PKG_USING_MPU6XXX is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_TSL4531 is not set
+# CONFIG_PKG_USING_DS18B20 is not set
+# CONFIG_PKG_USING_DHT11 is not set
+# CONFIG_PKG_USING_DHTXX is not set
+# CONFIG_PKG_USING_GY271 is not set
+# CONFIG_PKG_USING_GP2Y10 is not set
+# CONFIG_PKG_USING_SGP30 is not set
+# CONFIG_PKG_USING_HDC1000 is not set
+# CONFIG_PKG_USING_BMP180 is not set
+# CONFIG_PKG_USING_BMP280 is not set
+# CONFIG_PKG_USING_SHTC1 is not set
+# CONFIG_PKG_USING_BMI088 is not set
+# CONFIG_PKG_USING_HMC5883 is not set
+# CONFIG_PKG_USING_MAX6675 is not set
+# CONFIG_PKG_USING_MAX31855 is not set
+# CONFIG_PKG_USING_TMP1075 is not set
+# CONFIG_PKG_USING_SR04 is not set
+# CONFIG_PKG_USING_CCS811 is not set
+# CONFIG_PKG_USING_PMSXX is not set
+# CONFIG_PKG_USING_RT3020 is not set
+# CONFIG_PKG_USING_MLX90632 is not set
+# CONFIG_PKG_USING_MLX90382 is not set
+# CONFIG_PKG_USING_MLX90393 is not set
+# CONFIG_PKG_USING_MLX90392 is not set
+# CONFIG_PKG_USING_MLX90394 is not set
+# CONFIG_PKG_USING_MLX90397 is not set
+# CONFIG_PKG_USING_MS5611 is not set
+# CONFIG_PKG_USING_MAX31865 is not set
+# CONFIG_PKG_USING_VL53L0X is not set
+# CONFIG_PKG_USING_INA260 is not set
+# CONFIG_PKG_USING_MAX30102 is not set
+# CONFIG_PKG_USING_INA226 is not set
+# CONFIG_PKG_USING_LIS2DH12 is not set
+# CONFIG_PKG_USING_HS300X is not set
+# CONFIG_PKG_USING_ZMOD4410 is not set
+# CONFIG_PKG_USING_ISL29035 is not set
+# CONFIG_PKG_USING_MMC3680KJ is not set
+# CONFIG_PKG_USING_QMP6989 is not set
+# CONFIG_PKG_USING_BALANCE is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_SHT4X is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_ADT74XX is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_CW2015 is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_STHS34PF80 is not set
+# CONFIG_PKG_USING_P3T1755 is not set
+# CONFIG_PKG_USING_QMI8658 is not set
+# CONFIG_PKG_USING_ICM20948 is not set
+# end of sensors drivers
+
+#
+# touch drivers
+#
+# CONFIG_PKG_USING_GT9147 is not set
+# CONFIG_PKG_USING_GT1151 is not set
+# CONFIG_PKG_USING_GT917S is not set
+# CONFIG_PKG_USING_GT911 is not set
+# CONFIG_PKG_USING_FT6206 is not set
+# CONFIG_PKG_USING_FT5426 is not set
+# CONFIG_PKG_USING_FT6236 is not set
+# CONFIG_PKG_USING_XPT2046_TOUCH is not set
+# CONFIG_PKG_USING_CST816X is not set
+# CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_ILI9341 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_RS232 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+# CONFIG_PKG_USING_MCP23008 is not set
+# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
+# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
+# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
+# CONFIG_PKG_USING_SOFT_SERIAL is not set
+# CONFIG_PKG_USING_MB85RS16 is not set
+# CONFIG_PKG_USING_RFM300 is not set
+# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
+# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
+# CONFIG_PKG_USING_AIP650 is not set
+# CONFIG_PKG_USING_FINGERPRINT is not set
+# CONFIG_PKG_USING_BT_ECB02C is not set
+# CONFIG_PKG_USING_UAT is not set
+# CONFIG_PKG_USING_ST7789 is not set
+# CONFIG_PKG_USING_VS1003 is not set
+# CONFIG_PKG_USING_X9555 is not set
+# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
+# CONFIG_PKG_USING_BT_MX01 is not set
+# CONFIG_PKG_USING_RGPOWER is not set
+# CONFIG_PKG_USING_BT_MX02 is not set
+# CONFIG_PKG_USING_GC9A01 is not set
+# CONFIG_PKG_USING_IK485 is not set
+# CONFIG_PKG_USING_SERVO is not set
+# CONFIG_PKG_USING_SEAN_WS2812B is not set
+# CONFIG_PKG_USING_IC74HC165 is not set
+# CONFIG_PKG_USING_IST8310 is not set
+# CONFIG_PKG_USING_ST7789_SPI is not set
+# CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+# CONFIG_PKG_USING_R_TINYMAIX is not set
+# CONFIG_PKG_USING_LLMCHAT is not set
+# end of AI packages
+
+#
+# Signal Processing and Control Algorithm Packages
+#
+# CONFIG_PKG_USING_APID is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_QPID is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_KISSFFT is not set
+# end of Signal Processing and Control Algorithm Packages
+
+#
+# miscellaneous packages
+#
+
+#
+# project laboratory
+#
+# end of project laboratory
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_CMATRIX is not set
+# CONFIG_PKG_USING_SL is not set
+# CONFIG_PKG_USING_CAL is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_COWSAY is not set
+# CONFIG_PKG_USING_MORSE is not set
+# end of entertainment: terminal games and other interesting software packages
+
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_RALARAM is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_HEATSHRINK is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LIBCRC is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_DESIGN_PATTERN is not set
+# CONFIG_PKG_USING_CONTROLLER is not set
+# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
+# CONFIG_PKG_USING_MFBD is not set
+# CONFIG_PKG_USING_SLCAN2RTT is not set
+# CONFIG_PKG_USING_SOEM is not set
+# CONFIG_PKG_USING_QPARAM is not set
+# CONFIG_PKG_USING_CorevMCU_CLI is not set
+# CONFIG_PKG_USING_DRMP is not set
+# end of miscellaneous packages
+
+#
+# Arduino libraries
+#
+# CONFIG_PKG_USING_RTDUINO is not set
+
+#
+# Projects and Demos
+#
+# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
+# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
+# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
+# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set
+# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
+# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
+# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
+
+#
+# Sensors
+#
+# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
+# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
+
+#
+# Display
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
+# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
+# CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
+
+#
+# Timing
+#
+# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
+# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
+# CONFIG_PKG_USING_ARDUINO_TICKER is not set
+# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
+
+#
+# Data Processing
+#
+# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
+# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
+# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
+
+#
+# Data Storage
+#
+
+#
+# Communication
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
+
+#
+# Device Control
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
+
+#
+# Other
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
+# end of Other
+
+#
+# Signal IO
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
+
+#
+# Uncategorized
+#
+# end of Arduino libraries
+# end of RT-Thread online packages
+
+CONFIG_SOC_FAMILY_RENESAS_RZ=y
+CONFIG_SOC_SERIES_R9A07G0=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_R9A07G084=y
+
+#
+# Onboard Peripheral Drivers
+#
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+# CONFIG_BSP_USING_WDT is not set
+# CONFIG_BSP_USING_ONCHIP_RTC is not set
+CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART0=y
+# CONFIG_BSP_UART0_RX_USING_DMA is not set
+# CONFIG_BSP_UART0_TX_USING_DMA is not set
+CONFIG_BSP_UART0_RX_BUFSIZE=256
+CONFIG_BSP_UART0_TX_BUFSIZE=0
+# CONFIG_BSP_USING_UART5 is not set
+# CONFIG_BSP_USING_ADC is not set
+# CONFIG_BSP_USING_CANFD is not set
+# CONFIG_BSP_USING_SCI is not set
+# CONFIG_BSP_USING_HYPERRAM is not set
+# CONFIG_BSP_USING_I2C is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_TIM is not set
+# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_ETH is not set
+# end of On-chip Peripheral Drivers
+
+#
+# Board extended module Drivers
+#
+# CONFIG_BSP_USING_RW007 is not set
+# end of Board extended module Drivers
+# end of Hardware Drivers Config

projects/etherkit_ethercat_cherryecat/.gitignore

@@ -0,0 +1,14 @@
+/RTE
+/Listings
+/Objects
+/Debug
+/build
+/makefile.targets
+/rtconfig.pyc
+/rt-thread
+/libraries
+/project.custom_argvars
+/.vscode
+/__pycache
+/settings
+/rtconfig_preinc.h

projects/etherkit_ethercat_cherryecat/.project

@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>project</name>
+  <comment />
+  <projects>
+    </projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+            </arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+            </arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.rt-thread.studio.rttnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources />
+</projectDescription>

projects/etherkit_ethercat_cherryecat/.secure_azone

@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<azone>
+    <rzone name="R9A07G084M04GBG.rzone"/>
+</azone>

projects/etherkit_ethercat_cherryecat/.secure_rzone

@@ -0,0 +1,29 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<rzone>
+    <device Dvendor="Renesas" Dname="R9A07G084M04GBG">
+        <processor Pname="CR52_0" Dcore="Cortex-R52" Dfpu="1" Dmpu="1" Dtz="NO_TZ" Ddsp="1" Dendian="Little-endian" Dclock="400000000" DcoreVersion="r1p2" DnumInterrupts="448" DnumSauRegions="0"/>
+    </device>
+    <resources>
+        <memories>
+            <memory name="ATCM" type="RAM" start="0x00000000" size="0x00020000" security=""/>
+            <memory name="BTCM" type="RAM" start="0x00100000" size="0x00020000" security=""/>
+            <memory name="SYSTEM_RAM" type="RAM" start="0x10000000" size="0x00180000" security=""/>
+            <memory name="SYSTEM_RAM_MIRROR" type="RAM" start="0x30000000" size="0x00180000" security=""/>
+            <memory name="xSPI0_CS0_SPACE_MIRROR" type="ROM" start="0x40000000" size="0x04000000" security=""/>
+            <memory name="xSPI0_CS1_SPACE_MIRROR" type="ROM" start="0x44000000" size="0x04000000" security=""/>
+            <memory name="xSPI1_CS0_SPACE_MIRROR" type="ROM" start="0x48000000" size="0x04000000" security=""/>
+            <memory name="CS0_SPACE_MIRROR" type="ROM" start="0x50000000" size="0x04000000" security=""/>
+            <memory name="CS2_SPACE_MIRROR" type="ROM" start="0x54000000" size="0x04000000" security=""/>
+            <memory name="CS3_SPACE_MIRROR" type="ROM" start="0x58000000" size="0x04000000" security=""/>
+            <memory name="CS5_SPACE_MIRROR" type="ROM" start="0x5C000000" size="0x04000000" security=""/>
+            <memory name="xSPI0_CS0_SPACE" type="ROM" start="0x60000000" size="0x04000000" security=""/>
+            <memory name="xSPI0_CS1_SPACE" type="ROM" start="0x64000000" size="0x04000000" security=""/>
+            <memory name="xSPI1_CS0_SPACE" type="ROM" start="0x68000000" size="0x04000000" security=""/>
+            <memory name="CS0_SPACE" type="ROM" start="0x70000000" size="0x04000000" security=""/>
+            <memory name="CS2_SPACE" type="ROM" start="0x74000000" size="0x04000000" security=""/>
+            <memory name="CS3_SPACE" type="ROM" start="0x78000000" size="0x04000000" security=""/>
+            <memory name="CS5_SPACE" type="ROM" start="0x7C000000" size="0x04000000" security=""/>
+        </memories>
+        <peripherals/>
+    </resources>
+</rzone>

projects/etherkit_ethercat_cherryecat/.secure_xml

@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<raConfiguration version="10">
+  <generalSettings>
+    <option key="#Board#" value="board.rzn2lrsk.xspi0_x1"/>
+    <option key="CPU" value="RZN2L"/>
+    <option key="Core" value="CR52_0"/>
+    <option key="#TargetName#" value="R9A07G084M04GBG"/>
+    <option key="#TargetARCHITECTURE#" value="cortex-r52"/>
+    <option key="#DeviceCommand#" value="R9A07G084M04"/>
+    <option key="#RTOS#" value="_none"/>
+    <option key="#pinconfiguration#" value="R9A07G084M04GBG.pincfg"/>
+    <option key="#FSPVersion#" value="2.2.0"/>
+    <option key="#ConfigurationFragments#" value="Renesas##BSP##Board##rzn2l_rsk##xspi0_x1_boot"/>
+    <option key="#SELECTED_TOOLCHAIN#" value="gcc-arm-embedded"/>
+    <option key="#ToolchainVersion#" value=""/>
+  </generalSettings>
+  <raBspConfiguration/>
+  <raClockConfiguration>
+    <node id="board.clock.main.freq" option="board.clock.main.freq.25m"/>
+    <node id="board.clock.loco.enable" option="board.clock.loco.enable.enabled"/>
+    <node id="board.clock.pll0.display" option="board.clock.pll0.display.value"/>
+    <node id="board.clock.pll1" option="board.clock.pll1.initial"/>
+    <node id="board.clock.pll1.display" option="board.clock.pll1.display.value"/>
+    <node id="board.clock.ethernet.source" option="board.clock.ethernet.source.main"/>
+    <node id="board.clock.reference.display" option="board.clock.reference.display.value"/>
+    <node id="board.clock.loco.freq" option="board.clock.loco.freq.240k"/>
+    <node id="board.clock.clma0.enable" option="board.clock.clma0.enable.enabled"/>
+    <node id="board.clock.clma0.error" option="board.clock.clma0.error.not_mask"/>
+    <node id="board.clock.clma3.error" option="board.clock.clma3.error.not_mask"/>
+    <node id="board.clock.clma1.error" option="board.clock.clma1.error.mask"/>
+    <node id="board.clock.clma3.enable" option="board.clock.clma3.enable.enabled"/>
+    <node id="board.clock.clma1.enable" option="board.clock.clma1.enable.enabled"/>
+    <node id="board.clock.clma2.enable" option="board.clock.clma2.enable.enabled"/>
+    <node id="board.clock.clma0.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma1.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma2.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma3.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.alternative.source" option="board.clock.alternative.source.loco"/>
+    <node id="board.clock.clma0.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma1.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma2.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma3.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.iclk.freq" option="board.clock.iclk.freq.200m"/>
+    <node id="board.clock.cpu0clk.mul" option="board.clock.cpu0clk.mul.2"/>
+    <node id="board.clock.cpu0clk.display" option="board.clock.cpu0clk.display.value"/>
+    <node id="board.clock.ckio.div" option="board.clock.ckio.div.4"/>
+    <node id="board.clock.ckio.display" option="board.clock.ckio.display.value"/>
+    <node id="board.clock.sci0asyncclk.sel" option="board.clock.sci0asyncclk.sel.1"/>
+    <node id="board.clock.sci1asyncclk.sel" option="board.clock.sci1asyncclk.sel.1"/>
+    <node id="board.clock.sci2asyncclk.sel" option="board.clock.sci2asyncclk.sel.1"/>
+    <node id="board.clock.sci3asyncclk.sel" option="board.clock.sci3asyncclk.sel.1"/>
+    <node id="board.clock.sci4asyncclk.sel" option="board.clock.sci4asyncclk.sel.1"/>
+    <node id="board.clock.sci5asyncclk.sel" option="board.clock.sci5asyncclk.sel.1"/>
+    <node id="board.clock.spi0asyncclk.sel" option="board.clock.spi0asyncclk.sel.1"/>
+    <node id="board.clock.spi1asyncclk.sel" option="board.clock.spi1asyncclk.sel.1"/>
+    <node id="board.clock.spi2asyncclk.sel" option="board.clock.spi2asyncclk.sel.1"/>
+    <node id="board.clock.spi3asyncclk.sel" option="board.clock.spi3asyncclk.sel.1"/>
+    <node id="board.clock.pclkshost.display" option="board.clock.pclkshost.display.value"/>
+    <node id="board.clock.pclkgptl.display" option="board.clock.pclkgptl.display.value"/>
+    <node id="board.clock.pclkh.display" option="board.clock.pclkh.display.value"/>
+    <node id="board.clock.pclkm.display" option="board.clock.pclkm.display.value"/>
+    <node id="board.clock.pclkl.display" option="board.clock.pclkl.display.value"/>
+    <node id="board.clock.pclkadc.display" option="board.clock.pclkadc.display.value"/>
+    <node id="board.clock.pclkcan.freq" option="board.clock.pclkcan.freq.40m"/>
+    <node id="board.clock.pclkcan.freq.display" option="board.clock.pclkcan.freq.display.value"/>
+    <node id="board.clock.xspi.clk0.freq" option="board.clock.xspi.clk0.freq.133m"/>
+    <node id="board.clock.xspi.clk1.freq" option="board.clock.xspi.clk1.freq.12m"/>
+    <node id="board.clock.tclk.freq" option="board.clock.tclk.freq.100m"/>
+  </raClockConfiguration>
+  <raPinConfiguration>
+    <pincfg active="true" name="" symbol="">
+      <configSetting altId="canfd0.canrx0.p01_7" configurationId="canfd0.canrx0" peripheral="CANFD0"/>
+      <configSetting altId="canfd0.cantx0.p02_2" configurationId="canfd0.cantx0" peripheral="CANFD0"/>
+      <configSetting altId="ether_eth0.eth0_refclk.p09_1" configurationId="ether_eth0.eth0_refclk" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxclk_ref_clk_rxc.p08_6" configurationId="ether_eth0.eth0_rxclk_ref_clk_rxc" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxd0.p10_1" configurationId="ether_eth0.eth0_rxd0" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxd1.p10_2" configurationId="ether_eth0.eth0_rxd1" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxd2.p10_3" configurationId="ether_eth0.eth0_rxd2" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxd3.p08_4" configurationId="ether_eth0.eth0_rxd3" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_rxdv_crsdv_rxctl.p08_5" configurationId="ether_eth0.eth0_rxdv_crsdv_rxctl" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txclk_txc.p09_7" configurationId="ether_eth0.eth0_txclk_txc" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txd0.p09_6" configurationId="ether_eth0.eth0_txd0" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txd1.p09_5" configurationId="ether_eth0.eth0_txd1" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txd2.p09_4" configurationId="ether_eth0.eth0_txd2" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txd3.p09_3" configurationId="ether_eth0.eth0_txd3" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth0.eth0_txen_txctl.p10_0" configurationId="ether_eth0.eth0_txen_txctl" peripheral="ETHER_ETH0"/>
+      <configSetting altId="ether_eth1.eth1_refclk.p06_1" configurationId="ether_eth1.eth1_refclk" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxclk_ref_clk_rxc.p07_3" configurationId="ether_eth1.eth1_rxclk_ref_clk_rxc" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxd0.p06_6" configurationId="ether_eth1.eth1_rxd0" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxd1.p06_7" configurationId="ether_eth1.eth1_rxd1" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxd2.p07_0" configurationId="ether_eth1.eth1_rxd2" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxd3.p07_1" configurationId="ether_eth1.eth1_rxd3" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_rxdv_crsdv_rxctl.p07_2" configurationId="ether_eth1.eth1_rxdv_crsdv_rxctl" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txclk_txc.p06_4" configurationId="ether_eth1.eth1_txclk_txc" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txd0.p06_3" configurationId="ether_eth1.eth1_txd0" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txd1.p06_2" configurationId="ether_eth1.eth1_txd1" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txd2.p05_7" configurationId="ether_eth1.eth1_txd2" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txd3.p06_0" configurationId="ether_eth1.eth1_txd3" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth1.eth1_txen_txctl.p06_5" configurationId="ether_eth1.eth1_txen_txctl" peripheral="ETHER_ETH1"/>
+      <configSetting altId="ether_eth2.eth2_refclk.p00_3" configurationId="ether_eth2.eth2_refclk" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxclk_ref_clk_rxc.p24_1" configurationId="ether_eth2.eth2_rxclk_ref_clk_rxc" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxd0.p23_7" configurationId="ether_eth2.eth2_rxd0" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxd1.p24_0" configurationId="ether_eth2.eth2_rxd1" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxd2.p24_2" configurationId="ether_eth2.eth2_rxd2" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxd3.p00_0" configurationId="ether_eth2.eth2_rxd3" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_rxdv_crsdv_rxctl.p00_1" configurationId="ether_eth2.eth2_rxdv_crsdv_rxctl" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txclk_txc.p00_6" configurationId="ether_eth2.eth2_txclk_txc" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txd0.p01_5" configurationId="ether_eth2.eth2_txd0" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txd1.p01_4" configurationId="ether_eth2.eth2_txd1" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txd2.p01_3" configurationId="ether_eth2.eth2_txd2" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txd3.p01_2" configurationId="ether_eth2.eth2_txd3" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_eth2.eth2_txen_txctl.p00_2" configurationId="ether_eth2.eth2_txen_txctl" peripheral="ETHER_ETH2"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink0.p10_4" configurationId="ether_ethsw.ethsw_phylink0" peripheral="ETHER_ETHSW"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink1.p05_5" configurationId="ether_ethsw.ethsw_phylink1" peripheral="ETHER_ETHSW"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink2.p00_5" configurationId="ether_ethsw.ethsw_phylink2" peripheral="ETHER_ETHSW"/>
+      <configSetting altId="ether_gmac.gmac_mdc.p08_7" configurationId="ether_gmac.gmac_mdc" peripheral="ETHER_GMAC"/>
+      <configSetting altId="ether_gmac.gmac_mdio.p09_0" configurationId="ether_gmac.gmac_mdio" peripheral="ETHER_GMAC"/>
+      <configSetting altId="iic0.iic_scl0.p13_2" configurationId="iic0.iic_scl0" peripheral="IIC0"/>
+      <configSetting altId="iic0.iic_sda0.p13_3" configurationId="iic0.iic_sda0" peripheral="IIC0"/>
+      <configSetting altId="iic1.iic_scl1.p05_2" configurationId="iic1.iic_scl1" peripheral="IIC1"/>
+      <configSetting altId="iic1.iic_sda1.p05_3" configurationId="iic1.iic_sda1" peripheral="IIC1"/>
+      <configSetting altId="jtag_fslash_swd.tck_swclk.p02_7" configurationId="jtag_fslash_swd.tck_swclk" isUsedByDriver="true" peripheral="JTAG/SWD"/>
+      <configSetting altId="jtag_fslash_swd.tdi.p02_5" configurationId="jtag_fslash_swd.tdi" isUsedByDriver="true" peripheral="JTAG/SWD"/>
+      <configSetting altId="jtag_fslash_swd.tdo.p02_4" configurationId="jtag_fslash_swd.tdo" isUsedByDriver="true" peripheral="JTAG/SWD"/>
+      <configSetting altId="jtag_fslash_swd.tms_swdio.p02_6" configurationId="jtag_fslash_swd.tms_swdio" isUsedByDriver="true" peripheral="JTAG/SWD"/>
+      <configSetting altId="p03_0.output.low" configurationId="p03_0"/>
+      <configSetting altId="p04_1.output.low" configurationId="p04_1"/>
+      <configSetting altId="p04_4.output.low" configurationId="p04_4"/>
+      <configSetting altId="p05_0.output.low" configurationId="p05_0"/>
+      <configSetting altId="p05_4.input" configurationId="p05_4"/>
+      <configSetting altId="p13_4.output.low" configurationId="p13_4"/>
+      <configSetting altId="p13_5.input" configurationId="p13_5"/>
+      <configSetting altId="p13_6.input" configurationId="p13_6"/>
+      <configSetting altId="p13_7.input" configurationId="p13_7"/>
+      <configSetting altId="p14_0.output.low" configurationId="p14_0"/>
+      <configSetting altId="p14_1.output.low" configurationId="p14_1"/>
+      <configSetting altId="p14_3.output.low" configurationId="p14_3"/>
+      <configSetting altId="p16_3.input" configurationId="p16_3"/>
+      <configSetting altId="p17_3.output.low" configurationId="p17_3"/>
+      <configSetting altId="p18_2.output.low" configurationId="p18_2"/>
+      <configSetting altId="p20_1.output.low" configurationId="p20_1"/>
+      <configSetting altId="p20_2.output.low" configurationId="p20_2"/>
+      <configSetting altId="p20_3.output.low" configurationId="p20_3"/>
+      <configSetting altId="p20_4.output.low" configurationId="p20_4"/>
+      <configSetting altId="p22_1.output.low" configurationId="p22_1"/>
+      <configSetting altId="p22_3.output.low" configurationId="p22_3"/>
+      <configSetting altId="sci0.rxd_miso0.p16_6" configurationId="sci0.rxd_miso0" isUsedByDriver="true" peripheral="SCI0"/>
+      <configSetting altId="sci0.txd_mosi0.p16_5" configurationId="sci0.txd_mosi0" isUsedByDriver="true" peripheral="SCI0"/>
+      <configSetting altId="sci3.rxd_miso3.p17_7" configurationId="sci3.rxd_miso3" peripheral="SCI3"/>
+      <configSetting altId="sci3.txd_mosi3.p18_0" configurationId="sci3.txd_mosi3" peripheral="SCI3"/>
+      <configSetting altId="spi2.spi_miso2.p18_6" configurationId="spi2.spi_miso2" peripheral="SPI2"/>
+      <configSetting altId="spi2.spi_mosi2.p18_5" configurationId="spi2.spi_mosi2" peripheral="SPI2"/>
+      <configSetting altId="spi2.spi_rspck2.p18_4" configurationId="spi2.spi_rspck2" peripheral="SPI2"/>
+      <configSetting altId="spi2.spi_ssl20.p21_1" configurationId="spi2.spi_ssl20" peripheral="SPI2"/>
+      <configSetting altId="usb_hs.usb_ovrcur.p17_5" configurationId="usb_hs.usb_ovrcur" peripheral="USB_HS"/>
+      <configSetting altId="usb_hs.usb_vbusen.p19_0" configurationId="usb_hs.usb_vbusen" peripheral="USB_HS"/>
+      <configSetting altId="usb_hs.usb_vbusin.p07_4" configurationId="usb_hs.usb_vbusin" peripheral="USB_HS"/>
+      <configSetting altId="xspi0.xspi0_ckn.p14_5" configurationId="xspi0.xspi0_ckn" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_ckp.p14_6" configurationId="xspi0.xspi0_ckp" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_cs0_hash.p15_7" configurationId="xspi0.xspi0_cs0_hash" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_cs1_hash.p16_0" configurationId="xspi0.xspi0_cs1_hash" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_ds.p14_4" configurationId="xspi0.xspi0_ds" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_ecs0_hash.p14_2" configurationId="xspi0.xspi0_ecs0_hash" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io0.p14_7" configurationId="xspi0.xspi0_io0" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io1.p15_0" configurationId="xspi0.xspi0_io1" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io2.p15_1" configurationId="xspi0.xspi0_io2" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io3.p15_2" configurationId="xspi0.xspi0_io3" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io4.p15_3" configurationId="xspi0.xspi0_io4" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io5.p15_4" configurationId="xspi0.xspi0_io5" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io6.p15_5" configurationId="xspi0.xspi0_io6" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_io7.p15_6" configurationId="xspi0.xspi0_io7" peripheral="XSPI0"/>
+      <configSetting altId="xspi0.xspi0_reset0_hash.p16_1" configurationId="xspi0.xspi0_reset0_hash" peripheral="XSPI0"/>
+    </pincfg>
+  </raPinConfiguration>
+</raConfiguration>

projects/etherkit_ethercat_cherryecat/.settings/etherkit_ethernet.JLink.Debug.rttlaunch

@@ -0,0 +1,93 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="J-Link"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.binFileStartAddress" value="0x60000000"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${studio_install_path}/repo/Extract/ToolChain_Support_Packages/ARM/GNU_Tools_for_ARM_Embedded_Processors/10.2.1/bin/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="etherkit_ethercat_cherryecat"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/etherkit_ethercat_cherryecat"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="UTF-8"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>

projects/etherkit_ethercat_cherryecat/.settings/ilg.gnumcueclipse.managedbuild.cross.arm.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+toolchain.path.1287942917=${toolchain_install_path}/ARM/GNU_Tools_for_ARM_Embedded_Processors/10.2.1/bin

projects/etherkit_ethercat_cherryecat/.settings/language.settings.xml

@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1293010401648171129" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

projects/etherkit_ethercat_cherryecat/.settings/local_temp_storage.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+temp.toolchain.exec.path=C\:\\Softwares\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\ARM\\GNU_Tools_for_ARM_Embedded_Processors\\10.2.1/bin

projects/etherkit_ethercat_cherryecat/.settings/org.eclipse.core.resources.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+rtt-studio.preferences.renesas.configurator.root=C\:\\Renesas\\rzn\\sc_v2025-01_fsp_v2.2.0

projects/etherkit_ethercat_cherryecat/.settings/org.eclipse.core.runtime.prefs

@@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1

projects/etherkit_ethercat_cherryecat/.settings/projcfg.ini

@@ -0,0 +1,20 @@
+#RT-Thread Studio Project Configuration
+#Mon Sep 29 17:43:37 CST 2025
+project_type=rt-thread
+chip_name=R9A07G084
+os_branch=full
+example_name=
+os_version=5.1.0
+selected_rtt_version=5.1.0
+cfg_version=v3.0
+board_base_nano_proj=False
+is_use_scons_build=True
+output_project_path=C\:\\Users\\RTT\\Desktop\\github\\sdk-bsp-rzn2l-etherkit\\projects
+project_base_bsp=true
+hardware_adapter=J-Link
+project_name=etherkit_ethercat_cherryecat
+is_base_example_project=False
+board_name=EtherKit
+device_vendor=RENESAS
+bsp_path=repo/Extract/Board_Support_Packages/RealThread/EtherKit/1.3.0
+bsp_version=1.3.0

projects/etherkit_ethercat_cherryecat/Kconfig

@@ -0,0 +1,34 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "rt-thread"
+
+# you can change the RTT_ROOT default "rt-thread"
+# example : default "F:/git_repositories/rt-thread"
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+config ENV_DIR
+    string
+    option env="ENV_ROOT"
+    default "/"
+
+config PLATFORM_DIR
+    string
+    option env="PLATFORM_DIR"
+    default "C:/Users/RTT/Desktop/github/sdk-bsp-rzn2l-etherkit/projects/etherkit_ethercat_cherryecat/platform"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "libraries/Kconfig"
+source "$BSP_DIR/board/Kconfig"

projects/etherkit_ethercat_cherryecat/README.md

@@ -0,0 +1,51 @@
+# CherryECAT Driver Usage Instructions
+
+**English** | [**中文**](./README_zh.md)
+
+## Introduction
+
+This project provides cherryecat demo.
+
+## Hardware Connection
+
+To use Ethernet, connect the development board to any one of the three network ports using an Ethernet cable, and the other end should be connected to a network switch that has internet access.
+
+## FSP Configuration Instructions
+
+Open the project configuration file `configuration.xml` and add the `r_gamc` stack:
+
+![image-20241126104408737](figures/image-20241126104408737.png)
+
+Next, click on `g_ether0 Ethernet`, and configure the interrupt callback function to `user_ether0_callback`:
+
+![image-20241126104422910](figures/image-20241126104422910.png)
+
+Now configure the PHY settings. Select `g_ether_phy0`, set the common configuration to "User Own Target", change the PHY LSI address to `1` (refer to the schematic for the exact address), and set the PHY initialization callback function to `ether_phy_targets_initialize_rtl8211_rgmii()`. Also, set the MDIO to GMAC.
+
+![image-20241126104437432](figures/image-20241126104437432.png)
+
+Next, configure `g_ether_selector0`, set the Ethernet mode to "Switch Mode", set the PHY link to "Default Active-Low", and choose "RGMII" for the PHY interface mode.
+
+![image-20241126104519290](figures/image-20241126104519290.png)
+
+Configure the Ethernet pin parameters and select the operating mode to RGMII:
+
+![image-20241126104533098](figures/image-20241126104533098.png)
+
+Finally, configure `ETHER_GMAC`:
+
+![image-20241126104603633](figures/image-20241126104603633.png)
+
+## RT-Thread Studio Configuration
+
+Return to the Studio project, and configure RT-Thread Settings. Click on "Hardware", find the chip device driver, and enable Ethernet:
+
+![image-20241126104852383](figures/image-20241126104852383.png)
+
+## Running Results
+
+![cherryecat](figures/cherryecat1.png)
+![cherryecat](figures/cherryecat2.png)
+![cherryecat](figures/cherryecat3.png)
+![cherryecat](figures/cherryecat4.png)
+![cherryecat](figures/cherryecat5.png)

projects/etherkit_ethercat_cherryecat/README_zh.md

@@ -0,0 +1,51 @@
+# CherryECAT 驱动示例
+
+**中文** | [**English**](./README.md)
+
+## 简介
+
+本工程提供 cherryecat 的基础功能
+
+## 硬件连接
+
+需要使用网线连接到开发板的三网口其中任意一个网口，另一头连接到可以联网的交换机上。
+
+## FSP配置说明
+
+打开工程配置文件configuration.xml，新增r_gamc Stack：
+
+![image-20241126104408737](figures/image-20241126104408737.png)
+
+点击g_ether0 Ethernet，配置中断回调函数为user_ether0_callback：
+
+![image-20241126104422910](figures/image-20241126104422910.png)
+
+下面配置phy信息，选择g_ether_phy0，Common配置为User Own Target；修改PHY LSI地址为1（根据原理图查询具体地址）；设置phy初始化回调函数为ether_phy_targets_initialize_rtl8211_rgmii()；同时设置MDIO为GMAC。
+
+![image-20241126104437432](figures/image-20241126104437432.png)
+
+配置g_ether_selector0，选择以太网模式为交换机模式，PHY link设置为默认active-low，PHY接口模式设置为RGMII。
+
+![image-20241126104519290](figures/image-20241126104519290.png)
+
+网卡引脚参数配置，选择操作模式为RGMII：
+
+![image-20241126104533098](figures/image-20241126104533098.png)
+
+ETHER_GMAC配置：
+
+![image-20241126104603633](figures/image-20241126104603633.png)
+
+## RT-Thread Studio配置
+
+回到Studio工程，配置RT-Thread Settings，点击选择硬件选项，找到芯片设备驱动，使能以太网；
+
+![image-20241126104852383](figures/image-20241126104852383.png)
+
+## 运行效果
+
+![cherryecat](figures/cherryecat1.png)
+![cherryecat](figures/cherryecat2.png)
+![cherryecat](figures/cherryecat3.png)
+![cherryecat](figures/cherryecat4.png)
+![cherryecat](figures/cherryecat5.png)

projects/etherkit_ethercat_cherryecat/SConscript

@@ -0,0 +1,27 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+from gcc import *
+
+cwd = GetCurrentDir()
+src = []
+CPPPATH = [cwd]
+group = []
+list = os.listdir(cwd)
+
+CPPDEFINES = ['_RZN_ORDINAL=1']
+
+if rtconfig.PLATFORM in ['iccarm'] + GetGCCLikePLATFORM():
+    if rtconfig.PLATFORM == 'iccarm' or GetOption('target') != 'mdk5':
+        CPPPATH = [cwd + '/src']
+        src = Glob('./src/*.c')
+        group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        group = group + SConscript(os.path.join(d, 'SConscript'))
+
+Return('group')

projects/etherkit_ethercat_cherryecat/SConstruct

@@ -0,0 +1,56 @@
+import os
+import sys
+import rtconfig
+
+if os.path.exists('rt-thread'):
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/rt-thread')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '../../../rt-thread')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except Exception as e:
+    print("Error message:", e.message)
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    sys.exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM in ['iccarm']:
+    env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/../libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+rtconfig.BSP_LIBRARY_TYPE = None
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)

projects/etherkit_ethercat_cherryecat/board/Kconfig

@@ -0,0 +1,572 @@
+menu "Hardware Drivers Config"
+
+    config SOC_R9A07G084
+        bool
+        select SOC_SERIES_R9A07G0
+        select RT_USING_COMPONENTS_INIT
+        select RT_USING_USER_MAIN
+        default y
+
+    menu "Onboard Peripheral Drivers"
+
+    endmenu
+
+    menu "On-chip Peripheral Drivers"
+
+        source "libraries/HAL_Drivers/Kconfig"
+
+        menuconfig BSP_USING_UART
+            bool "Enable UART"
+            default y
+            select RT_USING_SERIAL
+            select RT_USING_SERIAL_V2
+            if BSP_USING_UART
+                menuconfig BSP_USING_UART0
+                    bool "Enable UART0"
+                    default n
+                    if BSP_USING_UART0
+                        config BSP_UART0_RX_USING_DMA
+                            bool "Enable UART0 RX DMA"
+                            depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
+                            default n
+
+                        config BSP_UART0_TX_USING_DMA
+                            bool "Enable UART0 TX DMA"
+                            depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
+                            default n
+
+                        config BSP_UART0_RX_BUFSIZE
+                            int "Set UART0 RX buffer size"
+                            range 64 65535
+                            depends on RT_USING_SERIAL_V2
+                            default 256
+
+                        config BSP_UART0_TX_BUFSIZE
+                            int "Set UART0 TX buffer size"
+                            range 0 65535
+                            depends on RT_USING_SERIAL_V2
+                            default 0
+                    endif
+                    
+                menuconfig BSP_USING_UART5
+                    bool "Enable UART5"
+                    default n
+                    if BSP_USING_UART5
+                        config BSP_UART5_RX_USING_DMA
+                            bool "Enable UART5 RX DMA"
+                            depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
+                            default n
+
+                        config BSP_UART5_TX_USING_DMA
+                            bool "Enable UART5 TX DMA"
+                            depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
+                            default n
+
+                        config BSP_UART5_RX_BUFSIZE
+                            int "Set UART5 RX buffer size"
+                            range 64 65535
+                            depends on RT_USING_SERIAL_V2
+                            default 256
+
+                        config BSP_UART5_TX_BUFSIZE
+                            int "Set UART5 TX buffer size"
+                            range 0 65535
+                            depends on RT_USING_SERIAL_V2
+                            default 0
+                    endif
+            endif
+
+        menuconfig BSP_USING_ADC
+            bool "Enable ADC"
+            default n
+            select RT_USING_ADC
+            if BSP_USING_ADC
+                config BSP_USING_ADC0
+                    bool "Enable ADC0"
+                config BSP_USING_ADC1
+                    bool "Enable ADC1"
+                config BSP_USING_ADC2
+                    bool "Enable ADC2"
+                config BSP_USING_ADC3
+                    bool "Enable ADC3"                    
+                    default n
+            endif
+
+        menuconfig BSP_USING_CANFD
+            bool "Enable CANFD"
+            default n
+            select RT_USING_CAN
+            select RT_CAN_USING_CANFD
+            if BSP_USING_CANFD
+            	config BSP_USING_CAN_RZ
+                    bool "Enabled this option means turning on standard CAN, while disabling it means switching to CANFD."
+                    default n
+                config BSP_USING_CANFD0
+                    bool "Enable CANFD0"
+                    default n
+                config BSP_USING_CANFD1
+                    bool "Enable CANFD1"
+                    default n
+            endif
+
+        menuconfig BSP_USING_SCI
+            bool "Enable SCI Controller"
+            default n
+            config BSP_USING_SCIn_SPI
+                bool
+                depends on BSP_USING_SCI
+                select RT_USING_SPI
+                default n
+
+            config BSP_USING_SCIn_I2C
+                bool
+                depends on BSP_USING_SCI
+                select RT_USING_I2C
+                default n
+
+            config BSP_USING_SCIn_UART
+                bool
+                depends on BSP_USING_SCI
+                select RT_USING_SERIAL
+                select RT_USING_SERIAL_V2
+                default n
+
+            if BSP_USING_SCI
+                config BSP_USING_SCI0
+                    bool "Enable SCI0"
+                    default n
+                    if BSP_USING_SCI0
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI0_SPI
+                        config BSP_USING_SCI0_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI0_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI0_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI0_UART
+                            config BSP_SCI0_UART_RX_BUFSIZE
+                                int "Set UART0 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI0_UART_TX_BUFSIZE
+                                int "Set UART0 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI1
+                    bool "Enable SCI1"
+                    default n
+                    if BSP_USING_SCI1
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI1_SPI
+                        config BSP_USING_SCI1_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI1_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI1_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI1_UART
+                            config BSP_SCI1_UART_RX_BUFSIZE
+                                int "Set UART1 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI1_UART_TX_BUFSIZE
+                                int "Set UART1 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI2
+                    bool "Enable SCI2"
+                    default n
+                    if BSP_USING_SCI2
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI2_SPI
+                        config BSP_USING_SCI2_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI2_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI2_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI2_UART
+                            config BSP_SCI2_UART_RX_BUFSIZE
+                                int "Set UART2 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI2_UART_TX_BUFSIZE
+                                int "Set UART2 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI3
+                    bool "Enable SCI3"
+                    default n
+                    if BSP_USING_SCI3
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI3_SPI
+                        config BSP_USING_SCI3_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI3_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI3_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI3_UART
+                            config BSP_SCI3_UART_RX_BUFSIZE
+                                int "Set UART3 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI3_UART_TX_BUFSIZE
+                                int "Set UART3 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI4
+                    bool "Enable SCI4"
+                    default n
+                    if BSP_USING_SCI4
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI4_SPI
+                        config BSP_USING_SCI4_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI4_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI4_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI4_UART
+                            config BSP_SCI4_UART_RX_BUFSIZE
+                                int "Set UART4 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI4_UART_TX_BUFSIZE
+                                int "Set UART4 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI5
+                    bool "Enable SCI5"
+                    default n
+                    if BSP_USING_SCI5
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI5_SPI
+                        config BSP_USING_SCI5_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI5_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI5_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI5_UART
+                            config BSP_SCI5_UART_RX_BUFSIZE
+                                int "Set UART5 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI5_UART_TX_BUFSIZE
+                                int "Set UART5 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI6
+                    bool "Enable SCI6"
+                    default n
+                    if BSP_USING_SCI6
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI6_SPI
+                        config BSP_USING_SCI6_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI6_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI6_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI6_UART
+                            config BSP_SCI6_UART_RX_BUFSIZE
+                                int "Set UART6 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI6_UART_TX_BUFSIZE
+                                int "Set UART6 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI7
+                    bool "Enable SCI7"
+                    default n
+                    if BSP_USING_SCI7
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI7_SPI
+                        config BSP_USING_SCI7_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI7_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI7_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI7_UART
+                            config BSP_SCI7_UART_RX_BUFSIZE
+                                int "Set UART7 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI7_UART_TX_BUFSIZE
+                                int "Set UART7 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI8
+                    bool "Enable SCI8"
+                    default n
+                    if BSP_USING_SCI8
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI8_SPI
+                        config BSP_USING_SCI8_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI8_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI8_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI8_UART
+                            config BSP_SCI8_UART_RX_BUFSIZE
+                                int "Set UART8 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI8_UART_TX_BUFSIZE
+                                int "Set UART8 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+                config BSP_USING_SCI9
+                    bool "Enable SCI9"
+                    default n
+                    if BSP_USING_SCI9
+                        choice
+                        prompt "choice sci mode"
+                        default BSP_USING_SCI9_SPI
+                        config BSP_USING_SCI9_SPI
+                            select BSP_USING_SCIn_SPI
+                            bool "SPI mode"
+                        config BSP_USING_SCI9_I2C
+                            select BSP_USING_SCIn_I2C
+                            bool "I2C mode"
+                        config BSP_USING_SCI9_UART
+                            select BSP_USING_SCIn_UART
+                            bool "UART mode"
+                        endchoice
+                        if BSP_USING_SCI9_UART
+                            config BSP_SCI9_UART_RX_BUFSIZE
+                                int "Set UART9 RX buffer size"
+                                range 64 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 256
+
+                            config BSP_SCI9_UART_TX_BUFSIZE
+                                int "Set UART9 TX buffer size"
+                                range 0 65535
+                                depends on RT_USING_SERIAL_V2
+                                default 0
+                        endif
+                    endif
+            endif
+
+        config BSP_USING_HYPERRAM
+            bool "Enable XSPI0 CS1 Winbond octal hyperRAM"
+            default n
+
+        menuconfig BSP_USING_I2C
+            bool "Enable I2C BUS"
+            default n
+            select RT_USING_I2C
+            select RT_USING_I2C_BITOPS
+            select RT_USING_PIN
+            if BSP_USING_I2C
+                config BSP_USING_HW_I2C
+                    bool "Enable Hardware I2C BUS"
+                    default n
+                if BSP_USING_HW_I2C
+                    config BSP_USING_HW_I2C0
+                        bool "Enable Hardware I2C0 BUS"
+                        default n
+                endif
+                if BSP_USING_HW_I2C
+                    config BSP_USING_HW_I2C1
+                        bool "Enable Hardware I2C1 BUS"
+                        default n
+                endif
+            if !BSP_USING_HW_I2C
+                    menuconfig BSP_USING_I2C1
+                        bool "Enable I2C1 BUS (software simulation)"
+                        default y
+                        if BSP_USING_I2C1
+                            config BSP_I2C1_SCL_PIN
+                                hex "i2c1 scl pin number"
+                                range 0x0000 0x0B0F
+                                default 0x0B03
+                            config BSP_I2C1_SDA_PIN
+                                hex "I2C1 sda pin number"
+                                range 0x0000 0x0B0F
+                                default 0x050E
+                    endif
+                endif
+            endif
+
+        menuconfig BSP_USING_SPI
+            bool "Enable SPI BUS"
+            default n
+            select RT_USING_SPI
+            if BSP_USING_SPI 
+                config BSP_USING_SPI0
+                    bool "Enable SPI0 BUS"
+                    default n
+                config BSP_USING_SPI1
+                    bool "Enable SPI1 BUS"
+                    default n
+                config BSP_USING_SPI2
+                    bool "Enable SPI2 BUS"
+                    default n
+            endif
+
+        menuconfig BSP_USING_TIM
+	        bool "Enable timer"
+	        default n
+	        select RT_USING_HWTIMER
+	        if BSP_USING_TIM
+	            config BSP_USING_TIM0
+	                bool "Enable TIM0"
+	                default n
+	            config BSP_USING_TIM1
+	                bool "Enable TIM1"
+	                default n
+	        endif
+
+        menuconfig BSP_USING_PWM
+            bool "Enable PWM"
+            default n
+            select RT_USING_PWM
+            if BSP_USING_PWM
+                config BSP_USING_PWM5
+                    bool "Enable GPT5 (32-Bits) output PWM"
+                    default n
+            endif
+
+        config BSP_USING_ETH
+            bool "Enable Ethernet"
+            select RT_USING_SAL
+            select RT_USING_LWIP
+            select RT_USING_NETDEV
+            default n
+
+    endmenu
+    
+    menu "Board extended module Drivers"
+         menuconfig BSP_USING_RW007
+                bool "Enable RW007"
+                default n
+                select PKG_USING_RW007
+                select BSP_USING_SPI
+                select BSP_USING_SPI2
+                select RT_USING_MEMPOOL
+                select RW007_NOT_USE_EXAMPLE_DRIVERS
+
+            if BSP_USING_RW007
+                config RA_RW007_SPI_BUS_NAME
+                    string "RW007 BUS NAME"
+                    default "spi2"
+
+                config RA_RW007_CS_PIN
+                    hex "(HEX)CS pin index"
+                    default 0x1207
+
+                config RA_RW007_BOOT0_PIN
+                    hex "(HEX)BOOT0 pin index (same as spi clk pin)"
+                    default 0x1204
+
+                config RA_RW007_BOOT1_PIN
+                    hex "(HEX)BOOT1 pin index (same as spi cs pin)"
+                    default 0x1207
+
+                config RA_RW007_INT_BUSY_PIN
+                    hex "(HEX)INT/BUSY pin index"
+                    default 0x1102
+
+                config RA_RW007_RST_PIN
+                    hex "(HEX)RESET pin index"
+                    default 0x1706
+            endif
+    endmenu
+endmenu

projects/etherkit_ethercat_cherryecat/board/SConscript

@@ -0,0 +1,16 @@
+import os
+from building import *
+
+objs = []
+cwd  = GetCurrentDir()
+list = os.listdir(cwd)
+CPPPATH = [cwd]
+src = Glob('*.c')
+
+objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')

projects/etherkit_ethercat_cherryecat/board/board.h

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-03-11    Wangyuqiang   first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtdef.h>
+#include <cp15.h>
+#include <hal_data.h>
+
+#define RZ_SRAM_SIZE    1536 /* The SRAM size of the chip needs to be modified */
+#define RZ_SRAM_END     (0x10000000 + RZ_SRAM_SIZE * 1024 - 1)
+
+#ifdef __ARMCC_VERSION
+extern int Image$$RAM_END$$ZI$$Base;
+#define HEAP_BEGIN  ((void *)&Image$$RAM_END$$ZI$$Base)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end__;
+#define HEAP_BEGIN      ((void *)&__bss_end__)
+#endif
+
+#define HEAP_END        RZ_SRAM_END
+
+/***********************************************************************************************************************
+ * Macro definitions
+ **********************************************************************************************************************/
+#define MAX_HANDLERS BSP_VECTOR_TABLE_MAX_ENTRIES
+#define GIC_IRQ_START   0
+#define GIC_ACK_INTID_MASK  (0x000003FFU)
+/* number of interrupts on board */
+#define ARM_GIC_NR_IRQS     (448)
+/* only one GIC available */
+#define ARM_GIC_MAX_NR      1
+/*  end defined */
+
+#define GICV3_DISTRIBUTOR_BASE_ADDR     (0x100000)
+
+/* the basic constants and interfaces needed by gic */
+rt_inline rt_uint32_t platform_get_gic_dist_base(void)
+{
+    rt_uint32_t gic_base;
+
+    __get_cp(15, 1, gic_base, 15, 3, 0);
+    return gic_base + GICV3_DISTRIBUTOR_BASE_ADDR;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

projects/etherkit_ethercat_cherryecat/board/ec_config.h

@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_CONFIG_H
+#define EC_CONFIG_H
+
+#include "rtthread.h"
+
+#define CONFIG_EC_PRINTF(...) rt_kprintf(__VA_ARGS__)
+
+#ifndef CONFIG_EC_DBG_LEVEL
+#define CONFIG_EC_DBG_LEVEL EC_DBG_INFO
+#endif
+
+#ifndef CONFIG_EC_SLAVE_DBG_LEVEL
+#define CONFIG_EC_SLAVE_DBG_LEVEL EC_DBG_INFO
+#endif
+
+/* Enable print with color */
+#define CONFIG_EC_PRINTF_COLOR_ENABLE
+
+#define EC_FAST_CODE_SECTION
+
+#ifndef CONFIG_EC_MAX_NETDEVS
+#define CONFIG_EC_MAX_NETDEVS 1
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_PRIO
+#define CONFIG_EC_NONPERIOD_PRIO 0
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_STACKSIZE
+#define CONFIG_EC_NONPERIOD_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_INTERVAL_MS
+#define CONFIG_EC_NONPERIOD_INTERVAL_MS 10
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_WAITERS
+#define CONFIG_EC_NONPERIOD_WAITERS 20
+#endif
+
+#ifndef CONFIG_EC_SCAN_PRIO
+#define CONFIG_EC_SCAN_PRIO 1
+#endif
+
+#ifndef CONFIG_EC_SCAN_STACKSIZE
+#define CONFIG_EC_SCAN_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_SCAN_INTERVAL_MS
+#define CONFIG_EC_SCAN_INTERVAL_MS 100
+#endif
+
+#ifndef CONFIG_EC_PER_SM_MAX_PDOS
+#define CONFIG_EC_PER_SM_MAX_PDOS 8
+#endif
+
+#ifndef CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES
+#define CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES 8
+#endif
+
+#define CONFIG_EC_PERF_ENABLE
+#define CONFIG_EC_CMD_ENABLE
+#define CONFIG_EC_TIMESTAMP_CUSTOM
+#define CONFIG_EC_PHY_CUSTOM
+
+#ifndef CONFIG_EC_MAX_PDO_BUFSIZE
+#define CONFIG_EC_MAX_PDO_BUFSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_TXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_TXBUF_COUNT 10
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_RXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_RXBUF_COUNT 10
+#endif
+
+// #define CONFIG_EC_FOE
+
+#endif

projects/etherkit_ethercat_cherryecat/board/ports/SConscript

@@ -0,0 +1,16 @@
+import os
+from building import *
+
+objs = []
+src = Glob('*.c')
+cwd  = GetCurrentDir()
+CPPPATH = [cwd]
+
+objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')

projects/etherkit_ethercat_cherryecat/board/ports/gpio_cfg.h

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2024-03-11    Wangyuqiang   first version
+ */
+
+/* Number of IRQ channels on the device */
+#define RA_IRQ_MAX  16
+
+/* PIN to IRQx table */
+#define PIN2IRQX_TABLE                      \
+{                                           \
+    switch (pin)                            \
+    {                                       \
+    case BSP_IO_PORT_00_PIN_1:             \
+    case BSP_IO_PORT_09_PIN_2:             \
+    case BSP_IO_PORT_18_PIN_3:             \
+        return 0;                           \
+    case BSP_IO_PORT_00_PIN_3:             \
+    case BSP_IO_PORT_07_PIN_4:             \
+    case BSP_IO_PORT_18_PIN_4:             \
+        return 1;                           \
+    case BSP_IO_PORT_01_PIN_2:             \
+        return 2;                           \
+    case BSP_IO_PORT_01_PIN_4:             \
+        return 3;                           \
+    case BSP_IO_PORT_02_PIN_0:             \
+    case BSP_IO_PORT_22_PIN_2:             \
+        return 4;                           \
+    case BSP_IO_PORT_03_PIN_5:             \
+    case BSP_IO_PORT_13_PIN_2:             \
+        return 5;                           \
+    case BSP_IO_PORT_14_PIN_2:             \
+    case BSP_IO_PORT_21_PIN_5:             \
+        return 6;                           \
+    case BSP_IO_PORT_16_PIN_3:             \
+        return 7;                           \
+    case BSP_IO_PORT_03_PIN_6:             \
+    case BSP_IO_PORT_16_PIN_6:             \
+        return 8;                           \
+    case BSP_IO_PORT_03_PIN_7:             \
+    case BSP_IO_PORT_21_PIN_6:             \
+        return 9;                           \
+    case BSP_IO_PORT_04_PIN_4:             \
+    case BSP_IO_PORT_18_PIN_1:             \
+    case BSP_IO_PORT_21_PIN_7:             \
+        return 10;                          \
+    case BSP_IO_PORT_10_PIN_4:             \
+    case BSP_IO_PORT_18_PIN_6:             \
+        return 11;                          \
+    case BSP_IO_PORT_05_PIN_0:             \
+    case BSP_IO_PORT_05_PIN_4:             \
+    case BSP_IO_PORT_05_PIN_6:             \
+        return 12;                          \
+    case BSP_IO_PORT_00_PIN_4:             \
+    case BSP_IO_PORT_00_PIN_7:             \
+    case BSP_IO_PORT_05_PIN_1:             \
+        return 13;                          \
+    case BSP_IO_PORT_02_PIN_2:             \
+    case BSP_IO_PORT_03_PIN_0:             \
+    case BSP_IO_PORT_05_PIN_2:             \
+        return 14;                          \
+    case BSP_IO_PORT_02_PIN_3:             \
+    case BSP_IO_PORT_05_PIN_3:             \
+    case BSP_IO_PORT_22_PIN_0:             \
+        return 15;                          \
+    default  :                              \
+        return -1;                          \
+    }                                       \
+}

projects/etherkit_ethercat_cherryecat/buildinfo.ipcf

@@ -0,0 +1,40 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<iarProjectConnection version="1.8" name="Flex Software">
+    <device>
+        <name>R9A07G084M04</name>
+    </device>
+    <includePath>
+    </includePath>
+    <defines>
+        <define>_RZN_ORDINAL=1</define>
+        <define>_RZN_CORE=CR52_0</define>
+        <define>_RENESAS_RZN_</define>
+    </defines>
+    <asmIncludePath>
+    </asmIncludePath>
+    <asmDefines>
+        <define>_RZN_ORDINAL=1</define>
+        <define>_RZN_CORE=CR52_0</define>
+        <define>_RENESAS_RZN_</define>
+    </asmDefines>
+    <linkerFile>
+        <override>true</override>
+        <path>$PROJ_DIR$/script/fsp_xspi0_boot.icf</path>
+    </linkerFile>
+    <linkerExtraOptions>
+        <arg>--config_search "$PROJ_DIR$"</arg>
+    </linkerExtraOptions>
+    <programEntryPoint>
+        <symbol>system_init</symbol>
+    </programEntryPoint>
+    <customArgVars>
+        <group name="RA Smart Configurator">
+            <argVar>
+                <name>RASC_EXE_PATH</name>
+                <value>C:\Renesas\rzn\sc_v2024-01.1_fsp_v2.0.0\eclipse\rasc.exe</value>
+            </argVar>
+        </group>
+    </customArgVars>
+    <files>
+    </files>
+</iarProjectConnection>

projects/etherkit_ethercat_cherryecat/buildinfo.json

@@ -0,0 +1,35 @@
+{
+  "definedMacros": [
+    "_RZN_ORDINAL=1",
+    "_RZN_CORE=CR52_0",
+    "_RENESAS_RZN_"
+  ],
+  "sourcePaths": [
+    "rzn",
+    "rzn_gen",
+    "src"
+  ],
+  "excludedFilePaths": [],
+  "includePaths": [
+    "rzn/arm/CMSIS_5/CMSIS/Core_A/Include",
+    "rzn/arm/CMSIS_5/CMSIS/Core_R/Include",
+    "rzn/fsp/inc",
+    "rzn/fsp/inc/api",
+    "rzn/fsp/inc/instances",
+    "rzn/fsp/src/bsp/mcu/all/cr",
+    "rzn_cfg/fsp_cfg",
+    "rzn_cfg/fsp_cfg/bsp",
+    "rzn_gen",
+    "src"
+  ],
+  "libraryPaths": [],
+  "libraryNames": [],
+  "objectFiles": [],
+  "linkerScript": "script/fsp_xspi0_boot.ld",
+  "targetDeviceName": "R9A07G084M04GBG",
+  "entrySymbol": "system_init",
+  "isPreBuildContentGenEnabled": true,
+  "isPostBuildContentGenEnabled": true,
+  "isTargetDeviceSupportsTrustZone": false,
+  "buildOptionsMap": {}
+}

projects/etherkit_ethercat_cherryecat/configuration.xml

@@ -0,0 +1,1694 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<raConfiguration version="10">
+  <generalSettings>
+    <option key="#Board#" value="board.rzn2lrsk.xspi0_x1"/>
+    <option key="CPU" value="RZN2L"/>
+    <option key="Core" value="CR52_0"/>
+    <option key="#TargetName#" value="R9A07G084M04GBG"/>
+    <option key="#TargetARCHITECTURE#" value="cortex-r52"/>
+    <option key="#DeviceCommand#" value="R9A07G084M04"/>
+    <option key="#RTOS#" value="_none"/>
+    <option key="#pinconfiguration#" value="R9A07G084M04GBG.pincfg"/>
+    <option key="#FSPVersion#" value="2.2.0"/>
+    <option key="#ConfigurationFragments#" value="Renesas##BSP##Board##rzn2l_rsk##xspi0_x1_boot"/>
+    <option key="#SELECTED_TOOLCHAIN#" value="gcc-arm-embedded"/>
+    <option key="#ToolchainVersion#" value=""/>
+  </generalSettings>
+  <raBspConfiguration>
+    <config id="config.board.rzn2lrsk.xspi0_x1">
+      <property id="config.board.cache_flg" value="0x00000000"/>
+      <property id="config.board.wrapcfg_v" value="0x00000000"/>
+      <property id="config.board.comcfg_v" value="0x00000000"/>
+      <property id="config.board.bmcfg_v" value="0x00000000"/>
+      <property id="config.board.xspi_flg" value="0x00000000"/>
+      <property id="config.board.ldr_addr_nml" value="0x6000004C"/>
+      <property id="config.board.ldr_size_nml" value="0x00006000"/>
+      <property id="config.board.dest_addr_nml" value="0x00102000"/>
+      <property id="config.board.cssctl_v" value="0x0000003F"/>
+      <property id="config.board.liocfgcs0_v" value="0x00070000"/>
+      <property id="config.board.access_speed" value="0x00000006"/>
+      <property id="config.board.check_sum" value="Auto Calculate."/>
+      <property id="config.board.use_loader_parameter" value="config.board.use_loader_parameter.used"/>
+    </config>
+    <config id="config.bsp.rzn2l.R9A07G084M04GBG">
+      <property id="config.bsp.part_number" value="config.bsp.part_number.value"/>
+      <property id="config.bsp.atcm_size_bytes" value="config.bsp.atcm_size_bytes.value"/>
+      <property id="config.bsp.btcm_size_bytes" value="config.bsp.btcm_size_bytes.value"/>
+      <property id="config.bsp.system_ram_size_bytes" value="config.bsp.system_ram_size_bytes.value"/>
+      <property id="config.bsp.package_style" value="config.bsp.package_style.value"/>
+      <property id="config.bsp.package_pins" value="config.bsp.package_pins.value"/>
+      <property id="config.bsp.cpu" value="config.bsp.cpu.cpu0"/>
+    </config>
+    <config id="config.bsp.rzn2l.cr520_mpu">
+      <property id="config.bsp.fsp.mpu0_read_reg0" value="config.bsp.fsp.mpu0_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg0" value="config.bsp.fsp.mpu0_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg0_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg1" value="config.bsp.fsp.mpu0_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg1" value="config.bsp.fsp.mpu0_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg1_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg2" value="config.bsp.fsp.mpu0_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg2" value="config.bsp.fsp.mpu0_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg2_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg3" value="config.bsp.fsp.mpu0_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg3" value="config.bsp.fsp.mpu0_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg3_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg4" value="config.bsp.fsp.mpu0_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg4" value="config.bsp.fsp.mpu0_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg4_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg5" value="config.bsp.fsp.mpu0_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg5" value="config.bsp.fsp.mpu0_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg5_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg6" value="config.bsp.fsp.mpu0_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg6" value="config.bsp.fsp.mpu0_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg6_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu0_read_reg7" value="config.bsp.fsp.mpu0_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu0_write_reg7" value="config.bsp.fsp.mpu0_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu0_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu0_reg7_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg0" value="config.bsp.fsp.mpu1_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg0" value="config.bsp.fsp.mpu1_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg0_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg1" value="config.bsp.fsp.mpu1_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg1" value="config.bsp.fsp.mpu1_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg1_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg2" value="config.bsp.fsp.mpu1_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg2" value="config.bsp.fsp.mpu1_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg2_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg3" value="config.bsp.fsp.mpu1_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg3" value="config.bsp.fsp.mpu1_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg3_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg4" value="config.bsp.fsp.mpu1_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg4" value="config.bsp.fsp.mpu1_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg4_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg5" value="config.bsp.fsp.mpu1_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg5" value="config.bsp.fsp.mpu1_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg5_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg6" value="config.bsp.fsp.mpu1_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg6" value="config.bsp.fsp.mpu1_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg6_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu1_read_reg7" value="config.bsp.fsp.mpu1_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu1_write_reg7" value="config.bsp.fsp.mpu1_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu1_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu1_reg7_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg0" value="config.bsp.fsp.mpu2_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg0" value="config.bsp.fsp.mpu2_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg0_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg1" value="config.bsp.fsp.mpu2_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg1" value="config.bsp.fsp.mpu2_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg1_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg2" value="config.bsp.fsp.mpu2_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg2" value="config.bsp.fsp.mpu2_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg2_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg3" value="config.bsp.fsp.mpu2_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg3" value="config.bsp.fsp.mpu2_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg3_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg4" value="config.bsp.fsp.mpu2_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg4" value="config.bsp.fsp.mpu2_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg4_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg5" value="config.bsp.fsp.mpu2_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg5" value="config.bsp.fsp.mpu2_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg5_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg6" value="config.bsp.fsp.mpu2_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg6" value="config.bsp.fsp.mpu2_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg6_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu2_read_reg7" value="config.bsp.fsp.mpu2_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu2_write_reg7" value="config.bsp.fsp.mpu2_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu2_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu2_reg7_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu3_read_reg0" value="config.bsp.fsp.mpu3_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg0" value="config.bsp.fsp.mpu3_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg0_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg1" value="config.bsp.fsp.mpu3_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg1" value="config.bsp.fsp.mpu3_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg1_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg2" value="config.bsp.fsp.mpu3_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg2" value="config.bsp.fsp.mpu3_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg2_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg3" value="config.bsp.fsp.mpu3_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg3" value="config.bsp.fsp.mpu3_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg3_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg4" value="config.bsp.fsp.mpu3_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg4" value="config.bsp.fsp.mpu3_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg4_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg5" value="config.bsp.fsp.mpu3_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg5" value="config.bsp.fsp.mpu3_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg5_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg6" value="config.bsp.fsp.mpu3_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg6" value="config.bsp.fsp.mpu3_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg6_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_read_reg7" value="config.bsp.fsp.mpu3_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu3_write_reg7" value="config.bsp.fsp.mpu3_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu3_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu3_reg7_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg0" value="config.bsp.fsp.mpu4_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg0" value="config.bsp.fsp.mpu4_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg0_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg1" value="config.bsp.fsp.mpu4_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg1" value="config.bsp.fsp.mpu4_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg1_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg2" value="config.bsp.fsp.mpu4_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg2" value="config.bsp.fsp.mpu4_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg2_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg3" value="config.bsp.fsp.mpu4_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg3" value="config.bsp.fsp.mpu4_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg3_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg4" value="config.bsp.fsp.mpu4_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg4" value="config.bsp.fsp.mpu4_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg4_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg5" value="config.bsp.fsp.mpu4_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg5" value="config.bsp.fsp.mpu4_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg5_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg6" value="config.bsp.fsp.mpu4_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg6" value="config.bsp.fsp.mpu4_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg6_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_read_reg7" value="config.bsp.fsp.mpu4_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu4_write_reg7" value="config.bsp.fsp.mpu4_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu4_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu4_reg7_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_read_reg0" value="config.bsp.fsp.mpu6_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg0" value="config.bsp.fsp.mpu6_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg0_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg1" value="config.bsp.fsp.mpu6_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg1" value="config.bsp.fsp.mpu6_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg1_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg2" value="config.bsp.fsp.mpu6_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg2" value="config.bsp.fsp.mpu6_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg2_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg3" value="config.bsp.fsp.mpu6_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg3" value="config.bsp.fsp.mpu6_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg3_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg4" value="config.bsp.fsp.mpu6_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg4" value="config.bsp.fsp.mpu6_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg4_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg5" value="config.bsp.fsp.mpu6_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg5" value="config.bsp.fsp.mpu6_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg5_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg6" value="config.bsp.fsp.mpu6_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg6" value="config.bsp.fsp.mpu6_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg6_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu6_read_reg7" value="config.bsp.fsp.mpu6_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu6_write_reg7" value="config.bsp.fsp.mpu6_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu6_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu6_reg7_end" value="0x00000C00"/>
+      <property id="config.bsp.fsp.mpu7_read_reg0" value="config.bsp.fsp.mpu7_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg0" value="config.bsp.fsp.mpu7_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg0_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg1" value="config.bsp.fsp.mpu7_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg1" value="config.bsp.fsp.mpu7_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg1_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg2" value="config.bsp.fsp.mpu7_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg2" value="config.bsp.fsp.mpu7_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg2_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg3" value="config.bsp.fsp.mpu7_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg3" value="config.bsp.fsp.mpu7_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg3_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg4" value="config.bsp.fsp.mpu7_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg4" value="config.bsp.fsp.mpu7_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg4_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg5" value="config.bsp.fsp.mpu7_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg5" value="config.bsp.fsp.mpu7_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg5_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg6" value="config.bsp.fsp.mpu7_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg6" value="config.bsp.fsp.mpu7_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg6_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_read_reg7" value="config.bsp.fsp.mpu7_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu7_write_reg7" value="config.bsp.fsp.mpu7_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu7_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu7_reg7_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg0" value="config.bsp.fsp.mpu8_read_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg0" value="config.bsp.fsp.mpu8_write_reg0.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg0_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg0_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg1" value="config.bsp.fsp.mpu8_read_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg1" value="config.bsp.fsp.mpu8_write_reg1.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg1_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg1_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg2" value="config.bsp.fsp.mpu8_read_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg2" value="config.bsp.fsp.mpu8_write_reg2.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg2_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg2_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg3" value="config.bsp.fsp.mpu8_read_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg3" value="config.bsp.fsp.mpu8_write_reg3.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg3_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg3_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg4" value="config.bsp.fsp.mpu8_read_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg4" value="config.bsp.fsp.mpu8_write_reg4.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg4_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg4_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg5" value="config.bsp.fsp.mpu8_read_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg5" value="config.bsp.fsp.mpu8_write_reg5.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg5_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg5_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg6" value="config.bsp.fsp.mpu8_read_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg6" value="config.bsp.fsp.mpu8_write_reg6.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg6_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg6_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_read_reg7" value="config.bsp.fsp.mpu8_read_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu8_write_reg7" value="config.bsp.fsp.mpu8_write_reg7.disabled"/>
+      <property id="config.bsp.fsp.mpu8_reg7_start" value="0x00000000"/>
+      <property id="config.bsp.fsp.mpu8_reg7_end" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.type" value="config.bsp.fsp.cpu.mpu_attr0.type.normal_memory"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.inner" value="config.bsp.fsp.cpu.mpu_attr0.memory.inner.write_back_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr0.memory.inner.read.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr0.memory.inner.write.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.outer" value="config.bsp.fsp.cpu.mpu_attr0.memory.outer.write_back_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr0.memory.outer.read.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr0.memory.outer.write.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr0.device" value="config.bsp.fsp.cpu.mpu_attr0.device.nGnRnE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.type" value="config.bsp.fsp.cpu.mpu_attr1.type.normal_memory"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.inner" value="config.bsp.fsp.cpu.mpu_attr1.memory.inner.write_through_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr1.memory.inner.read.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr1.memory.inner.write.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.outer" value="config.bsp.fsp.cpu.mpu_attr1.memory.outer.write_through_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr1.memory.outer.read.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr1.memory.outer.write.allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr1.device" value="config.bsp.fsp.cpu.mpu_attr1.device.nGnRnE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.type" value="config.bsp.fsp.cpu.mpu_attr2.type.normal_memory"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.inner" value="config.bsp.fsp.cpu.mpu_attr2.memory.inner.write_through_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr2.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr2.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.outer" value="config.bsp.fsp.cpu.mpu_attr2.memory.outer.write_through_non_transient"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr2.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr2.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr2.device" value="config.bsp.fsp.cpu.mpu_attr2.device.nGnRnE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.type" value="config.bsp.fsp.cpu.mpu_attr3.type.normal_memory"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.inner" value="config.bsp.fsp.cpu.mpu_attr3.memory.inner.non_chacheable"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr3.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr3.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.outer" value="config.bsp.fsp.cpu.mpu_attr3.memory.outer.non_chacheable"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr3.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr3.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr3.device" value="config.bsp.fsp.cpu.mpu_attr3.device.nGnRnE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.type" value="config.bsp.fsp.cpu.mpu_attr4.type.device"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.inner" value="config.bsp.fsp.cpu.mpu_attr4.memory.inner.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr4.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr4.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.outer" value="config.bsp.fsp.cpu.mpu_attr4.memory.outer.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr4.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr4.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr4.device" value="config.bsp.fsp.cpu.mpu_attr4.device.nGnRnE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.type" value="config.bsp.fsp.cpu.mpu_attr5.type.device"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.inner" value="config.bsp.fsp.cpu.mpu_attr5.memory.inner.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr5.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr5.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.outer" value="config.bsp.fsp.cpu.mpu_attr5.memory.outer.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr5.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr5.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr5.device" value="config.bsp.fsp.cpu.mpu_attr5.device.nGnRE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.type" value="config.bsp.fsp.cpu.mpu_attr6.type.device"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.inner" value="config.bsp.fsp.cpu.mpu_attr6.memory.inner.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr6.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr6.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.outer" value="config.bsp.fsp.cpu.mpu_attr6.memory.outer.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr6.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr6.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr6.device" value="config.bsp.fsp.cpu.mpu_attr6.device.nGRE"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.type" value="config.bsp.fsp.cpu.mpu_attr7.type.device"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.inner" value="config.bsp.fsp.cpu.mpu_attr7.memory.inner.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.inner.read" value="config.bsp.fsp.cpu.mpu_attr7.memory.inner.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.inner.write" value="config.bsp.fsp.cpu.mpu_attr7.memory.inner.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.outer" value="config.bsp.fsp.cpu.mpu_attr7.memory.outer.write_through"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.outer.read" value="config.bsp.fsp.cpu.mpu_attr7.memory.outer.read.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.memory.outer.write" value="config.bsp.fsp.cpu.mpu_attr7.memory.outer.write.not_allocate"/>
+      <property id="config.bsp.fsp.cpu.mpu_attr7.device" value="config.bsp.fsp.cpu.mpu_attr7.device.GRE"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.name" value="ATCM"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.limit" value="0x0001FFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.sh" value="config.bsp.fsp.cpu.mpu_reg00.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.ap" value="config.bsp.fsp.cpu.mpu_reg00.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.xn" value="config.bsp.fsp.cpu.mpu_reg00.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.attr_index" value="config.bsp.fsp.cpu.mpu_reg00.attr_index.atrr3"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg00.region_enable" value="config.bsp.fsp.cpu.mpu_reg00.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.name" value="BTCM"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.base" value="0x00100000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.limit" value="0x0011FFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.sh" value="config.bsp.fsp.cpu.mpu_reg01.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.ap" value="config.bsp.fsp.cpu.mpu_reg01.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.xn" value="config.bsp.fsp.cpu.mpu_reg01.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.attr_index" value="config.bsp.fsp.cpu.mpu_reg01.attr_index.atrr3"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg01.region_enable" value="config.bsp.fsp.cpu.mpu_reg01.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.name" value="System RAM"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.base" value="0x10000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.limit" value="0x1017FFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.sh" value="config.bsp.fsp.cpu.mpu_reg02.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.ap" value="config.bsp.fsp.cpu.mpu_reg02.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.xn" value="config.bsp.fsp.cpu.mpu_reg02.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.attr_index" value="config.bsp.fsp.cpu.mpu_reg02.attr_index.atrr1"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg02.region_enable" value="config.bsp.fsp.cpu.mpu_reg02.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.name" value="Mirror area of System RAM"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.base" value="0x30000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.limit" value="0x3017FFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.sh" value="config.bsp.fsp.cpu.mpu_reg03.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.ap" value="config.bsp.fsp.cpu.mpu_reg03.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.xn" value="config.bsp.fsp.cpu.mpu_reg03.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.attr_index" value="config.bsp.fsp.cpu.mpu_reg03.attr_index.atrr3"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg03.region_enable" value="config.bsp.fsp.cpu.mpu_reg03.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.name" value="Mirror area of external address space"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.base" value="0x40000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.limit" value="0x5FFFFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.sh" value="config.bsp.fsp.cpu.mpu_reg04.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.ap" value="config.bsp.fsp.cpu.mpu_reg04.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.xn" value="config.bsp.fsp.cpu.mpu_reg04.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.attr_index" value="config.bsp.fsp.cpu.mpu_reg04.attr_index.atrr3"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg04.region_enable" value="config.bsp.fsp.cpu.mpu_reg04.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.name" value="External address space"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.base" value="0x60000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.limit" value="0x7FFFFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.sh" value="config.bsp.fsp.cpu.mpu_reg05.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.ap" value="config.bsp.fsp.cpu.mpu_reg05.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.xn" value="config.bsp.fsp.cpu.mpu_reg05.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.attr_index" value="config.bsp.fsp.cpu.mpu_reg05.attr_index.atrr1"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg05.region_enable" value="config.bsp.fsp.cpu.mpu_reg05.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.name" value="Non-Safety Peripheral"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.base" value="0x80000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.limit" value="0x80FFFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.sh" value="config.bsp.fsp.cpu.mpu_reg06.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.ap" value="config.bsp.fsp.cpu.mpu_reg06.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.xn" value="config.bsp.fsp.cpu.mpu_reg06.xn.execute_never"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.attr_index" value="config.bsp.fsp.cpu.mpu_reg06.attr_index.atrr5"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg06.region_enable" value="config.bsp.fsp.cpu.mpu_reg06.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.name" value="Safety Peripheral"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.base" value="0x81000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.limit" value="0x81FFFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.sh" value="config.bsp.fsp.cpu.mpu_reg07.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.ap" value="config.bsp.fsp.cpu.mpu_reg07.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.xn" value="config.bsp.fsp.cpu.mpu_reg07.xn.execute_never"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.attr_index" value="config.bsp.fsp.cpu.mpu_reg07.attr_index.atrr5"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg07.region_enable" value="config.bsp.fsp.cpu.mpu_reg07.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.name" value="LLPP Peripheral"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.base" value="0x90000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.limit" value="0x901FFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.sh" value="config.bsp.fsp.cpu.mpu_reg08.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.ap" value="config.bsp.fsp.cpu.mpu_reg08.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.xn" value="config.bsp.fsp.cpu.mpu_reg08.xn.execute_never"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.attr_index" value="config.bsp.fsp.cpu.mpu_reg08.attr_index.atrr5"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg08.region_enable" value="config.bsp.fsp.cpu.mpu_reg08.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.name" value="GIC0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.base" value="0x94000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.limit" value="0x941FFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.sh" value="config.bsp.fsp.cpu.mpu_reg09.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.ap" value="config.bsp.fsp.cpu.mpu_reg09.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.xn" value="config.bsp.fsp.cpu.mpu_reg09.xn.execute_never"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.attr_index" value="config.bsp.fsp.cpu.mpu_reg09.attr_index.atrr4"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg09.region_enable" value="config.bsp.fsp.cpu.mpu_reg09.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.name" value="Debug Private"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.base" value="0xC0000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.limit" value="0xC0FFFFFF"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.sh" value="config.bsp.fsp.cpu.mpu_reg10.sh.outer_shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.ap" value="config.bsp.fsp.cpu.mpu_reg10.ap.rw_rw"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.xn" value="config.bsp.fsp.cpu.mpu_reg10.xn.execute_never"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.attr_index" value="config.bsp.fsp.cpu.mpu_reg10.attr_index.atrr4"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg10.region_enable" value="config.bsp.fsp.cpu.mpu_reg10.region_enable.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.sh" value="config.bsp.fsp.cpu.mpu_reg11.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.ap" value="config.bsp.fsp.cpu.mpu_reg11.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.xn" value="config.bsp.fsp.cpu.mpu_reg11.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.attr_index" value="config.bsp.fsp.cpu.mpu_reg11.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg11.region_enable" value="config.bsp.fsp.cpu.mpu_reg11.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.sh" value="config.bsp.fsp.cpu.mpu_reg12.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.ap" value="config.bsp.fsp.cpu.mpu_reg12.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.xn" value="config.bsp.fsp.cpu.mpu_reg12.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.attr_index" value="config.bsp.fsp.cpu.mpu_reg12.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg12.region_enable" value="config.bsp.fsp.cpu.mpu_reg12.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.sh" value="config.bsp.fsp.cpu.mpu_reg13.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.ap" value="config.bsp.fsp.cpu.mpu_reg13.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.xn" value="config.bsp.fsp.cpu.mpu_reg13.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.attr_index" value="config.bsp.fsp.cpu.mpu_reg13.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg13.region_enable" value="config.bsp.fsp.cpu.mpu_reg13.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.sh" value="config.bsp.fsp.cpu.mpu_reg14.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.ap" value="config.bsp.fsp.cpu.mpu_reg14.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.xn" value="config.bsp.fsp.cpu.mpu_reg14.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.attr_index" value="config.bsp.fsp.cpu.mpu_reg14.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg14.region_enable" value="config.bsp.fsp.cpu.mpu_reg14.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.sh" value="config.bsp.fsp.cpu.mpu_reg15.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.ap" value="config.bsp.fsp.cpu.mpu_reg15.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.xn" value="config.bsp.fsp.cpu.mpu_reg15.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.attr_index" value="config.bsp.fsp.cpu.mpu_reg15.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg15.region_enable" value="config.bsp.fsp.cpu.mpu_reg15.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.sh" value="config.bsp.fsp.cpu.mpu_reg16.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.ap" value="config.bsp.fsp.cpu.mpu_reg16.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.xn" value="config.bsp.fsp.cpu.mpu_reg16.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.attr_index" value="config.bsp.fsp.cpu.mpu_reg16.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg16.region_enable" value="config.bsp.fsp.cpu.mpu_reg16.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.sh" value="config.bsp.fsp.cpu.mpu_reg17.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.ap" value="config.bsp.fsp.cpu.mpu_reg17.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.xn" value="config.bsp.fsp.cpu.mpu_reg17.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.attr_index" value="config.bsp.fsp.cpu.mpu_reg17.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg17.region_enable" value="config.bsp.fsp.cpu.mpu_reg17.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.sh" value="config.bsp.fsp.cpu.mpu_reg18.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.ap" value="config.bsp.fsp.cpu.mpu_reg18.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.xn" value="config.bsp.fsp.cpu.mpu_reg18.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.attr_index" value="config.bsp.fsp.cpu.mpu_reg18.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg18.region_enable" value="config.bsp.fsp.cpu.mpu_reg18.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.sh" value="config.bsp.fsp.cpu.mpu_reg19.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.ap" value="config.bsp.fsp.cpu.mpu_reg19.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.xn" value="config.bsp.fsp.cpu.mpu_reg19.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.attr_index" value="config.bsp.fsp.cpu.mpu_reg19.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg19.region_enable" value="config.bsp.fsp.cpu.mpu_reg19.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.sh" value="config.bsp.fsp.cpu.mpu_reg20.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.ap" value="config.bsp.fsp.cpu.mpu_reg20.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.xn" value="config.bsp.fsp.cpu.mpu_reg20.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.attr_index" value="config.bsp.fsp.cpu.mpu_reg20.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg20.region_enable" value="config.bsp.fsp.cpu.mpu_reg20.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.sh" value="config.bsp.fsp.cpu.mpu_reg21.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.ap" value="config.bsp.fsp.cpu.mpu_reg21.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.xn" value="config.bsp.fsp.cpu.mpu_reg21.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.attr_index" value="config.bsp.fsp.cpu.mpu_reg21.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg21.region_enable" value="config.bsp.fsp.cpu.mpu_reg21.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.sh" value="config.bsp.fsp.cpu.mpu_reg22.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.ap" value="config.bsp.fsp.cpu.mpu_reg22.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.xn" value="config.bsp.fsp.cpu.mpu_reg22.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.attr_index" value="config.bsp.fsp.cpu.mpu_reg22.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg22.region_enable" value="config.bsp.fsp.cpu.mpu_reg22.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.name" value="Not Used"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.base" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.limit" value="0x00000000"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.sh" value="config.bsp.fsp.cpu.mpu_reg23.sh.non-shareable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.ap" value="config.bsp.fsp.cpu.mpu_reg23.ap.rw_none"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.xn" value="config.bsp.fsp.cpu.mpu_reg23.xn.execute_enable"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.attr_index" value="config.bsp.fsp.cpu.mpu_reg23.attr_index.atrr0"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg23.region_enable" value="config.bsp.fsp.cpu.mpu_reg23.region_enable.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg.br" value="config.bsp.fsp.cpu.mpu_reg.br.disabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg.i" value="config.bsp.fsp.cpu.mpu_reg.i.enabled"/>
+      <property id="config.bsp.fsp.cpu.mpu_reg.c" value="config.bsp.fsp.cpu.mpu_reg.c.enabled"/>
+    </config>
+    <config id="config.bsp.rzn2l">
+      <property id="config.bsp.common.fiq" value="0x400"/>
+      <property id="config.bsp.common.irq" value="0x400"/>
+      <property id="config.bsp.common.abt" value="0x400"/>
+      <property id="config.bsp.common.und" value="0x400"/>
+      <property id="config.bsp.common.sys" value="0x400"/>
+      <property id="config.bsp.common.svc" value="0x400"/>
+      <property id="config.bsp.common.heap" value="0x2000"/>
+      <property id="config.bsp.common.c_runtime_init" value="config.bsp.common.c_runtime_init.enabled"/>
+      <property id="config.bsp.common.tfu_mathlib" value="config.bsp.common.tfu_mathlib.enabled"/>
+    </config>
+    <config id="config.bsp.rzn2l.fsp">
+      <property id="config.bsp.fsp.mcu.sci_uart.ctspen_channels" value="0x03F"/>
+      <property id="config.bsp.fsp.mcu.sci_uart.max_baud" value="16000000"/>
+      <property id="config.bsp.fsp.mcu.sci_spi.max_bitrate" value="37500000"/>
+      <property id="config.bsp.fsp.mcu.spi.max_bitrate" value="50000000"/>
+      <property id="config.bsp.fsp.mcu.adc.sample_and_hold" value="1"/>
+      <property id="config.bsp.fsp.mcu.canfd.buffer_ram" value="4864"/>
+    </config>
+    <config id="config.bsp.rz">
+      <property id="config.bsp.common.vcc" value="3300"/>
+      <property id="config.bsp.common.checking" value="config.bsp.common.checking.disabled"/>
+      <property id="config.bsp.common.assert" value="config.bsp.common.assert.none"/>
+      <property id="config.bsp.common.error_log" value="config.bsp.common.error_log.none"/>
+      <property id="config.bsp.common.soft_reset" value="config.bsp.common.soft_reset.disabled"/>
+      <property id="config.bsp.common.port_protect" value="config.bsp.common.port_protect.enabled"/>
+      <property id="config.bsp.common.early_init" value="config.bsp.common.early_init.disabled"/>
+      <property id="config.bsp.common.multiplex_interrupt" value="config.bsp.common.multiplex_interrupt.disabled"/>
+    </config>
+  </raBspConfiguration>
+  <raClockConfiguration>
+    <node id="board.clock.main.freq" option="board.clock.main.freq.25m"/>
+    <node id="board.clock.loco.enable" option="board.clock.loco.enable.enabled"/>
+    <node id="board.clock.pll0.display" option="board.clock.pll0.display.value"/>
+    <node id="board.clock.pll1" option="board.clock.pll1.initial"/>
+    <node id="board.clock.pll1.display" option="board.clock.pll1.display.value"/>
+    <node id="board.clock.ethernet.source" option="board.clock.ethernet.source.main"/>
+    <node id="board.clock.reference.display" option="board.clock.reference.display.value"/>
+    <node id="board.clock.loco.freq" option="board.clock.loco.freq.240k"/>
+    <node id="board.clock.clma0.enable" option="board.clock.clma0.enable.enabled"/>
+    <node id="board.clock.clma0.error" option="board.clock.clma0.error.not_mask"/>
+    <node id="board.clock.clma3.error" option="board.clock.clma3.error.not_mask"/>
+    <node id="board.clock.clma1.error" option="board.clock.clma1.error.mask"/>
+    <node id="board.clock.clma3.enable" option="board.clock.clma3.enable.enabled"/>
+    <node id="board.clock.clma1.enable" option="board.clock.clma1.enable.enabled"/>
+    <node id="board.clock.clma2.enable" option="board.clock.clma2.enable.enabled"/>
+    <node id="board.clock.clma0.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma1.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma2.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.clma3.cmpl" mul="1" option="_edit"/>
+    <node id="board.clock.alternative.source" option="board.clock.alternative.source.loco"/>
+    <node id="board.clock.clma0.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma1.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma2.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.clma3.cmph" mul="1023" option="_edit"/>
+    <node id="board.clock.iclk.freq" option="board.clock.iclk.freq.200m"/>
+    <node id="board.clock.cpu0clk.mul" option="board.clock.cpu0clk.mul.2"/>
+    <node id="board.clock.cpu0clk.display" option="board.clock.cpu0clk.display.value"/>
+    <node id="board.clock.ckio.div" option="board.clock.ckio.div.4"/>
+    <node id="board.clock.ckio.display" option="board.clock.ckio.display.value"/>
+    <node id="board.clock.sci0asyncclk.sel" option="board.clock.sci0asyncclk.sel.1"/>
+    <node id="board.clock.sci1asyncclk.sel" option="board.clock.sci1asyncclk.sel.1"/>
+    <node id="board.clock.sci2asyncclk.sel" option="board.clock.sci2asyncclk.sel.1"/>
+    <node id="board.clock.sci3asyncclk.sel" option="board.clock.sci3asyncclk.sel.1"/>
+    <node id="board.clock.sci4asyncclk.sel" option="board.clock.sci4asyncclk.sel.1"/>
+    <node id="board.clock.sci5asyncclk.sel" option="board.clock.sci5asyncclk.sel.1"/>
+    <node id="board.clock.spi0asyncclk.sel" option="board.clock.spi0asyncclk.sel.1"/>
+    <node id="board.clock.spi1asyncclk.sel" option="board.clock.spi1asyncclk.sel.1"/>
+    <node id="board.clock.spi2asyncclk.sel" option="board.clock.spi2asyncclk.sel.1"/>
+    <node id="board.clock.spi3asyncclk.sel" option="board.clock.spi3asyncclk.sel.1"/>
+    <node id="board.clock.pclkshost.display" option="board.clock.pclkshost.display.value"/>
+    <node id="board.clock.pclkgptl.display" option="board.clock.pclkgptl.display.value"/>
+    <node id="board.clock.pclkh.display" option="board.clock.pclkh.display.value"/>
+    <node id="board.clock.pclkm.display" option="board.clock.pclkm.display.value"/>
+    <node id="board.clock.pclkl.display" option="board.clock.pclkl.display.value"/>
+    <node id="board.clock.pclkadc.display" option="board.clock.pclkadc.display.value"/>
+    <node id="board.clock.pclkcan.freq" option="board.clock.pclkcan.freq.40m"/>
+    <node id="board.clock.pclkcan.freq.display" option="board.clock.pclkcan.freq.display.value"/>
+    <node id="board.clock.xspi.clk0.freq" option="board.clock.xspi.clk0.freq.133m"/>
+    <node id="board.clock.xspi.clk1.freq" option="board.clock.xspi.clk1.freq.12m"/>
+    <node id="board.clock.tclk.freq" option="board.clock.tclk.freq.100m"/>
+  </raClockConfiguration>
+  <raComponentSelection>
+    <component apiversion="" class="Projects" condition="" group="all" subgroup="baremetal_blinky" variant="" vendor="Renesas" version="2.2.0">
+      <description>Simple application that blinks an LED. No RTOS included.</description>
+      <originalPack>Renesas.RZN_baremetal_blinky.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="Common" condition="" group="all" subgroup="fsp_common" variant="" vendor="Renesas" version="2.2.0">
+      <description>Board Support Package Common Files</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="BSP" condition="" group="all" subgroup="Memory" variant="" vendor="Renesas" version="2.2.0">
+      <description>Memory Config Checking</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ioport" variant="" vendor="Renesas" version="2.2.0">
+      <description>I/O Port</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="CMSIS" condition="" group="CMSIS5" subgroup="Core" variant="" vendor="Arm" version="5.7.0+renesas.3.fsp.2.2.0">
+      <description>Arm CMSIS Version 5 - Core</description>
+      <originalPack>Arm.CMSIS5.5.7.0+renesas.3.fsp.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="BSP" condition="" group="Board" subgroup="rzn2l_rsk" variant="xspi0_x1_boot" vendor="Renesas" version="2.2.0">
+      <description>RSK+RZN2L Board Support Files (xSPI0 x1 boot mode)</description>
+      <originalPack>Renesas.RZN_board_rzn2l_rsk.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="BSP" condition="" group="rzn2l" subgroup="device" variant="R9A07G084M04GBG" vendor="Renesas" version="2.2.0">
+      <description>Board support package for R9A07G084M04GBG</description>
+      <originalPack>Renesas.RZN_mcu_rzn2l.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="BSP" condition="" group="rzn2l" subgroup="device" variant="" vendor="Renesas" version="2.2.0">
+      <description>Board support package for RZN2L</description>
+      <originalPack>Renesas.RZN_mcu_rzn2l.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="BSP" condition="" group="rzn2l" subgroup="fsp" variant="" vendor="Renesas" version="2.2.0">
+      <description>Board support package for RZN2L - FSP Data</description>
+      <originalPack>Renesas.RZN_mcu_rzn2l.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_sci_uart" variant="" vendor="Renesas" version="2.2.0">
+      <description>SCI UART</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ether_phy" variant="" vendor="Renesas" version="2.2.0">
+      <description>Ethernet PHY</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ether_selector" variant="" vendor="Renesas" version="2.2.0">
+      <description>Ethernet Selector</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ethsw" variant="" vendor="Renesas" version="2.2.0">
+      <description>Ethernet Switch</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_gmac" variant="" vendor="Renesas" version="2.2.0">
+      <description>Ethernet</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_gpt" variant="" vendor="Renesas" version="2.2.0">
+      <description>General PWM Timer</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_mtu3" variant="" vendor="Renesas" version="2.2.0">
+      <description>Multi-Function Timer Pulse Unit 3</description>
+      <originalPack>Renesas.RZN.2.2.0.pack</originalPack>
+    </component>
+  </raComponentSelection>
+  <raElcConfiguration/>
+  <raIcuConfiguration/>
+  <raModuleConfiguration>
+    <module id="module.driver.ioport_on_ioport.0">
+      <property id="module.driver.ioport.name" value="g_ioport"/>
+      <property id="module.driver.ioport.elc_trigger_output_group1" value="_disabled"/>
+      <property id="module.driver.ioport.port_select_output_group1" value=""/>
+      <property id="module.driver.ioport.operation_output_group1" value="Low output"/>
+      <property id="module.driver.ioport.elc_trigger_output_group2" value="_disabled"/>
+      <property id="module.driver.ioport.port_select_output_group2" value=""/>
+      <property id="module.driver.ioport.operation_output_group2" value="Low output"/>
+      <property id="module.driver.ioport.elc_trigger_input_group1" value="_disabled"/>
+      <property id="module.driver.ioport.event_control_input_group1" value="Disabled"/>
+      <property id="module.driver.ioport.port_select_input_group1" value=""/>
+      <property id="module.driver.ioport.edge_detect_input_group1" value="Rising edge"/>
+      <property id="module.driver.ioport.buffer_overwrite_input_group1" value="Disabled"/>
+      <property id="module.driver.ioport.p16_0_initial_value_input_group1" value="module.driver.ioport.p16_0_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_1_initial_value_input_group1" value="module.driver.ioport.p16_1_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_2_initial_value_input_group1" value="module.driver.ioport.p16_2_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_3_initial_value_input_group1" value="module.driver.ioport.p16_3_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_4_initial_value_input_group1" value="module.driver.ioport.p16_4_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_5_initial_value_input_group1" value="module.driver.ioport.p16_5_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_6_initial_value_input_group1" value="module.driver.ioport.p16_6_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.p16_7_initial_value_input_group1" value="module.driver.ioport.p16_7_initial_value_input_group1.low"/>
+      <property id="module.driver.ioport.elc_trigger_input_group2" value="_disabled"/>
+      <property id="module.driver.ioport.event_control_input_group2" value="Disabled"/>
+      <property id="module.driver.ioport.port_select_input_group2" value=""/>
+      <property id="module.driver.ioport.edge_detect_input_group2" value="Rising edge"/>
+      <property id="module.driver.ioport.buffer_overwrite_input_group2" value="Disabled"/>
+      <property id="module.driver.ioport.p18_0_initial_value_input_group2" value="module.driver.ioport.p18_0_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_1_initial_value_input_group2" value="module.driver.ioport.p18_1_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_2_initial_value_input_group2" value="module.driver.ioport.p18_2_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_3_initial_value_input_group2" value="module.driver.ioport.p18_3_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_4_initial_value_input_group2" value="module.driver.ioport.p18_4_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_5_initial_value_input_group2" value="module.driver.ioport.p18_5_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_6_initial_value_input_group2" value="module.driver.ioport.p18_6_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.p18_7_initial_value_input_group2" value="module.driver.ioport.p18_7_initial_value_input_group2.low"/>
+      <property id="module.driver.ioport.event_control_single_port0" value="Disabled"/>
+      <property id="module.driver.ioport.event_direction_single_port0" value="Output direction"/>
+      <property id="module.driver.ioport.port_number_single_port0" value="module.driver.ioport.port_number_single_port0.p16_0"/>
+      <property id="module.driver.ioport.elc_trigger_single_output_port0" value="_disabled"/>
+      <property id="module.driver.ioport.operation_single_output_port0" value="Low output"/>
+      <property id="module.driver.ioport.edge_detect_single_output_port0" value="Rising edge"/>
+      <property id="module.driver.ioport.event_control_single_port1" value="Disabled"/>
+      <property id="module.driver.ioport.event_direction_single_port1" value="Output direction"/>
+      <property id="module.driver.ioport.port_number_single_port1" value="module.driver.ioport.port_number_single_port1.p16_0"/>
+      <property id="module.driver.ioport.elc_trigger_single_output_port1" value="_disabled"/>
+      <property id="module.driver.ioport.operation_single_output_port1" value="Low output"/>
+      <property id="module.driver.ioport.edge_detect_single_output_port1" value="Rising edge"/>
+      <property id="module.driver.ioport.event_control_single_port2" value="Disabled"/>
+      <property id="module.driver.ioport.event_direction_single_port2" value="Output direction"/>
+      <property id="module.driver.ioport.port_number_single_port2" value="module.driver.ioport.port_number_single_port2.p16_0"/>
+      <property id="module.driver.ioport.elc_trigger_single_output_port2" value="_disabled"/>
+      <property id="module.driver.ioport.operation_single_output_port2" value="Low output"/>
+      <property id="module.driver.ioport.edge_detect_single_output_port2" value="Rising edge"/>
+      <property id="module.driver.ioport.event_control_single_port3" value="Disabled"/>
+      <property id="module.driver.ioport.event_direction_single_port3" value="Output direction"/>
+      <property id="module.driver.ioport.port_number_single_port3" value="module.driver.ioport.port_number_single_port3.p16_0"/>
+      <property id="module.driver.ioport.elc_trigger_single_output_port3" value="_disabled"/>
+      <property id="module.driver.ioport.operation_single_output_port3" value="Low output"/>
+      <property id="module.driver.ioport.edge_detect_single_output_port3" value="Rising edge"/>
+    </module>
+    <module id="module.bsp.memory_config.0"/>
+    <module id="module.driver.uart_on_sci_uart.1968866849">
+      <property id="module.driver.uart.name" value="g_uart0"/>
+      <property id="module.driver.uart.channel" value="0"/>
+      <property id="module.driver.uart.data_bits" value="module.driver.uart.data_bits.data_bits_8"/>
+      <property id="module.driver.uart.parity" value="module.driver.uart.parity.parity_off"/>
+      <property id="module.driver.uart.stop_bits" value="module.driver.uart.stop_bits.stop_bits_1"/>
+      <property id="module.driver.uart.baud" value="115200"/>
+      <property id="module.driver.uart.baudrate_modulation" value="module.driver.uart.baudrate_modulation.disabled"/>
+      <property id="module.driver.uart.baudrate_max_err" value="5"/>
+      <property id="module.driver.uart.clock_source" value="module.driver.uart.clock_source.scinasyncclk"/>
+      <property id="module.driver.uart.flow_control" value="module.driver.uart.flow_control.rts"/>
+      <property id="module.driver.uart.pin_control_port" value="module.driver.uart.pin_control_port.PORT_DISABLE"/>
+      <property id="module.driver.uart.pin_control_pin" value="module.driver.uart.pin_control_pin.PIN_DISABLE"/>
+      <property id="module.driver.uart.clk_src" value="module.driver.uart.clk_src.int_clk"/>
+      <property id="module.driver.uart.rx_edge_start" value="module.driver.uart.rx_edge_start.falling_edge"/>
+      <property id="module.driver.uart.noisecancel_en" value="module.driver.uart.noisecancel_en.disabled"/>
+      <property id="module.driver.uart.rx_fifo_trigger" value="module.driver.uart.rx_fifo_trigger.max"/>
+      <property id="module.driver.uart.rs485.de_enable" value="module.driver.uart.rs485.de_enable.disabled"/>
+      <property id="module.driver.uart.rs485.de_polarity" value="module.driver.uart.rs485.de_polarity.high"/>
+      <property id="module.driver.uart.rs485.de_assertion_time" value="1"/>
+      <property id="module.driver.uart.rs485.de_negation_time" value="1"/>
+      <property id="module.driver.uart.callback" value="user_uart0_callback"/>
+      <property id="module.driver.uart.rxi_ipl" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.uart.txi_ipl" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority12"/>
+    </module>
+    <module id="module.driver.ether_on_ether.1094288014">
+      <property id="module.driver.ether.name" value="g_ether0"/>
+      <property id="module.driver.ether.channel" value="module.driver.ether.channel.0"/>
+      <property id="module.driver.ether.mac_address" value="00:11:22:33:44:55"/>
+      <property id="module.driver.ether.mac_address_1" value="NULL"/>
+      <property id="module.driver.ether.mac_address_2" value="NULL"/>
+      <property id="module.driver.ether.zerocopy" value="module.driver.ether.zerocopy.1"/>
+      <property id="module.driver.ether.flow_control" value="module.driver.ether.flow_control.disable"/>
+      <property id="module.driver.ether.promiscuous" value="module.driver.ether.promiscuous.1"/>
+      <property id="module.driver.ether.num_tx_descriptors" value="8"/>
+      <property id="module.driver.ether.num_rx_descriptors" value="8"/>
+      <property id="module.driver.ether.ether_buffer_size" value="1524"/>
+      <property id="module.driver.ether.sbd_interrupt_priority" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.ether.pmt_interrupt_priority" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.ether.p_callback" value="user_ether0_callback"/>
+      <property id="module.driver.ether.phylink" value="module.driver.ether.phylink.disable"/>
+    </module>
+    <module id="module.driver.ether_phy_on_ether_phy.277662383">
+      <property id="module.driver.ether_phy.name" value="g_ether_phy0"/>
+      <property id="module.driver.ether_phy.channel" value="module.driver.ether_phy.channel.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_address" value="1"/>
+      <property id="module.driver.ether_phy.phy_reset_wait_time" value="0x00020000"/>
+      <property id="module.driver.ether_phy.flow_control" value="module.driver.ether_phy.flow_control.disable"/>
+      <property id="module.driver.ether_phy.port_type" value="module.driver.ether_phy.port_type.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_type" value="module.driver.ether_phy.phy_lsi_type.custom"/>
+      <property id="module.driver.ether_phy.target_init" value="ether_phy_targets_initialize_rtl8211_rgmii"/>
+      <property id="module.driver.ether_phy.mdio_type" value="module.driver.ether_phy.mdio_type.0"/>
+      <property id="module.driver.ether_phy.auto_negotiation" value="module.driver.ether_phy.auto_negotiation.1"/>
+      <property id="module.driver.ether_phy.bps" value="module.driver.ether_phy.bps.3"/>
+      <property id="module.driver.ether_phy.duplex" value="module.driver.ether_phy.duplex.1"/>
+      <property id="module.driver.ether_phy.reset_port" value="module.driver.ether_phy.reset_port.PORT_13"/>
+      <property id="module.driver.ether_phy.reset_pin" value="module.driver.ether_phy.reset_pin.PIN_04"/>
+      <property id="module.driver.ether_phy.reset_time" value="15000"/>
+    </module>
+    <module id="module.driver.ether_selector_on_ether_selector.305883093">
+      <property id="module.driver.ether_selector.name" value="g_ether_selector0"/>
+      <property id="module.driver.ether_selector.channel" value="module.driver.ether_selector.channel.0"/>
+      <property id="module.driver.ether_selector.phylink" value="module.driver.ether_selector.phylink.low"/>
+      <property id="module.driver.ether_selector.interface_type" value="module.driver.ether_selector.interface_type.rgmii"/>
+      <property id="module.driver.ether_selector.speed" value="module.driver.ether_selector.speed.bps1000m"/>
+      <property id="module.driver.ether_selector.duplex" value="module.driver.ether_selector.duplex.full"/>
+      <property id="module.driver.ether_selector.ref_clock" value="module.driver.ether_selector.ref_clock.input"/>
+    </module>
+    <module id="module.driver.ether_switch_on_ether_switch.95659619">
+      <property id="module.driver.ethsw.name" value="g_ethsw0"/>
+      <property id="module.driver.ethsw.channel" value="module.driver.ethsw.channel.0"/>
+      <property id="module.driver.ethsw.specific_tag" value="module.driver.ethsw.specific_tag.0"/>
+      <property id="module.driver.ethsw.specific_tag_id" value="0xE001"/>
+      <property id="module.driver.ethsw.phylink" value="module.driver.ethsw.phylink.disable"/>
+      <property id="module.driver.ethsw.priority" value="board.icu.common.irq.priority12"/>
+      <property id="module.driver.ethsw.p_callback" value="NULL"/>
+      <property id="module.driver.ethsw.p_context" value="NULL"/>
+    </module>
+    <module id="module.driver.ether_phy_on_ether_phy.518802053">
+      <property id="module.driver.ether_phy.name" value="g_ether_phy1"/>
+      <property id="module.driver.ether_phy.channel" value="module.driver.ether_phy.channel.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_address" value="2"/>
+      <property id="module.driver.ether_phy.phy_reset_wait_time" value="0x00020000"/>
+      <property id="module.driver.ether_phy.flow_control" value="module.driver.ether_phy.flow_control.disable"/>
+      <property id="module.driver.ether_phy.port_type" value="module.driver.ether_phy.port_type.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_type" value="module.driver.ether_phy.phy_lsi_type.custom"/>
+      <property id="module.driver.ether_phy.target_init" value="ether_phy_targets_initialize_rtl8211_rgmii"/>
+      <property id="module.driver.ether_phy.mdio_type" value="module.driver.ether_phy.mdio_type.0"/>
+      <property id="module.driver.ether_phy.auto_negotiation" value="module.driver.ether_phy.auto_negotiation.1"/>
+      <property id="module.driver.ether_phy.bps" value="module.driver.ether_phy.bps.3"/>
+      <property id="module.driver.ether_phy.duplex" value="module.driver.ether_phy.duplex.1"/>
+      <property id="module.driver.ether_phy.reset_port" value="module.driver.ether_phy.reset_port.PORT_13"/>
+      <property id="module.driver.ether_phy.reset_pin" value="module.driver.ether_phy.reset_pin.PIN_04"/>
+      <property id="module.driver.ether_phy.reset_time" value="15000"/>
+    </module>
+    <module id="module.driver.ether_selector_on_ether_selector.671552947">
+      <property id="module.driver.ether_selector.name" value="g_ether_selector1"/>
+      <property id="module.driver.ether_selector.channel" value="module.driver.ether_selector.channel.0"/>
+      <property id="module.driver.ether_selector.phylink" value="module.driver.ether_selector.phylink.low"/>
+      <property id="module.driver.ether_selector.interface_type" value="module.driver.ether_selector.interface_type.rgmii"/>
+      <property id="module.driver.ether_selector.speed" value="module.driver.ether_selector.speed.bps1000m"/>
+      <property id="module.driver.ether_selector.duplex" value="module.driver.ether_selector.duplex.full"/>
+      <property id="module.driver.ether_selector.ref_clock" value="module.driver.ether_selector.ref_clock.input"/>
+    </module>
+    <module id="module.driver.ether_phy_on_ether_phy.513125102">
+      <property id="module.driver.ether_phy.name" value="g_ether_phy2"/>
+      <property id="module.driver.ether_phy.channel" value="module.driver.ether_phy.channel.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_address" value="3"/>
+      <property id="module.driver.ether_phy.phy_reset_wait_time" value="0x00020000"/>
+      <property id="module.driver.ether_phy.flow_control" value="module.driver.ether_phy.flow_control.disable"/>
+      <property id="module.driver.ether_phy.port_type" value="module.driver.ether_phy.port_type.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_type" value="module.driver.ether_phy.phy_lsi_type.custom"/>
+      <property id="module.driver.ether_phy.target_init" value="ether_phy_targets_initialize_rtl8211_rgmii"/>
+      <property id="module.driver.ether_phy.mdio_type" value="module.driver.ether_phy.mdio_type.0"/>
+      <property id="module.driver.ether_phy.auto_negotiation" value="module.driver.ether_phy.auto_negotiation.1"/>
+      <property id="module.driver.ether_phy.bps" value="module.driver.ether_phy.bps.3"/>
+      <property id="module.driver.ether_phy.duplex" value="module.driver.ether_phy.duplex.1"/>
+      <property id="module.driver.ether_phy.reset_port" value="module.driver.ether_phy.reset_port.PORT_13"/>
+      <property id="module.driver.ether_phy.reset_pin" value="module.driver.ether_phy.reset_pin.PIN_04"/>
+      <property id="module.driver.ether_phy.reset_time" value="15000"/>
+    </module>
+    <module id="module.driver.ether_selector_on_ether_selector.1980936079">
+      <property id="module.driver.ether_selector.name" value="g_ether_selector2"/>
+      <property id="module.driver.ether_selector.channel" value="module.driver.ether_selector.channel.0"/>
+      <property id="module.driver.ether_selector.phylink" value="module.driver.ether_selector.phylink.low"/>
+      <property id="module.driver.ether_selector.interface_type" value="module.driver.ether_selector.interface_type.rgmii"/>
+      <property id="module.driver.ether_selector.speed" value="module.driver.ether_selector.speed.bps1000m"/>
+      <property id="module.driver.ether_selector.duplex" value="module.driver.ether_selector.duplex.full"/>
+      <property id="module.driver.ether_selector.ref_clock" value="module.driver.ether_selector.ref_clock.input"/>
+    </module>
+    <module id="module.driver.timer_on_gpt.1285445287">
+      <property id="module.driver.timer.name" value="g_timer0"/>
+      <property id="module.driver.gpt.unit" value="0"/>
+      <property id="module.driver.gpt.channel" value="0"/>
+      <property id="module.driver.timer.mode" value="module.driver.timer.mode.mode_periodic"/>
+      <property id="module.driver.timer.period" value="0x100000000"/>
+      <property id="module.driver.timer.unit" value="module.driver.timer.unit.unit_period_raw_counts"/>
+      <property id="module.driver.timer.duty_cycle" value="50"/>
+      <property id="module.driver.timer.gtioca_output_enabled" value="module.driver.timer.gtioca_output_enabled.false"/>
+      <property id="module.driver.timer.gtioca_stop_level" value="module.driver.timer.gtioca_stop_level.pin_level_low"/>
+      <property id="module.driver.timer.gtiocb_output_enabled" value="module.driver.timer.gtiocb_output_enabled.false"/>
+      <property id="module.driver.timer.gtiocb_stop_level" value="module.driver.timer.gtiocb_stop_level.pin_level_low"/>
+      <property id="module.driver.timer.count_up_source" value=""/>
+      <property id="module.driver.timer.count_down_source" value=""/>
+      <property id="module.driver.timer.phase_count_setting_automatically_enable" value="module.driver.timer.phase_count_setting_automatically_enable.disabled"/>
+      <property id="module.driver.timer.counting_mode" value="module.driver.timer.counting_mode.mode1"/>
+      <property id="module.driver.timer.start_source" value=""/>
+      <property id="module.driver.timer.stop_source" value=""/>
+      <property id="module.driver.timer.clear_source" value=""/>
+      <property id="module.driver.timer.capture_a_source" value=""/>
+      <property id="module.driver.timer.capture_b_source" value=""/>
+      <property id="module.driver.timer.gtioca_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
+      <property id="module.driver.timer.gtiocb_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
+      <property id="module.driver.timer.p_callback" value="timer0_esc_callback"/>
+      <property id="module.driver.timer.ipl" value="board.icu.common.irq.priority10"/>
+      <property id="module.driver.timer.capture_a_ipl" value="_disabled"/>
+      <property id="module.driver.timer.capture_b_ipl" value="_disabled"/>
+      <property id="module.driver.timer.trough_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.p_callback" value="NULL"/>
+      <property id="module.driver.timer.gpt_sel.overflow_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_a_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_b_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.trough_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.dead_time_error_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.int0_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int1_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int2_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int3_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int4_ipl" value="_disabled"/>
+      <property id="module.driver.timer.extra" value="module.driver.timer.extra.disabled"/>
+      <property id="module.driver.timer.poeg_link" value="module.driver.timer.poeg_link.poeg_link_poeg0"/>
+      <property id="module.driver.timer.output_disable" value=""/>
+      <property id="module.driver.timer.adc_trigger" value=""/>
+      <property id="module.driver.timer.dead_time_count_up" value="0"/>
+      <property id="module.driver.timer.dead_time_count_down" value="0"/>
+      <property id="module.driver.timer.adc_a_compare_match" value="0"/>
+      <property id="module.driver.timer.adc_b_compare_match" value="0"/>
+      <property id="module.driver.timer.interrupt_skip.source" value="module.driver.timer.interrupt_skip.source.none"/>
+      <property id="module.driver.timer.interrupt_skip.count" value="module.driver.timer.interrupt_skip.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip.adc" value="module.driver.timer.interrupt_skip.skip_sources.interrupt_skip.adc.none"/>
+      <property id="module.driver.timer.gtioca_disable_setting" value="module.driver.timer.gtioca_disable_setting.gtioc_disable_prohibited"/>
+      <property id="module.driver.timer.gtiocb_disable_setting" value="module.driver.timer.gtiocb_disable_setting.gtioc_disable_prohibited"/>
+      <property id="module.driver.timer.interrupt_skip_ext1.source" value="module.driver.timer.interrupt_skip_ext1.source.none"/>
+      <property id="module.driver.timer.interrupt_skip_ext1.count" value="module.driver.timer.interrupt_skip_ext1.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_ext2.source" value="module.driver.timer.interrupt_skip_ext2.source.none"/>
+      <property id="module.driver.timer.interrupt_skip_ext2.count" value="module.driver.timer.interrupt_skip_ext2.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_func.ovf" value="module.driver.timer.interrupt_skip_func.ovf.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.unf" value="module.driver.timer.interrupt_skip_func.unf.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.adc_a" value="module.driver.timer.interrupt_skip_func.adc_a.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.adc_b" value="module.driver.timer.interrupt_skip_func.adc_b.none"/>
+      <property id="module.driver.timer.dead_time_error_ipl" value="_disabled"/>
+      <property id="module.driver.timer.input_capture" value="module.driver.timer.input_capture.enabled"/>
+      <property id="module.driver.timer.gtioc_isel" value="module.driver.timer.gtioc_isel.not_supported"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_a" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_b" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_c" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_d" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_e" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_f" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_g" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_h" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_a" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_b" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_c" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_d" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_e" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_f" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_g" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_h" value="_disabled"/>
+    </module>
+    <module id="module.driver.timer_on_mtu3.1982797798">
+      <property id="module.driver.timer.name" value="g_mtu3"/>
+      <property id="module.driver.timer.channel" value="0"/>
+      <property id="module.driver.timer.mode" value="module.driver.timer.mode.mode_periodic"/>
+      <property id="module.driver.timer.tgra_val" value="0xFFFF"/>
+      <property id="module.driver.timer.tgrb_val" value="0xFFFF"/>
+      <property id="module.driver.timer.mtu3_clk_div" value="module.driver.timer.mtu3_clk_div.div1"/>
+      <property id="module.driver.timer.clk_edge" value="module.driver.timer.clk_edge.rising"/>
+      <property id="module.driver.timer.mtu3_clear" value="module.driver.timer.mtu3_clear.disabled"/>
+      <property id="module.driver.timer.bit_mode" value="module.driver.timer.bit_mode.16"/>
+      <property id="module.driver.timer.mtu3.counting_mode" value="module.driver.timer.mtu3.counting_mode.none"/>
+      <property id="module.driver.timer.input_clock_pin" value="module.driver.timer.input_clock_pin.a_b"/>
+      <property id="module.driver.timer.external_noise_filter.enable" value=""/>
+      <property id="module.driver.timer.external_noise_filter.clock" value="module.driver.timer.external_noise_filter.clock.div1"/>
+      <property id="module.driver.timer.input_noise_filter.enable" value=""/>
+      <property id="module.driver.timer.input_noise_filter.clock" value="module.driver.timer.input_noise_filter.clock.div1"/>
+      <property id="module.driver.timer.output_pin_level_a" value="module.driver.timer.output_pin_level_a.no_output"/>
+      <property id="module.driver.timer.output_pin_level_b" value="module.driver.timer.output_pin_level_b.no_output"/>
+      <property id="module.driver.timer.p_callback" value="g_mtu3_callback"/>
+      <property id="module.driver.timer.ipl" value="board.icu.common.irq.priority8"/>
+      <property id="module.driver.timer.capture_a_ipl" value="_disabled"/>
+      <property id="module.driver.timer.capture_b_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.p_callback" value="NULL"/>
+      <property id="module.driver.timer.gpt_sel.overflow_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_a_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_b_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.int0_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int1_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int2_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int3_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int4_ipl" value="_disabled"/>
+      <property id="module.driver.timer.extra" value="module.driver.timer.extra.disabled"/>
+      <property id="module.driver.timer.tgru_val" value="0x0000"/>
+      <property id="module.driver.timer.tgrv_val" value="0x0000"/>
+      <property id="module.driver.timer.tgrw_val" value="0x0000"/>
+      <property id="module.driver.timer.mtu3_clk_div_u" value="module.driver.timer.mtu3_clk_div_u.div1"/>
+      <property id="module.driver.timer.mtu3_clk_div_v" value="module.driver.timer.mtu3_clk_div_v.div1"/>
+      <property id="module.driver.timer.mtu3_clk_div_w" value="module.driver.timer.mtu3_clk_div_w.div1"/>
+      <property id="module.driver.timer.output_pin_level_u" value="module.driver.timer.output_pin_level_u.no_func"/>
+      <property id="module.driver.timer.output_pin_level_v" value="module.driver.timer.output_pin_level_v.no_func"/>
+      <property id="module.driver.timer.output_pin_level_w" value="module.driver.timer.output_pin_level_w.no_func"/>
+      <property id="module.driver.timer.capture_u_ipl" value="_disabled"/>
+      <property id="module.driver.timer.capture_v_ipl" value="_disabled"/>
+      <property id="module.driver.timer.capture_w_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.capture_u_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_v_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_w_interrupt_source" value=""/>
+      <property id="module.driver.timer.noise_filter_mtioc_setting_uvw" value="module.driver.timer.noise_filter_mtioc_setting_uvw.disabled"/>
+      <property id="module.driver.timer.noise_filter_mtioc_clk_uvw" value="module.driver.timer.noise_filter_mtioc_clk_uvw.div1"/>
+      <property id="module.driver.timer.interrupt_skip_mode_a" value="module.driver.timer.interrupt_skip_mode_a.mode1"/>
+      <property id="module.driver.timer.interrupt_skip_mode_b" value="module.driver.timer.interrupt_skip_mode_b.mode1"/>
+      <property id="module.driver.timer.adc_a_compare_match" value="0x0000"/>
+      <property id="module.driver.timer.adc_b_compare_match" value="0x0000"/>
+      <property id="module.driver.timer.interrupt_skip_tciv4.count" value="module.driver.timer.interrupt_skip_tciv4.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_tgia3.count" value="module.driver.timer.interrupt_skip_tgia3.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_tciv7.count" value="module.driver.timer.interrupt_skip_tciv7.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_tgia6.count" value="module.driver.timer.interrupt_skip_tgia6.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_tgr4an_bn.count" value="module.driver.timer.interrupt_skip_tgr4an_bn.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_tgr7an_bn.count" value="module.driver.timer.interrupt_skip_tgr7an_bn.count.count_0"/>
+      <property id="module.driver.timer.ad_start" value="module.driver.timer.ad_start.disabled"/>
+      <property id="module.driver.timer.elc_trigger_mtu0" value="_disabled"/>
+      <property id="module.driver.timer.operation_select_mtu0" value="Disabled"/>
+      <property id="module.driver.timer.elc_trigger_mtu3" value="_disabled"/>
+      <property id="module.driver.timer.operation_select_mtu3" value="Disabled"/>
+      <property id="module.driver.timer.elc_trigger_mtu4" value="_disabled"/>
+      <property id="module.driver.timer.operation_select_mtu4" value="Disabled"/>
+    </module>
+    <module id="module.driver.timer_on_gpt.1352861500">
+      <property id="module.driver.timer.name" value="g_timer1"/>
+      <property id="module.driver.gpt.unit" value="0"/>
+      <property id="module.driver.gpt.channel" value="1"/>
+      <property id="module.driver.timer.mode" value="module.driver.timer.mode.mode_periodic"/>
+      <property id="module.driver.timer.period" value="1"/>
+      <property id="module.driver.timer.unit" value="module.driver.timer.unit.unit_period_usec"/>
+      <property id="module.driver.timer.duty_cycle" value="50"/>
+      <property id="module.driver.timer.gtioca_output_enabled" value="module.driver.timer.gtioca_output_enabled.false"/>
+      <property id="module.driver.timer.gtioca_stop_level" value="module.driver.timer.gtioca_stop_level.pin_level_low"/>
+      <property id="module.driver.timer.gtiocb_output_enabled" value="module.driver.timer.gtiocb_output_enabled.false"/>
+      <property id="module.driver.timer.gtiocb_stop_level" value="module.driver.timer.gtiocb_stop_level.pin_level_low"/>
+      <property id="module.driver.timer.count_up_source" value=""/>
+      <property id="module.driver.timer.count_down_source" value=""/>
+      <property id="module.driver.timer.phase_count_setting_automatically_enable" value="module.driver.timer.phase_count_setting_automatically_enable.disabled"/>
+      <property id="module.driver.timer.counting_mode" value="module.driver.timer.counting_mode.mode1"/>
+      <property id="module.driver.timer.start_source" value=""/>
+      <property id="module.driver.timer.stop_source" value=""/>
+      <property id="module.driver.timer.clear_source" value=""/>
+      <property id="module.driver.timer.capture_a_source" value=""/>
+      <property id="module.driver.timer.capture_b_source" value=""/>
+      <property id="module.driver.timer.gtioca_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
+      <property id="module.driver.timer.gtiocb_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
+      <property id="module.driver.timer.p_callback" value="g_timer1_callback"/>
+      <property id="module.driver.timer.ipl" value="board.icu.common.irq.priority10"/>
+      <property id="module.driver.timer.capture_a_ipl" value="_disabled"/>
+      <property id="module.driver.timer.capture_b_ipl" value="_disabled"/>
+      <property id="module.driver.timer.trough_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.p_callback" value="NULL"/>
+      <property id="module.driver.timer.gpt_sel.overflow_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_a_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.capture_b_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.trough_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.dead_time_error_interrupt_source" value=""/>
+      <property id="module.driver.timer.gpt_sel.int0_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int1_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int2_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int3_ipl" value="_disabled"/>
+      <property id="module.driver.timer.gpt_sel.int4_ipl" value="_disabled"/>
+      <property id="module.driver.timer.extra" value="module.driver.timer.extra.disabled"/>
+      <property id="module.driver.timer.poeg_link" value="module.driver.timer.poeg_link.poeg_link_poeg0"/>
+      <property id="module.driver.timer.output_disable" value=""/>
+      <property id="module.driver.timer.adc_trigger" value=""/>
+      <property id="module.driver.timer.dead_time_count_up" value="0"/>
+      <property id="module.driver.timer.dead_time_count_down" value="0"/>
+      <property id="module.driver.timer.adc_a_compare_match" value="0"/>
+      <property id="module.driver.timer.adc_b_compare_match" value="0"/>
+      <property id="module.driver.timer.interrupt_skip.source" value="module.driver.timer.interrupt_skip.source.none"/>
+      <property id="module.driver.timer.interrupt_skip.count" value="module.driver.timer.interrupt_skip.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip.adc" value="module.driver.timer.interrupt_skip.skip_sources.interrupt_skip.adc.none"/>
+      <property id="module.driver.timer.gtioca_disable_setting" value="module.driver.timer.gtioca_disable_setting.gtioc_disable_prohibited"/>
+      <property id="module.driver.timer.gtiocb_disable_setting" value="module.driver.timer.gtiocb_disable_setting.gtioc_disable_prohibited"/>
+      <property id="module.driver.timer.interrupt_skip_ext1.source" value="module.driver.timer.interrupt_skip_ext1.source.none"/>
+      <property id="module.driver.timer.interrupt_skip_ext1.count" value="module.driver.timer.interrupt_skip_ext1.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_ext2.source" value="module.driver.timer.interrupt_skip_ext2.source.none"/>
+      <property id="module.driver.timer.interrupt_skip_ext2.count" value="module.driver.timer.interrupt_skip_ext2.count.count_0"/>
+      <property id="module.driver.timer.interrupt_skip_func.ovf" value="module.driver.timer.interrupt_skip_func.ovf.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.unf" value="module.driver.timer.interrupt_skip_func.unf.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.adc_a" value="module.driver.timer.interrupt_skip_func.adc_a.none"/>
+      <property id="module.driver.timer.interrupt_skip_func.adc_b" value="module.driver.timer.interrupt_skip_func.adc_b.none"/>
+      <property id="module.driver.timer.dead_time_error_ipl" value="_disabled"/>
+      <property id="module.driver.timer.input_capture" value="module.driver.timer.input_capture.enabled"/>
+      <property id="module.driver.timer.gtioc_isel" value="module.driver.timer.gtioc_isel.not_supported"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_a" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_b" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_c" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_d" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_e" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_f" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_g" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_llpp_event_h" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_a" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_b" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_c" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_d" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_e" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_f" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_g" value="_disabled"/>
+      <property id="module.driver.timer.elc_trigger_nonsafty_event_h" value="_disabled"/>
+    </module>
+    <context id="_hal.0">
+      <stack module="module.driver.ioport_on_ioport.0"/>
+      <stack module="module.bsp.memory_config.0"/>
+      <stack module="module.driver.uart_on_sci_uart.1968866849"/>
+      <stack module="module.driver.ether_on_ether.1094288014">
+        <stack module="module.driver.ether_phy_on_ether_phy.277662383" requires="module.driver.ether.requires.ether_phy0">
+          <stack module="module.driver.ether_selector_on_ether_selector.305883093" requires="module.driver.ether.requires.ether_selector"/>
+        </stack>
+        <stack module="module.driver.ether_phy_on_ether_phy.518802053" requires="module.driver.ether.requires.ether_phy1">
+          <stack module="module.driver.ether_selector_on_ether_selector.671552947" requires="module.driver.ether.requires.ether_selector"/>
+        </stack>
+        <stack module="module.driver.ether_phy_on_ether_phy.513125102" requires="module.driver.ether.requires.ether_phy2">
+          <stack module="module.driver.ether_selector_on_ether_selector.1980936079" requires="module.driver.ether.requires.ether_selector"/>
+        </stack>
+        <stack module="module.driver.ether_switch_on_ether_switch.95659619" requires="module.driver.ether.requires.ethsw"/>
+      </stack>
+      <stack module="module.driver.timer_on_gpt.1285445287"/>
+      <stack module="module.driver.timer_on_mtu3.1982797798"/>
+      <stack module="module.driver.timer_on_gpt.1352861500"/>
+    </context>
+    <config id="config.driver.ether_selector">
+      <property id="config.driver.ether_selector.param_checking_enable" value="config.driver.ether_selector.param_checking_enable.bsp"/>
+      <property id="module.driver.ether_selector.mode" value="module.driver.ether_selector.mode.0"/>
+    </config>
+    <config id="config.driver.ether_phy">
+      <property id="config.driver.ether_phy.param_checking_enable" value="config.driver.ether_phy.param_checking_enable.bsp"/>
+      <property id="config.driver.ether_phy.target_vsc8541" value="config.driver.ether_phy.target_vsc8541.disabled"/>
+      <property id="config.driver.ether_phy.target_ksz9131" value="config.driver.ether_phy.target_ksz9131.disabled"/>
+      <property id="config.driver.ether_phy.target_ksz9031" value="config.driver.ether_phy.target_ksz9031.disabled"/>
+      <property id="config.driver.ether_phy.target_ksz8081" value="config.driver.ether_phy.target_ksz8081.disabled"/>
+      <property id="config.driver.ether_phy.target_ksz8041" value="config.driver.ether_phy.target_ksz8041.disabled"/>
+      <property id="config.driver.ether_phy.use_custom_phy_lsi" value="config.driver.ether_phy.use_custom_phy_lsi.enabled"/>
+    </config>
+    <config id="config.driver.ioport">
+      <property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
+    </config>
+    <config id="config.driver.mtu3">
+      <property id="config.driver.mtu3.param_checking_enable" value="config.driver.mtu3.param_checking_enable.bsp"/>
+      <property id="config.driver.mtu3.output_support_enable" value="config.driver.mtu3.output_support_enable.disabled"/>
+      <property id="config.driver.mtu3.uvw_support_enable" value="config.driver.mtu3.uvw_support_enable.disabled"/>
+      <property id="config.driver.mtu3.multiplex_interrupt" value="config.driver.mtu3.multiplex_interrupt.disabled"/>
+    </config>
+    <config id="config.driver.ether">
+      <property id="config.driver.ether.param_checking_enable" value="config.driver.ether.param_checking_enable.bsp"/>
+    </config>
+    <config id="config.driver.sci_uart">
+      <property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
+      <property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.enabled"/>
+      <property id="config.driver.sci_uart.dmac_support" value="config.driver.sci_uart.dmac_support.disabled"/>
+      <property id="config.driver.sci_uart.flow_control" value="config.driver.sci_uart.flow_control.disabled"/>
+      <property id="config.driver.sci_uart.multiplex_interrupt" value="config.driver.sci_uart.multiplex_interrupt.disabled"/>
+    </config>
+    <config id="config.driver.ether_switch">
+      <property id="config.driver.ether_switch.param_checking_enable" value="config.driver.ether_switch.param_checking_enable.bsp"/>
+    </config>
+    <config id="config.bsp.memory_config">
+      <property id="config.bsp.memory_config.mpu_type" value="config.bsp.memory_config.mpu_type.mpu"/>
+    </config>
+    <config id="config.driver.gpt">
+      <property id="config.driver.gpt.param_checking_enable" value="config.driver.gpt.param_checking_enable.bsp"/>
+      <property id="config.driver.gpt.output_support_enable" value="config.driver.gpt.output_support_enable.disabled"/>
+      <property id="config.driver.gpt.write_protect_enable" value="config.driver.gpt.write_protect_enable.disabled"/>
+      <property id="config.driver.gpt.multiplex_interrupt" value="config.driver.gpt.multiplex_interrupt.disabled"/>
+    </config>
+  </raModuleConfiguration>
+  <raPinConfiguration>
+    <symbolicName propertyId="p00_0.symbolic_name" value="ETH2_RXD3"/>
+    <symbolicName propertyId="p00_1.symbolic_name" value="ETH2_RXDV"/>
+    <symbolicName propertyId="p00_2.symbolic_name" value="ETH2_TXEN"/>
+    <symbolicName propertyId="p00_3.symbolic_name" value="ETH2_REFCLK"/>
+    <symbolicName propertyId="p00_5.symbolic_name" value="ETH2_LINK"/>
+    <symbolicName propertyId="p00_6.symbolic_name" value="ETH2_TXCLK"/>
+    <symbolicName propertyId="p01_2.symbolic_name" value="ETH2_TXD3"/>
+    <symbolicName propertyId="p01_3.symbolic_name" value="ETH2_TXD2"/>
+    <symbolicName propertyId="p01_4.symbolic_name" value="ETH2_TXD1"/>
+    <symbolicName propertyId="p01_5.symbolic_name" value="ETH2_TXD0"/>
+    <symbolicName propertyId="p01_7.symbolic_name" value="CAN_RX"/>
+    <symbolicName propertyId="p02_2.symbolic_name" value="CAN_TX"/>
+    <symbolicName propertyId="p02_4.symbolic_name" value="TDO"/>
+    <symbolicName propertyId="p02_5.symbolic_name" value="TDI"/>
+    <symbolicName propertyId="p02_6.symbolic_name" value="TMS"/>
+    <symbolicName propertyId="p02_7.symbolic_name" value="TCK"/>
+    <symbolicName propertyId="p03_0.symbolic_name" value="ETH_LED4"/>
+    <symbolicName propertyId="p04_1.symbolic_name" value="LED_RED1"/>
+    <symbolicName propertyId="p04_4.symbolic_name" value="ETH_LED6"/>
+    <symbolicName propertyId="p05_0.symbolic_name" value="ETH_LED7"/>
+    <symbolicName propertyId="p05_2.symbolic_name" value="SCL"/>
+    <symbolicName propertyId="p05_3.symbolic_name" value="SDA"/>
+    <symbolicName propertyId="p05_4.symbolic_name" value="SW2"/>
+    <symbolicName propertyId="p05_5.symbolic_name" value="ETH1_LINK"/>
+    <symbolicName propertyId="p05_7.symbolic_name" value="ETH1_TXD2"/>
+    <symbolicName propertyId="p06_0.symbolic_name" value="ETH1_TXD3"/>
+    <symbolicName propertyId="p06_1.symbolic_name" value="ETH1_REFCLK"/>
+    <symbolicName propertyId="p06_2.symbolic_name" value="ETH1_TXD1"/>
+    <symbolicName propertyId="p06_3.symbolic_name" value="ETH1_TXD0"/>
+    <symbolicName propertyId="p06_4.symbolic_name" value="ETH1_TXCLK"/>
+    <symbolicName propertyId="p06_5.symbolic_name" value="ETH1_TXEN"/>
+    <symbolicName propertyId="p06_6.symbolic_name" value="ETH1_RXD0"/>
+    <symbolicName propertyId="p06_7.symbolic_name" value="ETH1_RXD1"/>
+    <symbolicName propertyId="p07_0.symbolic_name" value="ETH1_RXD2"/>
+    <symbolicName propertyId="p07_1.symbolic_name" value="ETH1_RXD3"/>
+    <symbolicName propertyId="p07_2.symbolic_name" value="ETH1_RXDV"/>
+    <symbolicName propertyId="p07_3.symbolic_name" value="ETH1_RXCLK"/>
+    <symbolicName propertyId="p07_4.symbolic_name" value="USB_VBUSIN"/>
+    <symbolicName propertyId="p08_4.symbolic_name" value="ETH0_RXD3"/>
+    <symbolicName propertyId="p08_5.symbolic_name" value="ETH0_RXDV"/>
+    <symbolicName propertyId="p08_6.symbolic_name" value="ETH0_RXCLK"/>
+    <symbolicName propertyId="p08_7.symbolic_name" value="ETH_MDC"/>
+    <symbolicName propertyId="p09_0.symbolic_name" value="ETH_MDIO"/>
+    <symbolicName propertyId="p09_1.symbolic_name" value="ETH0_REFCLK"/>
+    <symbolicName propertyId="p09_3.symbolic_name" value="ETH0_TXD3"/>
+    <symbolicName propertyId="p09_4.symbolic_name" value="ETH0_TXD2"/>
+    <symbolicName propertyId="p09_5.symbolic_name" value="ETH0_TXD1"/>
+    <symbolicName propertyId="p09_6.symbolic_name" value="ETH0_TXD0"/>
+    <symbolicName propertyId="p09_7.symbolic_name" value="ETH0_TXCLK"/>
+    <symbolicName propertyId="p10_0.symbolic_name" value="ETH0_TXEN"/>
+    <symbolicName propertyId="p10_1.symbolic_name" value="ETH0_RXD0"/>
+    <symbolicName propertyId="p10_2.symbolic_name" value="ETH0_RXD1"/>
+    <symbolicName propertyId="p10_3.symbolic_name" value="ETH0_RXD2"/>
+    <symbolicName propertyId="p10_4.symbolic_name" value="ETH0_LINK"/>
+    <symbolicName propertyId="p13_2.symbolic_name" value="EEPROM_SCL"/>
+    <symbolicName propertyId="p13_3.symbolic_name" value="EEPROM_SDA"/>
+    <symbolicName propertyId="p13_4.symbolic_name" value="ESC_RESETOUT"/>
+    <symbolicName propertyId="p13_5.symbolic_name" value="SW3_Pin2"/>
+    <symbolicName propertyId="p13_6.symbolic_name" value="SW3_Pin1"/>
+    <symbolicName propertyId="p13_7.symbolic_name" value="SW3_Pin4"/>
+    <symbolicName propertyId="p14_0.symbolic_name" value="SW3_Pin3"/>
+    <symbolicName propertyId="p14_2.symbolic_name" value="XSPI0_ECS"/>
+    <symbolicName propertyId="p14_4.symbolic_name" value="XSPI0_DS"/>
+    <symbolicName propertyId="p14_5.symbolic_name" value="XSPI0_CKN"/>
+    <symbolicName propertyId="p14_6.symbolic_name" value="XSPI0_CKP"/>
+    <symbolicName propertyId="p14_7.symbolic_name" value="XSPI0_IO0"/>
+    <symbolicName propertyId="p15_0.symbolic_name" value="XSPI0_IO1"/>
+    <symbolicName propertyId="p15_1.symbolic_name" value="XSPI0_IO2"/>
+    <symbolicName propertyId="p15_2.symbolic_name" value="XSPI0_IO3"/>
+    <symbolicName propertyId="p15_3.symbolic_name" value="XSPI0_IO4"/>
+    <symbolicName propertyId="p15_4.symbolic_name" value="XSPI0_IO5"/>
+    <symbolicName propertyId="p15_5.symbolic_name" value="XSPI0_IO6"/>
+    <symbolicName propertyId="p15_6.symbolic_name" value="XSPI0_IO7"/>
+    <symbolicName propertyId="p15_7.symbolic_name" value="OSPI_CS"/>
+    <symbolicName propertyId="p16_0.symbolic_name" value="ORAM_CS0"/>
+    <symbolicName propertyId="p16_1.symbolic_name" value="XSPI0_RESET0"/>
+    <symbolicName propertyId="p16_3.symbolic_name" value="SW1"/>
+    <symbolicName propertyId="p16_5.symbolic_name" value="UART_USB_TX"/>
+    <symbolicName propertyId="p16_6.symbolic_name" value="UART_USB_RX"/>
+    <symbolicName propertyId="p17_3.symbolic_name" value="LED_RED2"/>
+    <symbolicName propertyId="p17_5.symbolic_name" value="USB_OVRCUR"/>
+    <symbolicName propertyId="p17_7.symbolic_name" value="SCI_RXD"/>
+    <symbolicName propertyId="p18_0.symbolic_name" value="SCI_TXD"/>
+    <symbolicName propertyId="p18_2.symbolic_name" value="LED_GREEN"/>
+    <symbolicName propertyId="p18_4.symbolic_name" value="SCK"/>
+    <symbolicName propertyId="p18_5.symbolic_name" value="MOSI"/>
+    <symbolicName propertyId="p18_6.symbolic_name" value="MISO"/>
+    <symbolicName propertyId="p19_0.symbolic_name" value="USB_VBUSEN"/>
+    <symbolicName propertyId="p20_1.symbolic_name" value="ETH_LED2_MDV0"/>
+    <symbolicName propertyId="p20_2.symbolic_name" value="ETH_LED0_MDV1"/>
+    <symbolicName propertyId="p20_3.symbolic_name" value="ETH_LED1_MDV2"/>
+    <symbolicName propertyId="p20_4.symbolic_name" value="ETH_LED3_MDV3"/>
+    <symbolicName propertyId="p21_1.symbolic_name" value="CS"/>
+    <symbolicName propertyId="p22_1.symbolic_name" value="ETH_LED5"/>
+    <symbolicName propertyId="p22_3.symbolic_name" value="LED_ORANGE"/>
+    <symbolicName propertyId="p23_7.symbolic_name" value="ETH2_RXD0"/>
+    <symbolicName propertyId="p24_0.symbolic_name" value="ETH2_RXD1"/>
+    <symbolicName propertyId="p24_1.symbolic_name" value="ETH2_RXCLK"/>
+    <symbolicName propertyId="p24_2.symbolic_name" value="ETH2_RXD2"/>
+    <pincfg active="true" name="RSK+RZN2L" selected="true" symbol="g_bsp_pin_cfg">
+      <configSetting altId="canfd0.canrx0.p01_7" configurationId="canfd0.canrx0"/>
+      <configSetting altId="canfd0.cantx0.p02_2" configurationId="canfd0.cantx0"/>
+      <configSetting altId="canfd0.mode.enabled.free" configurationId="canfd0.mode"/>
+      <configSetting altId="ether_eth0.eth0_refclk.p09_1" configurationId="ether_eth0.eth0_refclk"/>
+      <configSetting altId="ether_eth0.eth0_rxclk_ref_clk_rxc.p08_6" configurationId="ether_eth0.eth0_rxclk_ref_clk_rxc"/>
+      <configSetting altId="ether_eth0.eth0_rxd0.p10_1" configurationId="ether_eth0.eth0_rxd0"/>
+      <configSetting altId="ether_eth0.eth0_rxd1.p10_2" configurationId="ether_eth0.eth0_rxd1"/>
+      <configSetting altId="ether_eth0.eth0_rxd2.p10_3" configurationId="ether_eth0.eth0_rxd2"/>
+      <configSetting altId="ether_eth0.eth0_rxd3.p08_4" configurationId="ether_eth0.eth0_rxd3"/>
+      <configSetting altId="ether_eth0.eth0_rxdv_crsdv_rxctl.p08_5" configurationId="ether_eth0.eth0_rxdv_crsdv_rxctl"/>
+      <configSetting altId="ether_eth0.eth0_txclk_txc.p09_7" configurationId="ether_eth0.eth0_txclk_txc"/>
+      <configSetting altId="ether_eth0.eth0_txd0.p09_6" configurationId="ether_eth0.eth0_txd0"/>
+      <configSetting altId="ether_eth0.eth0_txd1.p09_5" configurationId="ether_eth0.eth0_txd1"/>
+      <configSetting altId="ether_eth0.eth0_txd2.p09_4" configurationId="ether_eth0.eth0_txd2"/>
+      <configSetting altId="ether_eth0.eth0_txd3.p09_3" configurationId="ether_eth0.eth0_txd3"/>
+      <configSetting altId="ether_eth0.eth0_txen_txctl.p10_0" configurationId="ether_eth0.eth0_txen_txctl"/>
+      <configSetting altId="ether_eth0.mode.rgmiimode.free" configurationId="ether_eth0.mode"/>
+      <configSetting altId="ether_eth1.eth1_refclk.p06_1" configurationId="ether_eth1.eth1_refclk"/>
+      <configSetting altId="ether_eth1.eth1_rxclk_ref_clk_rxc.p07_3" configurationId="ether_eth1.eth1_rxclk_ref_clk_rxc"/>
+      <configSetting altId="ether_eth1.eth1_rxd0.p06_6" configurationId="ether_eth1.eth1_rxd0"/>
+      <configSetting altId="ether_eth1.eth1_rxd1.p06_7" configurationId="ether_eth1.eth1_rxd1"/>
+      <configSetting altId="ether_eth1.eth1_rxd2.p07_0" configurationId="ether_eth1.eth1_rxd2"/>
+      <configSetting altId="ether_eth1.eth1_rxd3.p07_1" configurationId="ether_eth1.eth1_rxd3"/>
+      <configSetting altId="ether_eth1.eth1_rxdv_crsdv_rxctl.p07_2" configurationId="ether_eth1.eth1_rxdv_crsdv_rxctl"/>
+      <configSetting altId="ether_eth1.eth1_txclk_txc.p06_4" configurationId="ether_eth1.eth1_txclk_txc"/>
+      <configSetting altId="ether_eth1.eth1_txd0.p06_3" configurationId="ether_eth1.eth1_txd0"/>
+      <configSetting altId="ether_eth1.eth1_txd1.p06_2" configurationId="ether_eth1.eth1_txd1"/>
+      <configSetting altId="ether_eth1.eth1_txd2.p05_7" configurationId="ether_eth1.eth1_txd2"/>
+      <configSetting altId="ether_eth1.eth1_txd3.p06_0" configurationId="ether_eth1.eth1_txd3"/>
+      <configSetting altId="ether_eth1.eth1_txen_txctl.p06_5" configurationId="ether_eth1.eth1_txen_txctl"/>
+      <configSetting altId="ether_eth1.mode.rgmiimode.free" configurationId="ether_eth1.mode"/>
+      <configSetting altId="ether_eth2.eth2_refclk.p00_3" configurationId="ether_eth2.eth2_refclk"/>
+      <configSetting altId="ether_eth2.eth2_rxclk_ref_clk_rxc.p24_1" configurationId="ether_eth2.eth2_rxclk_ref_clk_rxc"/>
+      <configSetting altId="ether_eth2.eth2_rxd0.p23_7" configurationId="ether_eth2.eth2_rxd0"/>
+      <configSetting altId="ether_eth2.eth2_rxd1.p24_0" configurationId="ether_eth2.eth2_rxd1"/>
+      <configSetting altId="ether_eth2.eth2_rxd2.p24_2" configurationId="ether_eth2.eth2_rxd2"/>
+      <configSetting altId="ether_eth2.eth2_rxd3.p00_0" configurationId="ether_eth2.eth2_rxd3"/>
+      <configSetting altId="ether_eth2.eth2_rxdv_crsdv_rxctl.p00_1" configurationId="ether_eth2.eth2_rxdv_crsdv_rxctl"/>
+      <configSetting altId="ether_eth2.eth2_txclk_txc.p00_6" configurationId="ether_eth2.eth2_txclk_txc"/>
+      <configSetting altId="ether_eth2.eth2_txd0.p01_5" configurationId="ether_eth2.eth2_txd0"/>
+      <configSetting altId="ether_eth2.eth2_txd1.p01_4" configurationId="ether_eth2.eth2_txd1"/>
+      <configSetting altId="ether_eth2.eth2_txd2.p01_3" configurationId="ether_eth2.eth2_txd2"/>
+      <configSetting altId="ether_eth2.eth2_txd3.p01_2" configurationId="ether_eth2.eth2_txd3"/>
+      <configSetting altId="ether_eth2.eth2_txen_txctl.p00_2" configurationId="ether_eth2.eth2_txen_txctl"/>
+      <configSetting altId="ether_eth2.mode.rgmiimode.free" configurationId="ether_eth2.mode"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink0.p10_4" configurationId="ether_ethsw.ethsw_phylink0"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink1.p05_5" configurationId="ether_ethsw.ethsw_phylink1"/>
+      <configSetting altId="ether_ethsw.ethsw_phylink2.p00_5" configurationId="ether_ethsw.ethsw_phylink2"/>
+      <configSetting altId="ether_ethsw.mode.custom_40_1.8v_41.free" configurationId="ether_ethsw.mode"/>
+      <configSetting altId="ether_gmac.gmac_mdc.p08_7" configurationId="ether_gmac.gmac_mdc"/>
+      <configSetting altId="ether_gmac.gmac_mdio.p09_0" configurationId="ether_gmac.gmac_mdio"/>
+      <configSetting altId="ether_gmac.mode.custom_40_1.8v_41.free" configurationId="ether_gmac.mode"/>
+      <configSetting altId="iic0.iic_scl0.p13_2" configurationId="iic0.iic_scl0"/>
+      <configSetting altId="iic0.iic_sda0.p13_3" configurationId="iic0.iic_sda0"/>
+      <configSetting altId="iic0.mode.enabled.free" configurationId="iic0.mode"/>
+      <configSetting altId="iic1.iic_scl1.p05_2" configurationId="iic1.iic_scl1"/>
+      <configSetting altId="iic1.iic_sda1.p05_3" configurationId="iic1.iic_sda1"/>
+      <configSetting altId="iic1.mode.enabled.free" configurationId="iic1.mode"/>
+      <configSetting altId="jtag_fslash_swd.mode.jtag.free" configurationId="jtag_fslash_swd.mode"/>
+      <configSetting altId="jtag_fslash_swd.tck_swclk.p02_7" configurationId="jtag_fslash_swd.tck_swclk"/>
+      <configSetting altId="jtag_fslash_swd.tdi.p02_5" configurationId="jtag_fslash_swd.tdi"/>
+      <configSetting altId="jtag_fslash_swd.tdo.p02_4" configurationId="jtag_fslash_swd.tdo"/>
+      <configSetting altId="jtag_fslash_swd.tms_swdio.p02_6" configurationId="jtag_fslash_swd.tms_swdio"/>
+      <configSetting altId="p00_0.ether_eth2.eth2_rxd3" configurationId="p00_0"/>
+      <configSetting altId="p00_0.gpio_mode.gpio_mode_peripheral" configurationId="p00_0.gpio_mode"/>
+      <configSetting altId="p00_1.ether_eth2.eth2_rxdv_crsdv_rxctl" configurationId="p00_1"/>
+      <configSetting altId="p00_1.gpio_mode.gpio_mode_peripheral" configurationId="p00_1.gpio_mode"/>
+      <configSetting altId="p00_2.ether_eth2.eth2_txen_txctl" configurationId="p00_2"/>
+      <configSetting altId="p00_2.gpio_mode.gpio_mode_peripheral" configurationId="p00_2.gpio_mode"/>
+      <configSetting altId="p00_3.ether_eth2.eth2_refclk" configurationId="p00_3"/>
+      <configSetting altId="p00_3.gpio_mode.gpio_mode_peripheral" configurationId="p00_3.gpio_mode"/>
+      <configSetting altId="p00_5.ether_ethsw.ethsw_phylink2" configurationId="p00_5"/>
+      <configSetting altId="p00_5.gpio_mode.gpio_mode_peripheral" configurationId="p00_5.gpio_mode"/>
+      <configSetting altId="p00_6.ether_eth2.eth2_txclk_txc" configurationId="p00_6"/>
+      <configSetting altId="p00_6.gpio_speed.gpio_speed_high" configurationId="p00_6.gpio_drivecapacity"/>
+      <configSetting altId="p00_6.gpio_mode.gpio_mode_peripheral" configurationId="p00_6.gpio_mode"/>
+      <configSetting altId="p00_6.sr.sr.fast" configurationId="p00_6.sr"/>
+      <configSetting altId="p01_2.ether_eth2.eth2_txd3" configurationId="p01_2"/>
+      <configSetting altId="p01_2.gpio_speed.gpio_speed_high" configurationId="p01_2.gpio_drivecapacity"/>
+      <configSetting altId="p01_2.gpio_mode.gpio_mode_peripheral" configurationId="p01_2.gpio_mode"/>
+      <configSetting altId="p01_2.sr.sr.fast" configurationId="p01_2.sr"/>
+      <configSetting altId="p01_3.ether_eth2.eth2_txd2" configurationId="p01_3"/>
+      <configSetting altId="p01_3.gpio_speed.gpio_speed_high" configurationId="p01_3.gpio_drivecapacity"/>
+      <configSetting altId="p01_3.gpio_mode.gpio_mode_peripheral" configurationId="p01_3.gpio_mode"/>
+      <configSetting altId="p01_3.sr.sr.fast" configurationId="p01_3.sr"/>
+      <configSetting altId="p01_4.ether_eth2.eth2_txd1" configurationId="p01_4"/>
+      <configSetting altId="p01_4.gpio_speed.gpio_speed_high" configurationId="p01_4.gpio_drivecapacity"/>
+      <configSetting altId="p01_4.gpio_mode.gpio_mode_peripheral" configurationId="p01_4.gpio_mode"/>
+      <configSetting altId="p01_4.sr.sr.fast" configurationId="p01_4.sr"/>
+      <configSetting altId="p01_5.ether_eth2.eth2_txd0" configurationId="p01_5"/>
+      <configSetting altId="p01_5.gpio_speed.gpio_speed_high" configurationId="p01_5.gpio_drivecapacity"/>
+      <configSetting altId="p01_5.gpio_mode.gpio_mode_peripheral" configurationId="p01_5.gpio_mode"/>
+      <configSetting altId="p01_5.sr.sr.fast" configurationId="p01_5.sr"/>
+      <configSetting altId="p01_7.canfd0.canrx0" configurationId="p01_7"/>
+      <configSetting altId="p01_7.gpio_speed.gpio_speed_middle" configurationId="p01_7.gpio_drivecapacity"/>
+      <configSetting altId="p01_7.gpio_mode.gpio_mode_peripheral" configurationId="p01_7.gpio_mode"/>
+      <configSetting altId="p02_2.canfd0.cantx0" configurationId="p02_2"/>
+      <configSetting altId="p02_2.gpio_speed.gpio_speed_middle" configurationId="p02_2.gpio_drivecapacity"/>
+      <configSetting altId="p02_2.gpio_mode.gpio_mode_peripheral" configurationId="p02_2.gpio_mode"/>
+      <configSetting altId="p02_4.jtag_fslash_swd.tdo" configurationId="p02_4"/>
+      <configSetting altId="p02_4.gpio_speed.gpio_speed_high" configurationId="p02_4.gpio_drivecapacity"/>
+      <configSetting altId="p02_4.gpio_mode.gpio_mode_peripheral" configurationId="p02_4.gpio_mode"/>
+      <configSetting altId="p02_4.sr.sr.fast" configurationId="p02_4.sr"/>
+      <configSetting altId="p02_5.jtag_fslash_swd.tdi" configurationId="p02_5"/>
+      <configSetting altId="p02_5.gpio_mode.gpio_mode_peripheral" configurationId="p02_5.gpio_mode"/>
+      <configSetting altId="p02_6.jtag_fslash_swd.tms_swdio" configurationId="p02_6"/>
+      <configSetting altId="p02_6.gpio_speed.gpio_speed_high" configurationId="p02_6.gpio_drivecapacity"/>
+      <configSetting altId="p02_6.gpio_mode.gpio_mode_peripheral" configurationId="p02_6.gpio_mode"/>
+      <configSetting altId="p02_6.sr.sr.fast" configurationId="p02_6.sr"/>
+      <configSetting altId="p02_7.jtag_fslash_swd.tck_swclk" configurationId="p02_7"/>
+      <configSetting altId="p02_7.gpio_mode.gpio_mode_peripheral" configurationId="p02_7.gpio_mode"/>
+      <configSetting altId="p03_0.output.low" configurationId="p03_0"/>
+      <configSetting altId="p03_0.gpio_mode.gpio_mode_out.low" configurationId="p03_0.gpio_mode"/>
+      <configSetting altId="p04_1.output.low" configurationId="p04_1"/>
+      <configSetting altId="p04_1.gpio_mode.gpio_mode_out.low" configurationId="p04_1.gpio_mode"/>
+      <configSetting altId="p04_4.output.low" configurationId="p04_4"/>
+      <configSetting altId="p04_4.gpio_mode.gpio_mode_out.low" configurationId="p04_4.gpio_mode"/>
+      <configSetting altId="p05_0.output.low" configurationId="p05_0"/>
+      <configSetting altId="p05_0.gpio_mode.gpio_mode_out.low" configurationId="p05_0.gpio_mode"/>
+      <configSetting altId="p05_2.iic1.iic_scl1" configurationId="p05_2"/>
+      <configSetting altId="p05_2.gpio_speed.gpio_speed_middle" configurationId="p05_2.gpio_drivecapacity"/>
+      <configSetting altId="p05_2.gpio_mode.gpio_mode_peripheral" configurationId="p05_2.gpio_mode"/>
+      <configSetting altId="p05_3.iic1.iic_sda1" configurationId="p05_3"/>
+      <configSetting altId="p05_3.gpio_speed.gpio_speed_middle" configurationId="p05_3.gpio_drivecapacity"/>
+      <configSetting altId="p05_3.gpio_mode.gpio_mode_peripheral" configurationId="p05_3.gpio_mode"/>
+      <configSetting altId="p05_4.input" configurationId="p05_4"/>
+      <configSetting altId="p05_4.gpio_mode.gpio_mode_in" configurationId="p05_4.gpio_mode"/>
+      <configSetting altId="p05_5.ether_ethsw.ethsw_phylink1" configurationId="p05_5"/>
+      <configSetting altId="p05_5.gpio_mode.gpio_mode_peripheral" configurationId="p05_5.gpio_mode"/>
+      <configSetting altId="p05_7.ether_eth1.eth1_txd2" configurationId="p05_7"/>
+      <configSetting altId="p05_7.gpio_speed.gpio_speed_high" configurationId="p05_7.gpio_drivecapacity"/>
+      <configSetting altId="p05_7.gpio_mode.gpio_mode_peripheral" configurationId="p05_7.gpio_mode"/>
+      <configSetting altId="p05_7.sr.sr.fast" configurationId="p05_7.sr"/>
+      <configSetting altId="p06_0.ether_eth1.eth1_txd3" configurationId="p06_0"/>
+      <configSetting altId="p06_0.gpio_speed.gpio_speed_high" configurationId="p06_0.gpio_drivecapacity"/>
+      <configSetting altId="p06_0.gpio_mode.gpio_mode_peripheral" configurationId="p06_0.gpio_mode"/>
+      <configSetting altId="p06_0.sr.sr.fast" configurationId="p06_0.sr"/>
+      <configSetting altId="p06_1.ether_eth1.eth1_refclk" configurationId="p06_1"/>
+      <configSetting altId="p06_1.gpio_mode.gpio_mode_peripheral" configurationId="p06_1.gpio_mode"/>
+      <configSetting altId="p06_2.ether_eth1.eth1_txd1" configurationId="p06_2"/>
+      <configSetting altId="p06_2.gpio_speed.gpio_speed_high" configurationId="p06_2.gpio_drivecapacity"/>
+      <configSetting altId="p06_2.gpio_mode.gpio_mode_peripheral" configurationId="p06_2.gpio_mode"/>
+      <configSetting altId="p06_2.sr.sr.fast" configurationId="p06_2.sr"/>
+      <configSetting altId="p06_3.ether_eth1.eth1_txd0" configurationId="p06_3"/>
+      <configSetting altId="p06_3.gpio_speed.gpio_speed_high" configurationId="p06_3.gpio_drivecapacity"/>
+      <configSetting altId="p06_3.gpio_mode.gpio_mode_peripheral" configurationId="p06_3.gpio_mode"/>
+      <configSetting altId="p06_3.sr.sr.fast" configurationId="p06_3.sr"/>
+      <configSetting altId="p06_4.ether_eth1.eth1_txclk_txc" configurationId="p06_4"/>
+      <configSetting altId="p06_4.gpio_speed.gpio_speed_high" configurationId="p06_4.gpio_drivecapacity"/>
+      <configSetting altId="p06_4.gpio_mode.gpio_mode_peripheral" configurationId="p06_4.gpio_mode"/>
+      <configSetting altId="p06_4.sr.sr.fast" configurationId="p06_4.sr"/>
+      <configSetting altId="p06_5.ether_eth1.eth1_txen_txctl" configurationId="p06_5"/>
+      <configSetting altId="p06_5.gpio_mode.gpio_mode_peripheral" configurationId="p06_5.gpio_mode"/>
+      <configSetting altId="p06_6.ether_eth1.eth1_rxd0" configurationId="p06_6"/>
+      <configSetting altId="p06_6.gpio_mode.gpio_mode_peripheral" configurationId="p06_6.gpio_mode"/>
+      <configSetting altId="p06_7.ether_eth1.eth1_rxd1" configurationId="p06_7"/>
+      <configSetting altId="p06_7.gpio_mode.gpio_mode_peripheral" configurationId="p06_7.gpio_mode"/>
+      <configSetting altId="p07_0.ether_eth1.eth1_rxd2" configurationId="p07_0"/>
+      <configSetting altId="p07_0.gpio_mode.gpio_mode_peripheral" configurationId="p07_0.gpio_mode"/>
+      <configSetting altId="p07_1.ether_eth1.eth1_rxd3" configurationId="p07_1"/>
+      <configSetting altId="p07_1.gpio_mode.gpio_mode_peripheral" configurationId="p07_1.gpio_mode"/>
+      <configSetting altId="p07_2.ether_eth1.eth1_rxdv_crsdv_rxctl" configurationId="p07_2"/>
+      <configSetting altId="p07_2.gpio_mode.gpio_mode_peripheral" configurationId="p07_2.gpio_mode"/>
+      <configSetting altId="p07_3.ether_eth1.eth1_rxclk_ref_clk_rxc" configurationId="p07_3"/>
+      <configSetting altId="p07_3.gpio_mode.gpio_mode_peripheral" configurationId="p07_3.gpio_mode"/>
+      <configSetting altId="p07_4.usb_hs.usb_vbusin" configurationId="p07_4"/>
+      <configSetting altId="p07_4.gpio_mode.gpio_mode_peripheral" configurationId="p07_4.gpio_mode"/>
+      <configSetting altId="p08_4.ether_eth0.eth0_rxd3" configurationId="p08_4"/>
+      <configSetting altId="p08_4.gpio_mode.gpio_mode_peripheral" configurationId="p08_4.gpio_mode"/>
+      <configSetting altId="p08_5.ether_eth0.eth0_rxdv_crsdv_rxctl" configurationId="p08_5"/>
+      <configSetting altId="p08_5.gpio_mode.gpio_mode_peripheral" configurationId="p08_5.gpio_mode"/>
+      <configSetting altId="p08_6.ether_eth0.eth0_rxclk_ref_clk_rxc" configurationId="p08_6"/>
+      <configSetting altId="p08_6.gpio_mode.gpio_mode_peripheral" configurationId="p08_6.gpio_mode"/>
+      <configSetting altId="p08_7.ether_gmac.gmac_mdc" configurationId="p08_7"/>
+      <configSetting altId="p08_7.gpio_mode.gpio_mode_peripheral" configurationId="p08_7.gpio_mode"/>
+      <configSetting altId="p09_0.ether_gmac.gmac_mdio" configurationId="p09_0"/>
+      <configSetting altId="p09_0.gpio_mode.gpio_mode_peripheral" configurationId="p09_0.gpio_mode"/>
+      <configSetting altId="p09_1.ether_eth0.eth0_refclk" configurationId="p09_1"/>
+      <configSetting altId="p09_1.gpio_mode.gpio_mode_peripheral" configurationId="p09_1.gpio_mode"/>
+      <configSetting altId="p09_3.ether_eth0.eth0_txd3" configurationId="p09_3"/>
+      <configSetting altId="p09_3.gpio_speed.gpio_speed_high" configurationId="p09_3.gpio_drivecapacity"/>
+      <configSetting altId="p09_3.gpio_mode.gpio_mode_peripheral" configurationId="p09_3.gpio_mode"/>
+      <configSetting altId="p09_3.sr.sr.fast" configurationId="p09_3.sr"/>
+      <configSetting altId="p09_4.ether_eth0.eth0_txd2" configurationId="p09_4"/>
+      <configSetting altId="p09_4.gpio_speed.gpio_speed_high" configurationId="p09_4.gpio_drivecapacity"/>
+      <configSetting altId="p09_4.gpio_mode.gpio_mode_peripheral" configurationId="p09_4.gpio_mode"/>
+      <configSetting altId="p09_4.sr.sr.fast" configurationId="p09_4.sr"/>
+      <configSetting altId="p09_5.ether_eth0.eth0_txd1" configurationId="p09_5"/>
+      <configSetting altId="p09_5.gpio_speed.gpio_speed_high" configurationId="p09_5.gpio_drivecapacity"/>
+      <configSetting altId="p09_5.gpio_mode.gpio_mode_peripheral" configurationId="p09_5.gpio_mode"/>
+      <configSetting altId="p09_5.sr.sr.fast" configurationId="p09_5.sr"/>
+      <configSetting altId="p09_6.ether_eth0.eth0_txd0" configurationId="p09_6"/>
+      <configSetting altId="p09_6.gpio_speed.gpio_speed_high" configurationId="p09_6.gpio_drivecapacity"/>
+      <configSetting altId="p09_6.gpio_mode.gpio_mode_peripheral" configurationId="p09_6.gpio_mode"/>
+      <configSetting altId="p09_6.sr.sr.fast" configurationId="p09_6.sr"/>
+      <configSetting altId="p09_7.ether_eth0.eth0_txclk_txc" configurationId="p09_7"/>
+      <configSetting altId="p09_7.gpio_speed.gpio_speed_high" configurationId="p09_7.gpio_drivecapacity"/>
+      <configSetting altId="p09_7.gpio_mode.gpio_mode_peripheral" configurationId="p09_7.gpio_mode"/>
+      <configSetting altId="p09_7.sr.sr.fast" configurationId="p09_7.sr"/>
+      <configSetting altId="p10_0.ether_eth0.eth0_txen_txctl" configurationId="p10_0"/>
+      <configSetting altId="p10_0.gpio_mode.gpio_mode_peripheral" configurationId="p10_0.gpio_mode"/>
+      <configSetting altId="p10_1.ether_eth0.eth0_rxd0" configurationId="p10_1"/>
+      <configSetting altId="p10_1.gpio_mode.gpio_mode_peripheral" configurationId="p10_1.gpio_mode"/>
+      <configSetting altId="p10_2.ether_eth0.eth0_rxd1" configurationId="p10_2"/>
+      <configSetting altId="p10_2.gpio_mode.gpio_mode_peripheral" configurationId="p10_2.gpio_mode"/>
+      <configSetting altId="p10_3.ether_eth0.eth0_rxd2" configurationId="p10_3"/>
+      <configSetting altId="p10_3.gpio_mode.gpio_mode_peripheral" configurationId="p10_3.gpio_mode"/>
+      <configSetting altId="p10_4.ether_ethsw.ethsw_phylink0" configurationId="p10_4"/>
+      <configSetting altId="p10_4.gpio_mode.gpio_mode_peripheral" configurationId="p10_4.gpio_mode"/>
+      <configSetting altId="p13_2.iic0.iic_scl0" configurationId="p13_2"/>
+      <configSetting altId="p13_2.gpio_speed.gpio_speed_middle" configurationId="p13_2.gpio_drivecapacity"/>
+      <configSetting altId="p13_2.gpio_mode.gpio_mode_peripheral" configurationId="p13_2.gpio_mode"/>
+      <configSetting altId="p13_3.iic0.iic_sda0" configurationId="p13_3"/>
+      <configSetting altId="p13_3.gpio_speed.gpio_speed_middle" configurationId="p13_3.gpio_drivecapacity"/>
+      <configSetting altId="p13_3.gpio_mode.gpio_mode_peripheral" configurationId="p13_3.gpio_mode"/>
+      <configSetting altId="p13_4.output.low" configurationId="p13_4"/>
+      <configSetting altId="p13_4.gpio_mode.gpio_mode_out.low" configurationId="p13_4.gpio_mode"/>
+      <configSetting altId="p13_5.input" configurationId="p13_5"/>
+      <configSetting altId="p13_5.gpio_mode.gpio_mode_in" configurationId="p13_5.gpio_mode"/>
+      <configSetting altId="p13_6.input" configurationId="p13_6"/>
+      <configSetting altId="p13_6.gpio_mode.gpio_mode_in" configurationId="p13_6.gpio_mode"/>
+      <configSetting altId="p13_7.input" configurationId="p13_7"/>
+      <configSetting altId="p13_7.gpio_mode.gpio_mode_in" configurationId="p13_7.gpio_mode"/>
+      <configSetting altId="p14_0.output.low" configurationId="p14_0"/>
+      <configSetting altId="p14_0.gpio_mode.gpio_mode_out.low" configurationId="p14_0.gpio_mode"/>
+      <configSetting altId="p14_1.output.low" configurationId="p14_1"/>
+      <configSetting altId="p14_1.gpio_mode.gpio_mode_out.low" configurationId="p14_1.gpio_mode"/>
+      <configSetting altId="p14_2.xspi0.xspi0_ecs0_hash" configurationId="p14_2"/>
+      <configSetting altId="p14_2.gpio_mode.gpio_mode_peripheral" configurationId="p14_2.gpio_mode"/>
+      <configSetting altId="p14_3.output.low" configurationId="p14_3"/>
+      <configSetting altId="p14_3.gpio_mode.gpio_mode_out.low" configurationId="p14_3.gpio_mode"/>
+      <configSetting altId="p14_4.xspi0.xspi0_ds" configurationId="p14_4"/>
+      <configSetting altId="p14_4.gpio_speed.gpio_speed_high" configurationId="p14_4.gpio_drivecapacity"/>
+      <configSetting altId="p14_4.gpio_mode.gpio_mode_peripheral" configurationId="p14_4.gpio_mode"/>
+      <configSetting altId="p14_4.sr.sr.fast" configurationId="p14_4.sr"/>
+      <configSetting altId="p14_5.xspi0.xspi0_ckn" configurationId="p14_5"/>
+      <configSetting altId="p14_5.gpio_speed.gpio_speed_high" configurationId="p14_5.gpio_drivecapacity"/>
+      <configSetting altId="p14_5.gpio_mode.gpio_mode_peripheral" configurationId="p14_5.gpio_mode"/>
+      <configSetting altId="p14_5.sr.sr.fast" configurationId="p14_5.sr"/>
+      <configSetting altId="p14_6.xspi0.xspi0_ckp" configurationId="p14_6"/>
+      <configSetting altId="p14_6.gpio_speed.gpio_speed_high" configurationId="p14_6.gpio_drivecapacity"/>
+      <configSetting altId="p14_6.gpio_mode.gpio_mode_peripheral" configurationId="p14_6.gpio_mode"/>
+      <configSetting altId="p14_6.sr.sr.fast" configurationId="p14_6.sr"/>
+      <configSetting altId="p14_7.xspi0.xspi0_io0" configurationId="p14_7"/>
+      <configSetting altId="p14_7.gpio_speed.gpio_speed_high" configurationId="p14_7.gpio_drivecapacity"/>
+      <configSetting altId="p14_7.gpio_mode.gpio_mode_peripheral" configurationId="p14_7.gpio_mode"/>
+      <configSetting altId="p14_7.sr.sr.fast" configurationId="p14_7.sr"/>
+      <configSetting altId="p15_0.xspi0.xspi0_io1" configurationId="p15_0"/>
+      <configSetting altId="p15_0.gpio_speed.gpio_speed_high" configurationId="p15_0.gpio_drivecapacity"/>
+      <configSetting altId="p15_0.gpio_mode.gpio_mode_peripheral" configurationId="p15_0.gpio_mode"/>
+      <configSetting altId="p15_0.sr.sr.fast" configurationId="p15_0.sr"/>
+      <configSetting altId="p15_1.xspi0.xspi0_io2" configurationId="p15_1"/>
+      <configSetting altId="p15_1.gpio_speed.gpio_speed_high" configurationId="p15_1.gpio_drivecapacity"/>
+      <configSetting altId="p15_1.gpio_mode.gpio_mode_peripheral" configurationId="p15_1.gpio_mode"/>
+      <configSetting altId="p15_1.sr.sr.fast" configurationId="p15_1.sr"/>
+      <configSetting altId="p15_2.xspi0.xspi0_io3" configurationId="p15_2"/>
+      <configSetting altId="p15_2.gpio_speed.gpio_speed_high" configurationId="p15_2.gpio_drivecapacity"/>
+      <configSetting altId="p15_2.gpio_mode.gpio_mode_peripheral" configurationId="p15_2.gpio_mode"/>
+      <configSetting altId="p15_2.sr.sr.fast" configurationId="p15_2.sr"/>
+      <configSetting altId="p15_3.xspi0.xspi0_io4" configurationId="p15_3"/>
+      <configSetting altId="p15_3.gpio_speed.gpio_speed_high" configurationId="p15_3.gpio_drivecapacity"/>
+      <configSetting altId="p15_3.gpio_mode.gpio_mode_peripheral" configurationId="p15_3.gpio_mode"/>
+      <configSetting altId="p15_3.sr.sr.fast" configurationId="p15_3.sr"/>
+      <configSetting altId="p15_4.xspi0.xspi0_io5" configurationId="p15_4"/>
+      <configSetting altId="p15_4.gpio_speed.gpio_speed_high" configurationId="p15_4.gpio_drivecapacity"/>
+      <configSetting altId="p15_4.gpio_mode.gpio_mode_peripheral" configurationId="p15_4.gpio_mode"/>
+      <configSetting altId="p15_4.sr.sr.fast" configurationId="p15_4.sr"/>
+      <configSetting altId="p15_5.xspi0.xspi0_io6" configurationId="p15_5"/>
+      <configSetting altId="p15_5.gpio_speed.gpio_speed_high" configurationId="p15_5.gpio_drivecapacity"/>
+      <configSetting altId="p15_5.gpio_mode.gpio_mode_peripheral" configurationId="p15_5.gpio_mode"/>
+      <configSetting altId="p15_5.sr.sr.fast" configurationId="p15_5.sr"/>
+      <configSetting altId="p15_6.xspi0.xspi0_io7" configurationId="p15_6"/>
+      <configSetting altId="p15_6.gpio_speed.gpio_speed_high" configurationId="p15_6.gpio_drivecapacity"/>
+      <configSetting altId="p15_6.gpio_mode.gpio_mode_peripheral" configurationId="p15_6.gpio_mode"/>
+      <configSetting altId="p15_6.sr.sr.fast" configurationId="p15_6.sr"/>
+      <configSetting altId="p15_7.xspi0.xspi0_cs0_hash" configurationId="p15_7"/>
+      <configSetting altId="p15_7.gpio_speed.gpio_speed_high" configurationId="p15_7.gpio_drivecapacity"/>
+      <configSetting altId="p15_7.gpio_mode.gpio_mode_peripheral" configurationId="p15_7.gpio_mode"/>
+      <configSetting altId="p15_7.sr.sr.fast" configurationId="p15_7.sr"/>
+      <configSetting altId="p16_0.xspi0.xspi0_cs1_hash" configurationId="p16_0"/>
+      <configSetting altId="p16_0.gpio_speed.gpio_speed_high" configurationId="p16_0.gpio_drivecapacity"/>
+      <configSetting altId="p16_0.gpio_mode.gpio_mode_peripheral" configurationId="p16_0.gpio_mode"/>
+      <configSetting altId="p16_0.sr.sr.fast" configurationId="p16_0.sr"/>
+      <configSetting altId="p16_1.xspi0.xspi0_reset0_hash" configurationId="p16_1"/>
+      <configSetting altId="p16_1.gpio_mode.gpio_mode_peripheral" configurationId="p16_1.gpio_mode"/>
+      <configSetting altId="p16_3.input" configurationId="p16_3"/>
+      <configSetting altId="p16_3.gpio_mode.gpio_mode_in" configurationId="p16_3.gpio_mode"/>
+      <configSetting altId="p16_5.sci0.txd_mosi0" configurationId="p16_5"/>
+      <configSetting altId="p16_5.gpio_speed.gpio_speed_high" configurationId="p16_5.gpio_drivecapacity"/>
+      <configSetting altId="p16_5.gpio_mode.gpio_mode_peripheral" configurationId="p16_5.gpio_mode"/>
+      <configSetting altId="p16_5.sr.sr.fast" configurationId="p16_5.sr"/>
+      <configSetting altId="p16_6.sci0.rxd_miso0" configurationId="p16_6"/>
+      <configSetting altId="p16_6.gpio_speed.gpio_speed_high" configurationId="p16_6.gpio_drivecapacity"/>
+      <configSetting altId="p16_6.gpio_mode.gpio_mode_peripheral" configurationId="p16_6.gpio_mode"/>
+      <configSetting altId="p16_6.sr.sr.fast" configurationId="p16_6.sr"/>
+      <configSetting altId="p17_3.output.low" configurationId="p17_3"/>
+      <configSetting altId="p17_3.gpio_mode.gpio_mode_out.low" configurationId="p17_3.gpio_mode"/>
+      <configSetting altId="p17_5.usb_hs.usb_ovrcur" configurationId="p17_5"/>
+      <configSetting altId="p17_5.gpio_mode.gpio_mode_peripheral" configurationId="p17_5.gpio_mode"/>
+      <configSetting altId="p17_7.sci3.rxd_miso3" configurationId="p17_7"/>
+      <configSetting altId="p17_7.gpio_speed.gpio_speed_high" configurationId="p17_7.gpio_drivecapacity"/>
+      <configSetting altId="p17_7.gpio_mode.gpio_mode_peripheral" configurationId="p17_7.gpio_mode"/>
+      <configSetting altId="p17_7.sr.sr.fast" configurationId="p17_7.sr"/>
+      <configSetting altId="p18_0.sci3.txd_mosi3" configurationId="p18_0"/>
+      <configSetting altId="p18_0.gpio_speed.gpio_speed_high" configurationId="p18_0.gpio_drivecapacity"/>
+      <configSetting altId="p18_0.gpio_mode.gpio_mode_peripheral" configurationId="p18_0.gpio_mode"/>
+      <configSetting altId="p18_0.sr.sr.fast" configurationId="p18_0.sr"/>
+      <configSetting altId="p18_2.output.low" configurationId="p18_2"/>
+      <configSetting altId="p18_2.gpio_mode.gpio_mode_out.low" configurationId="p18_2.gpio_mode"/>
+      <configSetting altId="p18_4.spi2.spi_rspck2" configurationId="p18_4"/>
+      <configSetting altId="p18_4.gpio_speed.gpio_speed_high" configurationId="p18_4.gpio_drivecapacity"/>
+      <configSetting altId="p18_4.gpio_mode.gpio_mode_peripheral" configurationId="p18_4.gpio_mode"/>
+      <configSetting altId="p18_4.sr.sr.fast" configurationId="p18_4.sr"/>
+      <configSetting altId="p18_5.spi2.spi_mosi2" configurationId="p18_5"/>
+      <configSetting altId="p18_5.gpio_speed.gpio_speed_high" configurationId="p18_5.gpio_drivecapacity"/>
+      <configSetting altId="p18_5.gpio_mode.gpio_mode_peripheral" configurationId="p18_5.gpio_mode"/>
+      <configSetting altId="p18_5.sr.sr.fast" configurationId="p18_5.sr"/>
+      <configSetting altId="p18_6.spi2.spi_miso2" configurationId="p18_6"/>
+      <configSetting altId="p18_6.gpio_speed.gpio_speed_high" configurationId="p18_6.gpio_drivecapacity"/>
+      <configSetting altId="p18_6.gpio_mode.gpio_mode_peripheral" configurationId="p18_6.gpio_mode"/>
+      <configSetting altId="p18_6.sr.sr.fast" configurationId="p18_6.sr"/>
+      <configSetting altId="p19_0.usb_hs.usb_vbusen" configurationId="p19_0"/>
+      <configSetting altId="p19_0.gpio_mode.gpio_mode_peripheral" configurationId="p19_0.gpio_mode"/>
+      <configSetting altId="p20_1.output.low" configurationId="p20_1"/>
+      <configSetting altId="p20_1.gpio_mode.gpio_mode_out.low" configurationId="p20_1.gpio_mode"/>
+      <configSetting altId="p20_2.output.low" configurationId="p20_2"/>
+      <configSetting altId="p20_2.gpio_mode.gpio_mode_out.low" configurationId="p20_2.gpio_mode"/>
+      <configSetting altId="p20_3.output.low" configurationId="p20_3"/>
+      <configSetting altId="p20_3.gpio_mode.gpio_mode_out.low" configurationId="p20_3.gpio_mode"/>
+      <configSetting altId="p20_4.output.low" configurationId="p20_4"/>
+      <configSetting altId="p20_4.gpio_mode.gpio_mode_out.low" configurationId="p20_4.gpio_mode"/>
+      <configSetting altId="p21_1.spi2.spi_ssl20" configurationId="p21_1"/>
+      <configSetting altId="p21_1.gpio_speed.gpio_speed_high" configurationId="p21_1.gpio_drivecapacity"/>
+      <configSetting altId="p21_1.gpio_mode.gpio_mode_peripheral" configurationId="p21_1.gpio_mode"/>
+      <configSetting altId="p21_1.sr.sr.fast" configurationId="p21_1.sr"/>
+      <configSetting altId="p22_1.output.low" configurationId="p22_1"/>
+      <configSetting altId="p22_1.gpio_mode.gpio_mode_out.low" configurationId="p22_1.gpio_mode"/>
+      <configSetting altId="p22_3.output.low" configurationId="p22_3"/>
+      <configSetting altId="p22_3.gpio_mode.gpio_mode_out.low" configurationId="p22_3.gpio_mode"/>
+      <configSetting altId="p23_7.ether_eth2.eth2_rxd0" configurationId="p23_7"/>
+      <configSetting altId="p23_7.gpio_mode.gpio_mode_peripheral" configurationId="p23_7.gpio_mode"/>
+      <configSetting altId="p24_0.ether_eth2.eth2_rxd1" configurationId="p24_0"/>
+      <configSetting altId="p24_0.gpio_mode.gpio_mode_peripheral" configurationId="p24_0.gpio_mode"/>
+      <configSetting altId="p24_1.ether_eth2.eth2_rxclk_ref_clk_rxc" configurationId="p24_1"/>
+      <configSetting altId="p24_1.gpio_mode.gpio_mode_peripheral" configurationId="p24_1.gpio_mode"/>
+      <configSetting altId="p24_2.ether_eth2.eth2_rxd2" configurationId="p24_2"/>
+      <configSetting altId="p24_2.gpio_mode.gpio_mode_peripheral" configurationId="p24_2.gpio_mode"/>
+      <configSetting altId="sci0.mode.asynchronousmode.free" configurationId="sci0.mode"/>
+      <configSetting altId="sci0.rxd_miso0.p16_6" configurationId="sci0.rxd_miso0"/>
+      <configSetting altId="sci0.txd_mosi0.p16_5" configurationId="sci0.txd_mosi0"/>
+      <configSetting altId="sci3.mode.asynchronousmode.free" configurationId="sci3.mode"/>
+      <configSetting altId="sci3.rxd_miso3.p17_7" configurationId="sci3.rxd_miso3"/>
+      <configSetting altId="sci3.txd_mosi3.p18_0" configurationId="sci3.txd_mosi3"/>
+      <configSetting altId="spi2.mode.enabled.free" configurationId="spi2.mode"/>
+      <configSetting altId="spi2.spi_miso2.p18_6" configurationId="spi2.spi_miso2"/>
+      <configSetting altId="spi2.spi_mosi2.p18_5" configurationId="spi2.spi_mosi2"/>
+      <configSetting altId="spi2.spi_rspck2.p18_4" configurationId="spi2.spi_rspck2"/>
+      <configSetting altId="spi2.spi_ssl20.p21_1" configurationId="spi2.spi_ssl20"/>
+      <configSetting altId="usb_hs.mode.enabeld.free" configurationId="usb_hs.mode"/>
+      <configSetting altId="usb_hs.usb_ovrcur.p17_5" configurationId="usb_hs.usb_ovrcur"/>
+      <configSetting altId="usb_hs.usb_vbusen.p19_0" configurationId="usb_hs.usb_vbusen"/>
+      <configSetting altId="usb_hs.usb_vbusin.p07_4" configurationId="usb_hs.usb_vbusin"/>
+      <configSetting altId="xspi0.mode.octa_40_1.8v_41.free" configurationId="xspi0.mode"/>
+      <configSetting altId="xspi0.xspi0_ckn.p14_5" configurationId="xspi0.xspi0_ckn"/>
+      <configSetting altId="xspi0.xspi0_ckp.p14_6" configurationId="xspi0.xspi0_ckp"/>
+      <configSetting altId="xspi0.xspi0_cs0_hash.p15_7" configurationId="xspi0.xspi0_cs0_hash"/>
+      <configSetting altId="xspi0.xspi0_cs1_hash.p16_0" configurationId="xspi0.xspi0_cs1_hash"/>
+      <configSetting altId="xspi0.xspi0_ds.p14_4" configurationId="xspi0.xspi0_ds"/>
+      <configSetting altId="xspi0.xspi0_ecs0_hash.p14_2" configurationId="xspi0.xspi0_ecs0_hash"/>
+      <configSetting altId="xspi0.xspi0_io0.p14_7" configurationId="xspi0.xspi0_io0"/>
+      <configSetting altId="xspi0.xspi0_io1.p15_0" configurationId="xspi0.xspi0_io1"/>
+      <configSetting altId="xspi0.xspi0_io2.p15_1" configurationId="xspi0.xspi0_io2"/>
+      <configSetting altId="xspi0.xspi0_io3.p15_2" configurationId="xspi0.xspi0_io3"/>
+      <configSetting altId="xspi0.xspi0_io4.p15_3" configurationId="xspi0.xspi0_io4"/>
+      <configSetting altId="xspi0.xspi0_io5.p15_4" configurationId="xspi0.xspi0_io5"/>
+      <configSetting altId="xspi0.xspi0_io6.p15_5" configurationId="xspi0.xspi0_io6"/>
+      <configSetting altId="xspi0.xspi0_io7.p15_6" configurationId="xspi0.xspi0_io7"/>
+      <configSetting altId="xspi0.xspi0_reset0_hash.p16_1" configurationId="xspi0.xspi0_reset0_hash"/>
+    </pincfg>
+    <pincfg active="false" name="R9A07G084M04GBG.pincfg" selected="false" symbol="">
+      <configSetting altId="jtag_fslash_swd.mode.jtag.free" configurationId="jtag_fslash_swd.mode"/>
+      <configSetting altId="jtag_fslash_swd.tck_swclk.p02_7" configurationId="jtag_fslash_swd.tck_swclk"/>
+      <configSetting altId="jtag_fslash_swd.tdi.p02_5" configurationId="jtag_fslash_swd.tdi"/>
+      <configSetting altId="jtag_fslash_swd.tdo.p02_4" configurationId="jtag_fslash_swd.tdo"/>
+      <configSetting altId="jtag_fslash_swd.tms_swdio.p02_6" configurationId="jtag_fslash_swd.tms_swdio"/>
+      <configSetting altId="p02_4.jtag_fslash_swd.tdo" configurationId="p02_4"/>
+      <configSetting altId="p02_4.gpio_speed.gpio_speed_high" configurationId="p02_4.gpio_drivecapacity"/>
+      <configSetting altId="p02_4.gpio_mode.gpio_mode_peripheral" configurationId="p02_4.gpio_mode"/>
+      <configSetting altId="p02_4.sr.sr.fast" configurationId="p02_4.sr"/>
+      <configSetting altId="p02_5.jtag_fslash_swd.tdi" configurationId="p02_5"/>
+      <configSetting altId="p02_5.gpio_mode.gpio_mode_peripheral" configurationId="p02_5.gpio_mode"/>
+      <configSetting altId="p02_6.jtag_fslash_swd.tms_swdio" configurationId="p02_6"/>
+      <configSetting altId="p02_6.gpio_speed.gpio_speed_high" configurationId="p02_6.gpio_drivecapacity"/>
+      <configSetting altId="p02_6.gpio_mode.gpio_mode_peripheral" configurationId="p02_6.gpio_mode"/>
+      <configSetting altId="p02_6.sr.sr.fast" configurationId="p02_6.sr"/>
+      <configSetting altId="p02_7.jtag_fslash_swd.tck_swclk" configurationId="p02_7"/>
+      <configSetting altId="p02_7.gpio_mode.gpio_mode_peripheral" configurationId="p02_7.gpio_mode"/>
+    </pincfg>
+  </raPinConfiguration>
+</raConfiguration>

projects/etherkit_ethercat_cherryecat/envsetup.sh

@@ -0,0 +1,22 @@
+#!/bin/bash
+
+export RTT_ROOT=${PWD}/rt-thread
+export ENV_ROOT=${HOME}/.env
+export BSP_ROOT=${PWD}
+export RTT_CC='gcc'
+export RTT_EXEC_PATH='/usr/bin'
+
+rtt_dir='../../rt-thread'
+lib_dir='../../libraries'
+
+if [ ! -L "rt-thread" ]; then
+	if [ -d $rtt_dir ]; then
+		ln -s $rtt_dir ./rt-thread
+	fi
+fi
+
+if [ ! -L "libraries" ]; then
+	if [ -d $lib_dir ]; then
+		ln -s $lib_dir ./libraries
+	fi
+fi

projects/etherkit_ethercat_cherryecat/memory_regions.ld

@@ -0,0 +1,40 @@
+
+            /* generated memory regions file - do not edit */
+                                ATCM_START  = 0x00000000;
+                    ATCM_LENGTH = 0x20000;
+                    BTCM_START  = 0x00100000;
+                    BTCM_LENGTH = 0x20000;
+                    SYSTEM_RAM_START  = 0x10000000;
+                    SYSTEM_RAM_LENGTH = 0x180000;
+                    SYSTEM_RAM_MIRROR_START  = 0x30000000;
+                    SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
+                    xSPI0_CS0_SPACE_MIRROR_START  = 0x40000000;
+                    xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+                    xSPI0_CS1_SPACE_MIRROR_START  = 0x44000000;
+                    xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
+                    xSPI1_CS0_SPACE_MIRROR_START  = 0x48000000;
+                    xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+                    CS0_SPACE_MIRROR_START  = 0x50000000;
+                    CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+                    CS2_SPACE_MIRROR_START  = 0x54000000;
+                    CS2_SPACE_MIRROR_LENGTH = 0x4000000;
+                    CS3_SPACE_MIRROR_START  = 0x58000000;
+                    CS3_SPACE_MIRROR_LENGTH = 0x4000000;
+                    CS5_SPACE_MIRROR_START  = 0x5C000000;
+                    CS5_SPACE_MIRROR_LENGTH = 0x4000000;
+                    xSPI0_CS0_SPACE_START  = 0x60000000;
+                    xSPI0_CS0_SPACE_LENGTH = 0x4000000;
+                    xSPI0_CS1_SPACE_START  = 0x64000000;
+                    xSPI0_CS1_SPACE_LENGTH = 0x4000000;
+                    xSPI1_CS0_SPACE_START  = 0x68000000;
+                    xSPI1_CS0_SPACE_LENGTH = 0x4000000;
+                    CS0_SPACE_START  = 0x70000000;
+                    CS0_SPACE_LENGTH = 0x4000000;
+                    CS2_SPACE_START  = 0x74000000;
+                    CS2_SPACE_LENGTH = 0x4000000;
+                    CS3_SPACE_START  = 0x78000000;
+                    CS3_SPACE_LENGTH = 0x4000000;
+                    CS5_SPACE_START  = 0x7C000000;
+                    CS5_SPACE_LENGTH = 0x4000000;
+                    RAM_NS_BUFFER_LENGTH = 0x6100;
+                CR52_0 = 1;

projects/etherkit_ethercat_cherryecat/mklinks.bat

@@ -0,0 +1,6 @@
+@echo off
+%1 mshta vbscript:CreateObject("Shell.Application").ShellExecute("cmd.exe","/c %~s0 ::","","runas",1)(window.close)&&exit
+cd /d "%~dp0"
+@echo on
+mklink /D rt-thread ..\..\rt-thread
+mklink /D libraries ..\..\libraries

projects/etherkit_ethercat_cherryecat/mklinks.sh

@@ -0,0 +1,3 @@
+#!/bin/bash
+ln -s ../../rt-thread  rt-thread
+ln -s ../../libraries libraries

projects/etherkit_ethercat_cherryecat/ozone_scons.jdebug

@@ -0,0 +1,361 @@
+/*********************************************************************
+*                 (c) SEGGER Microcontroller GmbH                    *
+*                      The Embedded Experts                          *
+*                         www.segger.com                             *
+**********************************************************************
+
+File          : ozone_scons.jdebug
+Created       : 2 Dec 2024 10:53
+Ozone Version : V3.38b
+*/
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  //
+  // Dialog-generated settings
+  //
+  Project.AddPathSubstitute ("./", "$(ProjectDir)");
+  Project.AddPathSubstitute ("./", "$(ProjectDir)");
+  Project.SetDevice ("R9A07G084M04");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("50 MHz");
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-R52_AArch32.svd");
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-R52_AArch32.svd");
+  //
+  // User settings
+  //
+  File.Open ("$(ProjectDir)/rtthread.elf");
+}
+
+/*********************************************************************
+*
+*       OnStartupComplete
+*
+* Function description
+*   Called when program execution has reached/passed
+*   the startup completion point. Optional.
+*
+**********************************************************************
+*/
+//void OnStartupComplete (void) {
+//}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging an application in RAM on a Cortex-M target device.
+*
+**********************************************************************
+*/
+void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//  //
+//  // Set up initial stack pointer
+//  //
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//  }
+//  //
+//  // Set up entry point PC
+//  //
+//  PC = Elf.GetEntryPointPC();
+//
+//  if (PC != 0xFFFFFFFF) {
+//    Target.SetReg("PC", PC);
+//  } else if (VectorTableAddr != 0xFFFFFFFF) {
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  } else {
+//    Util.Error("Project file error: failed to set entry point PC", 1);
+//  }
+}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+**
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetResume
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetResume (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotLoad
+*
+* Function description
+*   Called upon loading a snapshot. Optional.
+*
+* Additional information
+*   This function is used to restore the target state in cases
+*   where values cannot simply be written to the target.
+*   Typical use: GPIO clock needs to be enabled, before
+*   GPIO is configured.
+*
+**********************************************************************
+*/
+//void OnSnapshotLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotSave
+*
+* Function description
+*   Called upon saving a snapshot. Optional.
+*
+* Additional information
+*   This function is usually used to save values of the target
+*   state which can either not be trivially read,
+*   or need to be restored in a specific way or order.
+*   Typically use: Memory Mapped Registers,
+*   such as PLL and GPIO configuration.
+*
+**********************************************************************
+*/
+//void OnSnapshotSave (void) {
+//}
+
+/*********************************************************************
+*
+*       OnError
+*
+* Function description
+*   Called when an error ocurred. Optional.
+*
+**********************************************************************
+*/
+//void OnError (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterProjectLoad
+*
+* Function description
+*   After Project load routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterProjectLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       _SetupTarget
+*
+* Function description
+*   Setup the target.
+*   Called by AfterTargetReset() and AfterTargetDownload().
+*
+*   Auto-generated function. May be overridden by Ozone.
+*
+**********************************************************************
+*/
+void _SetupTarget(void) {
+  //
+  // this function is intentionally empty because both inital PC and
+  // initial SP were chosen not to be set
+  //
+
+    U64 PC;
+     U32 cpsr;
+  int ElfClass;
+
+  ElfClass = Elf.GetFileClass();
+  //
+  // Set up initial PC
+  //
+  PC = Elf.GetExprValue("system_init");
+  if (PC != 0xFFFFFFFF) {
+    if (ElfClass == ELF_CLASS_64) {
+      //
+      // AArch64
+      //
+      Target.SetReg("PC", PC);
+    } else if (ElfClass == ELF_CLASS_32) {
+      //
+      // AArch32
+      //
+      Exec.Reset();
+      Target.SetReg("CPSR", 0x01da);
+      Target.SetReg("R15 (PC)", PC);
+    } else {
+      Util.Error("Project script error: failed to set initial PC", 1);
+    }
+  } else {
+    Util.Error("Project script error: failed to set initial PC", 1);
+  }
+}

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/.clang-format

@@ -0,0 +1,171 @@
+# clang-format configuration file. Intended for clang-format >= 11.0
+#
+# For more information, see:
+#
+#   https://clang.llvm.org/docs/ClangFormat.html
+#   https://clang.llvm.org/docs/ClangFormatStyleOptions.html
+#
+---
+# 语言: None, Cpp, Java, JavaScript, ObjC, Proto, TableGen, TextProto
+Language:	Cpp
+# BasedOnStyle:	LLVM
+# 访问说明符(public、private等)的偏移
+AccessModifierOffset:	-4
+# 开括号(开圆括号、开尖括号、开方括号)后的对齐: Align, DontAlign, AlwaysBreak(总是在开括号后换行)
+AlignAfterOpenBracket:	Align
+# 连续赋值时，对齐所有等号
+AlignConsecutiveAssignments:	false
+# 对齐位域
+AlignConsecutiveBitFields: true
+# 连续声明时，对齐所有声明的变量名
+AlignConsecutiveDeclarations:	false
+# 连续宏时，进行对齐
+AlignConsecutiveMacros: true
+# 左对齐逃脱换行(使用反斜杠换行)的反斜杠
+AlignEscapedNewlines:	Left
+# 水平对齐二元和三元表达式的操作数
+AlignOperands:	true
+# 对齐连续的尾随的注释
+AlignTrailingComments:	true
+# 允许函数声明的所有参数在放在下一行
+AllowAllParametersOfDeclarationOnNextLine:	false
+# 允许短的块放在同一行
+AllowShortBlocksOnASingleLine:	false
+# 允许短的case标签放在同一行
+AllowShortCaseLabelsOnASingleLine:	false
+# 允许短的函数放在同一行: None, InlineOnly(定义在类中), Empty(空函数), Inline(定义在类中，空函数), All
+AllowShortFunctionsOnASingleLine:	None
+# 允许短的if语句保持在同一行
+AllowShortIfStatementsOnASingleLine:	false
+# 允许短的循环保持在同一行
+AllowShortLoopsOnASingleLine:	false
+# 总是在定义返回类型后换行(deprecated)
+AlwaysBreakAfterDefinitionReturnType:	None
+# 总是在返回类型后换行: None, All, TopLevel(顶级函数，不包括在类中的函数),
+#  AllDefinitions(所有的定义，不包括声明), TopLevelDefinitions(所有的顶级函数的定义)
+AlwaysBreakAfterReturnType:	None
+# 总是在多行string字面量前换行
+AlwaysBreakBeforeMultilineStrings:	false
+# 总是在template声明后换行
+AlwaysBreakTemplateDeclarations:	false
+# false表示函数实参要么都在同一行，要么都各自一行
+BinPackArguments:	true
+# false表示所有形参要么都在同一行，要么都各自一行
+BinPackParameters:	true
+# 大括号换行，只有当BreakBeforeBraces设置为Custom时才有效
+BraceWrapping:
+    AfterClass: false
+    AfterControlStatement: false
+    AfterEnum: false
+    AfterFunction: true
+    AfterNamespace: false
+    AfterObjCDeclaration: false
+    AfterStruct: false
+    AfterUnion: false
+    AfterExternBlock: false # Unknown to clang-format-5.0
+    BeforeCatch: false
+    BeforeElse: false
+    IndentBraces: false
+    SplitEmptyFunction: true # Unknown to clang-format-4.0
+    SplitEmptyRecord: true # Unknown to clang-format-4.0
+    SplitEmptyNamespace: true # Unknown to clang-format-4.0
+# 在二元运算符前换行: None(在操作符后换行), NonAssignment(在非赋值的操作符前换行), All(在操作符前换行)
+BreakBeforeBinaryOperators:	None
+BreakBeforeBraces:	Custom
+#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
+# 在三元运算符前换行
+BreakBeforeTernaryOperators:	false
+# 在构造函数的初始化列表的逗号前换行
+BreakConstructorInitializersBeforeComma:	false
+BreakAfterJavaFieldAnnotations: false
+BreakStringLiterals: false
+# 每行字符的限制，0表示没有限制
+ColumnLimit:	0
+# 描述具有特殊意义的注释的正则表达式，它不应该被分割为多行或以其它方式改变
+CommentPragmas:	'^ IWYU pragma:'
+CompactNamespaces: false # Unknown to clang-format-4.0
+# 构造函数的初始化列表要么都在同一行，要么都各自一行
+ConstructorInitializerAllOnOneLineOrOnePerLine:	false
+# 构造函数的初始化列表的缩进宽度
+ConstructorInitializerIndentWidth:	4
+# 延续的行的缩进宽度
+ContinuationIndentWidth:	4
+# 去除C++11的列表初始化的大括号{后和}前的空格
+Cpp11BracedListStyle:	false
+# 继承最常用的指针和引用的对齐方式
+DerivePointerAlignment:	false
+# 关闭格式化
+DisableFormat:	false
+ForEachMacros:
+  - 'SHELL_EXPORT_CMD'
+
+# 自动检测函数的调用和定义是否被格式为每行一个参数(Experimental)
+ExperimentalAutoDetectBinPacking:	false
+# 缩进case标签
+IndentCaseLabels:	true
+# 缩进宽度
+IndentWidth:	4
+# 函数返回类型换行时，缩进函数声明或函数定义的函数名
+IndentWrappedFunctionNames:	false
+# 保留在块开始处的空行
+KeepEmptyLinesAtTheStartOfBlocks:	false
+# 开始一个块的宏的正则表达式
+MacroBlockBegin:	''
+# 结束一个块的宏的正则表达式
+MacroBlockEnd:	''
+# 连续空行的最大数量
+MaxEmptyLinesToKeep:	1
+# 命名空间的缩进: None, Inner(缩进嵌套的命名空间中的内容), All
+NamespaceIndentation:	None
+# 使用ObjC块时缩进宽度
+ObjCBlockIndentWidth:	4
+# 在ObjC的@property后添加一个空格
+ObjCSpaceAfterProperty:	false
+# 在ObjC的protocol列表前添加一个空格
+ObjCSpaceBeforeProtocolList:	true
+# 在call(后对函数调用换行的penalty
+PenaltyBreakBeforeFirstCallParameter:	30
+# 在一个注释中引入换行的penalty
+PenaltyBreakComment:	10
+# 第一次在<<前换行的penalty
+PenaltyBreakFirstLessLess:	0
+# 在一个字符串字面量中引入换行的penalty
+PenaltyBreakString:	10
+# 对于每个在行字符数限制之外的字符的penalty
+PenaltyExcessCharacter:	100
+# 将函数的返回类型放到它自己的行的penalty
+PenaltyReturnTypeOnItsOwnLine:	60
+# 指针和引用的对齐: Left, Right, Middle
+PointerAlignment:	Right
+# 允许重新排版注释
+ReflowComments:	false
+# 允许排序#include
+SortIncludes:	false
+# 在C风格类型转换后添加空格
+SpaceAfterCStyleCast:	false
+# 在赋值运算符之前添加空格
+SpaceBeforeAssignmentOperators:	true
+# 开圆括号之前添加一个空格: Never, ControlStatements, Always
+SpaceBeforeParens:	ControlStatements
+# 在空的圆括号中添加空格
+SpaceInEmptyParentheses:	false
+# 在尾随的评论前添加的空格数(只适用于//)
+SpacesBeforeTrailingComments:	1
+# 在尖括号的<后和>前添加空格
+SpacesInAngles:	false
+# 在容器(ObjC和JavaScript的数组和字典等)字面量中添加空格
+SpacesInContainerLiterals:	false
+# 在C风格类型转换的括号中添加空格
+SpacesInCStyleCastParentheses:	false
+# 在圆括号的(后和)前添加空格
+SpacesInParentheses:	false
+# 在方括号的[后和]前添加空格，lamda表达式和未指明大小的数组的声明不受影响
+SpacesInSquareBrackets:	false
+# 标准: Cpp03, Cpp11, Auto
+Standard:	Cpp03
+# tab宽度
+TabWidth:	4
+# 使用tab字符: Never, ForIndentation, ForContinuationAndIndentation, Always
+UseTab:	Never
+...
+

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/.gitattributes

@@ -0,0 +1,47 @@
+*.c linguist-language=C
+*.C linguist-language=C
+*.h linguist-language=C
+*.H linguist-language=C
+
+* text=auto
+
+*.S text
+*.asm text
+*.c text
+*.cc text
+*.cpp text
+*.cxx text
+*.h text
+*.htm text
+*.html text
+*.in text
+*.ld text
+*.m4 text
+*.mak text
+*.mk text
+*.py text
+*.rb text
+*.s text
+*.sct text
+*.sh text
+*.txt text
+*.xml text
+SConscript text
+Makefile text
+AUTHORS text
+COPYING text
+
+*.LZO -text
+*.Opt -text
+*.Uv2 -text
+*.ewp -text
+*.eww -text
+*.vcproj -text
+*.bat -text
+*.dos -text
+*.icf -text
+*.inf -text
+*.ini -text
+*.sct -text
+*.xsd -text
+Jamfile -text

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/.github/workflows/build_demo.yml

@@ -0,0 +1,36 @@
+name: Build Demo
+
+on:
+  push:
+    branches: [ master ]
+  pull_request:
+    branches: [ master ]
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
+      - name: Install dependencies
+        run: sudo apt-get update && sudo apt-get install -y cmake ninja-build
+
+      - name: Download hpm_sdk
+        run: |
+          cd ~
+          git clone https://github.com/hpmicro/hpm_sdk.git
+
+      - name: Download RISC-V toolchain
+        run: |
+          cd ~
+          wget https://github.com/hpmicro/riscv-gnu-toolchain/releases/download/2023.10.18/rv32imac_zicsr_zifencei_multilib_b_ext-linux.tar.gz
+          tar -xzf rv32imac_zicsr_zifencei_multilib_b_ext-linux.tar.gz
+
+      - name: Build demo
+        run: |
+          cd demo/hpmicro
+          export HPM_SDK_BASE=~/hpm_sdk
+          export GNURISCV_TOOLCHAIN_PATH=~/rv32imac_zicsr_zifencei_multilib_b_ext-linux
+          export HPM_SDK_TOOLCHAIN_VARIANT=
+          cmake -S . -B build -GNinja -DBOARD=hpm6800evk -DHPM_BUILD_TYPE=ram -DCMAKE_BUILD_TYPE=debug;cmake --build build

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/.gitignore

@@ -0,0 +1,23 @@
+.vscode
+build
+**/Drivers/**
+**/MDK-ARM/DebugConfig/**
+**/MDK-ARM/RTE/**
+**/obj/**
+**/RET/**
+**/Listings/**
+**/Objects/**
+*.map
+*.o
+*.d
+*.htm
+*.dep
+*.lnp
+*.iex
+*.lst
+*.axf
+*.crf
+*.hex
+*.Bak
+*.uvguix.*
+*.scvd

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/.readthedocs.yaml

@@ -0,0 +1,35 @@
+# Read the Docs configuration file for Sphinx projects
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+# Required
+version: 2
+
+# Set the OS, Python version and other tools you might need
+build:
+  os: ubuntu-22.04
+  tools:
+    python: "3.11"
+    # You can also specify other tool versions:
+    # nodejs: "20"
+    # rust: "1.70"
+    # golang: "1.20"
+
+# Build documentation in the "docs/" directory with Sphinx
+sphinx:
+  configuration: docs/source/conf.py
+  # You can configure Sphinx to use a different builder, for instance use the dirhtml builder for simpler URLs
+  # builder: "dirhtml"
+  # Fail on all warnings to avoid broken references
+  # fail_on_warning: true
+
+# Optionally build your docs in additional formats such as PDF and ePub
+# formats:
+#    - pdf
+#    - epub
+
+# Optional but recommended, declare the Python requirements required
+# to build your documentation
+# See https://docs.readthedocs.io/en/stable/guides/reproducible-builds.html
+python:
+   install:
+   - requirements: docs/requirements.txt

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/CMakeLists.txt

@@ -0,0 +1,39 @@
+if(CONFIG_CHERRYECAT)
+
+    list(APPEND cherryec_incs
+        ${CMAKE_CURRENT_LIST_DIR}/include
+    )
+
+    list(APPEND cherryec_srcs
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_cmd.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_coe.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_common.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_datagram.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_foe.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_mailbox.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_master.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_netdev.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_perf.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_sii.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_slave.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/ec_timestamp.c
+        ${CMAKE_CURRENT_LIST_DIR}/src/phy/chry_phy.c
+    )
+
+    if(DEFINED CONFIG_CHERRYECAT_OSAL)
+        if("${CONFIG_CHERRYECAT_OSAL}" STREQUAL "freertos")
+            list(APPEND cherryec_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/ec_osal_freertos.c)
+        elseif("${CONFIG_CHERRYECAT_OSAL}" STREQUAL "rtthread")
+            list(APPEND cherryec_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/ec_osal_rtthread.c)
+        elseif("${CONFIG_CHERRYECAT_OSAL}" STREQUAL "threadx")
+            list(APPEND cherryec_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/ec_osal_threadx.c)
+        endif()
+    endif()
+
+    if(HPM_SDK_BASE)
+        list(APPEND cherryec_srcs port/netdev_hpmicro.c)
+        sdk_inc(${cherryec_incs})
+        sdk_src(${cherryec_srcs})
+    endif()
+
+endif()

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/LICENSE

@@ -0,0 +1,201 @@
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
+      "Object" form shall mean any form resulting from mechanical
+      transformation or translation of a Source form, including but
+      not limited to compiled object code, generated documentation,
+      and conversions to other media types.
+
+      "Work" shall mean the work of authorship, whether in Source or
+      Object form, made available under the License, as indicated by a
+      copyright notice that is included in or attached to the work
+      (an example is provided in the Appendix below).
+
+      "Derivative Works" shall mean any work, whether in Source or Object
+      form, that is based on (or derived from) the Work and for which the
+      editorial revisions, annotations, elaborations, or other modifications
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+      of this License, Derivative Works shall not include works that remain
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+   2. Grant of Copyright License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
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+      this License, each Contributor hereby grants to You a perpetual,
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+      or a Contribution incorporated within the Work constitutes direct
+      or contributory patent infringement, then any patent licenses
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+
+   4. Redistribution. You may reproduce and distribute copies of the
+      Work or Derivative Works thereof in any medium, with or without
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+
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+
+   5. Submission of Contributions. Unless You explicitly state otherwise,
+      any Contribution intentionally submitted for inclusion in the Work
+      by You to the Licensor shall be under the terms and conditions of
+      this License, without any additional terms or conditions.
+      Notwithstanding the above, nothing herein shall supersede or modify
+      the terms of any separate license agreement you may have executed
+      with Licensor regarding such Contributions.
+
+   6. Trademarks. This License does not grant permission to use the trade
+      names, trademarks, service marks, or product names of the Licensor,
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+
+   7. Disclaimer of Warranty. Unless required by applicable law or
+      agreed to in writing, Licensor provides the Work (and each
+      Contributor provides its Contributions) on an "AS IS" BASIS,
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+      of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
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+      risks associated with Your exercise of permissions under this License.
+
+   8. Limitation of Liability. In no event and under no legal theory,
+      whether in tort (including negligence), contract, or otherwise,
+      unless required by applicable law (such as deliberate and grossly
+      negligent acts) or agreed to in writing, shall any Contributor be
+      liable to You for damages, including any direct, indirect, special,
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+      result of this License or out of the use or inability to use the
+      Work (including but not limited to damages for loss of goodwill,
+      work stoppage, computer failure or malfunction, or any and all
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+      has been advised of the possibility of such damages.
+
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+      License. However, in accepting such obligations, You may act only
+      on Your own behalf and on Your sole responsibility, not on behalf
+      of any other Contributor, and only if You agree to indemnify,
+      defend, and hold each Contributor harmless for any liability
+      incurred by, or claims asserted against, such Contributor by reason
+      of your accepting any such warranty or additional liability.
+
+   END OF TERMS AND CONDITIONS
+
+   APPENDIX: How to apply the Apache License to your work.
+
+      To apply the Apache License to your work, attach the following
+      boilerplate notice, with the fields enclosed by brackets "[]"
+      replaced with your own identifying information. (Don't include
+      the brackets!)  The text should be enclosed in the appropriate
+      comment syntax for the file format. We also recommend that a
+      file or class name and description of purpose be included on the
+      same "printed page" as the copyright notice for easier
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+
+   Copyright [yyyy] [name of copyright owner]
+
+   Licensed under the Apache License, Version 2.0 (the "License");
+   you may not use this file except in compliance with the License.
+   You may obtain a copy of the License at
+
+       http://www.apache.org/licenses/LICENSE-2.0
+
+   Unless required by applicable law or agreed to in writing, software
+   distributed under the License is distributed on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/README.md

@@ -0,0 +1,111 @@
+**English | [简体中文](README_zh.md)**
+
+<h1 align="center" style="margin: 30px 0 30px; font-weight: bold;">CherryECAT</h1>
+<p align="center">
+	<a href="https://github.com/cherry-embedded/CherryECAT/releases"><img src="https://img.shields.io/github/release/cherry-embedded/CherryECAT.svg"></a>
+	<a href="https://github.com/cherry-embedded/CherryECAT/blob/master/LICENSE"><img src="https://img.shields.io/github/license/cherry-embedded/CherryECAT.svg?style=flat-square"></a>
+	<a href="https://github.com/cherry-embedded/CherryECAT/actions/workflows/build_demo.yml"><img src="https://github.com/cherry-embedded/CherryECAT/actions/workflows/build_demo.yml/badge.svg"> </a>
+</p>
+
+CherryECAT is a tiny and beautiful, high real-time and low-jitter EtherCAT master stack, specially designed for MCUs running with RTOS.
+
+## Feature
+
+- ~ 4K ram, ~32K flash(24K + 8K shell cmd + debug log)
+- Asynchronous queue-based transfer (one transfer can carry multiple datagrams)
+- Zero-copy technology: directly use enet tx/rx buffer to fill and parse ethercat data
+- Support hot-plugging
+	- Automatic scanning bus
+	- Automatic updating slave information when the topology changes
+- Support automatic monitoring slave status
+- Support distributed clocks
+- Support CANopen over EtherCAT(COE)
+- Support File over EtherCAT(FOE)
+- Support Ethernet over EtherCAT(EOE)
+- Support Slave SII access
+- Support Slave register access
+- Support multi master
+- Support backup redundancy
+- Minimum PDO cyclic time < 40 us (depends on master and slave hardware)
+- Support multi cyclic time(every slave can use different proportional cyclic time)
+- Support ethercat cmd with shell, ref to IgH
+
+## Hardware limitations
+
+- **Master**
+	- CPU (cache > 16K, memcpy speed > 100MB/s)
+	- ENET must support descriptor dma and iperf with lwip > 90 Mbps
+	- Code must run in ram, ignore if no dc
+	- Must support High-Precision Timer (jitter < 1us)
+	- Must support High-Precision timestamp (ARM DWT/RISC-V MCYCLE)
+	- Must support long long print
+
+- **Slave**
+	- Must support COE
+	- Must support sdo complete access
+	- SII must have sync manager information
+
+## Shell cmd
+
+![ethercat](docs/assets/ethercat.png)
+![ethercat](docs/assets/ethercat1.png)
+![ethercat](docs/assets/ethercat2.png)
+![ethercat](docs/assets/ethercat3.png)
+![ethercat](docs/assets/ethercat4.png)
+![ethercat](docs/assets/ethercat5.png)
+![ethercat](docs/assets/ethercat6.png)
+![ethercat](docs/assets/ethercat7.png)
+![ethercat](docs/assets/ethercat8.png)
+
+## Tool
+
+- esi_parser
+
+Use **esi_parser.py** to generate slave eeprom information and download eeprom to slave.
+
+```
+python ./esi_parser.py ECAT_CIA402_ESI.xml eeprom.bin eeprom.h
+
+Parsing XML file: ECAT_CIA402_ESI.xml
+Parsed XML: Vendor=0x0048504D, Product=0x00000003
+Device Name: ECAT_CIA402
+Mailbox RX: 0x1000(128)
+Mailbox TX: 0x1080(128)
+Generating EEPROM data...
+✓ Successfully converted 'ECAT_CIA402_ESI.xml' to 'eeprom.bin'
+✓ Generated 2048 bytes of EEPROM data
+✓ Vendor ID: 0x0048504D
+✓ Product Code: 0x00000003
+✓ Revision: 0x00000001
+✓ Device Name: ECAT_CIA402
+✓ Generated C header file: eeprom.h
+```
+
+- eni_parser
+
+Use **eni_parser.py** to generate CherryECAT slave sync config.
+
+```
+python ./eni_parser.py ECAT_CIA402_ENI.xml sync_config.h
+
+Parsing ENI file: ECAT_CIA402_ENI.xml
+Generating C code...
+✓ Successfully converted 'ECAT_CIA402_ENI.xml' to 'sync_config.h'
+✓ Generated C code for 1 slave(s)
+✓ Slave 1:
+  - RxPDO 0x1602: 3 entries
+  - TxPDO 0x1A02: 3 entries
+```
+
+## Support Boards
+
+- HPM6750EVK2/HPM6800EVK/**HPM5E00EVK**(hybrid internal)
+- RT-Thread RZN2L-EtherKit
+
+## Contact
+
+QQ group: 563650597
+
+## License
+
+FOE,EOE and Backup redundancy features are available for commercial charge; other are free to use

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/README_zh.md

@@ -0,0 +1,111 @@
+**[English](README.md) | 简体中文**
+
+<h1 align="center" style="margin: 30px 0 30px; font-weight: bold;">CherryECAT</h1>
+<p align="center">
+	<a href="https://github.com/cherry-embedded/CherryECAT/releases"><img src="https://img.shields.io/github/release/cherry-embedded/CherryECAT.svg"></a>
+	<a href="https://github.com/cherry-embedded/CherryECAT/blob/master/LICENSE"><img src="https://img.shields.io/github/license/cherry-embedded/CherryECAT.svg?style=flat-square"></a>
+	<a href="https://github.com/cherry-embedded/CherryECAT/actions/workflows/build_demo.yml"><img src="https://github.com/cherry-embedded/CherryECAT/actions/workflows/build_demo.yml/badge.svg"> </a>
+</p>
+
+CherryECAT 是一个小而美的、高实时性、低抖动的 EtherCAT 主机协议栈，专为跑在 RTOS 下的 MCU 设计。
+
+## 特性
+
+- ~ 4K ram，~32K flash（24K + 8K shell cmd + debug log）
+- 异步队列式传输（一次传输可以携带多个 datagram）
+- 零拷贝技术：直接使用 enet tx/rx buffer 填充和解析 ethercat 数据
+- 支持热插拔
+	- 自动扫描总线
+	- 拓扑结构发生变化时自动更新 Slave 信息
+- 支持自动监控 Slave 状态
+- 支持分布式时钟
+- 支持 CANopen over EtherCAT (COE)
+- 支持 File over EtherCAT(FOE)
+- 支持 Ethernet over EtherCAT(EOE)
+- 支持 Slave SII 读写
+- 支持 Slave 寄存器读写
+- 支持多主站
+- 支持备份冗余
+- 最小 PDO cyclic time < 40 us (实际数值受主站硬件和从站硬件影响)
+- 支持多周期（每个从站可以使用不同的成比例的周期）
+- 支持 ethercat 命令行交互，参考 IgH
+
+## 硬件限制
+
+- 主站
+	- CPU (cache > 16K, memcpy speed > 100MB/s)
+	- 以太网必须支持 descriptor dma 并且 iperf with lwip > 90 Mbps
+	- 代码必须跑在 ram 上，如果不使用 DC 同步则忽视
+	- 必须支持高精度定时器（抖动小于 1us）
+	- 必须支持高精度时间戳 (ARM DWT/RISC-V MCYCLE)
+	- 必须支持 64 位打印
+
+- 从站
+	- 必须支持 COE
+	- 必须支持 sdo complete access
+	- SII 必须携带 sync manager 信息
+
+## Shell 命令
+
+![ethercat](docs/assets/ethercat.png)
+![ethercat](docs/assets/ethercat1.png)
+![ethercat](docs/assets/ethercat2.png)
+![ethercat](docs/assets/ethercat3.png)
+![ethercat](docs/assets/ethercat4.png)
+![ethercat](docs/assets/ethercat5.png)
+![ethercat](docs/assets/ethercat6.png)
+![ethercat](docs/assets/ethercat7.png)
+![ethercat](docs/assets/ethercat8.png)
+
+## 工具
+
+- esi_parser
+
+使用 **esi_parser.py** 生成从站 eeprom 信息用于烧录从站
+
+```
+python ./esi_parser.py ECAT_CIA402_ESI.xml eeprom.bin eeprom.h
+
+Parsing XML file: ECAT_CIA402_ESI.xml
+Parsed XML: Vendor=0x0048504D, Product=0x00000003
+Device Name: ECAT_CIA402
+Mailbox RX: 0x1000(128)
+Mailbox TX: 0x1080(128)
+Generating EEPROM data...
+✓ Successfully converted 'ECAT_CIA402_ESI.xml' to 'eeprom.bin'
+✓ Generated 2048 bytes of EEPROM data
+✓ Vendor ID: 0x0048504D
+✓ Product Code: 0x00000003
+✓ Revision: 0x00000001
+✓ Device Name: ECAT_CIA402
+✓ Generated C header file: eeprom.h
+```
+
+- eni_parser
+
+使用 **eni_parser.py** 生成 CherryECAT slave sync 配置
+
+```
+python ./eni_parser.py ECAT_CIA402_ENI.xml sync_config.h
+
+Parsing ENI file: ECAT_CIA402_ENI.xml
+Generating C code...
+✓ Successfully converted 'ECAT_CIA402_ENI.xml' to 'sync_config.h'
+✓ Generated C code for 1 slave(s)
+✓ Slave 1:
+  - RxPDO 0x1602: 3 entries
+  - TxPDO 0x1A02: 3 entries
+```
+
+## 支持的开发板
+
+- HPM6750EVK2/HPM6800EVK/**HPM5E00EVK**(hybrid internal)
+- RT-Thread RZN2L-EtherKit
+
+## 联系
+
+QQ group: 563650597
+
+## License
+
+FOE，EOE，备份冗余功能为商用收费，其余功能免费商用

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/SConscript

@@ -0,0 +1,35 @@
+from building import *
+
+cwd = GetCurrentDir()
+path = [cwd + '/include']
+src = []
+
+LIBS    = []
+LIBPATH = []
+CPPDEFINES = []
+
+src += Glob('src/ec_cmd.c')
+src += Glob('src/ec_coe.c')
+src += Glob('src/ec_common.c')
+src += Glob('src/ec_datagram.c')
+src += Glob('src/ec_foe.c')
+src += Glob('src/ec_mailbox.c')
+src += Glob('src/ec_master.c')
+src += Glob('src/ec_netdev.c')
+src += Glob('src/ec_perf.c')
+src += Glob('src/ec_sii.c')
+src += Glob('src/ec_slave.c')
+src += Glob('src/ec_timestamp.c')
+src += Glob('src/phy/chry_phy.c')
+src += Glob('osal/ec_osal_rtthread.c')
+
+if GetDepend(['PKG_CHERRYECAT_NETDEV_HPMICRO']):
+    src += Glob('port/netdev_hpmicro.c')
+
+if GetDepend(['PKG_CHERRYECAT_NETDEV_RENESAS']):
+    src += Glob('port/netdev_renesas.c')
+
+group = DefineGroup('CherryECAT', src, depend = ['PKG_USING_CHERRYECAT'], LIBS = LIBS, LIBPATH=LIBPATH, CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')
+

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/VERSION

@@ -0,0 +1,5 @@
+VERSION_MAJOR = 0
+VERSION_MINOR = 1
+PATCHLEVEL = 0
+VERSION_TWEAK = 0
+EXTRAVERSION = 0

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/cherryec_config_template.h

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_CONFIG_H
+#define EC_CONFIG_H
+
+#define CONFIG_EC_PRINTF(...) printf(__VA_ARGS__)
+
+#ifndef CONFIG_EC_DBG_LEVEL
+#define CONFIG_EC_DBG_LEVEL EC_DBG_INFO
+#endif
+
+#ifndef CONFIG_EC_SLAVE_DBG_LEVEL
+#define CONFIG_EC_SLAVE_DBG_LEVEL EC_DBG_INFO
+#endif
+
+/* Enable print with color */
+#define CONFIG_EC_PRINTF_COLOR_ENABLE
+
+#define EC_FAST_CODE_SECTION
+
+#ifndef CONFIG_EC_MAX_NETDEVS
+#define CONFIG_EC_MAX_NETDEVS 1
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_PRIO
+#define CONFIG_EC_NONPERIOD_PRIO 0
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_STACKSIZE
+#define CONFIG_EC_NONPERIOD_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_INTERVAL_MS
+#define CONFIG_EC_NONPERIOD_INTERVAL_MS 10
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_WAITERS
+#define CONFIG_EC_NONPERIOD_WAITERS 20
+#endif
+
+#ifndef CONFIG_EC_SCAN_PRIO
+#define CONFIG_EC_SCAN_PRIO 1
+#endif
+
+#ifndef CONFIG_EC_SCAN_STACKSIZE
+#define CONFIG_EC_SCAN_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_SCAN_INTERVAL_MS
+#define CONFIG_EC_SCAN_INTERVAL_MS 100
+#endif
+
+#ifndef CONFIG_EC_PER_SM_MAX_PDOS
+#define CONFIG_EC_PER_SM_MAX_PDOS 8
+#endif
+
+#ifndef CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES
+#define CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES 8
+#endif
+
+#define CONFIG_EC_PERF_ENABLE
+#define CONFIG_EC_CMD_ENABLE
+// #define CONFIG_EC_TIMESTAMP_CUSTOM
+// #define CONFIG_EC_PHY_CUSTOM
+
+#ifndef CONFIG_EC_MAX_PDO_BUFSIZE
+#define CONFIG_EC_MAX_PDO_BUFSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_TXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_TXBUF_COUNT 10
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_RXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_RXBUF_COUNT 10
+#endif
+
+// #define CONFIG_EC_FOE
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/CMakeLists.txt

@@ -0,0 +1,49 @@
+# Copyright (c) 2021 HPMicro
+# SPDX-License-Identifier: BSD-3-Clause
+
+cmake_minimum_required(VERSION 3.13)
+
+set(HPM_SDK_LD_NO_NANO_SPECS 1)
+
+set(CONFIG_FREERTOS 1)
+# set(CONFIG_CHERRYRB 1)
+set(CONFIG_CHERRYSH 1)
+set(CONFIG_CHERRYSH_INTERFACE "uart")
+
+set(CONFIG_ENET_PHY 1)
+set(APP_USE_ENET_PORT_COUNT 1)
+#set(APP_USE_ENET_ITF_RGMII 1)
+#set(APP_USE_ENET_ITF_RMII 1)
+#set(APP_USE_ENET_PHY_DP83867 1)
+#set(APP_USE_ENET_PHY_RTL8211 1)
+#set(APP_USE_ENET_PHY_DP83848 1)
+set(APP_USE_ENET_PHY_RTL8201 1)
+
+set(CONFIG_CHERRYECAT 1)
+set(CONFIG_CHERRYECAT_OSAL "freertos")
+
+if(NOT (HPM_BUILD_TYPE STREQUAL "ram"))
+message(FATAL_ERROR "Only support ram build for demo")
+endif()
+
+#Set CONFIG_FREERTOS_TIMER_RESOURCE_GPTMR to use GPTMR as system's tick source
+#set(CONFIG_FREERTOS_TIMER_RESOURCE_GPTMR 1)
+
+find_package(hpm-sdk REQUIRED HINTS $ENV{HPM_SDK_BASE})
+
+project(cherryec)
+
+sdk_compile_definitions(-D__freertos_irq_stack_top=_stack)
+sdk_compile_definitions(-DCONFIG_FREERTOS=1)
+sdk_compile_definitions(-DUSE_NONVECTOR_MODE=1)
+sdk_compile_definitions(-DDISABLE_IRQ_PREEMPTIVE=1)
+
+sdk_compile_options("-O2")
+
+sdk_inc(.)
+sdk_inc(inc)
+sdk_app_src(main.c)
+
+add_subdirectory(../.. cherryec)
+generate_ses_project()
+

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/inc/FreeRTOSConfig.h

@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2024 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ */
+
+#include "board.h"
+
+#if (portasmHAS_MTIME == 0)
+#define configMTIME_BASE_ADDRESS                (0)
+#define configMTIMECMP_BASE_ADDRESS             (0)
+#else
+#define configMTIME_BASE_ADDRESS                (HPM_MCHTMR_BASE)
+#define configMTIMECMP_BASE_ADDRESS             (HPM_MCHTMR_BASE + 8UL)
+#endif
+
+#define configUSE_PREEMPTION                    1
+#define configCPU_CLOCK_HZ                      ((uint32_t) 24000000)
+#define configTICK_RATE_HZ                      ((TickType_t) 1000)
+#define configMAX_PRIORITIES                    (32)
+#define configMINIMAL_STACK_SIZE                (256)
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 0
+#define configUSE_APPLICATION_TASK_TAG          0
+#define configGENERATE_RUN_TIME_STATS           0
+
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configUSE_MUTEXES                       1
+
+/* Memory allocation definitions. */
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+#define configTOTAL_HEAP_SIZE                   ((size_t) (64 * 1024))
+
+/* Hook function definitions. */
+#define configUSE_IDLE_HOOK                     0
+#define configUSE_TICK_HOOK                     0
+#define configCHECK_FOR_STACK_OVERFLOW          0
+#define configUSE_MALLOC_FAILED_HOOK            0
+#define configUSE_DAEMON_TASK_STARTUP_HOOK      0
+
+/* Run time and task stats gathering definitions. */
+#define configGENERATE_RUN_TIME_STATS           0
+#define configUSE_TRACE_FACILITY                1
+#define configUSE_STATS_FORMATTING_FUNCTIONS    0
+
+/* Set the following definitions to 1 to include the API function, or zero to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet                1
+#define INCLUDE_uxTaskPriorityGet               1
+#define INCLUDE_vTaskDelete                     1
+#define INCLUDE_vTaskCleanUpResources           1
+#define INCLUDE_vTaskSuspend                    1
+#define INCLUDE_vTaskDelayUntil                 1
+#define INCLUDE_vTaskDelay                      1
+#define INCLUDE_xTaskGetCurrentTaskHandle       1
+#define INCLUDE_xTimerPendFunctionCall          1
+#define INCLUDE_eTaskGetState                   1
+#define INCLUDE_xTaskAbortDelay                 1
+#define INCLUDE_xTaskGetHandle                  1
+#define INCLUDE_xSemaphoreGetMutexHolder        1
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                   0
+#define configMAX_CO_ROUTINE_PRIORITIES         2
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                        1
+#define configTIMER_TASK_PRIORITY               (configMAX_PRIORITIES - 1)
+#define configTIMER_QUEUE_LENGTH                4
+#define configTIMER_TASK_STACK_DEPTH            (configMINIMAL_STACK_SIZE)
+
+/* Task priorities.*/
+#ifndef uartPRIMARY_PRIORITY
+    #define uartPRIMARY_PRIORITY                (configMAX_PRIORITIES - 3)
+#endif
+
+/* Normal assert() semantics without relying on the provision of an assert.h header file. */
+#define configASSERT(x) if ((x) == 0) { taskDISABLE_INTERRUPTS(); __asm volatile("ebreak"); for (;;); }
+
+/*
+ * The size of the global output buffer that is available for use when there
+ * are multiple command interpreters running at once (for example, one on a UART
+ * and one on TCP/IP).  This is done to prevent an output buffer being defined by
+ * each implementation - which would waste RAM.  In this case, there is only one
+ * command interpreter running.
+ */
+
+/*
+ * The buffer into which output generated by FreeRTOS+CLI is placed.  This must
+ * be at least big enough to contain the output of the task-stats command, as the
+ * example implementation does not include buffer overlow checking.
+ */
+#define configCOMMAND_INT_MAX_OUTPUT_SIZE        2096
+#define configINCLUDE_QUERY_HEAP_COMMAND         1
+
+/* This file is included from assembler files - make sure C code is not included in assembler files. */
+#ifndef __ASSEMBLER__
+    void vAssertCalled(const char *pcFile, unsigned long ulLine);
+    void vConfigureTickInterrupt(void);
+    void vClearTickInterrupt(void);
+    void vPreSleepProcessing(unsigned long uxExpectedIdleTime);
+    void vPostSleepProcessing(unsigned long uxExpectedIdleTime);
+#endif /* __ASSEMBLER__ */
+
+/****** Hardware/compiler specific settings. *******/
+/*
+ * The application must provide a function that configures a peripheral to
+ * create the FreeRTOS tick interrupt, then define configSETUP_TICK_INTERRUPT()
+ * in FreeRTOSConfig.h to call the function.
+ */
+#define configSETUP_TICK_INTERRUPT() vConfigureTickInterrupt()
+#define configCLEAR_TICK_INTERRUPT() vClearTickInterrupt()
+
+/*
+ * The configPRE_SLEEP_PROCESSING() and configPOST_SLEEP_PROCESSING() macros
+ * allow the application writer to add additional code before and after the MCU is
+ * placed into the low power state respectively.  The empty implementations
+ * provided in this demo can be extended to save even more power.
+ */
+#define configPRE_SLEEP_PROCESSING(uxExpectedIdleTime) vPreSleepProcessing(uxExpectedIdleTime);
+#define configPOST_SLEEP_PROCESSING(uxExpectedIdleTime) vPostSleepProcessing(uxExpectedIdleTime);
+
+
+/* Compiler specifics. */
+#define fabs(x) __builtin_fabs(x)
+
+/* Enable Hardware Stack Protection and Recording mechanism. */
+#define configHSP_ENABLE                       0
+
+/* Record the highest address of stack. */
+#if (configHSP_ENABLE == 1 && configRECORD_STACK_HIGH_ADDRESS != 1)
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#endif
+
+#endif /* FREERTOS_CONFIG_H */

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/inc/cia402_def.h

@@ -0,0 +1,136 @@
+#ifndef CIA402_DEF_H
+#define CIA402_DEF_H
+
+/**
+STRUCT_PACKED_START: Is defined before the typedef struct construct to pack the generic structures if necessary */
+#ifndef STRUCT_PACKED_START
+#define STRUCT_PACKED_START                       ATTR_PACKED
+#endif
+
+/**
+STRUCT_PACKED_END: Is defined after the typedef struct {} construct to pack the generic structures if necessary */
+#ifndef STRUCT_PACKED_END
+#define STRUCT_PACKED_END
+#endif
+
+/*---------------------------------------------
+-    ControlWord Commands (IEC61800_184e)
+-----------------------------------------------*/
+#define CONTROLWORD_COMMAND_SHUTDOWN                 0x0006 /**< \brief Shutdown command*/
+#define CONTROLWORD_COMMAND_SWITCHON                 0x0007 /**< \brief Switch on command*/
+#define CONTROLWORD_COMMAND_SWITCHON_ENABLEOPERATION 0x000F /**< \brief Switch on & Enable command*/
+#define CONTROLWORD_COMMAND_DISABLEVOLTAGE           0x0000 /**< \brief Disable voltage command*/
+#define CONTROLWORD_COMMAND_QUICKSTOP                0x0002 /**< \brief Quickstop command*/
+#define CONTROLWORD_COMMAND_DISABLEOPERATION         0x0007 /**< \brief Disable operation command*/
+#define CONTROLWORD_COMMAND_ENABLEOPERATION          0x000F /**< \brief Enable operation command*/
+#define CONTROLWORD_COMMAND_FAULTRESET               0x0080 /**< \brief Fault reset command*/
+
+/*---------------------------------------------
+-    StatusWord Masks and Flags
+-----------------------------------------------*/
+#define STATUSWORD_STATE_MASK                        0x006F /**< \brief State mask*/
+#define STATUSWORD_VOLTAGE_ENABLED                   0x0010 /**< \brief Indicate high voltage enabled*/
+#define STATUSWORD_WARNING                           0x0080 /**< \brief Warning active*/
+#define STATUSWORD_MANUFACTORSPECIFIC                0x0100 /**< \brief Manufacturer specific*/
+#define STATUSWORD_INTERNAL_LIMIT                    0x0800 /**< \brief Internal limit*/
+#define STATUSWORD_REMOTE                            0x0200 /**< \brief Set if the control word is processed*/
+#define STATUSWORD_TARGET_REACHED                    0x0400 /**< \brief Target reached*/
+#define STATUSWORD_INTERNALLIMITACTIVE               0x0800 /**< \brief Internal limit active*/
+#define STATUSWORD_DRIVE_FOLLOWS_COMMAND             0x1000 /**< \brief Drive follows command (used in cyclic synchronous modes)*/
+
+/*---------------------------------------------
+-    StatusWord
+-----------------------------------------------*/
+#define STATUSWORD_STATE_NOTREADYTOSWITCHON          0x0000 /**< \brief Not ready to switch on*/
+#define STATUSWORD_STATE_SWITCHEDONDISABLED          0x0040 /**< \brief Switched on but disabled*/
+#define STATUSWORD_STATE_READYTOSWITCHON             0x0021 /**< \brief Ready to switch on*/
+#define STATUSWORD_STATE_SWITCHEDON                  0x0023 /**< \brief Switched on*/
+#define STATUSWORD_STATE_OPERATIONENABLED            0x0027 /**< \brief Operation enabled*/
+#define STATUSWORD_STATE_QUICKSTOPACTIVE             0x0007 /**< \brief Quickstop active*/
+#define STATUSWORD_STATE_FAULTREACTIONACTIVE         0x000F /**< \brief Fault reaction active*/
+#define STATUSWORD_STATE_FAULT                       0x0008 /**< \brief Fault state*/
+
+/*---------------------------------------------
+-    CiA402 Modes of Operation (object 0x6060) (IEC61800_184e)
+-----------------------------------------------*/
+// -128 to -1 Manufacturer-specific operation modes
+#define NO_MODE                                      0 /**< \brief No mode*/
+#define PROFILE_POSITION_MODE                        1 /**< \brief Position Profile mode*/
+#define VELOCITY_MODE                                2 /**< \brief Velocity mode*/
+#define PROFILE_VELOCITY_MOCE                        3 /**< \brief Velocity Profile mode*/
+#define PROFILE_TORQUE_MODE                          4 /**< \brief Torque Profile mode*/
+//5 reserved
+#define HOMING_MODE                                  6  /**< \brief Homing mode*/
+#define INTERPOLATION_POSITION_MODE                  7  /**< \brief Interpolation Position mode*/
+#define CYCLIC_SYNC_POSITION_MODE                    8  /**< \brief Cyclic Synchronous Position mode*/
+#define CYCLIC_SYNC_VELOCITY_MODE                    9  /**< \brief Cyclic Synchronous Velocity mode*/
+#define CYCLIC_SYNC_TORQUE_MODE                      10 /**< \brief Cyclic Synchronous Torque mode*/
+//+11 to +127 reserved
+
+/**
+ * \addtogroup PDO Process Data Objects
+ * @{
+ */
+/** \brief Data structure to handle the process data transmitted via 0x1A00 (csp/csv TxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjStatusWord; /**< \brief Status word (0x6041)*/
+    int32_t ObjPositionActualValue; /**< \brief Actual position (0x6064)*/
+    int32_t ObjVelocityActualValue; /**< \brief Actual velocity (0x606C)*/
+    int16_t ObjModesOfOperationDisplay; /**< \brief Current mode of operation (0x6061)*/
+}STRUCT_PACKED_END
+TCiA402PDO1A00;
+
+
+/** \brief Data structure to handle the process data transmitted via 0x1A01 (csp TxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjStatusWord; /**< \brief Status word (0x6041)*/
+    int32_t ObjPositionActualValue; /**< \brief Actual position (0x6064)*/
+    uint16_t Padding16Bit; /**< \brief 16bit padding*/
+}STRUCT_PACKED_END
+TCiA402PDO1A01;
+
+
+/** \brief Data structure to handle the process data transmitted via 0x1A02 (csv TxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjStatusWord; /**< \brief Status word (0x6041)*/
+    int32_t ObjPositionActualValue; /**< \brief Actual position (0x6064)*/
+    uint16_t Padding16Bit; /**< \brief 16bit padding*/
+}STRUCT_PACKED_END
+TCiA402PDO1A02;
+
+
+/** \brief Data structure to handle the process data transmitted via 0x1600 (csp/csv RxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjControlWord; /**< \brief Control word (0x6040)*/
+    int32_t ObjTargetPosition; /**< \brief Target position (0x607A)*/
+    int32_t ObjTargetVelocity; /**< \brief Target velocity (0x60FF)*/
+    int16_t ObjModesOfOperation; /**< \brief Mode of operation (0x6060)*/
+}STRUCT_PACKED_END
+TCiA402PDO1600;
+
+
+/** \brief Data structure to handle the process data transmitted via 0x1601 (csp RxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjControlWord; /**< \brief Control word (0x6040)*/
+    int32_t ObjTargetPosition; /**< \brief Target position (0x607A)*/
+    uint16_t Padding16Bit; /**< \brief 16bit padding*/
+}STRUCT_PACKED_END
+TCiA402PDO1601;
+
+
+/** \brief Data structure to handle the process data transmitted via 0x1602 (csv RxPDO)*/
+typedef struct STRUCT_PACKED_START
+{
+    uint16_t ObjControlWord; /**< \brief Control word (0x6040)*/
+    int32_t ObjTargetVelocity; /**< \brief Target velocity (0x60FF)*/
+    uint16_t Padding16Bit; /**< \brief 16bit padding*/
+}STRUCT_PACKED_END
+TCiA402PDO1602;
+/** @}*/
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/inc/csh_config.h

@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2022, Egahp
+ * Copyright (c) 2024, HPMicro
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef CSH_CONFIG_H
+#define CSH_CONFIG_H
+
+/*!< argument check */
+#define CONFIG_CSH_DEBUG 0
+
+/*!< default row */
+#define CONFIG_CSH_DFTROW 25
+
+/*!< default column */
+#define CONFIG_CSH_DFTCOL 80
+
+/*!< history support <+550byte> */
+#define CONFIG_CSH_HISTORY 1
+
+/*!< completion support <+1100byte> */
+#define CONFIG_CSH_COMPLETION 1
+
+/*!< max completion item list count (use stack 4 x count byte) */
+#define CONFIG_CSH_MAX_COMPLETION 40
+
+/*!< prompt edit support <+1000byte>  */
+#define CONFIG_CSH_PROMPTEDIT 1
+
+/*!< prompt segment count */
+#define CONFIG_CSH_PROMPTSEG 7
+
+/*!< xterm support */
+#define CONFIG_CSH_XTERM 0
+
+/*!< newline */
+#define CONFIG_CSH_NEWLINE "\r\n"
+
+/*!< tab space count */
+#define CONFIG_CSH_SPACE 4
+
+/*!< independent ctrl map */
+#define CONFIG_CSH_CTRLMAP 0
+
+/*!< independent alt map */
+#define CONFIG_CSH_ALTMAP 0
+
+/*!< refresh prompt */
+#define CONFIG_CSH_REFRESH_PROMPT 1
+
+/*!< no waiting for sget */
+#define CONFIG_CSH_NOBLOCK 1
+
+/*!< help information */
+#define CONFIG_CSH_HELP ""
+
+/*!< path length 0:const path, <=255:variable path */
+#define CONFIG_CSH_MAXLEN_PATH 128
+
+/*!< path segment count */
+#define CONFIG_CSH_MAXSEG_PATH 16
+
+/*!< user count */
+#define CONFIG_CSH_MAX_USER 1
+
+/*!< max argument count */
+#define CONFIG_CSH_MAX_ARG 8
+
+/*!< linebuffer static or on stack */
+#define CONFIG_CSH_LNBUFF_STATIC 1
+
+/*!< linebuffer size (valid only if lnbuff on stack) */
+#define CONFIG_CSH_LNBUFF_SIZE 256
+
+/*!< multi-thread mode */
+#define CONFIG_CSH_MULTI_THREAD 1
+
+/*!< independent signal handler (for multi instances) */
+#define CONFIG_CSH_SIGNAL_HANDLER 0
+
+/*!< Ctrl+c/d/q/s/z/\ F1-F12 UE <+120byte> */
+#define CONFIG_CSH_USER_CALLBACK 1
+
+/*!< enable macro export symbol table */
+#define CONFIG_CSH_SYMTAB 1
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/inc/ec_config.h

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_CONFIG_H
+#define EC_CONFIG_H
+
+#define CONFIG_EC_PRINTF(...) printf(__VA_ARGS__)
+
+#ifndef CONFIG_EC_DBG_LEVEL
+#define CONFIG_EC_DBG_LEVEL EC_DBG_INFO
+#endif
+
+#ifndef CONFIG_EC_SLAVE_DBG_LEVEL
+#define CONFIG_EC_SLAVE_DBG_LEVEL EC_DBG_INFO
+#endif
+
+/* Enable print with color */
+#define CONFIG_EC_PRINTF_COLOR_ENABLE
+
+#define EC_FAST_CODE_SECTION __attribute__((section(".fast")))
+
+#ifndef CONFIG_EC_MAX_NETDEVS
+#define CONFIG_EC_MAX_NETDEVS 1
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_PRIO
+#define CONFIG_EC_NONPERIOD_PRIO 0
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_STACKSIZE
+#define CONFIG_EC_NONPERIOD_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_INTERVAL_MS
+#define CONFIG_EC_NONPERIOD_INTERVAL_MS 10
+#endif
+
+#ifndef CONFIG_EC_NONPERIOD_WAITERS
+#define CONFIG_EC_NONPERIOD_WAITERS 20
+#endif
+
+#ifndef CONFIG_EC_SCAN_PRIO
+#define CONFIG_EC_SCAN_PRIO 1
+#endif
+
+#ifndef CONFIG_EC_SCAN_STACKSIZE
+#define CONFIG_EC_SCAN_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_SCAN_INTERVAL_MS
+#define CONFIG_EC_SCAN_INTERVAL_MS 100
+#endif
+
+#ifndef CONFIG_EC_PER_SM_MAX_PDOS
+#define CONFIG_EC_PER_SM_MAX_PDOS 8
+#endif
+
+#ifndef CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES
+#define CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES 8
+#endif
+
+#define CONFIG_EC_PERF_ENABLE
+#define CONFIG_EC_CMD_ENABLE
+// #define CONFIG_EC_TIMESTAMP_CUSTOM
+// #define CONFIG_EC_PHY_CUSTOM
+
+#ifndef CONFIG_EC_MAX_PDO_BUFSIZE
+#define CONFIG_EC_MAX_PDO_BUFSIZE 2048
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_TXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_TXBUF_COUNT 10
+#endif
+
+#ifndef CONFIG_EC_MAX_ENET_RXBUF_COUNT
+#define CONFIG_EC_MAX_ENET_RXBUF_COUNT 10
+#endif
+
+// #define CONFIG_EC_FOE
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/inc/shell.h

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2022, Egahp
+ * Copyright (c) 2024, HPMicro
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef SHELL_H
+#define SHELL_H
+
+#include "hpm_uart_drv.h"
+#include "csh.h"
+
+extern int shell_init(UART_Type *uart, bool need_login);
+extern void shell_uart_isr(void);
+extern void shell_lock(void);
+extern void shell_unlock(void);
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/demo/hpmicro/main.c

@@ -0,0 +1,216 @@
+/*
+ * Copyright (c) 2024 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+/* FreeRTOS kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/*  HPM example includes. */
+#include <stdio.h>
+#include "board.h"
+#include "hpm_clock_drv.h"
+#include "hpm_uart_drv.h"
+#include "shell.h"
+#include "hpm_gptmr_drv.h"
+#include "cia402_def.h"
+#include "ec_master.h"
+
+SDK_DECLARE_EXT_ISR_M(BOARD_CONSOLE_UART_IRQ, shell_uart_isr)
+
+#define task_start_PRIORITY (configMAX_PRIORITIES - 2U)
+
+#define MOTOR_MODE_CSV_CSP  0
+#define MOTOR_MODE_CSP      1
+#define MOTOR_MODE_CSV      2
+
+volatile uint8_t motor_mode = MOTOR_MODE_CSV;
+
+ec_master_t g_ec_master;
+
+static void task_start(void *param);
+
+int main(void)
+{
+    board_init();
+
+    if (pdPASS != xTaskCreate(task_start, "task_start", 1024U, NULL, task_start_PRIORITY, NULL)) {
+        printf("Task start creation failed!\r\n");
+        while (1) {
+        };
+    }
+
+    vTaskStartScheduler();
+    printf("Unexpected scheduler exit!\r\n");
+    while (1) {
+    };
+
+    return 0;
+}
+
+static void task_start(void *param)
+{
+    (void)param;
+
+    printf("Try to initialize the uart\r\n"
+           "  if you are using the console uart as the shell uart\r\n"
+           "  failure to initialize may result in no log\r\n");
+
+    uart_config_t shell_uart_config = { 0 };
+    uart_default_config(BOARD_CONSOLE_UART_BASE, &shell_uart_config);
+    shell_uart_config.src_freq_in_hz = clock_get_frequency(BOARD_CONSOLE_UART_CLK_NAME);
+    shell_uart_config.baudrate = 115200;
+
+    if (status_success != uart_init(BOARD_CONSOLE_UART_BASE, &shell_uart_config)) {
+        /* uart failed to be initialized */
+        printf("Failed to initialize uart\r\n");
+        while (1) {
+        };
+    }
+
+    printf("Initialize shell uart successfully\r\n");
+
+    /* default password is : 12345678 */
+    /* shell_init() must be called in-task */
+    if (0 != shell_init(BOARD_CONSOLE_UART_BASE, false)) {
+        /* shell failed to be initialized */
+        printf("Failed to initialize shell\r\n");
+        while (1) {
+        };
+    }
+
+    printf("Initialize shell successfully\r\n");
+
+    /* irq must be enabled after shell_init() */
+    uart_enable_irq(BOARD_CONSOLE_UART_BASE, uart_intr_rx_data_avail_or_timeout);
+    intc_m_enable_irq_with_priority(BOARD_CONSOLE_UART_IRQ, 1);
+
+    printf("Enable shell uart interrupt\r\n");
+
+    ec_master_cmd_init(&g_ec_master);
+    ec_master_init(&g_ec_master, 0);
+
+    printf("Exit start task\r\n");
+
+    vTaskDelete(NULL);
+}
+
+CSH_CMD_EXPORT(ethercat, );
+
+unsigned char cherryecat_eepromdata[2048]; // EEPROM data buffer, please generate by esi_parse.py
+
+static ec_pdo_entry_info_t dio_1600[] = {
+    { 0x6000, 0x00, 0x20 },
+};
+
+static ec_pdo_entry_info_t dio_1a00[] = {
+    { 0x7010, 0x00, 0x20 },
+};
+
+static ec_pdo_info_t dio_rxpdos[] = {
+    { 0x1600, 1, &dio_1600[0] },
+};
+
+static ec_pdo_info_t dio_txpdos[] = {
+    { 0x1a00, 1, &dio_1a00[0] },
+};
+
+static ec_sync_info_t dio_syncs[] = {
+    { 2, EC_DIR_OUTPUT, 1, dio_rxpdos },
+    { 3, EC_DIR_INPUT, 1, dio_txpdos },
+};
+
+static ec_pdo_entry_info_t coe402_1602[] = {
+    { 0x6040, 0x00, 0x10 },
+    { 0x60ff, 0x00, 0x20 },
+    { 0x0000, 0x00, 0x10 },
+};
+
+static ec_pdo_entry_info_t coe402_1a02[] = {
+    { 0x6041, 0x00, 0x10 },
+    { 0x6064, 0x00, 0x20 },
+    { 0x0000, 0x00, 0x10 },
+};
+
+static ec_pdo_info_t cia402_rxpdos[] = {
+    { 0x1602, 3, &coe402_1602[0] },
+};
+
+static ec_pdo_info_t cia402_txpdos[] = {
+    { 0x1a02, 3, &coe402_1a02[0] },
+};
+
+static ec_sync_info_t cia402_syncs[] = {
+    { 2, EC_DIR_OUTPUT, 1, cia402_rxpdos },
+    { 3, EC_DIR_INPUT, 1, cia402_txpdos },
+};
+
+int ec_start(int argc, const char **argv)
+{
+    static ec_slave_config_t slave_cia402_config;
+    static ec_slave_config_t slave_dio_config;
+
+    if (g_ec_master.slave_count == 0) {
+        printf("No slave found, please check the connection\r\n");
+        return -1;
+    }
+
+    if (argc < 2) {
+        printf("Please input: ec_start <cyclic time in us>\r\n");
+        return -1;
+    }
+
+    slave_cia402_config.dc_assign_activate = 0x300;
+
+    slave_cia402_config.dc_sync[0].cycle_time = atoi(argv[1]) * 1000;
+    slave_cia402_config.dc_sync[0].shift_time = 1000000;
+    slave_cia402_config.dc_sync[1].cycle_time = 0;
+    slave_cia402_config.dc_sync[1].shift_time = 0;
+
+    slave_cia402_config.sync = cia402_syncs;
+    slave_cia402_config.sync_count = sizeof(cia402_syncs) / sizeof(ec_sync_info_t);
+
+    slave_dio_config.dc_assign_activate = 0x300;
+
+    slave_dio_config.dc_sync[0].cycle_time = atoi(argv[1]) * 1000;
+    slave_dio_config.dc_sync[0].shift_time = 1000000;
+    slave_dio_config.dc_sync[1].cycle_time = 0;
+    slave_dio_config.dc_sync[1].shift_time = 0;
+    slave_dio_config.sync = dio_syncs;
+    slave_dio_config.sync_count = sizeof(dio_syncs) / sizeof(ec_sync_info_t);
+
+    for (uint32_t i = 0; i < g_ec_master.slave_count; i++) {
+        if (g_ec_master.slaves[i].sii.vendor_id != 0x0048504D) { // HPMicro
+            EC_LOG_ERR("Unsupported slave found: vendor_id=0x%08x\n", g_ec_master.slaves[i].sii.vendor_id);
+            return -1;
+        }
+
+        switch (g_ec_master.slaves[i].sii.product_code) {
+            case 0x00000001: // DIO
+                g_ec_master.slaves[i].config = &slave_dio_config;
+                break;
+            case 0x00000002: // FOE
+                break;
+            case 0x00000003: // CIA402
+                g_ec_master.slaves[i].config = &slave_cia402_config;
+                break;
+
+            default:
+                break;
+        }
+    }
+
+    ec_master_start(&g_ec_master, atoi(argv[1]));
+    return 0;
+}
+CSH_CMD_EXPORT(ec_start, );
+
+int ec_stop(int argc, const char **argv)
+{
+    ec_master_stop(&g_ec_master);
+    return 0;
+}
+CSH_CMD_EXPORT(ec_stop, );

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/.gitignore

@@ -0,0 +1 @@
+*build

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/Makefile

@@ -0,0 +1,20 @@
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS    ?=
+SPHINXBUILD   ?= sphinx-build
+SOURCEDIR     = source
+BUILDDIR      = build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/make.bat

@@ -0,0 +1,35 @@
+@ECHO OFF
+
+pushd %~dp0
+
+REM Command file for Sphinx documentation
+
+if "%SPHINXBUILD%" == "" (
+	set SPHINXBUILD=sphinx-build
+)
+set SOURCEDIR=source
+set BUILDDIR=build
+
+if "%1" == "" goto help
+
+%SPHINXBUILD% >NUL 2>NUL
+if errorlevel 9009 (
+	echo.
+	echo.The 'sphinx-build' command was not found. Make sure you have Sphinx
+	echo.installed, then set the SPHINXBUILD environment variable to point
+	echo.to the full path of the 'sphinx-build' executable. Alternatively you
+	echo.may add the Sphinx directory to PATH.
+	echo.
+	echo.If you don't have Sphinx installed, grab it from
+	echo.http://sphinx-doc.org/
+	exit /b 1
+)
+
+%SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+goto end
+
+:help
+%SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+
+:end
+popd

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/requirements.txt

@@ -0,0 +1,9 @@
+# markdown suport
+recommonmark
+# markdown table suport
+sphinx-markdown-tables
+
+# theme default rtd
+
+# crate-docs-theme
+sphinx-rtd-theme

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/api.rst

@@ -0,0 +1,2 @@
+API 手册
+===========================

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/conf.py

@@ -0,0 +1,37 @@
+# Configuration file for the Sphinx documentation builder.
+
+# -- Project information
+
+project = 'CherryEC'
+copyright = '2025 ~ 2026, sakumisu'
+author = 'sakumisu'
+
+release = '0.1.0'
+version = '0.1.0'
+
+# -- General configuration
+
+extensions = [
+    'sphinx.ext.duration',
+    'sphinx.ext.doctest',
+    'sphinx.ext.autodoc',
+    'sphinx.ext.autosummary',
+    'sphinx.ext.intersphinx',
+    'recommonmark',
+    'sphinx_markdown_tables'
+]
+
+intersphinx_mapping = {
+#    'python': ('https://docs.python.org/3/', None),
+#    'sphinx': ('https://www.sphinx-doc.org/en/master/', None),
+}
+intersphinx_disabled_domains = ['std']
+
+templates_path = ['_templates']
+
+# -- Options for HTML output
+
+html_theme = 'sphinx_rtd_theme'
+
+# -- Options for EPUB output
+epub_show_urls = 'footnote'

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/ethercat.rst

@@ -0,0 +1,32 @@
+EtherCAT 概念
+===========================
+
+EtherCAT 官方文档汇总
+-----------------------------
+
+EtherCAT 数据格式
+--------------------
+
+EtherCAT 寻址模式
+--------------------
+
+EtherCAT 状态机
+--------------------
+
+EtherCAT 同步
+--------------------
+
+EtherCAT SII EEPROM
+-----------------------
+
+EtherCAT SM & FMMU
+-----------------------
+
+EtherCAT SDO & PDO
+-----------------------
+
+EtherCAT COE
+-----------------------
+
+EtherCAT FOE
+-----------------------

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/index.rst

@@ -0,0 +1,17 @@
+.. CherryEC 使用指南 documentation master file, created by
+   sphinx-quickstart on Thu Nov 21 10:50:33 2019.
+   You can adapt this file completely to your liking, but it should at least
+   contain the root `toctree` directive.
+
+CherryEC 使用指南
+======================================================
+
+CherryEC 是一个小而美的、高实时性、低抖动 EtherCAT 主机协议栈，专为跑在 RTOS 下的 MCU 设计。
+
+.. toctree::
+   :maxdepth: 1
+
+   quickstart
+   api
+   ethercat
+   version

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/quickstart.rst

@@ -0,0 +1,9 @@
+快速入门
+===========================
+
+
+HPMicro Boards
+-----------------------------
+
+RT-Thread RuiQing
+-----------------------------

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/docs/source/version.rst

@@ -0,0 +1,2 @@
+版本说明
+===========================

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_cmd.h

@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_CMD_H
+#define EC_CMD_H
+
+typedef struct ec_master ec_master_t;
+
+void ec_master_cmd_init(ec_master_t *master);
+int ethercat(int argc, const char **argv);
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_coe.h

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_COE_H
+#define EC_COE_H
+
+int ec_coe_download(ec_master_t *master,
+                    uint16_t slave_index,
+                    ec_datagram_t *datagram,
+                    uint16_t index,
+                    uint8_t subindex,
+                    const void *buf,
+                    uint32_t size,
+                    bool complete_access);
+
+int ec_coe_upload(ec_master_t *master,
+                  uint16_t slave_index,
+                  ec_datagram_t *datagram,
+                  uint16_t index,
+                  uint8_t subindex,
+                  const void *buf,
+                  uint32_t maxsize,
+                  uint32_t *size,
+                  bool complete_access);
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_common.h

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_COMMON_H
+#define EC_COMMON_H
+
+void *ec_memcpy(void *s1, const void *s2, size_t n);
+void ec_memset(void *s, int c, size_t n);
+const char *ec_state_string(uint8_t states, uint8_t multi);
+const char *ec_mbox_protocol_string(uint8_t prot);
+const char *ec_alstatus_string(uint16_t errorcode);
+const char *ec_mbox_error_string(uint16_t errorcode);
+const char *ec_sdo_abort_string(uint32_t errorcode);
+const char *foe_errorcode_string(uint16_t errorcode);
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_datagram.h

@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_DATAGRAM_H
+#define EC_DATAGRAM_H
+
+/** EtherCAT datagram type.
+ */
+typedef enum {
+    EC_DATAGRAM_NONE = 0x00, /**< Dummy. */
+    EC_DATAGRAM_APRD = 0x01, /**< Auto Increment Physical Read. */
+    EC_DATAGRAM_APWR = 0x02, /**< Auto Increment Physical Write. */
+    EC_DATAGRAM_APRW = 0x03, /**< Auto Increment Physical ReadWrite. */
+    EC_DATAGRAM_FPRD = 0x04, /**< Configured Address Physical Read. */
+    EC_DATAGRAM_FPWR = 0x05, /**< Configured Address Physical Write. */
+    EC_DATAGRAM_FPRW = 0x06, /**< Configured Address Physical ReadWrite. */
+    EC_DATAGRAM_BRD = 0x07,  /**< Broadcast Read. */
+    EC_DATAGRAM_BWR = 0x08,  /**< Broadcast Write. */
+    EC_DATAGRAM_BRW = 0x09,  /**< Broadcast ReadWrite. */
+    EC_DATAGRAM_LRD = 0x0A,  /**< Logical Read. */
+    EC_DATAGRAM_LWR = 0x0B,  /**< Logical Write. */
+    EC_DATAGRAM_LRW = 0x0C,  /**< Logical ReadWrite. */
+    EC_DATAGRAM_ARMW = 0x0D, /**< Auto Increment Physical Read Multiple
+                               Write.  */
+    EC_DATAGRAM_FRMW = 0x0E, /**< Configured Address Physical Read Multiple
+                               Write. */
+} ec_datagram_type_t;
+
+/** EtherCAT datagram state.
+ */
+typedef enum {
+    EC_DATAGRAM_INIT,      /**< Initial state of a new datagram. */
+    EC_DATAGRAM_QUEUED,    /**< Queued for sending. */
+    EC_DATAGRAM_SENT,      /**< Sent (still in the queue). */
+    EC_DATAGRAM_RECEIVED,  /**< Received (dequeued). */
+    EC_DATAGRAM_TIMED_OUT, /**< Timed out (dequeued). */
+    EC_DATAGRAM_ERROR      /**< Error while sending/receiving (dequeued). */
+} ec_datagram_state_t;
+
+/** EtherCAT datagram.
+ */
+typedef struct {
+    ec_dlist_t queue;
+    ec_dlist_t ext_queue;
+    ec_dlist_t sent;
+    ec_netdev_index_t netdev_idx;     /**< Netdev via which the datagram shall be / was sent. */
+    ec_datagram_type_t type;          /**< Datagram type (APRD, BWR, etc.). */
+    bool static_alloc;                /**< True, if \a data is statically allocated. */
+    uint8_t address[EC_ADDR_LEN];     /**< Recipient address. */
+    uint8_t *data;                    /**< Datagram payload. */
+    size_t mem_size;                  /**< Datagram \a data memory size. */
+    size_t data_size;                 /**< Size of the data in \a data. */
+    uint8_t index;                    /**< Index (set by master). */
+    uint16_t working_counter;         /**< Working counter. */
+    ec_datagram_state_t state;        /**< State. */
+    uint32_t lrw_read_offset;         /**< Read Offset in LRW datagram. */
+    uint32_t lrw_read_size;           /**< Read Size in LRW datagram. */
+    uint64_t jiffies_sent;            /**< Jiffies, when the datagram was sent. */
+    uint64_t jiffies_received;        /**< Jiffies, when the datagram was received. */
+    char name[EC_DATAGRAM_NAME_SIZE]; /**< Description of the datagram. */
+    bool waiter;                      /**< True, if someone is waiting for the datagram. */
+    ec_osal_sem_t wait;               /**< Semaphore for waiting. */
+} ec_datagram_t;
+
+void ec_datagram_init(ec_datagram_t *datagram, size_t mem_size);
+void ec_datagram_init_static(ec_datagram_t *datagram, uint8_t *data, size_t mem_size);
+void ec_datagram_clear(ec_datagram_t *datagram);
+void ec_datagram_unqueue(ec_datagram_t *datagram);
+void ec_datagram_zero(ec_datagram_t *datagram);
+void ec_datagram_fill(ec_datagram_t *datagram,
+                      ec_datagram_type_t type,
+                      uint16_t adp,
+                      uint16_t ado,
+                      uint16_t size);
+void ec_datagram_aprd(ec_datagram_t *datagram, uint16_t autoinc_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_apwr(ec_datagram_t *datagram, uint16_t autoinc_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_aprw(ec_datagram_t *datagram, uint16_t autoinc_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_armw(ec_datagram_t *datagram, uint16_t autoinc_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_fprd(ec_datagram_t *datagram, uint16_t configured_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_fpwr(ec_datagram_t *datagram, uint16_t configured_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_fprw(ec_datagram_t *datagram, uint16_t configured_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_frmw(ec_datagram_t *datagram, uint16_t configured_address, uint16_t mem_address, size_t data_size);
+void ec_datagram_brd(ec_datagram_t *datagram, uint16_t mem_address, size_t data_size);
+void ec_datagram_bwr(ec_datagram_t *datagram, uint16_t mem_address, size_t data_size);
+void ec_datagram_brw(ec_datagram_t *datagram, uint16_t mem_address, size_t data_size);
+void ec_datagram_lrd(ec_datagram_t *datagram, uint32_t offset, size_t data_size);
+void ec_datagram_lwr(ec_datagram_t *datagram, uint32_t offset, size_t data_size);
+void ec_datagram_lrw(ec_datagram_t *datagram, uint32_t offset, size_t data_size);
+const char *ec_datagram_type_string(const ec_datagram_t *datagram);
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_def.h

@@ -0,0 +1,541 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_DEF_H
+#define EC_DEF_H
+
+/*
+ *	IEEE 802.3 Ethernet magic constants.  The frame sizes omit the preamble
+ *	and FCS/CRC (frame check sequence).
+ */
+#define ETH_ALEN      6    /* Octets in one ethernet addr	 */
+#define ETH_TLEN      2    /* Octets in ethernet type field */
+#define ETH_HLEN      14   /* Total octets in header.	 */
+#define ETH_ZLEN      60   /* Min. octets in frame sans FCS */
+#define ETH_DATA_LEN  1500 /* Max. octets in payload	 */
+#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
+#define ETH_FCS_LEN   4    /* Octets in the FCS		 */
+
+#define ETH_MIN_MTU 68      /* Min IPv4 MTU per RFC791	*/
+#define ETH_MAX_MTU 0xFFFFU /* 65535, same as IP_MAX_MTU	*/
+
+/** Datagram timeout in microseconds. */
+#define EC_IO_TIMEOUT 500
+
+/** Time to send a byte in nanoseconds.
+ *
+ * t_ns = 1 / (100 MBit/s / 8 bit/byte) = 80 ns/byte
+ */
+#define EC_BYTE_TRANSMISSION_TIME_NS 80
+
+/** Minimum size of a buffer used with ec_state_string(). */
+#define EC_STATE_STRING_SIZE 32
+
+/** Maximum SII size in words, to avoid infinite reading. */
+#define EC_MAX_SII_SIZE 4096
+
+/** Number of statistic rate intervals to maintain. */
+#define EC_RATE_COUNT 3
+
+/*****************************************************************************
+ * EtherCAT protocol
+ ****************************************************************************/
+
+/** Size of an EtherCAT frame header. */
+#define EC_FRAME_HEADER_SIZE 2
+
+/** Size of an EtherCAT datagram header. */
+#define EC_DATAGRAM_HEADER_SIZE 10
+
+/** Size of an EtherCAT datagram workcounter. */
+#define EC_DATAGRAM_WC_SIZE 2
+
+/** Size of the EtherCAT address field. */
+#define EC_ADDR_LEN 4
+
+/** Resulting maximum data size of a single datagram in a frame. */
+#define EC_MAX_DATA_SIZE (ETH_DATA_LEN - EC_FRAME_HEADER_SIZE - EC_DATAGRAM_HEADER_SIZE - EC_DATAGRAM_WC_SIZE)
+
+/** Mailbox header size.  */
+#define EC_MBOX_HEADER_SIZE 6
+
+/** Word offset of first SII category. */
+#define EC_FIRST_SII_CATEGORY_OFFSET 0x40
+
+/** Size of a sync manager configuration page. */
+#define EC_SYNC_PAGE_SIZE 8
+
+/** Maximum number of FMMUs per slave. */
+#define EC_MAX_FMMUS 16
+
+/** Size of an FMMU configuration page. */
+#define EC_FMMU_PAGE_SIZE 16
+
+/** Number of DC sync signals. */
+#define EC_SYNC_SIGNAL_COUNT 2
+
+/** Size of the datagram decription string.
+ *
+ * This is also used as the maximum lenth of EoE device names.
+ **/
+#define EC_DATAGRAM_NAME_SIZE 20
+
+/** Maximum hostname size.
+ *
+ * Used inside the EoE set IP parameter request.
+ */
+#define EC_MAX_HOSTNAME_SIZE 32
+
+/** Maximum number of sync managers per slave.
+ */
+#define EC_MAX_SYNC_MANAGERS 16
+
+/** Maximum string length.
+ *
+ * Used in ec_slave_info_t.
+ */
+#define EC_MAX_STRING_LENGTH 64
+
+/** Maximum number of slave ports. */
+#define EC_MAX_PORTS 4
+
+/** Slave state mask.
+ *
+ * Apply this mask to a slave state byte to get the slave state without
+ * the error flag.
+ */
+#define EC_SLAVE_STATE_MASK 0x0F
+
+/** State of an EtherCAT slave.
+ */
+typedef enum {
+    EC_SLAVE_STATE_UNKNOWN = 0x00,
+    /**< unknown state */
+    EC_SLAVE_STATE_INIT = 0x01,
+    /**< INIT state (no mailbox communication, no IO) */
+    EC_SLAVE_STATE_PREOP = 0x02,
+    /**< PREOP state (mailbox communication, no IO) */
+    EC_SLAVE_STATE_BOOT = 0x03,
+    /**< Bootstrap state (mailbox communication, firmware update) */
+    EC_SLAVE_STATE_SAFEOP = 0x04,
+    /**< SAFEOP (mailbox communication and input update) */
+    EC_SLAVE_STATE_OP = 0x08,
+    /**< OP (mailbox communication and input/output update) */
+    EC_SLAVE_STATE_ACK_ERR = 0x10
+    /**< Acknowledge/Error bit (no actual state) */
+} ec_slave_state_t;
+
+/** Slave information interface CANopen over EtherCAT details flags.
+ */
+typedef struct {
+    uint8_t enable_sdo                 : 1; /**< Enable SDO access. */
+    uint8_t enable_sdo_info            : 1; /**< SDO information service available. */
+    uint8_t enable_pdo_assign          : 1; /**< PDO mapping configurable. */
+    uint8_t enable_pdo_configuration   : 1; /**< PDO configuration possible. */
+    uint8_t enable_upload_at_startup   : 1; /**< ?. */
+    uint8_t enable_sdo_complete_access : 1; /**< Complete access possible. */
+    uint8_t                            : 2; /**< Reserved bits. */
+} ec_sii_coe_details_t;
+
+/** Slave information interface general flags.
+ */
+typedef struct {
+    uint8_t enable_safeop  : 1; /**< ?. */
+    uint8_t enable_not_lrw : 1; /**< Slave does not support LRW. */
+    uint8_t                : 6; /**< Reserved bits. */
+} ec_sii_general_flags_t;
+
+/** EtherCAT slave distributed clocks range.
+ */
+typedef enum {
+    EC_DC_32, /**< 32 bit. */
+    EC_DC_64  /*< 64 bit for system time, system time offset and
+               port 0 receive time. */
+} ec_slave_dc_range_t;
+
+/** EtherCAT slave sync signal configuration.
+ */
+typedef struct {
+    uint32_t cycle_time; /**< Cycle time [ns]. */
+    int32_t shift_time;  /**< Shift time [ns]. */
+} ec_sync_signal_t;
+
+/** Master netdev.
+ */
+typedef enum {
+    EC_NETDEV_MAIN,  /**< Main netdev. */
+    EC_NETDEV_BACKUP /**< Backup netdev */
+} ec_netdev_index_t;
+
+typedef struct ec_alstatus {
+    uint16_t alstatus;
+    uint16_t unused;
+    uint16_t alstatuscode;
+} ec_alstatus_t;
+
+/* AL Status Codes */
+#define EC_ALSTATUSCODE_NOERROR                    0x0000 /**< No error*/
+#define EC_ALSTATUSCODE_UNSPECIFIEDERROR           0x0001 /**< Unspecified error*/
+#define EC_ALSTATUSCODE_NOMEMORY                   0x0002 /**< No Memory*/
+#define EC_ALSTATUSCODE_INVALID_REVISION           0x0004 /**< Output/Input mapping is not valid for this hardware or software revision (0x1018:03)*/
+#define EC_ALSTATUSCODE_FW_SII_NOT_MATCH           0x0006 /**< Firmware and EEPROM do not match. Slave needs BOOT-INIT transition*/
+#define EC_ALSTATUSCODE_FW_UPDATE_FAILED           0x0007 /**< Firmware update not successful. Old firmware still running*/
+#define EC_ALSTATUSCODE_INVALIDALCONTROL           0x0011 /**< Invalid requested state change*/
+#define EC_ALSTATUSCODE_UNKNOWNALCONTROL           0x0012 /**< Unknown requested state*/
+#define EC_ALSTATUSCODE_BOOTNOTSUPP                0x0013 /**< Bootstrap not supported*/
+#define EC_ALSTATUSCODE_NOVALIDFIRMWARE            0x0014 /**< No valid firmware*/
+#define EC_ALSTATUSCODE_INVALIDMBXCFGINBOOT        0x0015 /**< Invalid mailbox configuration (BOOT state)*/
+#define EC_ALSTATUSCODE_INVALIDMBXCFGINPREOP       0x0016 /**< Invalid mailbox configuration (PreOP state)*/
+#define EC_ALSTATUSCODE_INVALIDSMCFG               0x0017 /**< Invalid sync manager configuration*/
+#define EC_ALSTATUSCODE_NOVALIDINPUTS              0x0018 /**< No valid inputs available*/
+#define EC_ALSTATUSCODE_NOVALIDOUTPUTS             0x0019 /**< No valid outputs*/
+#define EC_ALSTATUSCODE_SYNCERROR                  0x001A /**< Synchronization error*/
+#define EC_ALSTATUSCODE_SMWATCHDOG                 0x001B /**< Sync manager watchdog*/
+#define EC_ALSTATUSCODE_SYNCTYPESNOTCOMPATIBLE     0x001C /**< Invalid Sync Manager Types*/
+#define EC_ALSTATUSCODE_INVALIDSMOUTCFG            0x001D /**< Invalid Output Configuration*/
+#define EC_ALSTATUSCODE_INVALIDSMINCFG             0x001E /**< Invalid Input Configuration*/
+#define EC_ALSTATUSCODE_INVALIDWDCFG               0x001F /**< Invalid Watchdog Configuration*/
+#define EC_ALSTATUSCODE_WAITFORCOLDSTART           0x0020 /**< Slave needs cold start*/
+#define EC_ALSTATUSCODE_WAITFORINIT                0x0021 /**< Slave needs INIT*/
+#define EC_ALSTATUSCODE_WAITFORPREOP               0x0022 /**< Slave needs PREOP*/
+#define EC_ALSTATUSCODE_WAITFORSAFEOP              0x0023 /**< Slave needs SAFEOP*/
+#define EC_ALSTATUSCODE_INVALIDINPUTMAPPING        0x0024 /**< Invalid Input Mapping*/
+#define EC_ALSTATUSCODE_INVALIDOUTPUTMAPPING       0x0025 /**< Invalid Output Mapping*/
+#define EC_ALSTATUSCODE_INCONSISTENTSETTINGS       0x0026 /**< Inconsistent Settings*/
+#define EC_ALSTATUSCODE_FREERUNNOTSUPPORTED        0x0027 /**< FreeRun not supported*/
+#define EC_ALSTATUSCODE_SYNCHRONNOTSUPPORTED       0x0028 /**< SyncMode not supported*/
+#define EC_ALSTATUSCODE_FREERUNNEEDS3BUFFERMODE    0x0029 /**< FreeRun needs 3Buffer Mode*/
+#define EC_ALSTATUSCODE_BACKGROUNDWATCHDOG         0x002A /**< Background Watchdog*/
+#define EC_ALSTATUSCODE_NOVALIDINPUTSANDOUTPUTS    0x002B /**< No Valid Inputs and Outputs*/
+#define EC_ALSTATUSCODE_FATALSYNCERROR             0x002C /**< Fatal Sync Error*/
+#define EC_ALSTATUSCODE_NOSYNCERROR                0x002D /**< No Sync Error*/
+#define EC_ALSTATUSCODE_CYCLETIMETOOSMALL          0x002E /**< EtherCAT cycle time smaller Minimum Cycle Time supported by slave*/
+#define EC_ALSTATUSCODE_DCINVALIDSYNCCFG           0x0030 /**< Invalid DC SYNCH Configuration*/
+#define EC_ALSTATUSCODE_DCINVALIDLATCHCFG          0x0031 /**< Invalid DC Latch Configuration*/
+#define EC_ALSTATUSCODE_DCPLLSYNCERROR             0x0032 /**< PLL Error*/
+#define EC_ALSTATUSCODE_DCSYNCIOERROR              0x0033 /**< DC Sync IO Error*/
+#define EC_ALSTATUSCODE_DCSYNCMISSEDERROR          0x0034 /**< DC Sync Timeout Error*/
+#define EC_ALSTATUSCODE_DCINVALIDSYNCCYCLETIME     0x0035 /**< DC Invalid Sync Cycle Time*/
+#define EC_ALSTATUSCODE_DCSYNC0CYCLETIME           0x0036 /**< DC Sync0 Cycle Time*/
+#define EC_ALSTATUSCODE_DCSYNC1CYCLETIME           0x0037 /**< DC Sync1 Cycle Time*/
+#define EC_ALSTATUSCODE_MBX_AOE                    0x0041 /**< MBX_AOE*/
+#define EC_ALSTATUSCODE_MBX_EOE                    0x0042 /**< MBX_EOE*/
+#define EC_ALSTATUSCODE_MBX_COE                    0x0043 /**< MBX_COE*/
+#define EC_ALSTATUSCODE_MBX_FOE                    0x0044 /**< MBX_FOE*/
+#define EC_ALSTATUSCODE_MBX_SOE                    0x0045 /**< MBX_SOE*/
+#define EC_ALSTATUSCODE_MBX_VOE                    0x004F /**< MBX_VOE*/
+#define EC_ALSTATUSCODE_EE_NOACCESS                0x0050 /**< EEPROM no access*/
+#define EC_ALSTATUSCODE_EE_ERROR                   0x0051 /**< EEPROM Error*/
+#define EC_ALSTATUSCODE_EXT_HARDWARE_NOT_READY     0x0052 /**< External hardware not ready. This AL Status Code should be used if the EtherCAT-Slave refused the state transition due to an external connection to another device or signal is missing*/
+#define EC_ALSTATUSCODE_DEVICE_IDENT_VALUE_UPDATED 0x0061 /**< In legacy identification mode (dip switch mapped to register 0x12) this error is returned if the EEPROM ID value does not match to dipswitch value*/
+#define EC_ALSTATUSCODE_MODULE_ID_LIST_NOT_MATCH   0x0070 /**< Detected Module Ident List (0xF030) and Configured Module Ident List (0xF050) does not match*/
+#define EC_ALSTATUSCODE_SUPPLY_VOLTAGE_TOO_LOW     0x0080 /**< The slave supply voltage is too low*/
+#define EC_ALSTATUSCODE_SUPPLY_VOLTAGE_TOO_HIGH    0x0081 /**< The slave supply voltage is too high*/
+#define EC_ALSTATUSCODE_TEMPERATURE_TOO_LOW        0x0082 /**< The slave temperature is too low*/
+#define EC_ALSTATUSCODE_TEMPERATURE_TOO_HIGH       0x0083 /**< The slave temperature is too high*/
+
+#define EC_SII_ADDRESS_MANUF           (0x0008)
+#define EC_SII_ADDRESS_PRODUCTCODE     (0x000a)
+#define EC_SII_ADDRESS_REVISION        (0x000c)
+#define EC_SII_ADDRESS_SN              (0x000E)
+#define EC_SII_ADDRESS_BOOTRXMBX       (0x0014)
+#define EC_SII_ADDRESS_BOOTTXMBX       (0x0016)
+#define EC_SII_ADDRESS_MBXSIZE         (0x0019)
+#define EC_SII_ADDRESS_TXMBXADR        (0x001a)
+#define EC_SII_ADDRESS_RXMBXADR        (0x0018)
+#define EC_SII_ADDRESS_MBXPROTO        (0x001c)
+#define EC_SII_ADDRESS_ADDITIONAL_INFO (0x0040)
+
+#define EC_SII_TYPE_NOP       0x0000
+#define EC_SII_TYPE_STRINGS   0x000A
+#define EC_SII_TYPE_DATATYPES 0x0014
+#define EC_SII_TYPE_GENERAL   0x001E
+#define EC_SII_TYPE_FMMU      0x0028
+#define EC_SII_TYPE_SM        0x0029
+#define EC_SII_TYPE_FMMUX     0x002A
+#define EC_SII_TYPE_SYNCUNIT  0x002B
+#define EC_SII_TYPE_TXPDO     0x0032
+#define EC_SII_TYPE_RXPDO     0x0033
+#define EC_SII_TYPE_DC        0x003C
+#define EC_SII_TYPE_END       0xFFFF
+
+#define EC_SII_FMMU_NONE      0x0000
+#define EC_SII_FMMU_READ      0x0001
+#define EC_SII_FMMU_WRITE     0x0002
+#define EC_SII_FMMU_SM_STATUS 0x0003
+
+#define EC_SII_SM_UNKNOWN             0x0000
+#define EC_SII_SM_MBX_OUT             0x0001
+#define EC_SII_SM_MBX_IN              0x0002
+#define EC_SII_SM_PROCESS_DATA_OUTPUT 0x0003
+#define EC_SII_SM_PROCESS_DATA_INPUT  0x0004
+
+typedef struct __PACKED ec_sii_base {
+    uint16_t pdi_control;
+    uint16_t pdi_config;
+    uint16_t sync_impulselen;
+    uint16_t pdi_config2;
+    uint16_t aliasaddr; /**< Configured station alias. */
+    uint8_t reserved[4];
+    uint16_t checksum;
+    uint32_t vendor_id;       /**< Vendor ID. */
+    uint32_t product_code;    /**< Vendor-specific product code. */
+    uint32_t revision_number; /**< Revision number. */
+    uint32_t serial_number;   /**< Serial number. */
+    uint8_t reserved2[8];
+    uint16_t boot_rx_mailbox_offset; /**< Bootstrap receive mailbox address. */
+    uint16_t boot_rx_mailbox_size;   /**< Bootstrap receive mailbox size. */
+    uint16_t boot_tx_mailbox_offset; /**< Bootstrap transmit mailbox address. */
+    uint16_t boot_tx_mailbox_size;   /**< Bootstrap transmit mailbox size. */
+    uint16_t std_rx_mailbox_offset;  /**< Standard receive mailbox address. */
+    uint16_t std_rx_mailbox_size;    /**< Standard receive mailbox size. */
+    uint16_t std_tx_mailbox_offset;  /**< Standard transmit mailbox address. */
+    uint16_t std_tx_mailbox_size;    /**< Standard transmit mailbox size. */
+    uint16_t mailbox_protocols;      /**< Supported mailbox protocols. */
+    uint8_t reserved3[66];
+    uint16_t size;
+    uint16_t version;
+} ec_sii_base_t;
+
+typedef struct __PACKED ec_sii_general {
+    uint8_t groupidx;
+    uint8_t imgidx;
+    uint8_t orderidx;
+    uint8_t nameidx;
+    uint8_t reserved1;
+    ec_sii_coe_details_t coe_details;
+    uint8_t foe_details;
+    uint8_t eoe_details;
+    uint8_t soe_channels;
+    uint8_t ds402_channels;
+    uint8_t sysmanclass;
+    ec_sii_general_flags_t flags;
+    int16_t current_on_ebus;
+    uint8_t reserved2;
+    uint8_t reserved3;
+    uint16_t phy_port;
+    uint16_t phy_memaddress;
+    uint8_t pad[12];
+} ec_sii_general_t;
+
+typedef struct __PACKED ec_sii_sm {
+    uint16_t physical_start_address;
+    uint16_t length;
+    uint8_t control;
+    uint8_t status;
+    uint8_t active;
+    uint8_t type;
+} ec_sii_sm_t;
+
+typedef struct __PACKED ec_sii_pdo_entry {
+    uint16_t index;
+    uint8_t subindex;
+    uint8_t nameidx;
+    uint8_t data_type;
+    uint8_t bitlen;
+    uint16_t flags;
+} ec_sii_pdo_entry_t;
+
+typedef struct __PACKED ec_sii_pdo_mapping {
+    uint16_t index; /* txpdo: 1a00~1bff, rxpdo: 1600~17ff */
+    uint8_t nentry;
+    uint8_t sm_idx;
+    uint8_t synchronization;
+    uint8_t nameidx;
+    uint16_t flags;
+    ec_sii_pdo_entry_t entry[];
+} ec_sii_pdo_mapping_t;
+
+typedef struct __PACKED ec_sm_reg {
+    uint16_t physical_start_address;
+    uint16_t length;
+    uint8_t control;
+    uint8_t status;
+    uint8_t active;
+    uint8_t pdi_control;
+} ec_sm_reg_t;
+
+typedef struct __PACKED ec_fmmu_reg {
+    uint32_t logical_start_address;
+    uint16_t length;
+    uint8_t logical_start_bit;
+    uint8_t logical_stop_bit;
+    uint16_t physical_start_address;
+    uint8_t physical_start_bit;
+    uint8_t type;
+    uint8_t active;
+    uint8_t reserved[3];
+} ec_fmmu_reg_t;
+
+/**
+ * \brief SmAssignObjects SyncManager Assignment Objects
+ * SyncManager 2 : 0x1C12<br>
+ * SyncManager 3 : 0x1C13<br>
+ */
+typedef struct __PACKED ec_pdo_assign_t {
+    uint16_t count; /**< PDO mapping count. */
+    uint16_t entry[CONFIG_EC_PER_SM_MAX_PDOS];
+} ec_pdo_assign_t;
+
+typedef struct __PACKED ec_pdo_mapping_t {
+    uint16_t count; /**< PDO entry count. */
+    uint32_t entry[CONFIG_EC_PER_PDO_MAX_PDO_ENTRIES];
+} ec_pdo_mapping_t;
+
+typedef struct __PACKED ec_mailbox_header {
+    uint16_t length;
+    uint16_t address;
+    uint8_t channel  : 6;
+    uint8_t priority : 2;
+    uint8_t type     : 4;
+    uint8_t counter  : 3;
+    uint8_t reserved : 1;
+} ec_mailbox_header_t;
+
+/** Size of the mailbox header.
+ */
+#define EC_MBOX_HEADER_SIZE 6
+
+#define EC_MBXPROT_AOE 0x0001
+#define EC_MBXPROT_EOE 0x0002
+#define EC_MBXPROT_COE 0x0004
+#define EC_MBXPROT_FOE 0x0008
+#define EC_MBXPROT_SOE 0x0010
+#define EC_MBXPROT_VOE 0x0020
+
+/** Mailbox types.
+ *
+ * These are used in the 'Type' field of the mailbox header.
+ */
+enum {
+    EC_MBOX_TYPE_EOE = 0x02,
+    EC_MBOX_TYPE_COE = 0x03,
+    EC_MBOX_TYPE_FOE = 0x04,
+    EC_MBOX_TYPE_SOE = 0x05,
+    EC_MBOX_TYPE_VOE = 0x0f,
+};
+
+#define EC_SM_INDEX_MBX_WRITE           0x0000
+#define EC_SM_INDEX_MBX_READ            0x0001
+#define EC_SM_INDEX_PROCESS_DATA_OUTPUT 0x0002
+#define EC_SM_INDEX_PROCESS_DATA_INPUT  0x0003
+
+typedef struct __PACKED ec_coe_header {
+    uint16_t number   : 9;
+    uint16_t reserved : 3;
+    uint16_t service  : 4;
+} ec_coe_header_t;
+
+typedef struct __PACKED ec_sdo_header_common {
+    uint8_t size_indicator  : 1;
+    uint8_t transfertype    : 1; // expedited transfer
+    uint8_t data_set_size   : 2;
+    uint8_t complete_access : 1;
+    uint8_t command         : 3;
+} ec_sdo_header_common_t;
+
+typedef struct __PACKED ec_sdo_header_segment {
+    uint8_t more_follows : 1;
+    uint8_t segdata_size : 3;
+    uint8_t toggle       : 1;
+    uint8_t command      : 3;
+} ec_sdo_header_segment_t;
+
+typedef struct __PACKED ec_sdo_header {
+    union {
+        uint8_t byte;
+        ec_sdo_header_common_t common;
+        ec_sdo_header_segment_t segment;
+    };
+    uint16_t index;
+    uint8_t subindex;
+} ec_sdo_header_t;
+
+#define EC_COE_SERVICE_EMERGENCY            0x01
+#define EC_COE_SERVICE_SDO_REQUEST          0x02
+#define EC_COE_SERVICE_SDO_RESPONSE         0x03
+#define EC_COE_SERVICE_TXPDO                0x04
+#define EC_COE_SERVICE_RXPDO                0x05
+#define EC_COE_SERVICE_TXPDO_REMOTE_REQUSET 0x06
+#define EC_COE_SERVICE_RXPDO_REMOTE_REQUEST 0x07
+#define EC_COE_SERVICE_SDOINFO              0x08
+
+#define EC_COE_REQUEST_SEGMENT_DOWNLOAD 0x00
+#define EC_COE_REQUEST_DOWNLOAD         0x01
+#define EC_COE_REQUEST_UPLOAD           0x02
+#define EC_COE_REQUEST_SEGMENT_UPLOAD   0x03
+#define EC_COE_REQUEST_ABORT            0x04
+
+#define EC_COE_RESPONSE_SEGMENT_UPLOAD   0x00
+#define EC_COE_RESPONSE_SEGMENT_DOWNLOAD 0x01
+#define EC_COE_RESPONSE_UPLOAD           0x02
+#define EC_COE_RESPONSE_DOWNLOAD         0x03
+
+typedef struct __PACKED {
+    uint16_t opcode;
+    union {
+        uint32_t password;
+        uint32_t packet_number;
+        uint32_t error_code;
+    };
+} ec_foe_header_t;
+
+#define EC_FOE_OPCODE_READ  0x0001
+#define EC_FOE_OPCODE_WRITE 0x0002
+#define EC_FOE_OPCODE_DATA  0x0003
+#define EC_FOE_OPCODE_ACK   0x0004
+#define EC_FOE_OPCODE_ERROR 0x0005
+#define EC_FOE_OPCODE_BUSY  0x0006
+
+#define EC_FOE_ERRCODE_NOTDEFINED       0x8000 /**< \brief Not defined*/
+#define EC_FOE_ERRCODE_NOTFOUND         0x8001 /**< \brief The file requested by an FoE upload service could not be found on the server*/
+#define EC_FOE_ERRCODE_ACCESS           0x8002 /**< \brief Read or write access to this file not allowed (e.g. due to local control).*/
+#define EC_FOE_ERRCODE_DISKFULL         0x8003 /**< \brief Disk to store file is full or memory allocation exceeded*/
+#define EC_FOE_ERRCODE_ILLEGAL          0x8004 /**< \brief Illegal FoE operation, e.g. service identifier invalid*/
+#define EC_FOE_ERRCODE_PACKENO          0x8005 /**< \brief FoE packet number invalid*/
+#define EC_FOE_ERRCODE_EXISTS           0x8006 /**< \brief The file which is requested to be downloaded does already exist*/
+#define EC_FOE_ERRCODE_NOUSER           0x8007 /**< \brief No User*/
+#define EC_FOE_ERRCODE_BOOTSTRAPONLY    0x8008 /**< \brief FoE only supported in Bootstrap*/
+#define EC_FOE_ERRCODE_NOTINBOOTSTRAP   0x8009 /**< \brief This file may not be accessed in BOOTSTRAP state*/
+#define EC_FOE_ERRCODE_NORIGHTS         0x800A /**< \brief Password invalid*/
+#define EC_FOE_ERRCODE_PROGERROR        0x800B /**< \brief Generic programming error. Should only be returned if  error reason cannot be distinguished*/
+#define EC_FOE_ERRCODE_INVALID_CHECKSUM 0x800C /**< \brief checksum included in the file is invalid*/
+#define EC_FOE_ERRCODE_INVALID_FIRMWARE 0x800D /**< \brief The hardware does not support the downloaded firmware*/
+#define EC_FOE_ERRCODE_NO_FILE          0x800F /**< \brief Do not use (identical with 0x8001)*/
+#define EC_FOE_ERRCODE_NO_FILE_HEADER   0x8010 /**< \brief Missing file header of error in file header*/
+#define EC_FOE_ERRCODE_FLASH_ERROR      0x8011 /**< \brief Flash cannot be accessed*/
+
+typedef enum {
+    EC_DIR_OUTPUT, /**< Values written by the master. */
+    EC_DIR_INPUT,  /**< Values read by the master. */
+} ec_direction_t;
+
+typedef enum {
+    EC_WD_DEFAULT, /**< Use the default setting of the sync manager. */
+    EC_WD_ENABLE,  /**< Enable the watchdog. */
+    EC_WD_DISABLE, /**< Disable the watchdog. */
+} ec_watchdog_mode_t;
+
+typedef struct {
+    uint16_t index;     /**< PDO entry index. */
+    uint8_t subindex;   /**< PDO entry subindex. */
+    uint8_t bit_length; /**< Size of the PDO entry in bit. */
+} ec_pdo_entry_info_t;
+
+typedef struct {
+    uint16_t index; /**< PDO index. */
+    uint32_t n_entries;
+    ec_pdo_entry_info_t const *entries;
+} ec_pdo_info_t;
+
+typedef struct {
+    uint8_t index; /**< Sync manager index. */
+    ec_direction_t dir;
+    uint32_t n_pdos;
+    ec_pdo_info_t const *pdos;
+    ec_watchdog_mode_t watchdog_mode;
+} ec_sync_info_t;
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_errno.h

@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_ERRNO_H
+#define EC_ERRNO_H
+
+#define EC_ERR_OK          0  /**< No error */
+#define EC_ERR_NOMEM       1  /**< Out of memory */
+#define EC_ERR_INVAL       2  /**< Invalid argument */
+#define EC_ERR_TIMEOUT     3  /**< Timeout */
+#define EC_ERR_IO          4  /**< I/O error */
+#define EC_ERR_WC          5  /**< working counter error */
+#define EC_ERR_ALERR       6  /**< AL status error */
+#define EC_ERR_SII         7  /**< SII error */
+#define EC_ERR_MBOX        8  /**< mailbox error */
+#define EC_ERR_COE_TYPE    9  /**< COE type error */
+#define EC_ERR_COE_SIZE    10 /**< COE size error */
+#define EC_ERR_COE_REQUEST 11 /**< COE request & index & subindex error */
+#define EC_ERR_COE_TOGGLE  12 /**< COE toggle error */
+#define EC_ERR_COE_ABORT   13 /**< COE abort error */
+#define EC_ERR_FOE_TYPE    14 /**< FOE type error */
+#define EC_ERR_FOE_SIZE    15 /**< FOE size error */
+#define EC_ERR_FOE_OPCODE  16 /**< FOE opcode error */
+#define EC_ERR_FOE_PACKNO  17 /**< FOE packet number error */
+
+#define EC_ERR_UNKNOWN     255
+
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_foe.h

@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_FOE_H
+#define EC_FOE_H
+
+int ec_foe_write(ec_master_t *master,
+                 uint16_t slave_index,
+                 ec_datagram_t *datagram,
+                 const char *filename,
+                 uint32_t password,
+                 const void *buf,
+                 uint32_t size);
+
+int ec_foe_read(ec_master_t *master,
+                uint16_t slave_index,
+                ec_datagram_t *datagram,
+                const char *filename,
+                uint32_t password,
+                void *buf,
+                uint32_t maxsize,
+                uint32_t *size);
+#endif

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_list.h

@@ -0,0 +1,468 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_LIST_H
+#define EC_LIST_H
+
+#include <string.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * ec_container_of - return the member address of ptr, if the type of ptr is the
+ * struct type.
+ */
+#define ec_container_of(ptr, type, member) \
+    ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member)))
+
+/**
+ * Single List structure
+ */
+struct ec_slist_node {
+    struct ec_slist_node *next; /**< point to next node. */
+};
+typedef struct ec_slist_node ec_slist_t; /**< Type for single list. */
+
+/**
+ * @brief initialize a single list
+ *
+ * @param l the single list to be initialized
+ */
+static inline void ec_slist_init(ec_slist_t *l)
+{
+    l->next = NULL;
+}
+
+static inline void ec_slist_add_head(ec_slist_t *l, ec_slist_t *n)
+{
+    n->next = l->next;
+    l->next = n;
+}
+
+static inline void ec_slist_add_tail(ec_slist_t *l, ec_slist_t *n)
+{
+    ec_slist_t *tmp = l;
+
+    while (tmp->next) {
+        tmp = tmp->next;
+    }
+
+    /* append the node to the tail */
+    tmp->next = n;
+    n->next = NULL;
+}
+
+static inline void ec_slist_insert(ec_slist_t *l, ec_slist_t *next, ec_slist_t *n)
+{
+    if (!next) {
+        ec_slist_add_tail(next, l);
+        return;
+    }
+
+    while (l->next) {
+        if (l->next == next) {
+            l->next = n;
+            n->next = next;
+        }
+
+        l = l->next;
+    }
+}
+
+static inline ec_slist_t *ec_slist_remove(ec_slist_t *l, ec_slist_t *n)
+{
+    ec_slist_t *tmp = l;
+    /* remove slist head */
+    while (tmp->next && tmp->next != n) {
+        tmp = tmp->next;
+    }
+
+    /* remove node */
+    if (tmp->next != (ec_slist_t *)0) {
+        tmp->next = tmp->next->next;
+    }
+
+    return l;
+}
+
+static inline unsigned int ec_slist_len(const ec_slist_t *l)
+{
+    unsigned int len = 0;
+    const ec_slist_t *list = l->next;
+
+    while (list != NULL) {
+        list = list->next;
+        len++;
+    }
+
+    return len;
+}
+
+static inline unsigned int ec_slist_contains(ec_slist_t *l, ec_slist_t *n)
+{
+    while (l->next) {
+        if (l->next == n) {
+            return 0;
+        }
+
+        l = l->next;
+    }
+
+    return 1;
+}
+
+static inline ec_slist_t *ec_slist_head(ec_slist_t *l)
+{
+    return l->next;
+}
+
+static inline ec_slist_t *ec_slist_tail(ec_slist_t *l)
+{
+    while (l->next) {
+        l = l->next;
+    }
+
+    return l;
+}
+
+static inline ec_slist_t *ec_slist_next(ec_slist_t *n)
+{
+    return n->next;
+}
+
+static inline int ec_slist_isempty(ec_slist_t *l)
+{
+    return l->next == NULL;
+}
+
+/**
+ * @brief initialize a slist object
+ */
+#define EC_SLIST_OBJESCT_INIT(object) \
+    {                                 \
+        NULL                          \
+    }
+
+/**
+ * @brief initialize a slist object
+ */
+#define EC_SLIST_DEFINE(slist) \
+    ec_slist_t slist = { NULL }
+
+/**
+ * @brief get the struct for this single list node
+ * @param node the entry point
+ * @param type the type of structure
+ * @param member the name of list in structure
+ */
+#define ec_slist_entry(node, type, member) \
+    ec_container_of(node, type, member)
+
+/**
+ * ec_slist_first_entry - get the first element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define ec_slist_first_entry(ptr, type, member) \
+    ec_slist_entry((ptr)->next, type, member)
+
+/**
+ * ec_slist_tail_entry - get the tail element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define ec_slist_tail_entry(ptr, type, member) \
+    ec_slist_entry(ec_slist_tail(ptr), type, member)
+
+/**
+ * ec_slist_first_entry_or_null - get the first element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define ec_slist_first_entry_or_null(ptr, type, member) \
+    (ec_slist_isempty(ptr) ? NULL : ec_slist_first_entry(ptr, type, member))
+
+/**
+ * ec_slist_for_each - iterate over a single list
+ * @pos:    the ec_slist_t * to use as a loop cursor.
+ * @head:   the head for your single list.
+ */
+#define ec_slist_for_each(pos, head) \
+    for (pos = (head)->next; pos != NULL; pos = pos->next)
+
+#define ec_slist_for_each_safe(pos, next, head)    \
+    for (pos = (head)->next, next = pos->next; pos; \
+         pos = next, next = pos->next)
+
+/**
+ * ec_slist_for_each_entry  -   iterate over single list of given type
+ * @pos:    the type * to use as a loop cursor.
+ * @head:   the head for your single list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define ec_slist_for_each_entry(pos, head, member)                 \
+    for (pos = ec_slist_entry((head)->next, typeof(*pos), member); \
+         &pos->member != (NULL);                                    \
+         pos = ec_slist_entry(pos->member.next, typeof(*pos), member))
+
+#define ec_slist_for_each_entry_safe(pos, n, head, member)          \
+    for (pos = ec_slist_entry((head)->next, typeof(*pos), member),  \
+        n = ec_slist_entry(pos->member.next, typeof(*pos), member); \
+         &pos->member != (NULL);                                     \
+         pos = n, n = ec_slist_entry(pos->member.next, typeof(*pos), member))
+
+/**
+ * Double List structure
+ */
+struct ec_dlist_node {
+    struct ec_dlist_node *next; /**< point to next node. */
+    struct ec_dlist_node *prev; /**< point to prev node. */
+};
+typedef struct ec_dlist_node ec_dlist_t; /**< Type for lists. */
+
+/**
+ * @brief initialize a list
+ *
+ * @param l list to be initialized
+ */
+static inline void ec_dlist_init(ec_dlist_t *l)
+{
+    l->next = l->prev = l;
+}
+
+/**
+ * @brief insert a node after a list
+ *
+ * @param l list to insert it
+ * @param n new node to be inserted
+ */
+static inline void ec_dlist_add_head(ec_dlist_t *l, ec_dlist_t *n)
+{
+    l->next->prev = n;
+    n->next = l->next;
+
+    l->next = n;
+    n->prev = l;
+}
+
+/**
+ * @brief insert a node before a list
+ *
+ * @param n new node to be inserted
+ * @param l list to insert it
+ */
+static inline void ec_dlist_add_tail(ec_dlist_t *l, ec_dlist_t *n)
+{
+    l->prev->next = n;
+    n->prev = l->prev;
+
+    l->prev = n;
+    n->next = l;
+}
+
+/**
+ * @brief remove node from list.
+ * @param n the node to remove from the list.
+ */
+static inline void ec_dlist_remove(ec_dlist_t *n)
+{
+    n->next->prev = n->prev;
+    n->prev->next = n->next;
+
+    n->next = n->prev = n;
+}
+
+/**
+ * @brief move node from list.
+ * @param n the node to remove from the list.
+ */
+static inline void ec_dlist_move_head(ec_dlist_t *l, ec_dlist_t *n)
+{
+    ec_dlist_remove(n);
+    ec_dlist_add_head(l, n);
+}
+
+/**
+ * @brief move node from list.
+ * @param n the node to remove from the list.
+ */
+static inline void ec_dlist_move_tail(ec_dlist_t *l, ec_dlist_t *n)
+{
+    ec_dlist_remove(n);
+    ec_dlist_add_tail(l, n);
+}
+
+/**
+ * @brief tests whether a list is empty
+ * @param l the list to test.
+ */
+static inline int ec_dlist_isempty(const ec_dlist_t *l)
+{
+    return l->next == l;
+}
+
+/**
+ * @brief get the list length
+ * @param l the list to get.
+ */
+static inline unsigned int ec_dlist_len(const ec_dlist_t *l)
+{
+    unsigned int len = 0;
+    const ec_dlist_t *p = l;
+
+    while (p->next != l) {
+        p = p->next;
+        len++;
+    }
+
+    return len;
+}
+
+/**
+ * @brief remove and init list
+ * @param n the list to get.
+ */
+static inline void ec_dlist_del_init(ec_dlist_t *n)
+{
+    ec_dlist_remove(n);
+}
+
+/**
+ * @brief initialize a dlist object
+ */
+#define EC_DLIST_OBJESCT_INIT(object) \
+    {                                 \
+        &(object), &(object)          \
+    }
+/**
+ * @brief initialize a dlist object
+ */
+#define EC_DLIST_DEFINE(list) \
+    ec_dlist_t list = { &(list), &(list) }
+
+/**
+ * @brief get the struct for this entry
+ * @param node the entry point
+ * @param type the type of structure
+ * @param member the name of list in structure
+ */
+#define ec_dlist_entry(node, type, member) \
+    ec_container_of(node, type, member)
+
+/**
+ * dlist_first_entry - get the first element from a list
+ * @ptr:    the list head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the list_struct within the struct.
+ *
+ * Note, that list is expected to be not empty.
+ */
+#define ec_dlist_first_entry(ptr, type, member) \
+    ec_dlist_entry((ptr)->next, type, member)
+/**
+ * dlist_first_entry_or_null - get the first element from a list
+ * @ptr:    the list head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the list_struct within the struct.
+ *
+ * Note, that list is expected to be not empty.
+ */
+#define ec_dlist_first_entry_or_null(ptr, type, member) \
+    (ec_dlist_isempty(ptr) ? NULL : ec_dlist_first_entry(ptr, type, member))
+
+/**
+ * ec_dlist_for_each - iterate over a list
+ * @pos:    the ec_dlist_t * to use as a loop cursor.
+ * @head:   the head for your list.
+ */
+#define ec_dlist_for_each(pos, head) \
+    for (pos = (head)->next; pos != (head); pos = pos->next)
+
+/**
+ * ec_dlist_for_each_prev - iterate over a list
+ * @pos:    the dlist_t * to use as a loop cursor.
+ * @head:   the head for your list.
+ */
+#define ec_dlist_for_each_prev(pos, head) \
+    for (pos = (head)->prev; pos != (head); pos = pos->prev)
+
+/**
+ * ec_dlist_for_each_safe - iterate over a list safe against removal of list entry
+ * @pos:    the dlist_t * to use as a loop cursor.
+ * @n:      another dlist_t * to use as temporary storage
+ * @head:   the head for your list.
+ */
+#define ec_dlist_for_each_safe(pos, n, head)              \
+    for (pos = (head)->next, n = pos->next; pos != (head); \
+         pos = n, n = pos->next)
+
+#define ec_dlist_for_each_prev_safe(pos, n, head)         \
+    for (pos = (head)->prev, n = pos->prev; pos != (head); \
+         pos = n, n = pos->prev)
+/**
+ * ec_dlist_for_each_entry  -   iterate over list of given type
+ * @pos:    the type * to use as a loop cursor.
+ * @head:   the head for your list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define ec_dlist_for_each_entry(pos, head, member)                 \
+    for (pos = ec_dlist_entry((head)->next, typeof(*pos), member); \
+         &pos->member != (head);                                    \
+         pos = ec_dlist_entry(pos->member.next, typeof(*pos), member))
+
+/**
+ * ec_dlist_for_each_entry_reverse  -   iterate over list of given type
+ * @pos:    the type * to use as a loop cursor.
+ * @head:   the head for your list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define ec_dlist_for_each_entry_reverse(pos, head, member)         \
+    for (pos = ec_dlist_entry((head)->prev, typeof(*pos), member); \
+         &pos->member != (head);                                    \
+         pos = ec_dlist_entry(pos->member.prev, typeof(*pos), member))
+
+/**
+ * ec_dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry
+ * @pos:    the type * to use as a loop cursor.
+ * @n:      another type * to use as temporary storage
+ * @head:   the head for your list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define ec_dlist_for_each_entry_safe(pos, n, head, member)          \
+    for (pos = ec_dlist_entry((head)->next, typeof(*pos), member),  \
+        n = ec_dlist_entry(pos->member.next, typeof(*pos), member); \
+         &pos->member != (head);                                     \
+         pos = n, n = ec_dlist_entry(n->member.next, typeof(*n), member))
+
+/**
+ * ec_dlist_for_each_entry_safe_reverse - iterate over list of given type safe against removal of list entry
+ * @pos:    the type * to use as a loop cursor.
+ * @n:      another type * to use as temporary storage
+ * @head:   the head for your list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define ec_dlist_for_each_entry_safe_reverse(pos, n, head, member)  \
+    for (pos = ec_dlist_entry((head)->prev, typeof(*pos), field),   \
+        n = ec_dlist_entry(pos->member.prev, typeof(*pos), member); \
+         &pos->member != (head);                                     \
+         pos = n, n = ec_dlist_entry(pos->member.prev, typeof(*pos), member))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EC_LIST_H */

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_log.h

@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_LOG_H
+#define EC_LOG_H
+
+#include <stdio.h>
+
+/* DEBUG level */
+#define EC_DBG_ERROR   0
+#define EC_DBG_WARNING 1
+#define EC_DBG_INFO    2
+#define EC_DBG_LOG     3
+
+#ifndef EC_DBG_TAG
+#define EC_DBG_TAG "EC"
+#endif
+/*
+ * The color for terminal (foreground)
+ * BLACK    30
+ * RED      31
+ * GREEN    32
+ * YELLOW   33
+ * BLUE     34
+ * PURPLE   35
+ * CYAN     36
+ * WHITE    37
+ */
+
+#define ec_master_dbg_log_line(lvl, color_n, fmt, ...)          \
+    do {                                                        \
+        CONFIG_EC_PRINTF("\033[" #color_n "m[" lvl "/ec_master" \
+                         "] ");                                 \
+        CONFIG_EC_PRINTF(fmt, ##__VA_ARGS__);                   \
+        CONFIG_EC_PRINTF("\033[0m");                            \
+    } while (0)
+
+#define ec_slave_dbg_log_line(lvl, color_n, fmt, ...)          \
+    do {                                                       \
+        CONFIG_EC_PRINTF("\033[" #color_n "m[" lvl "/ec_slave" \
+                         "] ");                                \
+        CONFIG_EC_PRINTF(fmt, ##__VA_ARGS__);                  \
+        CONFIG_EC_PRINTF("\033[0m");                           \
+    } while (0)
+
+#if (CONFIG_EC_DBG_LEVEL >= EC_DBG_LOG)
+#define EC_LOG_DBG(fmt, ...) ec_master_dbg_log_line("D", 0, fmt, ##__VA_ARGS__)
+#else
+#define EC_LOG_DBG(...) \
+    {                   \
+    }
+#endif
+
+#if (CONFIG_EC_DBG_LEVEL >= EC_DBG_INFO)
+#define EC_LOG_INFO(fmt, ...) ec_master_dbg_log_line("I", 32, fmt, ##__VA_ARGS__)
+#else
+#define EC_LOG_INFO(...) \
+    {                    \
+    }
+#endif
+
+#if (CONFIG_EC_DBG_LEVEL >= EC_DBG_WARNING)
+#define EC_LOG_WRN(fmt, ...) ec_master_dbg_log_line("W", 33, fmt, ##__VA_ARGS__)
+#else
+#define EC_LOG_WRN(...) \
+    {                   \
+    }
+#endif
+
+#if (CONFIG_EC_DBG_LEVEL >= EC_DBG_ERROR)
+#define EC_LOG_ERR(fmt, ...) ec_master_dbg_log_line("E", 31, fmt, ##__VA_ARGS__)
+#else
+#define EC_LOG_ERR(...) \
+    {                   \
+    }
+#endif
+
+#if (CONFIG_EC_SLAVE_DBG_LEVEL >= EC_DBG_LOG)
+#define EC_SLAVE_LOG_DBG(fmt, ...) ec_slave_dbg_log_line("D", 0, fmt, ##__VA_ARGS__)
+#else
+#define EC_SLAVE_LOG_DBG(...) \
+    {                         \
+    }
+#endif
+
+#if (CONFIG_EC_SLAVE_DBG_LEVEL >= EC_DBG_INFO)
+#define EC_SLAVE_LOG_INFO(fmt, ...) ec_slave_dbg_log_line("I", 32, fmt, ##__VA_ARGS__)
+#else
+#define EC_SLAVE_LOG_INFO(...) \
+    {                          \
+    }
+#endif
+
+#if (CONFIG_EC_SLAVE_DBG_LEVEL >= EC_DBG_WARNING)
+#define EC_SLAVE_LOG_WRN(fmt, ...) ec_slave_dbg_log_line("W", 33, fmt, ##__VA_ARGS__)
+#else
+#define EC_SLAVE_LOG_WRN(...) \
+    {                         \
+    }
+#endif
+
+#if (CONFIG_EC_SLAVE_DBG_LEVEL >= EC_DBG_ERROR)
+#define EC_SLAVE_LOG_ERR(fmt, ...) ec_slave_dbg_log_line("E", 31, fmt, ##__VA_ARGS__)
+#else
+#define EC_SLAVE_LOG_ERR(...) \
+    {                         \
+    }
+#endif
+
+#define EC_LOG_RAW(...) CONFIG_EC_PRINTF(__VA_ARGS__)
+
+#ifndef CONFIG_EC_ASSERT_DISABLE
+#define EC_ASSERT(f)                                                            \
+    do {                                                                        \
+        if (!(f)) {                                                             \
+            EC_LOG_ERR("ASSERT FAIL [%s] @ %s:%d\r\n", #f, __FILE__, __LINE__); \
+            while (1) {                                                         \
+            }                                                                   \
+        }                                                                       \
+    } while (false)
+
+#define EC_ASSERT_MSG(f, fmt, ...)                                              \
+    do {                                                                        \
+        if (!(f)) {                                                             \
+            EC_LOG_ERR("ASSERT FAIL [%s] @ %s:%d\r\n", #f, __FILE__, __LINE__); \
+            EC_LOG_ERR(fmt "\r\n", ##__VA_ARGS__);                              \
+            while (1) {                                                         \
+            }                                                                   \
+        }                                                                       \
+    } while (false)
+#else
+#define EC_ASSERT(f) \
+    {                \
+    }
+#define EC_ASSERT_MSG(f, fmt, ...) \
+    {                              \
+    }
+#endif
+
+#define ___is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
+static inline void ec_hexdump(const void *ptr, uint32_t buflen)
+{
+    unsigned char *buf = (unsigned char *)ptr;
+    unsigned int i, j;
+
+    (void)buf;
+
+    for (i = 0; i < buflen; i += 16) {
+        CONFIG_EC_PRINTF("%08x:", i);
+
+        for (j = 0; j < 16; j++)
+            if (i + j < buflen) {
+                if ((j % 8) == 0) {
+                    CONFIG_EC_PRINTF("  ");
+                }
+
+                CONFIG_EC_PRINTF("%02X ", buf[i + j]);
+            } else
+                CONFIG_EC_PRINTF("   ");
+        CONFIG_EC_PRINTF(" ");
+
+        for (j = 0; j < 16; j++)
+            if (i + j < buflen)
+                CONFIG_EC_PRINTF("%c", ___is_print(buf[i + j]) ? buf[i + j] : '.');
+        CONFIG_EC_PRINTF("\n");
+    }
+}
+
+#endif /* EC_LOG_H */

projects/etherkit_ethercat_cherryecat/packages/CherryECAT-latest/include/ec_mailbox.h

@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2025, sakumisu
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef EC_MAILBOX_H
+#define EC_MAILBOX_H
+
+uint8_t *ec_mailbox_fill_send(ec_master_t *master,
+                              uint16_t slave_index,
+                              ec_datagram_t *datagram,
+                              uint8_t type,
+                              uint16_t size);
+int ec_mailbox_send(ec_master_t *master,
+                    uint16_t slave_index,
+                    ec_datagram_t *datagram);
+int ec_mailbox_read_status(ec_master_t *master,
+                           uint16_t slave_index,
+                           ec_datagram_t *datagram,
+                           uint32_t timeout_us);
+int ec_mailbox_receive(ec_master_t *master,
+                       uint16_t slave_index,
+                       ec_datagram_t *datagram,
+                       uint8_t *type,
+                       uint32_t *size,
+                       uint32_t timeout_us);
+
+#endif