fsp_xspi0_boot.ld 17 KB

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  1. /*
  2. Linker File for Renesas RZ/N2L FSP
  3. */
  4. INCLUDE memory_regions.ld
  5. /* The memory information for each device is done in memory regions file.
  6. * The starting address and length of memory not defined in memory regions file are defined as 0. */
  7. ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
  8. ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
  9. BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
  10. BTCM_PRV_LENGTH = DEFINED(BTCM_LENGTH) ? BTCM_LENGTH : 0;
  11. SYSTEM_RAM_PRV_START = DEFINED(SYSTEM_RAM_START) ? SYSTEM_RAM_START : 0;
  12. SYSTEM_RAM_PRV_LENGTH = DEFINED(SYSTEM_RAM_LENGTH) ? SYSTEM_RAM_LENGTH : 0;
  13. SYSTEM_RAM_MIRROR_PRV_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START : 0;
  14. SYSTEM_RAM_MIRROR_PRV_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? SYSTEM_RAM_MIRROR_LENGTH : 0;
  15. xSPI0_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS0_SPACE_MIRROR_START) ? xSPI0_CS0_SPACE_MIRROR_START : 0;
  16. xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_MIRROR_LENGTH) ? xSPI0_CS0_SPACE_MIRROR_LENGTH : 0;
  17. xSPI0_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS1_SPACE_MIRROR_START) ? xSPI0_CS1_SPACE_MIRROR_START : 0;
  18. xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_MIRROR_LENGTH) ? xSPI0_CS1_SPACE_MIRROR_LENGTH : 0;
  19. xSPI1_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS0_SPACE_MIRROR_START) ? xSPI1_CS0_SPACE_MIRROR_START : 0;
  20. xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_MIRROR_LENGTH) ? xSPI1_CS0_SPACE_MIRROR_LENGTH : 0;
  21. xSPI1_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS1_SPACE_MIRROR_START) ? xSPI1_CS1_SPACE_MIRROR_START : 0;
  22. xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_MIRROR_LENGTH) ? xSPI1_CS1_SPACE_MIRROR_LENGTH : 0;
  23. CS0_SPACE_MIRROR_PRV_START = DEFINED(CS0_SPACE_MIRROR_START) ? CS0_SPACE_MIRROR_START : 0;
  24. CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS0_SPACE_MIRROR_LENGTH) ? CS0_SPACE_MIRROR_LENGTH : 0;
  25. CS2_SPACE_MIRROR_PRV_START = DEFINED(CS2_SPACE_MIRROR_START) ? CS2_SPACE_MIRROR_START : 0;
  26. CS2_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS2_SPACE_MIRROR_LENGTH) ? CS2_SPACE_MIRROR_LENGTH : 0;
  27. CS3_SPACE_MIRROR_PRV_START = DEFINED(CS3_SPACE_MIRROR_START) ? CS3_SPACE_MIRROR_START : 0;
  28. CS3_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS3_SPACE_MIRROR_LENGTH) ? CS3_SPACE_MIRROR_LENGTH : 0;
  29. CS5_SPACE_MIRROR_PRV_START = DEFINED(CS5_SPACE_MIRROR_START) ? CS5_SPACE_MIRROR_START : 0;
  30. CS5_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS5_SPACE_MIRROR_LENGTH) ? CS5_SPACE_MIRROR_LENGTH : 0;
  31. xSPI0_CS0_SPACE_PRV_START = DEFINED(xSPI0_CS0_SPACE_START) ? xSPI0_CS0_SPACE_START : 0;
  32. xSPI0_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_LENGTH) ? xSPI0_CS0_SPACE_LENGTH : 0;
  33. xSPI0_CS1_SPACE_PRV_START = DEFINED(xSPI0_CS1_SPACE_START) ? xSPI0_CS1_SPACE_START : 0;
  34. xSPI0_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_LENGTH) ? xSPI0_CS1_SPACE_LENGTH : 0;
  35. xSPI1_CS0_SPACE_PRV_START = DEFINED(xSPI1_CS0_SPACE_START) ? xSPI1_CS0_SPACE_START : 0;
  36. xSPI1_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_LENGTH) ? xSPI1_CS0_SPACE_LENGTH : 0;
  37. xSPI1_CS1_SPACE_PRV_START = DEFINED(xSPI1_CS1_SPACE_START) ? xSPI1_CS1_SPACE_START : 0;
  38. xSPI1_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_LENGTH) ? xSPI1_CS1_SPACE_LENGTH : 0;
  39. CS0_SPACE_PRV_START = DEFINED(CS0_SPACE_START) ? CS0_SPACE_START : 0;
  40. CS0_SPACE_PRV_LENGTH = DEFINED(CS0_SPACE_LENGTH) ? CS0_SPACE_LENGTH : 0;
  41. CS2_SPACE_PRV_START = DEFINED(CS2_SPACE_START) ? CS2_SPACE_START : 0;
  42. CS2_SPACE_PRV_LENGTH = DEFINED(CS2_SPACE_LENGTH) ? CS2_SPACE_LENGTH : 0;
  43. CS3_SPACE_PRV_START = DEFINED(CS3_SPACE_START) ? CS3_SPACE_START : 0;
  44. CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
  45. CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
  46. CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
  47. /*
  48. LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
  49. FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
  50. LOADER_TEXT_ADDRESS = 0x00102000;
  51. INTVEC_ADDRESS = 0x00000000;
  52. TEXT_ADDRESS = 0x00000100;
  53. NONCACHE_BUFFER_OFFSET = 0x00020000;
  54. DMAC_LINK_MODE_OFFSET = 0x00044000;
  55. DATA_NONCACHE_OFFSET = 0x00048000;
  56. RAM_START = ATCM_PRV_START;
  57. RAM_LENGTH = ATCM_PRV_LENGTH;
  58. LOADER_START = BTCM_PRV_START;
  59. LOADER_LENGTH = BTCM_PRV_LENGTH;
  60. */
  61. /* Change ADDRESS for EtherCAT Sample */
  62. LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
  63. FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
  64. LOADER_TEXT_ADDRESS = 0x00102000;
  65. INTVEC_ADDRESS = 0x10000000;
  66. TEXT_ADDRESS = 0x10020000;
  67. NONCACHE_BUFFER_OFFSET = 0x00020000;
  68. DMAC_LINK_MODE_OFFSET = 0x00044000;
  69. DATA_NONCACHE_OFFSET = 0x00048000;
  70. RAM_START = SYSTEM_RAM_PRV_START;
  71. RAM_LENGTH = SYSTEM_RAM_PRV_LENGTH;
  72. LOADER_START = BTCM_PRV_START;
  73. LOADER_LENGTH = BTCM_PRV_LENGTH;
  74. /**************************************/
  75. /* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
  76. DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
  77. DATA_NONCACHE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
  78. DMAC_LINK_MODE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DMAC_LINK_MODE_OFFSET : 0;
  79. DMAC_LINK_MODE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
  80. SHARED_NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - 0x00040000 : 0;
  81. SHARED_NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
  82. NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - NONCACHE_BUFFER_OFFSET : 0;
  83. NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
  84. MEMORY
  85. {
  86. ATCM : ORIGIN = ATCM_PRV_START, LENGTH = ATCM_PRV_LENGTH
  87. BTCM : ORIGIN = BTCM_PRV_START, LENGTH = BTCM_PRV_LENGTH
  88. SYSTEM_RAM : ORIGIN = SYSTEM_RAM_PRV_START, LENGTH = SYSTEM_RAM_PRV_LENGTH
  89. SYSTEM_RAM_MIRROR : ORIGIN = SYSTEM_RAM_MIRROR_PRV_START, LENGTH = SYSTEM_RAM_MIRROR_PRV_LENGTH
  90. xSPI0_CS0_SPACE_MIRROR : ORIGIN = xSPI0_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH
  91. xSPI0_CS1_SPACE_MIRROR : ORIGIN = xSPI0_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH
  92. xSPI1_CS0_SPACE_MIRROR : ORIGIN = xSPI1_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH
  93. xSPI1_CS1_SPACE_MIRROR : ORIGIN = xSPI1_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH
  94. CS0_SPACE_MIRROR : ORIGIN = CS0_SPACE_MIRROR_PRV_START, LENGTH = CS0_SPACE_MIRROR_PRV_LENGTH
  95. CS2_SPACE_MIRROR : ORIGIN = CS2_SPACE_MIRROR_PRV_START, LENGTH = CS2_SPACE_MIRROR_PRV_LENGTH
  96. CS3_SPACE_MIRROR : ORIGIN = CS3_SPACE_MIRROR_PRV_START, LENGTH = CS3_SPACE_MIRROR_PRV_LENGTH
  97. CS5_SPACE_MIRROR : ORIGIN = CS5_SPACE_MIRROR_PRV_START, LENGTH = CS5_SPACE_MIRROR_PRV_LENGTH
  98. xSPI0_CS0_SPACE : ORIGIN = xSPI0_CS0_SPACE_PRV_START, LENGTH = xSPI0_CS0_SPACE_PRV_LENGTH
  99. xSPI0_CS1_SPACE : ORIGIN = xSPI0_CS1_SPACE_PRV_START, LENGTH = xSPI0_CS1_SPACE_PRV_LENGTH
  100. xSPI1_CS0_SPACE : ORIGIN = xSPI1_CS0_SPACE_PRV_START, LENGTH = xSPI1_CS0_SPACE_PRV_LENGTH
  101. xSPI1_CS1_SPACE : ORIGIN = xSPI1_CS1_SPACE_PRV_START, LENGTH = xSPI1_CS1_SPACE_PRV_LENGTH
  102. CS0_SPACE : ORIGIN = CS0_SPACE_PRV_START, LENGTH = CS0_SPACE_PRV_LENGTH
  103. CS2_SPACE : ORIGIN = CS2_SPACE_PRV_START, LENGTH = CS2_SPACE_PRV_LENGTH
  104. CS3_SPACE : ORIGIN = CS3_SPACE_PRV_START, LENGTH = CS3_SPACE_PRV_LENGTH
  105. CS5_SPACE : ORIGIN = CS5_SPACE_PRV_START, LENGTH = CS5_SPACE_PRV_LENGTH
  106. RAM : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
  107. LOADER_STACK : ORIGIN = LOADER_START, LENGTH = LOADER_LENGTH
  108. DUMMY : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
  109. DATA_NONCACHE : ORIGIN = DATA_NONCACHE_START, LENGTH = DATA_NONCACHE_LENGTH
  110. DMAC_LINK_MODE : ORIGIN = DMAC_LINK_MODE_START, LENGTH = DMAC_LINK_MODE_LENGTH
  111. SHARED_NONCACHE_BUFFER : ORIGIN = SHARED_NONCACHE_BUFFER_START, LENGTH = SHARED_NONCACHE_BUFFER_LENGTH
  112. NONCACHE_BUFFER : ORIGIN = NONCACHE_BUFFER_START, LENGTH = NONCACHE_BUFFER_LENGTH
  113. }
  114. SECTIONS
  115. {
  116. .loader_param LOADER_PARAM_ADDRESS : AT (LOADER_PARAM_ADDRESS)
  117. {
  118. KEEP(*(.loader_param))
  119. } > xSPI0_CS0_SPACE
  120. .flash_contents FLASH_CONTENTS_ADDRESS : AT (FLASH_CONTENTS_ADDRESS)
  121. {
  122. _mloader_text = .;
  123. . = . + (_loader_text_end - _loader_text_start);
  124. _mloader_data = .;
  125. . = . + (_loader_data_end - _loader_data_start);
  126. _mfvector = .;
  127. . = . + (_fvector_end - _fvector_start);
  128. _mtext = .;
  129. . = . + (_text_end - _text_start);
  130. _mdummy = .;
  131. . = . + (_dummy_end - _dummy_start);
  132. _mdata = .;
  133. . = . + (_data_end - _data_start);
  134. _mdata_noncache = .;
  135. . = . + (_data_noncache_end - _data_noncache_start);
  136. flash_contents_end = .;
  137. } > xSPI0_CS0_SPACE
  138. .loader_text LOADER_TEXT_ADDRESS : AT (_mloader_text)
  139. {
  140. _loader_text_start = .;
  141. *(.loader_text)
  142. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.text*)
  143. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.text*)
  144. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.text*)
  145. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.text*)
  146. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.text*)
  147. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
  148. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
  149. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
  150. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
  151. build/rzn/fsp/src/r_ioport/r_ioport.o(.text*)
  152. KEEP(*(.warm_start))
  153. . = . + (512 - ((. - _loader_text_start) % 512));
  154. _loader_text_end = .;
  155. } > LOADER_STACK
  156. .loader_data : AT (_mloader_data)
  157. {
  158. _loader_data_start = .;
  159. __loader_data_start = .;
  160. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.data*)
  161. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.rodata*)
  162. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.data*)
  163. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.data*)
  164. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.data*)
  165. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
  166. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
  167. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
  168. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
  169. build/rzn/fsp/src/r_ioport/r_ioport.o(.data*)
  170. . = ALIGN(4);
  171. __loader_data_end = .;
  172. __loader_bss_start = .;
  173. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.bss*)
  174. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.bss*)
  175. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.bss*)
  176. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.bss*)
  177. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.bss*)
  178. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
  179. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
  180. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
  181. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
  182. build/rzn/fsp/src/r_ioport/r_ioport.o(.bss*)
  183. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
  184. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(COMMON)
  185. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
  186. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
  187. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
  188. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
  189. build/rzn/fsp/src/r_ioport/r_ioport.o(.COMMON)
  190. . = ALIGN(4);
  191. __loader_bss_end = . ;
  192. _loader_data_end = .;
  193. } > LOADER_STACK
  194. .intvec INTVEC_ADDRESS : AT (_mfvector)
  195. {
  196. _fvector_start = .;
  197. KEEP(*(.intvec))
  198. _fvector_end = .;
  199. } > RAM
  200. .text TEXT_ADDRESS : AT (_mtext)
  201. {
  202. _text_start = .;
  203. *(.text*)
  204. KEEP(*(.reset_handler))
  205. KEEP(*(.init))
  206. KEEP(*(.fini))
  207. /* .ctors */
  208. *crtbegin.o(.ctors)
  209. *crtbegin?.o(.ctors)
  210. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
  211. *(SORT(.ctors.*))
  212. *(.ctors)
  213. _ctor_end = .;
  214. /* .dtors */
  215. *crtbegin.o(.dtors)
  216. *crtbegin?.o(.dtors)
  217. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
  218. *(SORT(.dtors.*))
  219. *(.dtors)
  220. _dtor_end = .;
  221. /* section information for utest */
  222. . = ALIGN(4);
  223. __rt_utest_tc_tab_start = .;
  224. KEEP(*(UtestTcTab))
  225. __rt_utest_tc_tab_end = .;
  226. /* section information for finsh shell */
  227. . = ALIGN(4);
  228. __fsymtab_start = .;
  229. KEEP(*(FSymTab))
  230. __fsymtab_end = .;
  231. . = ALIGN(4);
  232. __vsymtab_start = .;
  233. KEEP(*(VSymTab))
  234. __vsymtab_end = .;
  235. /* section information for initial. */
  236. . = ALIGN(4);
  237. __rt_init_start = .;
  238. KEEP(*(SORT(.rti_fn*)))
  239. __rt_init_end = .;
  240. /* new GCC version uses .init_array */
  241. PROVIDE(__ctors_start__ = .);
  242. KEEP (*(SORT(.init_array.*)))
  243. KEEP (*(.init_array))
  244. PROVIDE(__ctors_end__ = .);
  245. . = ALIGN(4);
  246. KEEP(*(FalPartTable))
  247. KEEP(*(.eh_frame*))
  248. } > RAM
  249. .rvectors :
  250. {
  251. _rvectors_start = .;
  252. KEEP(*(.rvectors))
  253. _rvectors_end = .;
  254. } > RAM
  255. .ARM.extab :
  256. {
  257. *(.ARM.extab* .gnu.linkonce.armextab.*)
  258. } > RAM
  259. __exidx_start = .;
  260. .ARM.exidx :
  261. {
  262. *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  263. } > RAM
  264. __exidx_end = .;
  265. .got :
  266. {
  267. *(.got)
  268. *(.got.plt)
  269. . = ALIGN(4);
  270. _text_end = .;
  271. } > RAM
  272. .dummy _fvector_end : AT (_mdummy)
  273. {
  274. _dummy_start = .;
  275. KEEP(*(.dummy));
  276. _dummy_end = .;
  277. } > DUMMY
  278. .data : AT (_mdata)
  279. {
  280. _data_start = .;
  281. *(vtable)
  282. *(.data.*)
  283. *(.data)
  284. *(.rodata*)
  285. _erodata = .;
  286. . = ALIGN(4);
  287. /* preinit data */
  288. PROVIDE_HIDDEN (__preinit_array_start = .);
  289. KEEP(*(.preinit_array))
  290. PROVIDE_HIDDEN (__preinit_array_end = .);
  291. . = ALIGN(4);
  292. /* init data */
  293. PROVIDE_HIDDEN (__init_array_start = .);
  294. KEEP(*(SORT(.init_array.*)))
  295. KEEP(*(.init_array))
  296. PROVIDE_HIDDEN (__init_array_end = .);
  297. . = ALIGN(4);
  298. /* finit data */
  299. PROVIDE_HIDDEN (__fini_array_start = .);
  300. KEEP(*(SORT(.fini_array.*)))
  301. KEEP(*(.fini_array))
  302. PROVIDE_HIDDEN (__fini_array_end = .);
  303. KEEP(*(.jcr*))
  304. . = ALIGN(4);
  305. /* All data end */
  306. _data_end = .;
  307. } > RAM
  308. .bss :
  309. {
  310. . = ALIGN(4);
  311. __bss_start__ = .;
  312. _bss = .;
  313. *(.bss*)
  314. *(COMMON)
  315. . = ALIGN(4);
  316. __bss_end__ = .;
  317. _ebss = .;
  318. _end = .;
  319. } > RAM
  320. .heap (NOLOAD) :
  321. {
  322. . = ALIGN(8);
  323. __HeapBase = .;
  324. /* Place the STD heap here. */
  325. KEEP(*(.heap))
  326. __HeapLimit = .;
  327. } > RAM
  328. .thread_stack (NOLOAD):
  329. {
  330. . = ALIGN(8);
  331. __ThreadStackBase = .;
  332. /* Place the Thread stacks here. */
  333. KEEP(*(.stack*))
  334. __ThreadStackLimit = .;
  335. } > RAM
  336. .sys_stack (NOLOAD) :
  337. {
  338. . = ALIGN(8);
  339. __SysStackBase = .;
  340. /* Place the sys_stack here. */
  341. KEEP(*(.sys_stack))
  342. __SysStackLimit = .;
  343. } > LOADER_STACK
  344. .svc_stack (NOLOAD) :
  345. {
  346. . = ALIGN(8);
  347. __SvcStackBase = .;
  348. /* Place the svc_stack here. */
  349. KEEP(*(.svc_stack))
  350. __SvcStackLimit = .;
  351. } > LOADER_STACK
  352. .irq_stack (NOLOAD) :
  353. {
  354. . = ALIGN(8);
  355. __IrqStackBase = .;
  356. /* Place the irq_stack here. */
  357. KEEP(*(.irq_stack))
  358. __IrqStackLimit = .;
  359. } > LOADER_STACK
  360. .fiq_stack (NOLOAD) :
  361. {
  362. . = ALIGN(8);
  363. __FiqStackBase = .;
  364. /* Place the fiq_stack here. */
  365. KEEP(*(.fiq_stack))
  366. __FiqStackLimit = .;
  367. } > LOADER_STACK
  368. .und_stack (NOLOAD) :
  369. {
  370. . = ALIGN(8);
  371. __UndStackBase = .;
  372. /* Place the und_stack here. */
  373. KEEP(*(.und_stack))
  374. __UndStackLimit = .;
  375. } > LOADER_STACK
  376. .abt_stack (NOLOAD) :
  377. {
  378. . = ALIGN(8);
  379. __AbtStackBase = .;
  380. /* Place the abt_stack here. */
  381. KEEP(*(.abt_stack))
  382. __AbtStackLimit = .;
  383. } > LOADER_STACK
  384. .data_noncache DATA_NONCACHE_START : AT (_mdata_noncache)
  385. {
  386. . = ALIGN(4);
  387. _data_noncache_start = .;
  388. KEEP(*(.data_noncache*))
  389. _data_noncache_end = .;
  390. } > DATA_NONCACHE
  391. .dmac_link_mode DMAC_LINK_MODE_START : AT (DMAC_LINK_MODE_START)
  392. {
  393. . = ALIGN(4);
  394. _DmacLinkMode_start = .;
  395. KEEP(*(.dmac_link_mode*))
  396. _DmacLinkMode_end = .;
  397. } > DMAC_LINK_MODE
  398. .shared_noncache_buffer SHARED_NONCACHE_BUFFER_START (NOLOAD) : AT (SHARED_NONCACHE_BUFFER_START)
  399. {
  400. . = ALIGN(32);
  401. _sncbuffer_start = .;
  402. KEEP(*(.shared_noncache_buffer*))
  403. _sncbuffer_end = .;
  404. } > SHARED_NONCACHE_BUFFER
  405. .noncache_buffer NONCACHE_BUFFER_START (NOLOAD) : AT (NONCACHE_BUFFER_START)
  406. {
  407. . = ALIGN(32);
  408. _ncbuffer_start = .;
  409. KEEP(*(.noncache_buffer*))
  410. _ncbuffer_end = .;
  411. } > NONCACHE_BUFFER
  412. }