RealThread_GD32H7.yaml 26 KB

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  1. ---
  2. vendor: RealThread
  3. dvendor: GigaDevice
  4. name: GD32H7
  5. version: 2.0.0
  6. yaml_version: 1
  7. type: Chip_Support_Packages
  8. family_name: GD32
  9. series:
  10. description: |-
  11. GigaDevice's GD32H7 series of high-performance MCUs are based on the ARM Cortex-M7 core. These MCUs feature high processing power, rich peripherals, and multiple high-speed interfaces, making them ideal for demanding applications requiring intensive computing and real-time performance.
  12. Typical applications include industrial control, motor drives, digital power supplies, medical equipment, and advanced IoT devices.
  13. - Up to 600MHz CPU frequency
  14. - FPU and DSP instructions
  15. - L1 cache (I-Cache and D-Cache)
  16. - Multi-layer AHB bus matrix
  17. - Rich analog and digital peripherals
  18. - Multiple high-speed communication interfaces
  19. series_name: GD32H7
  20. peripheral: {}
  21. sub_series:
  22. - sub_series_name: GD32H759
  23. cpu_info:
  24. max_clock: '600000000'
  25. chips:
  26. - chip_name: GD32H759IG
  27. peripheral: {}
  28. memory:
  29. - id: IROM1
  30. start: '0x8000000'
  31. size: '0x100000'
  32. default: '1'
  33. - id: IRAM1
  34. start: '0x24000000'
  35. size: '0xD0000'
  36. init: '0'
  37. default: '1'
  38. compiler:
  39. gcc:
  40. entry_point: Reset_Handler
  41. link_script: linkscripts/GD32H759IG/link.ld
  42. marco:
  43. - GD32H7XX
  44. files:
  45. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  46. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  47. armcc:
  48. entry_point: none
  49. link_script: none
  50. marco: []
  51. files: []
  52. iarcc:
  53. entry_point: none
  54. link_script: none
  55. marco: []
  56. files: []
  57. - chip_name: GD32H759II
  58. peripheral: {}
  59. memory:
  60. - id: IROM1
  61. start: '0x8000000'
  62. size: '0x200000'
  63. default: '1'
  64. - id: IRAM1
  65. start: '0x24000000'
  66. size: '0xD0000'
  67. init: '0'
  68. default: '1'
  69. compiler:
  70. gcc:
  71. entry_point: Reset_Handler
  72. link_script: linkscripts/GD32H759II/link.ld
  73. marco:
  74. - GD32H7XX
  75. files:
  76. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  77. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  78. armcc:
  79. entry_point: none
  80. link_script: none
  81. marco: []
  82. files: []
  83. iarcc:
  84. entry_point: none
  85. link_script: none
  86. marco: []
  87. files: []
  88. - chip_name: GD32H759IM
  89. peripheral: {}
  90. memory:
  91. - id: IROM1
  92. start: '0x8000000'
  93. size: '0x3C0000'
  94. default: '1'
  95. - id: IRAM1
  96. start: '0x24000000'
  97. size: '0x80000'
  98. init: '0'
  99. default: '1'
  100. compiler:
  101. gcc:
  102. entry_point: Reset_Handler
  103. link_script: linkscripts/GD32H759IM/link.ld
  104. marco:
  105. - GD32H7XX
  106. files:
  107. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  108. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  109. armcc:
  110. entry_point: none
  111. link_script: none
  112. marco: []
  113. files: []
  114. iarcc:
  115. entry_point: none
  116. link_script: none
  117. marco: []
  118. files: []
  119. ui:
  120. uart:
  121. default_value: UART1
  122. prompt_message_en: select one uart as console output interface
  123. prompt_message_zh: 选择一个串口作为控制台信息输出接口
  124. tx_pin:
  125. default_value: PA9
  126. prompt_message_en: 'set the tx pin name of the console device interface, the
  127. value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
  128. prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2,
  129. PB6
  130. rx_pin:
  131. default_value: PA10
  132. prompt_message_en: 'set the rx pin name of the console device interface, the
  133. value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
  134. prompt_message_zh: 设置控制台设备的数据发送引脚的名称,名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2, PB6
  135. docs:
  136. - file: documents\GD32H737_757_759_User_manual.pdf
  137. title: GD32H737_757_759 User manual
  138. svd:
  139. file: debug/svd/GD32H7xx.svd
  140. project_type:
  141. bare_metal:
  142. function_map:
  143. clk_init: none
  144. sysTick: none
  145. marco:
  146. - SOC_FAMILY_GD32
  147. - SOC_SERIES_GD32H7
  148. - SOC_SERIES_GD32H7xx
  149. source_files:
  150. - drivers/baremetal
  151. rtt_nano:
  152. function_map:
  153. clk_init: none
  154. heap_init: none
  155. marco:
  156. - SOC_FAMILY_GD32
  157. - SOC_SERIES_GD32H7
  158. - SOC_SERIES_GD32H7xx
  159. source_files:
  160. - drivers/nano
  161. rtt:
  162. function_map:
  163. rt_hw_board_init;: none
  164. heap_init: none
  165. marco:
  166. - SOC_FAMILY_GD32
  167. - SOC_SERIES_GD32H7
  168. - SOC_SERIES_GD32H7xx
  169. source_files:
  170. - drivers/rtt
  171. - drivers/rtt/usb
  172. source_files:
  173. file:
  174. # SOC_SERIES_GD32H7xx
  175. - libraries/GD32H7xx_standard_peripheral
  176. - libraries/CMSIS/GD/GD32H7xx/Include/system_gd32h7xx.h
  177. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  178. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx_libopt.h
  179. - libraries/CMSIS/GD/GD32H7xx/Source/system_gd32h7xx.c
  180. # 通用CMSIS文件
  181. - libraries/CMSIS/core_cm7.h
  182. - libraries/CMSIS/cmsis_compiler.h
  183. - libraries/CMSIS/cmsis_version.h
  184. - libraries/CMSIS/cmsis_gcc.h
  185. - libraries/CMSIS/mpu_armv7.h
  186. - libraries/CMSIS/cachel1_armv7.h
  187. - sub_series_name: GD32H757
  188. cpu_info:
  189. max_clock: '600000000'
  190. chips:
  191. - chip_name: GD32H757VG
  192. peripheral: {}
  193. memory:
  194. - id: IROM1
  195. start: '0x8000000'
  196. size: '0x100000'
  197. default: '1'
  198. - id: IRAM1
  199. start: '0x24000000'
  200. size: '0xD0000'
  201. init: '0'
  202. default: '1'
  203. compiler:
  204. gcc:
  205. entry_point: Reset_Handler
  206. link_script: linkscripts/GD32H757VG/link.ld
  207. marco:
  208. - GD32H7XX
  209. files:
  210. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  211. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  212. armcc:
  213. entry_point: none
  214. link_script: none
  215. marco: []
  216. files: []
  217. iarcc:
  218. entry_point: none
  219. link_script: none
  220. marco: []
  221. files: []
  222. - chip_name: GD32H757VI
  223. peripheral: {}
  224. memory:
  225. - id: IROM1
  226. start: '0x8000000'
  227. size: '0x200000'
  228. default: '1'
  229. - id: IRAM1
  230. start: '0x24000000'
  231. size: '0xD0000'
  232. init: '0'
  233. default: '1'
  234. compiler:
  235. gcc:
  236. entry_point: Reset_Handler
  237. link_script: linkscripts/GD32H757VI/link.ld
  238. marco:
  239. - GD32H7XX
  240. files:
  241. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  242. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  243. armcc:
  244. entry_point: none
  245. link_script: none
  246. marco: []
  247. files: []
  248. iarcc:
  249. entry_point: none
  250. link_script: none
  251. marco: []
  252. files: []
  253. - chip_name: GD32H757VM
  254. peripheral: {}
  255. memory:
  256. - id: IROM1
  257. start: '0x8000000'
  258. size: '0x3C0000'
  259. default: '1'
  260. - id: IRAM1
  261. start: '0x24000000'
  262. size: '0xD0000'
  263. init: '0'
  264. default: '1'
  265. compiler:
  266. gcc:
  267. entry_point: Reset_Handler
  268. link_script: linkscripts/GD32H757VM/link.ld
  269. marco:
  270. - GD32H7XX
  271. files:
  272. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  273. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  274. armcc:
  275. entry_point: none
  276. link_script: none
  277. marco: []
  278. files: []
  279. iarcc:
  280. entry_point: none
  281. link_script: none
  282. marco: []
  283. files: []
  284. - chip_name: GD32H757ZG
  285. peripheral: {}
  286. memory:
  287. - id: IROM1
  288. start: '0x8000000'
  289. size: '0x100000'
  290. default: '1'
  291. - id: IRAM1
  292. start: '0x24000000'
  293. size: '0xD0000'
  294. init: '0'
  295. default: '1'
  296. compiler:
  297. gcc:
  298. entry_point: Reset_Handler
  299. link_script: linkscripts/GD32H757ZG/link.ld
  300. marco:
  301. - GD32H7XX
  302. files:
  303. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  304. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  305. armcc:
  306. entry_point: none
  307. link_script: none
  308. marco: []
  309. files: []
  310. iarcc:
  311. entry_point: none
  312. link_script: none
  313. marco: []
  314. files: []
  315. - chip_name: GD32H757ZI
  316. peripheral: {}
  317. memory:
  318. - id: IROM1
  319. start: '0x8000000'
  320. size: '0x200000'
  321. default: '1'
  322. - id: IRAM1
  323. start: '0x24000000'
  324. size: '0xD0000'
  325. init: '0'
  326. default: '1'
  327. compiler:
  328. gcc:
  329. entry_point: Reset_Handler
  330. link_script: linkscripts/GD32H757ZI/link.ld
  331. marco:
  332. - GD32H7XX
  333. files:
  334. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  335. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  336. armcc:
  337. entry_point: none
  338. link_script: none
  339. marco: []
  340. files: []
  341. iarcc:
  342. entry_point: none
  343. link_script: none
  344. marco: []
  345. files: []
  346. - chip_name: GD32H757ZM
  347. peripheral: {}
  348. memory:
  349. - id: IROM1
  350. start: '0x8000000'
  351. size: '0x3C0000'
  352. default: '1'
  353. - id: IRAM1
  354. start: '0x24000000'
  355. size: '0xD0000'
  356. init: '0'
  357. default: '1'
  358. compiler:
  359. gcc:
  360. entry_point: Reset_Handler
  361. link_script: linkscripts/GD32H757ZM/link.ld
  362. marco:
  363. - GD32H7XX
  364. files:
  365. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  366. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  367. armcc:
  368. entry_point: none
  369. link_script: none
  370. marco: []
  371. files: []
  372. iarcc:
  373. entry_point: none
  374. link_script: none
  375. marco: []
  376. files: []
  377. ui:
  378. uart:
  379. default_value: UART1
  380. prompt_message_en: select one uart as console output interface
  381. prompt_message_zh: 选择一个串口作为控制台信息输出接口
  382. tx_pin:
  383. default_value: PA9
  384. prompt_message_en: 'set the tx pin name of the console device interface, the
  385. value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
  386. prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2,
  387. PB6
  388. rx_pin:
  389. default_value: PA10
  390. prompt_message_en: 'set the rx pin name of the console device interface, the
  391. value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
  392. prompt_message_zh: 设置控制台设备的数据发送引脚的名称,名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2, PB6
  393. docs:
  394. - file: documents\GD32H737_757_759_User_manual.pdf
  395. title: GD32H737_757_759 User manual
  396. svd:
  397. file: debug/svd/GD32H7xx.svd
  398. project_type:
  399. bare_metal:
  400. function_map:
  401. clk_init: none
  402. sysTick: none
  403. marco:
  404. - SOC_FAMILY_GD32
  405. - SOC_SERIES_GD32H7
  406. - SOC_SERIES_GD32H7xx
  407. source_files:
  408. - drivers/baremetal
  409. rtt_nano:
  410. function_map:
  411. clk_init: none
  412. heap_init: none
  413. marco:
  414. - SOC_FAMILY_GD32
  415. - SOC_SERIES_GD32H7
  416. - SOC_SERIES_GD32H7xx
  417. source_files:
  418. - drivers/nano
  419. rtt:
  420. function_map:
  421. rt_hw_board_init;: none
  422. heap_init: none
  423. marco:
  424. - SOC_FAMILY_GD32
  425. - SOC_SERIES_GD32H7
  426. - SOC_SERIES_GD32H7xx
  427. source_files:
  428. - drivers/rtt
  429. - drivers/rtt/usb
  430. source_files:
  431. file:
  432. # SOC_SERIES_GD32H7xx
  433. - libraries/GD32H7xx_standard_peripheral
  434. - libraries/CMSIS/GD/GD32H7xx/Include/system_gd32h7xx.h
  435. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  436. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx_libopt.h
  437. - libraries/CMSIS/GD/GD32H7xx/Source/system_gd32h7xx.c
  438. # 通用CMSIS文件
  439. - libraries/CMSIS/core_cm7.h
  440. - libraries/CMSIS/cmsis_compiler.h
  441. - libraries/CMSIS/cmsis_version.h
  442. - libraries/CMSIS/cmsis_gcc.h
  443. - libraries/CMSIS/mpu_armv7.h
  444. - libraries/CMSIS/cachel1_armv7.h
  445. - sub_series_name: GD32H737
  446. cpu_info:
  447. max_clock: '600000000'
  448. chips:
  449. - chip_name: GD32H737IG
  450. peripheral: {}
  451. memory:
  452. - id: IROM1
  453. start: '0x8000000'
  454. size: '0x100000'
  455. default: '1'
  456. - id: IRAM1
  457. start: '0x24000000'
  458. size: '0xD0000'
  459. init: '0'
  460. default: '1'
  461. compiler:
  462. gcc:
  463. entry_point: Reset_Handler
  464. link_script: linkscripts/GD32H737IG/link.ld
  465. marco:
  466. - GD32H7XX
  467. files:
  468. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  469. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  470. armcc:
  471. entry_point: none
  472. link_script: none
  473. marco: []
  474. files: []
  475. iarcc:
  476. entry_point: none
  477. link_script: none
  478. marco: []
  479. files: []
  480. - chip_name: GD32H737II
  481. peripheral: {}
  482. memory:
  483. - id: IROM1
  484. start: '0x8000000'
  485. size: '0x200000'
  486. default: '1'
  487. - id: IRAM1
  488. start: '0x24000000'
  489. size: '0xD0000'
  490. init: '0'
  491. default: '1'
  492. compiler:
  493. gcc:
  494. entry_point: Reset_Handler
  495. link_script: linkscripts/GD32H737II/link.ld
  496. marco:
  497. - GD32H7XX
  498. files:
  499. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  500. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  501. armcc:
  502. entry_point: none
  503. link_script: none
  504. marco: []
  505. files: []
  506. iarcc:
  507. entry_point: none
  508. link_script: none
  509. marco: []
  510. files: []
  511. - chip_name: GD32H737IM
  512. peripheral: {}
  513. memory:
  514. - id: IROM1
  515. start: '0x8000000'
  516. size: '0x3C0000'
  517. default: '1'
  518. - id: IRAM1
  519. start: '0x24000000'
  520. size: '0xD0000'
  521. init: '0'
  522. default: '1'
  523. compiler:
  524. gcc:
  525. entry_point: Reset_Handler
  526. link_script: linkscripts/GD32H737IM/link.ld
  527. marco:
  528. - GD32H7XX
  529. files:
  530. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  531. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  532. armcc:
  533. entry_point: none
  534. link_script: none
  535. marco: []
  536. files: []
  537. iarcc:
  538. entry_point: none
  539. link_script: none
  540. marco: []
  541. files: []
  542. - chip_name: GD32H737VG
  543. peripheral: {}
  544. memory:
  545. - id: IROM1
  546. start: '0x8000000'
  547. size: '0x100000'
  548. default: '1'
  549. - id: IRAM1
  550. start: '0x24000000'
  551. size: '0xD0000'
  552. init: '0'
  553. default: '1'
  554. compiler:
  555. gcc:
  556. entry_point: Reset_Handler
  557. link_script: linkscripts/GD32H737VG/link.ld
  558. marco:
  559. - GD32H7XX
  560. files:
  561. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  562. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  563. armcc:
  564. entry_point: none
  565. link_script: none
  566. marco: []
  567. files: []
  568. iarcc:
  569. entry_point: none
  570. link_script: none
  571. marco: []
  572. files: []
  573. - chip_name: GD32H737VI
  574. peripheral: {}
  575. memory:
  576. - id: IROM1
  577. start: '0x8000000'
  578. size: '0x200000'
  579. default: '1'
  580. - id: IRAM1
  581. start: '0x24000000'
  582. size: '0xD0000'
  583. init: '0'
  584. default: '1'
  585. compiler:
  586. gcc:
  587. entry_point: Reset_Handler
  588. link_script: linkscripts/GD32H737VI/link.ld
  589. marco:
  590. - GD32H7XX
  591. files:
  592. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  593. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  594. armcc:
  595. entry_point: none
  596. link_script: none
  597. marco: []
  598. files: []
  599. iarcc:
  600. entry_point: none
  601. link_script: none
  602. marco: []
  603. files: []
  604. - chip_name: GD32H737VM
  605. peripheral: {}
  606. memory:
  607. - id: IROM1
  608. start: '0x8000000'
  609. size: '0x3C0000'
  610. default: '1'
  611. - id: IRAM1
  612. start: '0x24000000'
  613. size: '0xD0000'
  614. init: '0'
  615. default: '1'
  616. compiler:
  617. gcc:
  618. entry_point: Reset_Handler
  619. link_script: linkscripts/GD32H737VM/link.ld
  620. marco:
  621. - GD32H7XX
  622. files:
  623. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  624. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  625. armcc:
  626. entry_point: none
  627. link_script: none
  628. marco: []
  629. files: []
  630. iarcc:
  631. entry_point: none
  632. link_script: none
  633. marco: []
  634. files: []
  635. - chip_name: GD32H737ZG
  636. peripheral: {}
  637. memory:
  638. - id: IROM1
  639. start: '0x8000000'
  640. size: '0x100000'
  641. default: '1'
  642. - id: IRAM1
  643. start: '0x24000000'
  644. size: '0xD0000'
  645. init: '0'
  646. default: '1'
  647. compiler:
  648. gcc:
  649. entry_point: Reset_Handler
  650. link_script: linkscripts/GD32H737ZG/link.ld
  651. marco:
  652. - GD32H7XX
  653. files:
  654. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  655. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  656. armcc:
  657. entry_point: none
  658. link_script: none
  659. marco: []
  660. files: []
  661. iarcc:
  662. entry_point: none
  663. link_script: none
  664. marco: []
  665. files: []
  666. - chip_name: GD32H737ZI
  667. peripheral: {}
  668. memory:
  669. - id: IROM1
  670. start: '0x8000000'
  671. size: '0x200000'
  672. default: '1'
  673. - id: IRAM1
  674. start: '0x24000000'
  675. size: '0xD0000'
  676. init: '0'
  677. default: '1'
  678. compiler:
  679. gcc:
  680. entry_point: Reset_Handler
  681. link_script: linkscripts/GD32H737ZI/link.ld
  682. marco:
  683. - GD32H7XX
  684. files:
  685. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  686. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  687. armcc:
  688. entry_point: none
  689. link_script: none
  690. marco: []
  691. files: []
  692. iarcc:
  693. entry_point: none
  694. link_script: none
  695. marco: []
  696. files: []
  697. - chip_name: GD32H737ZM
  698. peripheral: {}
  699. memory:
  700. - id: IROM1
  701. start: '0x8000000'
  702. size: '0x3C0000'
  703. default: '1'
  704. - id: IRAM1
  705. start: '0x24000000'
  706. size: '0xD0000'
  707. init: '0'
  708. default: '1'
  709. compiler:
  710. gcc:
  711. entry_point: Reset_Handler
  712. link_script: linkscripts/GD32H737ZM/link.ld
  713. marco:
  714. - GD32H7XX
  715. files:
  716. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  717. - libraries/CMSIS/GD/GD32H7xx/Source/GCC/startup_gd32h7xx.s
  718. armcc:
  719. entry_point: none
  720. link_script: none
  721. marco: []
  722. files: []
  723. iarcc:
  724. entry_point: none
  725. link_script: none
  726. marco: []
  727. files: []
  728. ui:
  729. uart:
  730. default_value: UART1
  731. prompt_message_en: select one uart as console output interface
  732. prompt_message_zh: 选择一个串口作为控制台信息输出接口
  733. tx_pin:
  734. default_value: PA9
  735. prompt_message_en: 'set the tx pin name of the console device interface, the
  736. value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
  737. prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2,
  738. PB6
  739. rx_pin:
  740. default_value: PA10
  741. prompt_message_en: 'set the rx pin name of the console device interface, the
  742. value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
  743. prompt_message_zh: 设置控制台设备的数据发送引脚的名称,名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2, PB6
  744. docs:
  745. - file: documents\GD32H737_757_759_User_manual.pdf
  746. title: GD32H737_757_759 User manual
  747. svd:
  748. file: debug/svd/GD32H7xx.svd
  749. project_type:
  750. bare_metal:
  751. function_map:
  752. clk_init: none
  753. sysTick: none
  754. marco:
  755. - SOC_FAMILY_GD32
  756. - SOC_SERIES_GD32H7
  757. - SOC_SERIES_GD32H7xx
  758. source_files:
  759. - drivers/baremetal
  760. rtt_nano:
  761. function_map:
  762. clk_init: none
  763. heap_init: none
  764. marco:
  765. - SOC_FAMILY_GD32
  766. - SOC_SERIES_GD32H7
  767. - SOC_SERIES_GD32H7xx
  768. source_files:
  769. - drivers/nano
  770. rtt:
  771. function_map:
  772. rt_hw_board_init;: none
  773. heap_init: none
  774. marco:
  775. - SOC_FAMILY_GD32
  776. - SOC_SERIES_GD32H7
  777. - SOC_SERIES_GD32H7xx
  778. source_files:
  779. - drivers/rtt
  780. - drivers/rtt/usb
  781. source_files:
  782. file:
  783. # SOC_SERIES_GD32H7xx
  784. - libraries/GD32H7xx_standard_peripheral
  785. - libraries/CMSIS/GD/GD32H7xx/Include/system_gd32h7xx.h
  786. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx.h
  787. - libraries/CMSIS/GD/GD32H7xx/Include/gd32h7xx_libopt.h
  788. - libraries/CMSIS/GD/GD32H7xx/Source/system_gd32h7xx.c
  789. # 通用CMSIS文件
  790. - libraries/CMSIS/core_cm7.h
  791. - libraries/CMSIS/cmsis_compiler.h
  792. - libraries/CMSIS/cmsis_version.h
  793. - libraries/CMSIS/cmsis_gcc.h
  794. - libraries/CMSIS/mpu_armv7.h
  795. - libraries/CMSIS/cachel1_armv7.h
  796. - sub_series_name: GD32H75E
  797. cpu_info:
  798. max_clock: '600000000'
  799. chips:
  800. - chip_name: GD32H75EYMJ7
  801. peripheral: {}
  802. memory:
  803. - id: IROM1
  804. start: '0x8000000'
  805. size: '0x3C0000'
  806. default: '1'
  807. - id: IRAM1
  808. start: '0x24000000'
  809. size: '0x80000'
  810. init: '0'
  811. default: '1'
  812. compiler:
  813. gcc:
  814. entry_point: Reset_Handler
  815. link_script: linkscripts/GD32H75EYM/link.ld
  816. marco:
  817. - GD32H75E
  818. files:
  819. - libraries/CMSIS/GD/GD32H75E/Include/gd32h75e.h
  820. - libraries/CMSIS/GD/GD32H75E/Source/GCC/startup_gd32h75e.s
  821. armcc:
  822. entry_point: none
  823. link_script: none
  824. marco: []
  825. files: []
  826. iarcc:
  827. entry_point: none
  828. link_script: none
  829. marco: []
  830. files: []
  831. ui:
  832. uart:
  833. default_value: UART1
  834. prompt_message_en: select one uart as console output interface
  835. prompt_message_zh: 选择一个串口作为控制台信息输出接口
  836. tx_pin:
  837. default_value: PA9
  838. prompt_message_en: 'set the tx pin name of the console device interface, the
  839. value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
  840. prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2,
  841. PB6
  842. rx_pin:
  843. default_value: PA10
  844. prompt_message_en: 'set the rx pin name of the console device interface, the
  845. value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
  846. prompt_message_zh: 设置控制台设备的数据发送引脚的名称,名称应该具有以下格式“P+[端口名称][端口编号]”, 比如:PA2, PB6
  847. docs:
  848. - file: documents\GD32H75Exx_Datasheet_Rev1.2.pdf
  849. title: GD32H75Exx Datasheet
  850. svd:
  851. file: debug/svd/GD32H75E.svd
  852. project_type:
  853. bare_metal:
  854. function_map:
  855. clk_init: none
  856. sysTick: none
  857. marco:
  858. - SOC_FAMILY_GD32
  859. - SOC_SERIES_GD32H7
  860. - SOC_SERIES_GD32H75E
  861. source_files:
  862. - drivers/baremetal
  863. rtt_nano:
  864. function_map:
  865. clk_init: none
  866. heap_init: none
  867. marco:
  868. - SOC_FAMILY_GD32
  869. - SOC_SERIES_GD32H7
  870. - SOC_SERIES_GD32H75E
  871. source_files:
  872. - drivers/nano
  873. rtt:
  874. function_map:
  875. rt_hw_board_init;: none
  876. heap_init: none
  877. marco:
  878. - SOC_FAMILY_GD32
  879. - SOC_SERIES_GD32H7
  880. - SOC_SERIES_GD32H75E
  881. source_files:
  882. - drivers/rtt
  883. - drivers/rtt/usb
  884. source_files:
  885. file:
  886. # SOC_SERIES_GD32H75E
  887. - libraries/GD32H75E_standard_peripheral
  888. - libraries/CMSIS/GD/GD32H75E/Include/system_gd32h75e.h
  889. - libraries/CMSIS/GD/GD32H75E/Include/gd32h75e.h
  890. - libraries/CMSIS/GD/GD32H75E/Include/gd32h75e_libopt.h
  891. - libraries/CMSIS/GD/GD32H75E/Include/gd32h75e_err_report.h
  892. - libraries/CMSIS/GD/GD32H75E/Source/system_gd32h75e.c
  893. - libraries/CMSIS/GD/GD32H75E/Source/gd32h75e_err_report.c
  894. # 通用CMSIS文件
  895. - libraries/CMSIS/core_cm7.h
  896. - libraries/CMSIS/cmsis_compiler.h
  897. - libraries/CMSIS/cmsis_version.h
  898. - libraries/CMSIS/cmsis_gcc.h
  899. - libraries/CMSIS/mpu_armv7.h
  900. - libraries/CMSIS/cachel1_armv7.h
  901. cpu_info:
  902. core: Cortex-M7
  903. fpu: '1'
  904. mpu: '1'
  905. endian: Little-endian