sdk-csp-stm32g4/RealThread_STM32G4.yaml

---
vendor: RealThread
dvendor: STMicroelectronics
name: STM32G4
version: 0.1.9
yaml_version: 1
type: Chip_Support_Packages
family_name: STM32
series:
  description: |-
    The STM32G4xx devices have an Arm Cortex-M4 with FPU core. It has the following features:
    - using an adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory.
    - a frequency up to 170 MHz with 213 DMIPS,
    - including MPU and DSP instructions.
    - using 22 Kbytes of SRAM, with HW parity check implemented on the first 16 Kbytes; and  a Routine booster: 10 Kbytes of SRAM on instruction and data bus, with HW parity check (CCM SRAM).
    - communication interfaces: FDCAN, I2C, USART/UART, LPUART, SPI, SAI, USB 2.0, IRTIM, USB Type-C
  series_name: STM32G4
  peripheral: {}
  sub_series:
  - sub_series_name: STM32G431
    cpu_info:
      max_clock: '170000000'
    chips:
    - chip_name: STM32G431CBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431CBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431CBYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431CBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431KBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431KBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431KBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431RBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431RBIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431RBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431VBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431VBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431C8Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431C8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431C8Ux
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431C8Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431K8Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431K8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431K8Ux
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431K8Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431M8Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431M8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431R8Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431R8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431R8Ix
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431R8Ix\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431V8Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431V8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431C6Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431C6Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431C6Ux
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431C6Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431K6Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431K6Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431K6Ux
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431K6Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431M6Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431M6Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431R6Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431R6Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431R6Ix
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431R6Ix\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G431V6Tx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00008000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G431V6Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12589.pdf
      title: STM32G431xx Data Sheet
    svd:
      file: debug\svd\STM32G431xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G431xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g431xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g431xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00008000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G441
    cpu_info:
      max_clock: '150000000'
    chips:
    - chip_name: STM32G441CBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441CBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441CBYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441CBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441KBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441KBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441KBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441RBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441RBIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441RBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G441VBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G441VBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DocID031375.pdf
      title: STM32G441xx Data Brief
    svd:
      file: debug\svd\STM32G441xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G441xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g441xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g441xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00008000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G471
    cpu_info:
      max_clock: '170000000'
    chips:
    - chip_name: STM32G471CETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471CETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471CEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471METx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471METx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471MEYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471MEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471RE
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471RE\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VEHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VEHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VEIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471QETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471QETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471CCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471CCUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471MCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471MCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471QCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471QCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471RCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VCHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VCHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G471VCIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G471VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12728.pdf
      title: STM32G471xx Data Sheet
    svd:
      file: debug\svd\STM32G471xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G471xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g471xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g471xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G473
    cpu_info:
      max_clock: '150000000'
    chips:
    - chip_name: STM32G473CETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473CEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473METx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473METx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473MEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473MEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473RETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VEHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VEHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VEIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473QETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473QETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473CCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473CCUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473MCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473MCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473QCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473QCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473RCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VCHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VCHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VCIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473CBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473CBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473MBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473MBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473QBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473QBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473RBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VBHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VBHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G473VBIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G473VBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12712.pdf
      title: STM32G473xx Data Sheet
    svd:
      file: debug\svd\STM32G473xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G473xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g473xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g473xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G474
    cpu_info:
      max_clock: '170000000'
    chips:
    - chip_name: STM32G474CETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474CEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474RETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VEHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VEHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VEIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474METx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474METx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474MEYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474MEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474QETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474QETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474CCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474CCUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474MCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474MCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474QCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474QCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474RCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VCTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VCHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VCHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VCIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474CBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474CBUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474RBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VBHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VBHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VBIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474VBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474VBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474QBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474QBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G474MBTx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G474MBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12288.pdf
      title: STM32G474xx Data Sheet
    svd:
      file: debug\svd\STM32G474xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G474xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g474xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G483
    cpu_info:
      max_clock: '170000000'
    chips:
    - chip_name: STM32G483CETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483CETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483CEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483METx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483METx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483MEYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483MEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483RETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483VETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483VEHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483VEHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483VEIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G483QETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G483QETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12997.pdf
      title: STM32G483xx Data Sheet
    svd:
      file: debug\svd\STM32G483xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G484xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g484xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g484xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32G484
    cpu_info:
      max_clock: '150000000'
    chips:
    - chip_name: STM32G484CETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484CETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484CEUx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484RETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484VETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484VEIx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484VEHx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484VEHx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484METx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484METx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484MEYx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484MEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32G484QETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32G484QETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DocID031193.pdf
      title: STM32G484xx Data Brief
    svd:
      file: debug\svd\STM32G484xx.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32G484xx
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32g484xx.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g484xx.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32GBK1
    cpu_info:
      max_clock: '170000000'
    chips:
    - chip_name: STM32GBK1CB
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32GBK1CB\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: LPUART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA2
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2,
          PB6
      rx_pin:
        default_value: PA3
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    docs:
    - file: documents\DS12712.pdf
      title: STM32G473xx Data Sheet
    svd:
      file: debug\svd\STM32GBK1CBT6.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32GBK1CB
        files:
        - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\gcc\startup_stm32gbk1cb.S
        - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32gbk1cb.h
        - libraries\CMSIS\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00008000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32G4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  docs:
  - file: documents\dui0553a_cortex_m4_dgug.pdf
    title: Cortex-M4 Generic User Guide
  - file: documents\RM0440_STM32G4xx_rev0.7.pdf
    title: STM32G4xx Reference Manual
  source_files:
    file:
    - libraries\STM32G4xx_HAL_Driver
    - libraries\CMSIS\Include
    - libraries\CMSIS\RTOS
    - libraries\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h
    - libraries\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h
    - libraries\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c
  cpu_info:
    core: Cortex-M4
    fpu: '1'
    mpu: '1'
    endian: Little-endian
  ui:
    uart:
      default_value: LPUART1
      prompt_message_en: select one uart as console output interface
      prompt_message_zh: 选择一个串口作为控制台信息输出接口
    tx_pin:
      default_value: PA2
      prompt_message_en: 'set the tx pin name of the console device interface, the
        value should be with a format"P+[port name][pin number]",eg. PA2,PB6 '
      prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6
    rx_pin:
      default_value: PA3
      prompt_message_en: 'set the rx pin name of the console device interface, the
        value should be with a format"P+[port name][pin number]", eg. PA3, PB7 '
      prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA2, PB6