spear320cpu_mod.cfg 1.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Configuration for the ST SPEAr320 Evaluation board
  3. # EVAL_SPEAr320CPU Rev. 2.0, modified to enable SRST on JTAG connector
  4. # http://www.st.com/spear
  5. #
  6. # List of board modifications to enable SRST, as reported in
  7. # ST Application Note (FIXME: add reference).
  8. # - Modifications on the bottom layer:
  9. # 1. replace reset chip U7 with a STM6315SDW13F;
  10. # 2. add 0 ohm resistor R45. It is located close to JTAG connector.
  11. # 3. add a 10K ohm pull-up resistor on the reset wire named as
  12. # POWERGOOD in the schematic.
  13. #
  14. # The easier way to do modification 3, is to use a resistor in package
  15. # 0603 or 0402 and solder it between R15 and R45:
  16. # - one pad soldered with the pad of R15 connected to 3.3V (this
  17. # is the pad of R15 closer to R45)
  18. # - the other pad soldered with the nearest pad of R45.
  19. #
  20. # Date: 2011-11-18
  21. # Author: Antonio Borneo <borneo.antonio@gmail.com>
  22. # Modified boards has SRST on JTAG connector
  23. set BOARD_HAS_SRST 1
  24. source [find board/spear320cpu.cfg]