telo.cfg 1.6 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. source [find target/c100.cfg]
  3. # basic register definition for C100
  4. source [find target/c100regs.tcl]
  5. # board-config info
  6. source [find target/c100config.tcl]
  7. # C100 helper functions
  8. source [find target/c100helper.tcl]
  9. # Telo board & C100 support trst and srst
  10. # make the reset asserted to
  11. # allow RC circuit to discharge for: [ms]
  12. adapter srst pulse_width 100
  13. jtag_ntrst_assert_width 100
  14. # don't talk to JTAG after reset for: [ms]
  15. adapter srst delay 100
  16. jtag_ntrst_delay 100
  17. reset_config trst_and_srst separate
  18. # issue telnet: reset init
  19. # issue gdb: monitor reset init
  20. $_TARGETNAME configure -event reset-init {
  21. adapter speed 100
  22. # this will setup Telo board
  23. setupTelo
  24. #turn up the JTAG speed
  25. adapter speed 3000
  26. echo "JTAG speek now 3MHz"
  27. echo "type helpC100 to get help on C100"
  28. }
  29. $_TARGETNAME configure -event reset-deassert-post {
  30. # Force target into ARM state.
  31. # soft_reset_halt ;# not implemented on ARM11
  32. echo "Detected SRSRT asserted on C100.CPU"
  33. }
  34. $_TARGETNAME configure -event reset-assert-post {
  35. echo "Assering reset"
  36. #sleep 10
  37. }
  38. proc power_restore {} { echo "Sensed power restore. No action." }
  39. proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
  40. # boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
  41. # it's really 16MB but the upper 8mb is controller via gpio
  42. # openocd does not support 'complex reads/writes' to NOR
  43. set _FLASHNAME $_CHIPNAME.flash
  44. flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
  45. # writing data to memory does not work without this
  46. arm11 memwrite burst disable