drv_adc.c 3.7 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-02-25 iysheng first version
  9. */
  10. #include <board.h>
  11. #include <drivers/adc.h>
  12. #define DBG_TAG "drv.adc"
  13. #define DBG_LVL DBG_INFO
  14. #include <rtdbg.h>
  15. #ifdef RT_USING_ADC
  16. #define MAX_EXTERN_ADC_CHANNEL 16
  17. typedef struct {
  18. struct rt_adc_device adc_dev;
  19. char name[8];
  20. rt_base_t adc_pins[16];
  21. void *private_data;
  22. } gd32_adc_device;
  23. static gd32_adc_device g_gd32_devs[] = {
  24. #ifdef BSP_USING_ADC0
  25. {
  26. {},
  27. "adc0",
  28. {
  29. GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3),
  30. GET_PIN(A, 4), GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7),
  31. GET_PIN(B, 0), GET_PIN(B, 1), GET_PIN(C, 0), GET_PIN(C, 1),
  32. GET_PIN(C, 2), GET_PIN(C, 3), GET_PIN(C, 4), GET_PIN(C, 5),
  33. },
  34. (void *)ADC0,
  35. },
  36. #endif
  37. #ifdef BSP_USING_ADC1
  38. {
  39. {},
  40. "adc1",
  41. {
  42. GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3),
  43. GET_PIN(A, 4), GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7),
  44. GET_PIN(B, 0), GET_PIN(B, 1), GET_PIN(C, 0), GET_PIN(C, 1),
  45. GET_PIN(C, 2), GET_PIN(C, 3), GET_PIN(C, 4), GET_PIN(C, 5),
  46. },
  47. (void *)ADC1,
  48. },
  49. #endif
  50. };
  51. /*
  52. * static void init_pin4adc
  53. *
  54. * @ rt_uint32_t pin: pin information
  55. * return: N/A
  56. */
  57. static void init_pin4adc(rt_base_t pin)
  58. {
  59. gpio_init(PIN_GDPORT(pin), GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, PIN_GDPIN(pin));
  60. }
  61. static rt_err_t gd32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  62. {
  63. uint32_t adc_periph;
  64. gd32_adc_device * gd32_adc = (gd32_adc_device *)device;
  65. if (channel >= MAX_EXTERN_ADC_CHANNEL)
  66. {
  67. LOG_E("invalid channel");
  68. return -RT_EINVAL;
  69. }
  70. adc_periph = (uint32_t )(device->parent.user_data);
  71. if (enabled == ENABLE)
  72. {
  73. init_pin4adc(gd32_adc->adc_pins[channel]);
  74. adc_deinit(adc_periph);
  75. adc_channel_length_config(adc_periph, ADC_REGULAR_CHANNEL, 1);
  76. adc_data_alignment_config(adc_periph, ADC_DATAALIGN_RIGHT);
  77. adc_external_trigger_source_config(adc_periph, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_INSERTED_NONE);
  78. adc_external_trigger_config(adc_periph, ADC_REGULAR_CHANNEL, ENABLE);
  79. adc_regular_channel_config(adc_periph, 0, channel, ADC_SAMPLETIME_13POINT5);
  80. adc_enable(adc_periph);
  81. }
  82. else
  83. {
  84. adc_disable(adc_periph);
  85. }
  86. return 0;
  87. }
  88. static rt_err_t gd32_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  89. {
  90. uint32_t adc_periph;
  91. if (!value)
  92. {
  93. LOG_E("invalid param");
  94. return -RT_EINVAL;
  95. }
  96. adc_periph = (uint32_t )(device->parent.user_data);
  97. adc_software_trigger_enable(adc_periph, ADC_REGULAR_CHANNEL);
  98. *value = adc_regular_data_read(adc_periph);
  99. return 0;
  100. }
  101. static struct rt_adc_ops g_gd32_adc_ops = {
  102. gd32_adc_enabled,
  103. gd32_adc_convert,
  104. };
  105. static int rt_hw_adc_init(void)
  106. {
  107. int ret, i = 0;
  108. #ifdef BSP_USING_ADC0
  109. rcu_periph_clock_enable(RCU_ADC0);
  110. #endif
  111. #ifdef BSP_USING_ADC1
  112. rcu_periph_clock_enable(RCU_ADC1);
  113. #endif
  114. for (; i < sizeof(g_gd32_devs) / sizeof(g_gd32_devs[0]); i++)
  115. {
  116. ret = rt_hw_adc_register(&g_gd32_devs[i].adc_dev, \
  117. (const char *)g_gd32_devs[i].name, \
  118. &g_gd32_adc_ops, (void *)g_gd32_devs[i].private_data);
  119. if (ret != RT_EOK)
  120. {
  121. /* TODO err handler */
  122. LOG_E("failed register %s, err=%d", g_gd32_devs[i].name, ret);
  123. }
  124. }
  125. return ret;
  126. }
  127. INIT_BOARD_EXPORT(rt_hw_adc_init);
  128. #endif