stm32wlxx.h 9.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280
  1. /**
  2. ******************************************************************************
  3. * @file stm32wlxx.h
  4. * @author MCD Application Team
  5. * @brief CMSIS STM32WLxx Device Peripheral Access Layer Header File.
  6. *
  7. * The file is the unique include file that the application programmer
  8. * is using in the C source code, usually in main.c. This file contains:
  9. * - Configuration section that allows to select:
  10. * - The STM32WLxx device used in the target application
  11. * - To use or not the peripheral's drivers in application code(i.e.
  12. * code will be based on direct access to peripheral's registers
  13. * rather than drivers API), this option is controlled by
  14. * "#define USE_HAL_DRIVER"
  15. *
  16. ******************************************************************************
  17. * @attention
  18. *
  19. * Copyright (c) 2020-2021 STMicroelectronics.
  20. * All rights reserved.
  21. *
  22. * This software is licensed under terms that can be found in the LICENSE file
  23. * in the root directory of this software component.
  24. * If no LICENSE file comes with this software, it is provided AS-IS.
  25. *
  26. ******************************************************************************
  27. */
  28. /** @addtogroup CMSIS
  29. * @{
  30. */
  31. /** @addtogroup stm32wlxx
  32. * @{
  33. */
  34. #ifndef __STM32WLxx_H
  35. #define __STM32WLxx_H
  36. #ifdef __cplusplus
  37. extern "C" {
  38. #endif /* __cplusplus */
  39. /** @addtogroup Library_configuration_section
  40. * @{
  41. */
  42. /**
  43. * @brief STM32 Family
  44. */
  45. #if !defined (STM32WL)
  46. #define STM32WL
  47. #endif /* STM32WL */
  48. /* Uncomment the line below according to the target STM32WL device used in your
  49. application
  50. */
  51. #if !defined (STM32WL55xx) && !defined (STM32WL54xx) && !defined (STM32WLE5xx) && !defined (STM32WLE4xx) && !defined(STM32WL5Mxx)
  52. /* #define STM32WL55xx */ /*!< STM32WL55xx Devices */
  53. /* #define STM32WL54xx */ /*!< STM32WL54xx Devices */
  54. /* #define STM32WLE5xx */ /*!< STM32WLE5xx Devices */
  55. /* #define STM32WLE4xx */ /*!< STM32WLE4xx Devices */
  56. /* #define STM32WL5Mxx */ /*!< STM32WL5Mxx Devices */
  57. #endif /* STM32WL55xx ... */
  58. /* Tip: To avoid modifying this file each time you need to switch between these
  59. devices, you can define the device in your toolchain compiler preprocessor.
  60. */
  61. #if !defined (USE_HAL_DRIVER)
  62. /**
  63. * @brief Comment the line below if you will not use the peripherals drivers.
  64. In this case, these drivers will not be included and the application code will
  65. be based on direct access to peripherals registers
  66. */
  67. /*#define USE_HAL_DRIVER */
  68. #endif /* USE_HAL_DRIVER */
  69. /**
  70. * @brief CMSIS Device version number
  71. */
  72. #define __STM32WLxx_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
  73. #define __STM32WLxx_CMSIS_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
  74. #define __STM32WLxx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
  75. #define __STM32WLxx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
  76. #define __STM32WLxx_CMSIS_DEVICE_VERSION ((__STM32WLxx_CMSIS_VERSION_MAIN << 24)\
  77. |(__STM32WLxx_CMSIS_VERSION_SUB1 << 16)\
  78. |(__STM32WLxx_CMSIS_VERSION_SUB2 << 8 )\
  79. |(__STM32WLxx_CMSIS_VERSION_RC))
  80. /**
  81. * @}
  82. */
  83. /** @addtogroup Device_Included
  84. * @{
  85. */
  86. #if defined(STM32WL55xx)
  87. #include "stm32wl55xx.h"
  88. #elif defined(STM32WLE5xx)
  89. #include "stm32wle5xx.h"
  90. #elif defined(STM32WL54xx)
  91. #include "stm32wl54xx.h"
  92. #elif defined(STM32WLE4xx)
  93. #include "stm32wle4xx.h"
  94. #elif defined(STM32WL5Mxx)
  95. #include "stm32wl5mxx.h"
  96. #else
  97. #error "Please select first the target STM32WLxx device used in your application, for instance xxx (in stm32wlxx.h file)"
  98. #endif /* STM32WL55xx ... */
  99. /**
  100. * @}
  101. */
  102. /** @addtogroup Exported_types
  103. * @{
  104. */
  105. typedef enum
  106. {
  107. RESET = 0,
  108. SET = !RESET
  109. } FlagStatus, ITStatus;
  110. typedef enum
  111. {
  112. DISABLE = 0,
  113. ENABLE = !DISABLE
  114. } FunctionalState;
  115. #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
  116. typedef enum
  117. {
  118. ERROR = 0,
  119. SUCCESS = !ERROR
  120. } ErrorStatus;
  121. /**
  122. * @}
  123. */
  124. /** @addtogroup Exported_macros
  125. * @{
  126. */
  127. #define SET_BIT(REG, BIT) ((REG) |= (BIT))
  128. #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
  129. #define READ_BIT(REG, BIT) ((REG) & (BIT))
  130. #define CLEAR_REG(REG) ((REG) = (0x0))
  131. #define WRITE_REG(REG, VAL) ((REG) = (VAL))
  132. #define READ_REG(REG) ((REG))
  133. #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
  134. #if defined(CORE_CM0PLUS)
  135. /* Use of interrupt control for register exclusive access (privileged mode only) */
  136. /* Atomic 32-bit register access macro to set one or several bits */
  137. #define ATOMIC_SET_BIT(REG, BIT) \
  138. do { \
  139. uint32_t primask; \
  140. primask = __get_PRIMASK(); \
  141. __set_PRIMASK(1); \
  142. SET_BIT((REG), (BIT)); \
  143. __set_PRIMASK(primask); \
  144. } while(0)
  145. /* Atomic 32-bit register access macro to clear one or several bits */
  146. #define ATOMIC_CLEAR_BIT(REG, BIT) \
  147. do { \
  148. uint32_t primask; \
  149. primask = __get_PRIMASK(); \
  150. __set_PRIMASK(1); \
  151. CLEAR_BIT((REG), (BIT)); \
  152. __set_PRIMASK(primask); \
  153. } while(0)
  154. /* Atomic 32-bit register access macro to clear and set one or several bits */
  155. #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
  156. do { \
  157. uint32_t primask; \
  158. primask = __get_PRIMASK(); \
  159. __set_PRIMASK(1); \
  160. MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
  161. __set_PRIMASK(primask); \
  162. } while(0)
  163. /* Atomic 16-bit register access macro to set one or several bits */
  164. #define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)
  165. /* Atomic 16-bit register access macro to clear one or several bits */
  166. #define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)
  167. /* Atomic 16-bit register access macro to clear and set one or several bits */
  168. #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)
  169. #else
  170. /* Use of CMSIS compiler intrinsics for register exclusive access */
  171. /* Atomic 32-bit register access macro to set one or several bits */
  172. #define ATOMIC_SET_BIT(REG, BIT) \
  173. do { \
  174. uint32_t val; \
  175. do { \
  176. val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
  177. } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
  178. } while(0)
  179. /* Atomic 32-bit register access macro to clear one or several bits */
  180. #define ATOMIC_CLEAR_BIT(REG, BIT) \
  181. do { \
  182. uint32_t val; \
  183. do { \
  184. val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
  185. } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
  186. } while(0)
  187. /* Atomic 32-bit register access macro to clear and set one or several bits */
  188. #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
  189. do { \
  190. uint32_t val; \
  191. do { \
  192. val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
  193. } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
  194. } while(0)
  195. /* Atomic 16-bit register access macro to set one or several bits */
  196. #define ATOMIC_SETH_BIT(REG, BIT) \
  197. do { \
  198. uint16_t val; \
  199. do { \
  200. val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
  201. } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
  202. } while(0)
  203. /* Atomic 16-bit register access macro to clear one or several bits */
  204. #define ATOMIC_CLEARH_BIT(REG, BIT) \
  205. do { \
  206. uint16_t val; \
  207. do { \
  208. val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
  209. } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
  210. } while(0)
  211. /* Atomic 16-bit register access macro to clear and set one or several bits */
  212. #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
  213. do { \
  214. uint16_t val; \
  215. do { \
  216. val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
  217. } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
  218. } while(0)
  219. #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
  220. #endif /* CORE_CM0PLUS */
  221. /**
  222. * @}
  223. */
  224. #if defined (USE_HAL_DRIVER)
  225. #include "stm32wlxx_hal.h"
  226. #endif /* USE_HAL_DRIVER */
  227. #ifdef __cplusplus
  228. }
  229. #endif /* __cplusplus */
  230. #endif /* __STM32WLxx_H */
  231. /**
  232. * @}
  233. */
  234. /**
  235. * @}
  236. */