unit_test: Refactor all performance tests that rely on cache compensated timer

There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target

components/driver/test/test_sdio.c

@@ -355,13 +355,13 @@ static void log_performance_tohost(uint32_t speed, const sdio_test_config_t* con
     if (!config->check_data) {
         switch (config->sdio_mode) {
         case SDIO_4BIT:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT, "%d", speed);
             break;
         case SDIO_1BIT:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT, "%d", speed);
             break;
         case SDIO_SPI:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_SPI, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_SPI, "%d", speed);
             break;
         }
     }
@@ -441,13 +441,13 @@ static void log_performance_frhost(uint32_t speed, const sdio_test_config_t* con
     if (!config->check_data) {
         switch (config->sdio_mode) {
         case SDIO_4BIT:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT, "%d", speed);
             break;
         case SDIO_1BIT:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT, "%d", speed);
             break;
         case SDIO_SPI:
-            TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_SPI, "%d", speed);
+            TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_SPI, "%d", speed);
             break;
         }
     }

components/esp32/test/test_sha.c

@@ -63,8 +63,8 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
 
     free(buffer);
 
-    TEST_PERFORMANCE_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
-    TEST_PERFORMANCE_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
 }
 
 TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")

components/esp32s2/test/test_sha.c

@@ -58,8 +58,8 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
 
     free(buffer);
 
-    TEST_PERFORMANCE_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
-    TEST_PERFORMANCE_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
 }
 
 TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")

components/mbedtls/test/test_aes_perf.c

@@ -64,6 +64,6 @@ TEST_CASE("mbedtls AES performance", "[aes][timeout=60]")
     printf("Encryption rate %.3fMB/sec\n", mb_sec);
 #ifdef CONFIG_MBEDTLS_HARDWARE_AES
     // Don't put a hard limit on software AES performance
-    TEST_PERFORMANCE_GREATER_THAN(AES_CBC_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
+    TEST_PERFORMANCE_CCOMP_GREATER_THAN(AES_CBC_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
 #endif
 }

components/mbedtls/test/test_rsa.c

@@ -366,11 +366,11 @@ static void rsa_key_operations(int keysize, bool check_performance, bool use_bli
     private_perf = ccomp_timer_stop();
 
     if (check_performance && keysize == 2048) {
-        TEST_PERFORMANCE_LESS_THAN(RSA_2048KEY_PUBLIC_OP, "public operations %d us", public_perf);
-        TEST_PERFORMANCE_LESS_THAN(RSA_2048KEY_PRIVATE_OP, "private operations %d us", private_perf);
+        TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_2048KEY_PUBLIC_OP, "public operations %d us", public_perf);
+        TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_2048KEY_PRIVATE_OP, "private operations %d us", private_perf);
     } else if (check_performance && keysize == 4096) {
-        TEST_PERFORMANCE_LESS_THAN(RSA_4096KEY_PUBLIC_OP, "public operations %d us", public_perf);
-        TEST_PERFORMANCE_LESS_THAN(RSA_4096KEY_PRIVATE_OP, "private operations %d us", private_perf);
+        TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_4096KEY_PUBLIC_OP, "public operations %d us", public_perf);
+        TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_4096KEY_PRIVATE_OP, "private operations %d us", private_perf);
     }
 
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(orig_buf, decrypted_buf, keysize / 8, "RSA operation");

components/mbedtls/test/test_sha_perf.c

@@ -50,6 +50,6 @@ TEST_CASE("mbedtls SHA performance", "[aes]")
     printf("SHA256 rate %.3fMB/sec\n", mb_sec);
 #ifdef CONFIG_MBEDTLS_HARDWARE_SHA
     // Don't put a hard limit on software SHA performance
-    TEST_PERFORMANCE_GREATER_THAN(SHA256_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
+    TEST_PERFORMANCE_CCOMP_GREATER_THAN(SHA256_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
 #endif
 }

components/soc/esp32/include/soc/soc_caps.h

@@ -71,6 +71,7 @@
 #define SOC_CPU_CORES_NUM           2
 #define SOC_ULP_SUPPORTED           1
 #define SOC_RTC_SLOW_MEM_SUPPORTED  1
+#define SOC_CCOMP_TIMER_SUPPORTED   1
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 #define SOC_ADC_PERIPH_NUM              (2)

components/soc/esp32s2/include/soc/soc_caps.h

@@ -47,6 +47,7 @@
 #define SOC_PCNT_SUPPORTED              1
 #define SOC_ULP_SUPPORTED               1
 #define SOC_RTC_SLOW_MEM_SUPPORTED      1
+#define SOC_CCOMP_TIMER_SUPPORTED       1
 
 #define SOC_CACHE_SUPPORT_WRAP          1
 

components/soc/esp32s3/include/soc/soc_caps.h

@@ -14,6 +14,8 @@
 #define SOC_CACHE_SUPPORT_WRAP          1
 #define SOC_ULP_SUPPORTED               1
 #define SOC_RTC_SLOW_MEM_SUPPORTED      1
+#define SOC_CCOMP_TIMER_SUPPORTED       1
+
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 #include "adc_caps.h"

components/spi_flash/test/test_esp_flash.c

@@ -1008,8 +1008,8 @@ static void test_flash_read_write_performance(const esp_partition_t *part)
     TEST_ASSERT_EQUAL_HEX8_ARRAY(data_to_write, data_read, total_len);
 
 #if !CONFIG_SPIRAM && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
-#  define CHECK_DATA(bus, suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##suffix, "%d", speed_##suffix)
-#  define CHECK_ERASE(bus, var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##ERASE, "%d", var)
+#  define CHECK_DATA(bus, suffix) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##suffix, "%d", speed_##suffix)
+#  define CHECK_ERASE(bus, var) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##ERASE, "%d", var)
 #else
 #  define CHECK_DATA(bus, suffix) ((void)speed_##suffix)
 #  define CHECK_ERASE(bus, var)   ((void)var)

components/spi_flash/test/test_spi_flash.c

@@ -312,8 +312,8 @@ TEST_CASE("Test spi_flash read/write performance", "[spi_flash]")
 
 // Data checks are disabled when PSRAM is used or in Freertos compliance check test
 #if !CONFIG_SPIRAM && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
-#  define CHECK_DATA(suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_##suffix, "%d", speed_##suffix)
-#  define CHECK_ERASE(var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE, "%d", var)
+#  define CHECK_DATA(suffix) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_##suffix, "%d", speed_##suffix)
+#  define CHECK_ERASE(var) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE, "%d", var)
 #else
 #  define CHECK_DATA(suffix) ((void)speed_##suffix)
 #  define CHECK_ERASE(var) ((void)var)

components/vfs/test/test_vfs_fd.c

@@ -260,9 +260,9 @@ TEST_CASE("Open & write & close through VFS passes performance test", "[vfs]")
     const int ns_per_iter = (int) (time_diff_us * 1000 / iter_count);
     TEST_ESP_OK( esp_vfs_unregister(VFS_PREF1) );
 #ifdef CONFIG_SPIRAM
-    TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME_PSRAM, "%dns", ns_per_iter);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME_PSRAM, "%dns", ns_per_iter);
 #else
-    TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME, "%dns", ns_per_iter);
+    TEST_PERFORMANCE_CCOMP_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME, "%dns", ns_per_iter);
 #endif
 
 }

tools/unit-test-app/components/test_utils/include/test_utils.h

@@ -21,6 +21,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "unity.h"
+#include "soc/soc_caps.h"
 /* include performance pass standards header file */
 #include "idf_performance.h"
 #include "idf_performance_target.h"
@@ -50,6 +51,21 @@ extern "C" {
     TEST_ASSERT(value > PERFORMANCE_CON(IDF_PERFORMANCE_MIN_, name)); \
 } while(0)
 
+/* Macros to be used when performance is calculated using the cache compensated timer
+   will not assert if ccomp not supported */
+#if SOC_CCOMP_TIMER_SUPPORTED
+#define TEST_PERFORMANCE_CCOMP_GREATER_THAN(name, value_fmt, value) \
+    TEST_PERFORMANCE_GREATER_THAN(name, value_fmt, value)
+#define TEST_PERFORMANCE_CCOMP_LESS_THAN(name, value_fmt, value) \
+    TEST_PERFORMANCE_LESS_THAN(name, value_fmt, value)
+#else
+#define TEST_PERFORMANCE_CCOMP_GREATER_THAN(name, value_fmt, value) \
+    printf("[Performance][" PERFORMANCE_STR(name) "]: "value_fmt"\n", value);
+#define TEST_PERFORMANCE_CCOMP_LESS_THAN(name, value_fmt, value) \
+    printf("[Performance][" PERFORMANCE_STR(name) "]: "value_fmt"\n", value);
+#endif //SOC_CCOMP_TIMER_SUPPORTED
+
+
 /* @brief macro to print IDF performance
  * @param mode :        performance item name. a string pointer.
  * @param value_fmt:    print format and unit of the value, for example: "%02fms", "%dKB"