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sdm: clean up soc/hal/ll code

morris 4 lat temu
rodzic
commit
4154eaec93
70 zmienionych plików z 851 dodań i 1098 usunięć
  1. 42 45
      components/driver/deprecated/driver/rmt_types_legacy.h
  2. 2 2
      components/hal/CMakeLists.txt
  3. 58 0
      components/hal/esp32/include/hal/sdm_ll.h
  4. 0 75
      components/hal/esp32/include/hal/sigmadelta_ll.h
  5. 58 0
      components/hal/esp32c3/include/hal/sdm_ll.h
  6. 0 75
      components/hal/esp32c3/include/hal/sigmadelta_ll.h
  7. 58 0
      components/hal/esp32h2/include/hal/sdm_ll.h
  8. 0 75
      components/hal/esp32h2/include/hal/sigmadelta_ll.h
  9. 58 0
      components/hal/esp32s2/include/hal/sdm_ll.h
  10. 0 75
      components/hal/esp32s2/include/hal/sigmadelta_ll.h
  11. 58 0
      components/hal/esp32s3/include/hal/sdm_ll.h
  12. 0 75
      components/hal/esp32s3/include/hal/sigmadelta_ll.h
  13. 5 0
      components/hal/include/hal/rmt_types.h
  14. 41 0
      components/hal/include/hal/sdm_hal.h
  15. 24 0
      components/hal/include/hal/sdm_types.h
  16. 0 71
      components/hal/include/hal/sigmadelta_hal.h
  17. 0 44
      components/hal/include/hal/sigmadelta_types.h
  18. 5 0
      components/hal/include/hal/temperature_sensor_types.h
  19. 16 0
      components/hal/sdm_hal.c
  20. 0 26
      components/hal/sigmadelta_hal.c
  21. 1 1
      components/soc/esp32/CMakeLists.txt
  22. 3 3
      components/soc/esp32/include/soc/Kconfig.soc_caps.in
  23. 16 12
      components/soc/esp32/include/soc/clk_tree_defs.h
  24. 7 19
      components/soc/esp32/include/soc/gpio_sd_reg.h
  25. 13 22
      components/soc/esp32/include/soc/gpio_sd_struct.h
  26. 4 4
      components/soc/esp32/include/soc/soc_caps.h
  27. 1 1
      components/soc/esp32/ld/esp32.peripherals.ld
  28. 37 0
      components/soc/esp32/sdm_periph.c
  29. 0 45
      components/soc/esp32/sigmadelta_periph.c
  30. 1 1
      components/soc/esp32c3/CMakeLists.txt
  31. 3 3
      components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
  32. 16 2
      components/soc/esp32c3/include/soc/clk_tree_defs.h
  33. 8 20
      components/soc/esp32c3/include/soc/gpio_sd_reg.h
  34. 18 23
      components/soc/esp32c3/include/soc/gpio_sd_struct.h
  35. 4 4
      components/soc/esp32c3/include/soc/soc_caps.h
  36. 1 1
      components/soc/esp32c3/ld/esp32c3.peripherals.ld
  37. 25 0
      components/soc/esp32c3/sdm_periph.c
  38. 0 33
      components/soc/esp32c3/sigmadelta_periph.c
  39. 1 1
      components/soc/esp32h2/CMakeLists.txt
  40. 1 6
      components/soc/esp32h2/include/rev1/soc/gpio_sd_reg.h
  41. 1 1
      components/soc/esp32h2/include/rev2/soc/gpio_sd_reg.h
  42. 3 3
      components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
  43. 17 2
      components/soc/esp32h2/include/soc/clk_tree_defs.h
  44. 18 23
      components/soc/esp32h2/include/soc/gpio_sd_struct.h
  45. 4 4
      components/soc/esp32h2/include/soc/soc_caps.h
  46. 1 1
      components/soc/esp32h2/ld/esp32h2.peripherals.ld
  47. 25 0
      components/soc/esp32h2/sdm_periph.c
  48. 0 33
      components/soc/esp32h2/sigmadelta_periph.c
  49. 1 1
      components/soc/esp32s2/CMakeLists.txt
  50. 3 3
      components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
  51. 16 2
      components/soc/esp32s2/include/soc/clk_tree_defs.h
  52. 8 20
      components/soc/esp32s2/include/soc/gpio_sd_reg.h
  53. 18 23
      components/soc/esp32s2/include/soc/gpio_sd_struct.h
  54. 4 4
      components/soc/esp32s2/include/soc/soc_caps.h
  55. 1 1
      components/soc/esp32s2/ld/esp32s2.peripherals.ld
  56. 37 0
      components/soc/esp32s2/sdm_periph.c
  57. 0 45
      components/soc/esp32s2/sigmadelta_periph.c
  58. 1 1
      components/soc/esp32s3/CMakeLists.txt
  59. 3 3
      components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
  60. 16 2
      components/soc/esp32s3/include/soc/clk_tree_defs.h
  61. 7 20
      components/soc/esp32s3/include/soc/gpio_sd_reg.h
  62. 15 25
      components/soc/esp32s3/include/soc/gpio_sd_struct.h
  63. 4 4
      components/soc/esp32s3/include/soc/soc_caps.h
  64. 1 1
      components/soc/esp32s3/ld/esp32s3.peripherals.ld
  65. 37 0
      components/soc/esp32s3/sdm_periph.c
  66. 0 45
      components/soc/esp32s3/sigmadelta_periph.c
  67. 25 0
      components/soc/include/soc/sdm_periph.h
  68. 0 36
      components/soc/include/soc/sigmadelta_periph.h
  69. 0 23
      tools/ci/check_copyright_ignore.txt
  70. 0 8
      tools/ci/check_public_headers_exceptions.txt

+ 42 - 45
components/driver/deprecated/driver/rmt_types_legacy.h

@@ -21,7 +21,6 @@ extern "C" {
 
 /**
  * @brief Define memory space of each RMT channel (in words = 4 bytes)
- *
  */
 #define RMT_MEM_ITEM_NUM SOC_RMT_MEM_WORDS_PER_CHANNEL
 
@@ -40,6 +39,8 @@ typedef struct {
     };
 } rmt_item32_t;
 
+
+#if SOC_RMT_SUPPORTED
 /**
  * @brief RMT hardware memory layout
  */
@@ -48,11 +49,11 @@ typedef struct {
         volatile rmt_item32_t data32[SOC_RMT_MEM_WORDS_PER_CHANNEL];
     } chan[SOC_RMT_CHANNELS_PER_GROUP];
 } rmt_mem_t;
+#endif // SOC_RMT_SUPPORTED
 
 /**
-* @brief RMT channel ID
-*
-*/
+ * @brief RMT channel ID
+ */
 typedef enum {
     RMT_CHANNEL_0,  /*!< RMT channel number 0 */
     RMT_CHANNEL_1,  /*!< RMT channel number 1 */
@@ -69,7 +70,6 @@ typedef enum {
 
 /**
  * @brief RMT Internal Memory Owner
- *
  */
 typedef enum {
     RMT_MEM_OWNER_TX, /*!< RMT RX mode, RMT transmitter owns the memory block*/
@@ -79,15 +79,17 @@ typedef enum {
 
 /**
  * @brief Clock Source of RMT Channel
- *
  */
+#if SOC_RMT_SUPPORTED
 typedef soc_periph_rmt_clk_src_legacy_t rmt_source_clk_t;
+#else
+typedef int rmt_source_clk_t;
+#endif // SOC_RMT_SUPPORTED
 
 /**
  * @brief RMT Data Mode
  *
  * @note We highly recommended to use MEM mode not FIFO mode since there will be some gotcha in FIFO mode.
- *
  */
 typedef enum {
     RMT_DATA_MODE_FIFO, /*<! RMT memory access in FIFO mode */
@@ -97,7 +99,6 @@ typedef enum {
 
 /**
  * @brief RMT Channel Working Mode (TX or RX)
- *
  */
 typedef enum {
     RMT_MODE_TX, /*!< RMT TX mode */
@@ -117,7 +118,6 @@ typedef enum {
 
 /**
  * @brief RMT Carrier Level
- *
  */
 typedef enum {
     RMT_CARRIER_LEVEL_LOW,  /*!< RMT carrier wave is modulated for low Level output */
@@ -127,7 +127,6 @@ typedef enum {
 
 /**
  * @brief RMT Channel Status
- *
  */
 typedef enum {
     RMT_CHANNEL_UNINIT, /*!< RMT channel uninitialized */
@@ -136,15 +135,15 @@ typedef enum {
 } rmt_channel_status_t;
 
 /**
-* @brief Data struct of RMT channel status
-*/
+ * @brief Data struct of RMT channel status
+ */
 typedef struct {
     rmt_channel_status_t status[RMT_CHANNEL_MAX]; /*!< Store the current status of each channel */
 } rmt_channel_status_result_t;
 
 /**
-* @brief Data struct of RMT TX configure parameters
-*/
+ * @brief Data struct of RMT TX configure parameters
+ */
 typedef struct {
     uint32_t carrier_freq_hz;          /*!< RMT carrier frequency */
     rmt_carrier_level_t carrier_level; /*!< Level of the RMT output, when the carrier is applied */
@@ -159,8 +158,8 @@ typedef struct {
 } rmt_tx_config_t;
 
 /**
-* @brief Data struct of RMT RX configure parameters
-*/
+ * @brief Data struct of RMT RX configure parameters
+ */
 typedef struct {
     uint16_t idle_threshold;     /*!< RMT RX idle threshold */
     uint8_t filter_ticks_thresh; /*!< RMT filter tick number */
@@ -174,8 +173,8 @@ typedef struct {
 } rmt_rx_config_t;
 
 /**
-* @brief Data struct of RMT configure parameters
-*/
+ * @brief Data struct of RMT configure parameters
+ */
 typedef struct {
     rmt_mode_t rmt_mode;   /*!< RMT mode: transmitter or receiver */
     rmt_channel_t channel; /*!< RMT channel */
@@ -232,45 +231,43 @@ typedef struct {
     }
 
 /**
-* @brief RMT interrupt handle
-*
-*/
+ * @brief RMT interrupt handle
+ */
 typedef intr_handle_t rmt_isr_handle_t;
 
 /**
-* @brief Type of RMT Tx End callback function
-*
-*/
+ * @brief Type of RMT Tx End callback function
+ */
 typedef void (*rmt_tx_end_fn_t)(rmt_channel_t channel, void *arg);
 
 /**
-* @brief Structure encapsulating a RMT TX end callback
-*/
+ * @brief Structure encapsulating a RMT TX end callback
+ */
 typedef struct {
     rmt_tx_end_fn_t function; /*!< Function which is called on RMT TX end */
     void *arg;                /*!< Optional argument passed to function */
 } rmt_tx_end_callback_t;
 
 /**
-* @brief User callback function to convert uint8_t type data to rmt format(rmt_item32_t).
-*
-*        This function may be called from an ISR, so, the code should be short and efficient.
-*
-* @param  src Pointer to the buffer storing the raw data that needs to be converted to rmt format.
-* @param[out] dest Pointer to the buffer storing the rmt format data.
-* @param  src_size The raw data size.
-* @param  wanted_num The number of rmt format data that wanted to get.
-* @param[out] translated_size The size of the raw data that has been converted to rmt format,
-*             it should return 0 if no data is converted in user callback.
-* @param[out] item_num The number of the rmt format data that actually converted to,
-*             it can be less than wanted_num if there is not enough raw data, but cannot exceed wanted_num.
-*             it should return 0 if no data was converted.
-*
-* @note
-*       In fact, item_num should be a multiple of translated_size, e.g. :
-*       When we convert each byte of uint8_t type data to rmt format data,
-*       the relation between item_num and translated_size should be `item_num = translated_size*8`.
-*/
+ * @brief User callback function to convert uint8_t type data to rmt format(rmt_item32_t).
+ *
+ *        This function may be called from an ISR, so, the code should be short and efficient.
+ *
+ * @param  src Pointer to the buffer storing the raw data that needs to be converted to rmt format.
+ * @param[out] dest Pointer to the buffer storing the rmt format data.
+ * @param  src_size The raw data size.
+ * @param  wanted_num The number of rmt format data that wanted to get.
+ * @param[out] translated_size The size of the raw data that has been converted to rmt format,
+ *             it should return 0 if no data is converted in user callback.
+ * @param[out] item_num The number of the rmt format data that actually converted to,
+ *             it can be less than wanted_num if there is not enough raw data, but cannot exceed wanted_num.
+ *             it should return 0 if no data was converted.
+ *
+ * @note
+ *       In fact, item_num should be a multiple of translated_size, e.g. :
+ *       When we convert each byte of uint8_t type data to rmt format data,
+ *       the relation between item_num and translated_size should be `item_num = translated_size*8`.
+ */
 typedef void (*sample_to_rmt_t)(const void *src, rmt_item32_t *dest, size_t src_size, size_t wanted_num, size_t *translated_size, size_t *item_num);
 
 #ifdef __cplusplus

+ 2 - 2
components/hal/CMakeLists.txt

@@ -74,8 +74,8 @@ if(NOT BOOTLOADER_BUILD)
         list(APPEND srcs "i2s_hal.c")
     endif()
 
-    if(CONFIG_SOC_SIGMADELTA_SUPPORTED)
-        list(APPEND srcs "sigmadelta_hal.c")
+    if(CONFIG_SOC_SDM_SUPPORTED)
+        list(APPEND srcs "sdm_hal.c")
     endif()
 
     if(CONFIG_ETH_USE_ESP32_EMAC)

+ 58 - 0
components/hal/esp32/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    // The clk enable register does not exist on ESP32.
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 75
components/hal/esp32/include/hal/sigmadelta_ll.h

@@ -1,75 +0,0 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
-// The LL layer for ESP32 SIGMADELTA register operations
-
-#pragma once
-
-#include <stdbool.h>
-#include "hal/misc.h"
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sd_struct.h"
-#include "hal/sigmadelta_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Get SIGMADELTA hardware instance with giving sigmadelta num
-#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
-
-/**
- * @brief Set Sigma-delta enable
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param en Sigma-delta enable value
- */
-static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
-{
-    // The clk enable register does not exist on ESP32.
-}
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
-}
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param val The divider of source clock, ranges from 0 to 255
- */
-static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
-}
-
-#ifdef __cplusplus
-}
-#endif

+ 58 - 0
components/hal/esp32c3/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 75
components/hal/esp32c3/include/hal/sigmadelta_ll.h

@@ -1,75 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in soc/include/hal/readme.md
- ******************************************************************************/
-
-// The LL layer for ESP32 SIGMADELTA register operations
-
-#pragma once
-
-#include <stdbool.h>
-#include "hal/misc.h"
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sd_struct.h"
-#include "hal/sigmadelta_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Get SIGMADELTA hardware instance with giving sigmadelta num
-#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
-
-/**
- * @brief Set Sigma-delta enable
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param en Sigma-delta enable value
- */
-static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
-{
-    hw->misc.function_clk_en = en;
-}
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
-}
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param val The divider of source clock, ranges from 0 to 255
- */
-static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
-}
-
-#ifdef __cplusplus
-}
-#endif

+ 58 - 0
components/hal/esp32h2/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 75
components/hal/esp32h2/include/hal/sigmadelta_ll.h

@@ -1,75 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in soc/include/hal/readme.md
- ******************************************************************************/
-
-// The LL layer for ESP32 SIGMADELTA register operations
-
-#pragma once
-
-#include <stdbool.h>
-#include "hal/misc.h"
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sd_struct.h"
-#include "hal/sigmadelta_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Get SIGMADELTA hardware instance with giving sigmadelta num
-#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
-
-/**
- * @brief Set Sigma-delta enable
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param en Sigma-delta enable value
- */
-static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
-{
-    hw->misc.function_clk_en = en;
-}
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
-}
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param val The divider of source clock, ranges from 0 to 255
- */
-static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
-}
-
-#ifdef __cplusplus
-}
-#endif

+ 58 - 0
components/hal/esp32s2/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 75
components/hal/esp32s2/include/hal/sigmadelta_ll.h

@@ -1,75 +0,0 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
-// The LL layer for ESP32-S2 SIGMADELTA register operations
-
-#pragma once
-
-#include <stdbool.h>
-#include "hal/misc.h"
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sd_struct.h"
-#include "hal/sigmadelta_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Get SIGMADELTA hardware instance with giving sigmadelta num
-#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
-
-/**
- * @brief Set Sigma-delta enable
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param en Sigma-delta enable value
- */
-static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
-{
-    hw->misc.function_clk_en = en;
-}
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
-}
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param prescale The divider of source clock, ranges from 0 to 255
- */
-static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
-}
-
-#ifdef __cplusplus
-}
-#endif

+ 58 - 0
components/hal/esp32s3/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/assert.h"
+#include "hal/misc.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 75
components/hal/esp32s3/include/hal/sigmadelta_ll.h

@@ -1,75 +0,0 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
-// The LL layer for ESP32 SIGMADELTA register operations
-
-#pragma once
-
-#include <stdbool.h>
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sd_struct.h"
-#include "hal/sigmadelta_types.h"
-#include "hal/misc.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Get SIGMADELTA hardware instance with giving sigmadelta num
-#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
-
-/**
- * @brief Set Sigma-delta enable
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param en Sigma-delta enable value
- */
-static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
-{
-    hw->misc.function_clk_en = en;
-}
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint8_t)duty);
-}
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hw Peripheral SIGMADELTA hardware instance address.
- * @param channel Sigma-delta channel number
- * @param val The divider of source clock, ranges from 0 to 255
- */
-static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
-{
-    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
-}
-
-#ifdef __cplusplus
-}
-#endif

+ 5 - 0
components/hal/include/hal/rmt_types.h

@@ -7,6 +7,7 @@
 #pragma once
 
 #include "soc/clk_tree_defs.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -16,7 +17,11 @@ extern "C" {
  * @brief RMT group clock source
  * @note User should select the clock source based on the power and resolution requirement
  */
+#if SOC_RMT_SUPPORTED
 typedef soc_periph_rmt_clk_src_t rmt_clock_source_t;
+#else
+typedef int rmt_clock_source_t;
+#endif
 
 /**
  * @brief The layout of RMT symbol stored in memory, which is decided by the hardware design

+ 41 - 0
components/hal/include/hal/sdm_hal.h

@@ -0,0 +1,41 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for sigma delta modulator.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct gpio_sd_dev_t *sdm_soc_handle_t; // Sigma-Delta SOC layer handle
+
+/**
+ * HAL context type of Sigma-Delta driver
+ */
+typedef struct {
+    sdm_soc_handle_t dev;
+} sdm_hal_context_t;
+
+/**
+ * @brief Initialize Sigma-Delta hal driver
+ *
+ * @param hal Context of the HAL layer
+ * @param group_id Sigma-Delta group number
+ */
+void sdm_hal_init(sdm_hal_context_t *hal, int group_id);
+
+#ifdef __cplusplus
+}
+#endif

+ 24 - 0
components/hal/include/hal/sdm_types.h

@@ -0,0 +1,24 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/clk_tree_defs.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_SDM_SUPPORTED
+typedef soc_periph_sdm_clk_src_t sdm_clock_source_t; // sigma delta modulator clock source
+#else
+typedef int sdm_clock_source_t; // sigma delta modulator clock source, fallback to integer type
+#endif // SOC_SDM_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 71
components/hal/include/hal/sigmadelta_hal.h

@@ -1,71 +0,0 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
-// The HAL layer for SIGMADELTA.
-// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
-
-#pragma once
-
-#include "soc/sigmadelta_periph.h"
-#include "hal/sigmadelta_types.h"
-#include "hal/sigmadelta_ll.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * Context that should be maintained by both the driver and the HAL
- */
-
-typedef struct {
-    gpio_sd_dev_t *dev;
-} sigmadelta_hal_context_t;
-
-/**
- * @brief Set Sigma-delta channel duty.
- *
- * @param hal Context of the HAL layer
- * @param channel Sigma-delta channel number
- * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
- *             The waveform is more like a random one in this range.
- */
-#define sigmadelta_hal_set_duty(hal, channel, duty) sigmadelta_ll_set_duty((hal)->dev, channel, duty)
-
-/**
- * @brief Set Sigma-delta channel's clock pre-scale value.
- *
- * @param hal Context of the HAL layer
- * @param channel Sigma-delta channel number
- * @param prescale The divider of source clock, ranges from 0 to 255
- */
-#define sigmadelta_hal_set_prescale(hal, channel, prescale) sigmadelta_ll_set_prescale((hal)->dev, channel, prescale)
-
-/**
- * @brief Init the SIGMADELTA hal and set the SIGMADELTA to the default configuration. This function should be called first before other hal layer function is called
- *
- * @param hal Context of the HAL layer
- * @param sigmadelta_num The uart port number, the max port number is (SIGMADELTA_NUM_MAX -1)
- */
-void sigmadelta_hal_init(sigmadelta_hal_context_t *hal, int sigmadelta_num);
-
-#ifdef __cplusplus
-}
-#endif

+ 0 - 44
components/hal/include/hal/sigmadelta_types.h

@@ -1,44 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "soc/soc_caps.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief SIGMADELTA port number, the max port number is (SIGMADELTA_NUM_MAX -1).
- */
-typedef enum {
-    SIGMADELTA_PORT_0,      /*!< SIGMADELTA port 0 */
-    SIGMADELTA_PORT_MAX,    /*!< SIGMADELTA port max */
-} sigmadelta_port_t;
-
-_Static_assert(SIGMADELTA_PORT_MAX == SOC_SIGMADELTA_NUM, "Sigma-delta port num incorrect.");
-
-/**
- * @brief Sigma-delta channel list
- */
-typedef enum {
-    SIGMADELTA_CHANNEL_0,   /*!< Sigma-delta channel 0 */
-    SIGMADELTA_CHANNEL_1,   /*!< Sigma-delta channel 1 */
-    SIGMADELTA_CHANNEL_2,   /*!< Sigma-delta channel 2 */
-    SIGMADELTA_CHANNEL_3,   /*!< Sigma-delta channel 3 */
-#if SOC_SIGMADELTA_CHANNEL_NUM > 4
-    SIGMADELTA_CHANNEL_4,   /*!< Sigma-delta channel 4 */
-    SIGMADELTA_CHANNEL_5,   /*!< Sigma-delta channel 5 */
-    SIGMADELTA_CHANNEL_6,   /*!< Sigma-delta channel 6 */
-    SIGMADELTA_CHANNEL_7,   /*!< Sigma-delta channel 7 */
-#endif
-    SIGMADELTA_CHANNEL_MAX, /*!< Sigma-delta channel max */
-} sigmadelta_channel_t;
-
-#ifdef __cplusplus
-}
-#endif

+ 5 - 0
components/hal/include/hal/temperature_sensor_types.h

@@ -7,6 +7,7 @@
 #pragma once
 
 #include "soc/clk_tree_defs.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -15,7 +16,11 @@ extern "C" {
 /**
  * @brief temperature sensor clock source
  */
+#if SOC_TEMP_SENSOR_SUPPORTED
 typedef soc_periph_temperature_sensor_clk_src_t temperature_sensor_clk_src_t;
+#else
+typedef int temperature_sensor_clk_src_t;
+#endif // SOC_TEMP_SENSOR_SUPPORTED
 
 #ifdef __cplusplus
 }

+ 16 - 0
components/hal/sdm_hal.c

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The HAL layer for sigma delta modulator (common part)
+
+#include "hal/sdm_ll.h"
+#include "hal/sdm_hal.h"
+
+void sdm_hal_init(sdm_hal_context_t *hal, int group_id)
+{
+    (void) group_id;
+    hal->dev = &SDM;
+}

+ 0 - 26
components/hal/sigmadelta_hal.c

@@ -1,26 +0,0 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-// The HAL layer for SIGMADELTA (common part)
-
-#include <stdio.h>
-#include "soc/soc.h"
-#include "hal/sigmadelta_hal.h"
-
-void sigmadelta_hal_init(sigmadelta_hal_context_t *hal, int sigmadelta_num)
-{
-    //Get hardware instance.
-    hal->dev = SIGMADELTA_LL_GET_HW(sigmadelta_num);
-    sigmadelta_ll_set_en(hal->dev, 1);
-}

+ 1 - 1
components/soc/esp32/CMakeLists.txt

@@ -3,6 +3,7 @@ set(srcs
     "dac_periph.c"
     "dport_access.c"
     "gpio_periph.c"
+    "sdm_periph.c"
     "i2c_periph.c"
     "i2s_periph.c"
     "interrupts.c"
@@ -14,7 +15,6 @@ set(srcs
     "rtc_io_periph.c"
     "sdio_slave_periph.c"
     "sdmmc_periph.c"
-    "sigmadelta_periph.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

+ 3 - 3
components/soc/esp32/include/soc/Kconfig.soc_caps.in

@@ -91,7 +91,7 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_SUPPORTED
+config SOC_SDM_SUPPORTED
     bool
     default y
 
@@ -487,11 +487,11 @@ config SOC_RTCIO_WAKE_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_NUM
+config SOC_SDM_GROUPS
     int
     default 1
 
-config SOC_SIGMADELTA_CHANNEL_NUM
+config SOC_SDM_CHANNELS_PER_GROUP
     int
     default 8
 

+ 16 - 12
components/soc/esp32/include/soc/clk_tree_defs.h

@@ -177,7 +177,6 @@ typedef enum {
  * @brief Type of RMT clock source
  */
 typedef enum {
-    RMT_CLK_SRC_NONE = 0,                        /*!< No clock source is selected */
     RMT_CLK_SRC_APB = SOC_MOD_CLK_APB,           /*!< Select APB as the source clock */
     RMT_CLK_SRC_REF_TICK = SOC_MOD_CLK_REF_TICK, /*!< Select REF_TICK as the source clock */
     RMT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,       /*!< Select APB as the default choice */
@@ -192,16 +191,6 @@ typedef enum {
     RMT_BASECLK_DEFAULT = SOC_MOD_CLK_APB,  /*!< RMT source clock default choice is APB */
 } soc_periph_rmt_clk_src_legacy_t;
 
-//////////////////////////////////////////////////Temp Sensor///////////////////////////////////////////////////////////
-
-/**
- * @brief Type of Temp Sensor clock source
- * @note ESP32 does not support temperature sensor
- */
-typedef enum {
-    TEMPERATURE_SENSOR_SRC_NA,
-} soc_periph_temperature_sensor_clk_src_t;
-
 ///////////////////////////////////////////////////UART/////////////////////////////////////////////////////////////////
 
 /**
@@ -243,7 +232,7 @@ typedef enum {
 
 ///////////////////////////////////////////////////I2S//////////////////////////////////////////////////////////////////
 /**
- * @brief Array initializer for all supported clock sources of
+ * @brief Array initializer for all supported clock sources of I2S
  */
 #define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_D2, SOC_MOD_CLK_APLL}
 
@@ -272,6 +261,21 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,
 } soc_periph_i2c_clk_src_t;
 
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SDM
+ */
+#define SOC_SDM_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Sigma Delta Modulator clock source
+ */
+typedef enum {
+    SDM_CLK_SRC_APB = SOC_MOD_CLK_APB,     /*!< Select APB as the source clock */
+    SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
+} soc_periph_sdm_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

+ 7 - 19
components/soc/esp32/include/soc/gpio_sd_reg.h

@@ -1,20 +1,13 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_REG_H_
-#define _SOC_GPIO_SD_REG_H_
+#pragma once
 
 #include "soc.h"
+
 #define GPIO_SIGMADELTA0_REG          (DR_REG_GPIO_SD_BASE + 0x0000)
 /* GPIO_SD0_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
 /*description: */
@@ -151,8 +144,3 @@
 #define GPIO_SD_DATE_V  0xFFFFFFF
 #define GPIO_SD_DATE_S  0
 #define SIGMADELTA_GPIO_SD_DATE_VERSION 0x1506190
-
-
-
-
-#endif /*_SOC_GPIO_SD_REG_H_ */

+ 13 - 22
components/soc/esp32/include/soc/gpio_sd_struct.h

@@ -1,18 +1,10 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_STRUCT_H_
-#define _SOC_GPIO_SD_STRUCT_H_
+#pragma once
 
 #include <stdint.h>
 
@@ -20,8 +12,8 @@
 extern "C" {
 #endif
 
-typedef volatile struct gpio_sd_dev_s {
-    union {
+typedef struct gpio_sd_dev_t {
+    volatile union {
         struct {
             uint32_t duty:        8;
             uint32_t prescale:    8;
@@ -29,21 +21,21 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } channel[8];
-    union {
+    volatile union {
         struct {
             uint32_t reserved0: 31;
             uint32_t clk_en:     1;
         };
         uint32_t val;
     } cg;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0: 31;
             uint32_t spi_swap:   1;
         };
         uint32_t val;
     } misc;
-    union {
+    volatile union {
         struct {
             uint32_t date:      28;
             uint32_t reserved28: 4;
@@ -51,10 +43,9 @@ typedef volatile struct gpio_sd_dev_s {
         uint32_t val;
     } version;
 } gpio_sd_dev_t;
-extern gpio_sd_dev_t SIGMADELTA;
+
+extern gpio_sd_dev_t SDM;
 
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_GPIO_SD_STRUCT_H_ */

+ 4 - 4
components/soc/esp32/include/soc/soc_caps.h

@@ -82,7 +82,7 @@
 #define SOC_RTC_MEM_SUPPORTED       1
 #define SOC_I2S_SUPPORTED           1
 #define SOC_RMT_SUPPORTED           1
-#define SOC_SIGMADELTA_SUPPORTED    1
+#define SOC_SDM_SUPPORTED           1
 #define SOC_SUPPORT_COEXISTENCE     1
 #define SOC_AES_SUPPORTED           1
 #define SOC_MPI_SUPPORTED           1
@@ -247,9 +247,9 @@
 #define SOC_RTCIO_HOLD_SUPPORTED 1
 #define SOC_RTCIO_WAKE_SUPPORTED 1
 
-/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
-#define SOC_SIGMADELTA_NUM            1U
-#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
+/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
+#define SOC_SDM_GROUPS             1U
+#define SOC_SDM_CHANNELS_PER_GROUP 8
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_HD_BOTH_INOUT_SUPPORTED 1  //Support enabling MOSI and MISO phases together under Halfduplex mode

+ 1 - 1
components/soc/esp32/ld/esp32.peripherals.ld

@@ -7,7 +7,7 @@ PROVIDE ( UART0 = 0x3ff40000 );
 PROVIDE ( SPI1 = 0x3ff42000 );
 PROVIDE ( SPI0 = 0x3ff43000 );
 PROVIDE ( GPIO = 0x3ff44000 );
-PROVIDE ( SIGMADELTA = 0x3ff44f00 );
+PROVIDE ( SDM = 0x3ff44f00 );
 PROVIDE ( RTCCNTL = 0x3ff48000 );
 PROVIDE ( RTCIO = 0x3ff48400 );
 PROVIDE ( SENS = 0x3ff48800 );

+ 37 - 0
components/soc/esp32/sdm_periph.c

@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        },
+        [4] = {
+            GPIO_SD4_OUT_IDX
+        },
+        [5] = {
+            GPIO_SD5_OUT_IDX
+        },
+        [6] = {
+            GPIO_SD6_OUT_IDX
+        },
+        [7] = {
+            GPIO_SD7_OUT_IDX
+        }
+    }
+};

+ 0 - 45
components/soc/esp32/sigmadelta_periph.c

@@ -1,45 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sig_map.h"
-
-const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
-    .channels = {
-        [0] = {
-            GPIO_SD0_OUT_IDX
-        },
-        [1] = {
-            GPIO_SD1_OUT_IDX
-        },
-        [2] = {
-            GPIO_SD2_OUT_IDX
-        },
-        [3] = {
-            GPIO_SD3_OUT_IDX
-        },
-        [4] = {
-            GPIO_SD4_OUT_IDX
-        },
-        [5] = {
-            GPIO_SD5_OUT_IDX
-        },
-        [6] = {
-            GPIO_SD6_OUT_IDX
-        },
-        [7] = {
-            GPIO_SD7_OUT_IDX
-        }
-    }
-};

+ 1 - 1
components/soc/esp32c3/CMakeLists.txt

@@ -3,11 +3,11 @@ set(srcs
     "dedic_gpio_periph.c"
     "gdma_periph.c"
     "gpio_periph.c"
+    "sdm_periph.c"
     "interrupts.c"
     "spi_periph.c"
     "ledc_periph.c"
     "rmt_periph.c"
-    "sigmadelta_periph.c"
     "i2s_periph.c"
     "i2c_periph.c"
     "uart_periph.c"

+ 3 - 3
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in

@@ -71,7 +71,7 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_SUPPORTED
+config SOC_SDM_SUPPORTED
     bool
     default y
 
@@ -511,11 +511,11 @@ config SOC_SHA_SUPPORT_SHA256
     bool
     default y
 
-config SOC_SIGMADELTA_NUM
+config SOC_SDM_GROUPS
     int
     default 1
 
-config SOC_SIGMADELTA_CHANNEL_NUM
+config SOC_SDM_CHANNELS_PER_GROUP
     int
     default 4
 

+ 16 - 2
components/soc/esp32c3/include/soc/clk_tree_defs.h

@@ -158,7 +158,6 @@ typedef enum {
  * @brief Type of RMT clock source
  */
 typedef enum {
-    RMT_CLK_SRC_NONE = 0,                      /*!< No clock source is selected */
     RMT_CLK_SRC_APB = SOC_MOD_CLK_APB,         /*!< Select APB as the source clock */
     RMT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
     RMT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,       /*!< Select XTAL as the source clock */
@@ -205,7 +204,7 @@ typedef enum {
 ///////////////////////////////////////////////////// I2S //////////////////////////////////////////////////////////////
 
 /**
- * @brief Array initializer for all supported clock sources of
+ * @brief Array initializer for all supported clock sources of I2S
  */
 #define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M}
 
@@ -233,6 +232,21 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,
 } soc_periph_i2c_clk_src_t;
 
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SDM
+ */
+#define SOC_SDM_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Sigma Delta Modulator clock source
+ */
+typedef enum {
+    SDM_CLK_SRC_APB = SOC_MOD_CLK_APB,     /*!< Select APB as the source clock */
+    SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
+} soc_periph_sdm_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

+ 8 - 20
components/soc/esp32c3/include/soc/gpio_sd_reg.h

@@ -1,24 +1,16 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_REG_H_
-#define _SOC_GPIO_SD_REG_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
+#pragma once
+
+#include "soc.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
-#include "soc.h"
 #define GPIO_SIGMADELTA0_REG          (DR_REG_GPIO_SD_BASE + 0x0000)
 /* GPIO_SD0_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
 /*description: */
@@ -108,7 +100,3 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_GPIO_SD_REG_H_ */

+ 18 - 23
components/soc/esp32c3/include/soc/gpio_sd_struct.h

@@ -1,24 +1,19 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_STRUCT_H_
-#define _SOC_GPIO_SD_STRUCT_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef volatile struct gpio_sd_dev_s {
-    union {
+typedef struct gpio_sd_dev_t {
+    volatile union {
         struct {
             uint32_t duty:         8;
             uint32_t prescale:     8;
@@ -30,14 +25,14 @@ typedef volatile struct gpio_sd_dev_s {
     uint32_t reserved_14;
     uint32_t reserved_18;
     uint32_t reserved_1c;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0: 31;
             uint32_t clk_en:     1;
         };
         uint32_t val;
     } cg;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0:      30;
             uint32_t function_clk_en: 1;
@@ -45,7 +40,7 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } misc;
-    union {
+    volatile union {
         struct {
             uint32_t date:      28;
             uint32_t reserved28: 4;
@@ -53,9 +48,9 @@ typedef volatile struct gpio_sd_dev_s {
         uint32_t val;
     } version;
 } gpio_sd_dev_t;
-extern gpio_sd_dev_t SIGMADELTA;
+
+extern gpio_sd_dev_t SDM;
+
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_GPIO_SD_STRUCT_H_ */

+ 4 - 4
components/soc/esp32c3/include/soc/soc_caps.h

@@ -42,7 +42,7 @@
 #define SOC_RTC_MEM_SUPPORTED           1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-#define SOC_SIGMADELTA_SUPPORTED        1
+#define SOC_SDM_SUPPORTED               1
 #define SOC_SUPPORT_COEXISTENCE         1
 #define SOC_AES_SUPPORTED               1
 #define SOC_MPI_SUPPORTED               1
@@ -247,9 +247,9 @@
 #define SOC_SHA_SUPPORT_SHA224          (1)
 #define SOC_SHA_SUPPORT_SHA256          (1)
 
-/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
-#define SOC_SIGMADELTA_NUM         (1U) // 1 sigma-delta peripheral
-#define SOC_SIGMADELTA_CHANNEL_NUM (4)  // 4 channels
+/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
+#define SOC_SDM_GROUPS             1U
+#define SOC_SDM_CHANNELS_PER_GROUP 4
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_PERIPH_NUM          2

+ 1 - 1
components/soc/esp32c3/ld/esp32c3.peripherals.ld

@@ -8,7 +8,7 @@ PROVIDE ( UART1 = 0x60010000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );
-PROVIDE ( SIGMADELTA = 0x60004f00 );
+PROVIDE ( SDM = 0x60004f00 );
 PROVIDE ( RTCCNTL = 0x60008000 );
 PROVIDE ( RTCIO = 0x60008400 );
 PROVIDE ( EFUSE = 0x60008800 );

+ 25 - 0
components/soc/esp32c3/sdm_periph.c

@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        }
+    }
+};

+ 0 - 33
components/soc/esp32c3/sigmadelta_periph.c

@@ -1,33 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sig_map.h"
-
-const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
-    .channels = {
-        [0] = {
-            GPIO_SD0_OUT_IDX
-        },
-        [1] = {
-            GPIO_SD1_OUT_IDX
-        },
-        [2] = {
-            GPIO_SD2_OUT_IDX
-        },
-        [3] = {
-            GPIO_SD3_OUT_IDX
-        }
-    }
-};

+ 1 - 1
components/soc/esp32h2/CMakeLists.txt

@@ -3,11 +3,11 @@ set(srcs
     "dedic_gpio_periph.c"
     "gdma_periph.c"
     "gpio_periph.c"
+    "sdm_periph.c"
     "interrupts.c"
     "spi_periph.c"
     "ledc_periph.c"
     "rmt_periph.c"
-    "sigmadelta_periph.c"
     "i2s_periph.c"
     "i2c_periph.c"
     "uart_periph.c"

+ 1 - 6
components/soc/esp32h2/include/rev1/soc/gpio_sd_reg.h

@@ -3,8 +3,7 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef _SOC_GPIO_SD_REG_H_
-#define _SOC_GPIO_SD_REG_H_
+#pragma once
 
 #include "soc/soc.h"
 
@@ -100,7 +99,3 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_GPIO_SD_REG_H_ */

+ 1 - 1
components/soc/esp32h2/include/rev2/soc/gpio_sd_reg.h

@@ -5,8 +5,8 @@
  */
 #pragma once
 
-#include <stdint.h>
 #include "soc/soc.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif

+ 3 - 3
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -63,7 +63,7 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_SUPPORTED
+config SOC_SDM_SUPPORTED
     bool
     default y
 
@@ -487,11 +487,11 @@ config SOC_SHA_SUPPORT_SHA256
     bool
     default y
 
-config SOC_SIGMADELTA_NUM
+config SOC_SDM_GROUPS
     int
     default 1
 
-config SOC_SIGMADELTA_CHANNEL_NUM
+config SOC_SDM_CHANNELS_PER_GROUP
     int
     default 4
 

+ 17 - 2
components/soc/esp32h2/include/soc/clk_tree_defs.h

@@ -111,6 +111,7 @@ typedef enum {
     SOC_MOD_CLK_RTC_SLOW,                      /*!< RTC_SLOW_CLK can be sourced from RC_SLOW, XTAL32K, or RC32K by configuring soc_rtc_slow_clk_src_t */
     // For digital domain: peripherals, WIFI, BLE
     SOC_MOD_CLK_AHB,                           /*< AHB_CLK sources from CPU with a configurable divider */
+    SOC_MOD_CLK_APB,                           /*< APB_CLK source is derived from AHB clock */
     SOC_MOD_CLK_XTAL32K,                       /*< XTAL32K_CLK comes from the external 32kHz crystal, passing a clock gating to the peripherals */
     SOC_MOD_CLK_RC_FAST,                       /*< RC_FAST_CLK comes from the internal 8MHz rc oscillator, passing a clock gating to the peripherals */
     SOC_MOD_CLK_XTAL,                          /*< XTAL_CLK comes from the external 32MHz crystal */
@@ -163,7 +164,6 @@ typedef enum {
  * @brief Type of RMT clock source
  */
 typedef enum {
-    RMT_CLK_SRC_NONE = 0,                      /*!< No clock source is selected */
     RMT_CLK_SRC_AHB = SOC_MOD_CLK_AHB,         /*!< Select AHB clock as the source clock */
     RMT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
     RMT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,       /*!< Select XTAL as the source clock */
@@ -218,7 +218,7 @@ typedef enum {
  * @brief I2S clock source enum
  */
 typedef enum {
-    I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL,          /*!< Select SOC_MOD_CLK_PLL as the default source clock  */
+    I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL,        /*!< Select SOC_MOD_CLK_PLL as the default source clock  */
     I2S_CLK_SRC_PLL_96M = SOC_MOD_CLK_PLL,        /*!< Select PLL as the source clock */
 } soc_periph_i2s_clk_src_t;
 
@@ -238,6 +238,21 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,
 } soc_periph_i2c_clk_src_t;
 
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SDM
+ */
+#define SOC_SDM_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Sigma Delta Modulator clock source
+ */
+typedef enum {
+    SDM_CLK_SRC_APB = SOC_MOD_CLK_APB,     /*!< Select APB as the source clock */
+    SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
+} soc_periph_sdm_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

+ 18 - 23
components/soc/esp32h2/include/soc/gpio_sd_struct.h

@@ -1,24 +1,19 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_STRUCT_H_
-#define _SOC_GPIO_SD_STRUCT_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef volatile struct gpio_sd_dev_s {
-    union {
+typedef struct gpio_sd_dev_t {
+    volatile union {
         struct {
             uint32_t duty:         8;
             uint32_t prescale:     8;
@@ -30,14 +25,14 @@ typedef volatile struct gpio_sd_dev_s {
     uint32_t reserved_14;
     uint32_t reserved_18;
     uint32_t reserved_1c;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0: 31;
             uint32_t clk_en:     1;
         };
         uint32_t val;
     } cg;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0:      30;
             uint32_t function_clk_en: 1;
@@ -45,7 +40,7 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } misc;
-    union {
+    volatile union {
         struct {
             uint32_t date:      28;
             uint32_t reserved28: 4;
@@ -53,9 +48,9 @@ typedef volatile struct gpio_sd_dev_s {
         uint32_t val;
     } version;
 } gpio_sd_dev_t;
-extern gpio_sd_dev_t SIGMADELTA;
+
+extern gpio_sd_dev_t SDM;
+
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_GPIO_SD_STRUCT_H_ */

+ 4 - 4
components/soc/esp32h2/include/soc/soc_caps.h

@@ -48,7 +48,7 @@
 #define SOC_RTC_MEM_SUPPORTED           1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-#define SOC_SIGMADELTA_SUPPORTED        1
+#define SOC_SDM_SUPPORTED               1
 #define SOC_AES_SUPPORTED               1
 #define SOC_MPI_SUPPORTED               1
 #define SOC_SHA_SUPPORTED               1
@@ -252,9 +252,9 @@
 #define SOC_SHA_SUPPORT_SHA224          (1)
 #define SOC_SHA_SUPPORT_SHA256          (1)
 
-/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
-#define SOC_SIGMADELTA_NUM         (1U) // 1 sigma-delta peripheral
-#define SOC_SIGMADELTA_CHANNEL_NUM (4)  // 4 channels
+/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
+#define SOC_SDM_GROUPS             1U
+#define SOC_SDM_CHANNELS_PER_GROUP 4
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_PERIPH_NUM          2

+ 1 - 1
components/soc/esp32h2/ld/esp32h2.peripherals.ld

@@ -8,7 +8,7 @@ PROVIDE ( UART1 = 0x60010000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );
-PROVIDE ( SIGMADELTA = 0x60004f00 );
+PROVIDE ( SDM = 0x60004f00 );
 PROVIDE ( RTCCNTL = 0x60008000 );
 PROVIDE ( RTCIO = 0x60008400 );
 PROVIDE ( HINF = 0x6000B000 );

+ 25 - 0
components/soc/esp32h2/sdm_periph.c

@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        }
+    }
+};

+ 0 - 33
components/soc/esp32h2/sigmadelta_periph.c

@@ -1,33 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sig_map.h"
-
-const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
-    .channels = {
-        [0] = {
-            GPIO_SD0_OUT_IDX
-        },
-        [1] = {
-            GPIO_SD1_OUT_IDX
-        },
-        [2] = {
-            GPIO_SD2_OUT_IDX
-        },
-        [3] = {
-            GPIO_SD3_OUT_IDX
-        }
-    }
-};

+ 1 - 1
components/soc/esp32s2/CMakeLists.txt

@@ -3,6 +3,7 @@ set(srcs
     "dac_periph.c"
     "dedic_gpio_periph.c"
     "gpio_periph.c"
+    "sdm_periph.c"
     "i2c_periph.c"
     "i2s_periph.c"
     "interrupts.c"
@@ -11,7 +12,6 @@ set(srcs
     "pcnt_periph.c"
     "rmt_periph.c"
     "rtc_io_periph.c"
-    "sigmadelta_periph.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

+ 3 - 3
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in

@@ -95,7 +95,7 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_SUPPORTED
+config SOC_SDM_SUPPORTED
     bool
     default y
 
@@ -523,11 +523,11 @@ config SOC_RTCIO_WAKE_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_NUM
+config SOC_SDM_GROUPS
     int
     default 1
 
-config SOC_SIGMADELTA_CHANNEL_NUM
+config SOC_SDM_CHANNELS_PER_GROUP
     int
     default 8
 

+ 16 - 2
components/soc/esp32s2/include/soc/clk_tree_defs.h

@@ -178,7 +178,6 @@ typedef enum {
  * @brief Type of RMT clock source
  */
 typedef enum {
-    RMT_CLK_SRC_NONE = 0,                        /*!< No clock source is selected */
     RMT_CLK_SRC_APB = SOC_MOD_CLK_APB,           /*!< Select APB as the source clock */
     RMT_CLK_SRC_REF_TICK = SOC_MOD_CLK_REF_TICK, /*!< Select REF_TICK as the source clock */
     RMT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,       /*!< Select APB as the default choice */
@@ -222,7 +221,7 @@ typedef enum {
 ///////////////////////////////////////////////////// I2S //////////////////////////////////////////////////////////////
 
 /**
- * @brief Array initializer for all supported clock sources of
+ * @brief Array initializer for all supported clock sources of I2S
  */
 #define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_APLL}
 
@@ -251,6 +250,21 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,
 } soc_periph_i2c_clk_src_t;
 
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SDM
+ */
+#define SOC_SDM_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Sigma Delta Modulator clock source
+ */
+typedef enum {
+    SDM_CLK_SRC_APB = SOC_MOD_CLK_APB,     /*!< Select APB as the source clock */
+    SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
+} soc_periph_sdm_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

+ 8 - 20
components/soc/esp32s2/include/soc/gpio_sd_reg.h

@@ -1,24 +1,16 @@
-// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_REG_H_
-#define _SOC_GPIO_SD_REG_H_
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
+#pragma once
+
+#include "soc.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
-#include "soc.h"
 #define GPIO_SIGMADELTA0_REG          (DR_REG_GPIO_SD_BASE + 0x0000)
 /* GPIO_SD0_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
 /*description: */
@@ -164,7 +156,3 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_GPIO_SD_REG_H_ */

+ 18 - 23
components/soc/esp32s2/include/soc/gpio_sd_struct.h

@@ -1,24 +1,19 @@
-// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_STRUCT_H_
-#define _SOC_GPIO_SD_STRUCT_H_
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef volatile struct gpio_sd_dev_s {
-    union {
+typedef struct gpio_sd_dev_t {
+    volatile union {
         struct {
             uint32_t duty:         8;
             uint32_t prescale:     8;
@@ -26,14 +21,14 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } channel[8];
-    union {
+    volatile union {
         struct {
             uint32_t reserved0: 31;
             uint32_t clk_en:     1;
         };
         uint32_t val;
     } cg;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0:      30;
             uint32_t function_clk_en: 1;
@@ -41,7 +36,7 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } misc;
-    union {
+    volatile union {
         struct {
             uint32_t date:      28;
             uint32_t reserved28: 4;
@@ -49,9 +44,9 @@ typedef volatile struct gpio_sd_dev_s {
         uint32_t val;
     } version;
 } gpio_sd_dev_t;
-extern gpio_sd_dev_t SIGMADELTA;
+
+extern gpio_sd_dev_t SDM;
+
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_GPIO_SD_STRUCT_H_ */

+ 4 - 4
components/soc/esp32s2/include/soc/soc_caps.h

@@ -62,7 +62,7 @@
 #define SOC_XT_WDT_SUPPORTED            1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-#define SOC_SIGMADELTA_SUPPORTED        1
+#define SOC_SDM_SUPPORTED               1
 #define SOC_SUPPORT_COEXISTENCE         0
 #define SOC_AES_SUPPORTED               1
 #define SOC_MPI_SUPPORTED               1
@@ -235,9 +235,9 @@
 #define SOC_RTCIO_WAKE_SUPPORTED 1
 
 
-/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
-#define SOC_SIGMADELTA_NUM            1U
-#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
+/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
+#define SOC_SDM_GROUPS             1U
+#define SOC_SDM_CHANNELS_PER_GROUP 8
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_HD_BOTH_INOUT_SUPPORTED     1   //Support enabling MOSI and MISO phases together under Halfduplex mode

+ 1 - 1
components/soc/esp32s2/ld/esp32s2.peripherals.ld

@@ -7,7 +7,7 @@ PROVIDE ( UART0 = 0x3f400000 );
 PROVIDE ( SPIMEM1 = 0x3f402000 );
 PROVIDE ( SPIMEM0 = 0x3f403000 );
 PROVIDE ( GPIO = 0x3f404000 );
-PROVIDE ( SIGMADELTA = 0x3f404f00 );
+PROVIDE ( SDM = 0x3f404f00 );
 PROVIDE ( RTCCNTL = 0x3f408000 );
 PROVIDE ( RTCIO = 0x3f408400 );
 PROVIDE ( SENS = 0x3f408800 );

+ 37 - 0
components/soc/esp32s2/sdm_periph.c

@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        },
+        [4] = {
+            GPIO_SD4_OUT_IDX
+        },
+        [5] = {
+            GPIO_SD5_OUT_IDX
+        },
+        [6] = {
+            GPIO_SD6_OUT_IDX
+        },
+        [7] = {
+            GPIO_SD7_OUT_IDX
+        }
+    }
+};

+ 0 - 45
components/soc/esp32s2/sigmadelta_periph.c

@@ -1,45 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sig_map.h"
-
-const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
-    .channels = {
-        [0] = {
-            GPIO_SD0_OUT_IDX
-        },
-        [1] = {
-            GPIO_SD1_OUT_IDX
-        },
-        [2] = {
-            GPIO_SD2_OUT_IDX
-        },
-        [3] = {
-            GPIO_SD3_OUT_IDX
-        },
-        [4] = {
-            GPIO_SD4_OUT_IDX
-        },
-        [5] = {
-            GPIO_SD5_OUT_IDX
-        },
-        [6] = {
-            GPIO_SD6_OUT_IDX
-        },
-        [7] = {
-            GPIO_SD7_OUT_IDX
-        }
-    }
-};

+ 1 - 1
components/soc/esp32s3/CMakeLists.txt

@@ -3,6 +3,7 @@ set(srcs
     "dedic_gpio_periph.c"
     "gdma_periph.c"
     "gpio_periph.c"
+    "sdm_periph.c"
     "i2c_periph.c"
     "i2s_periph.c"
     "interrupts.c"
@@ -14,7 +15,6 @@ set(srcs
     "rtc_io_periph.c"
     "sdio_slave_periph.c"
     "sdmmc_periph.c"
-    "sigmadelta_periph.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

+ 3 - 3
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in

@@ -147,7 +147,7 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_SUPPORTED
+config SOC_SDM_SUPPORTED
     bool
     default y
 
@@ -607,11 +607,11 @@ config SOC_RTCIO_WAKE_SUPPORTED
     bool
     default y
 
-config SOC_SIGMADELTA_NUM
+config SOC_SDM_GROUPS
     bool
     default y
 
-config SOC_SIGMADELTA_CHANNEL_NUM
+config SOC_SDM_CHANNELS_PER_GROUP
     int
     default 8
 

+ 16 - 2
components/soc/esp32s3/include/soc/clk_tree_defs.h

@@ -177,7 +177,6 @@ typedef enum {
  * @brief Type of RMT clock source
  */
 typedef enum {
-    RMT_CLK_SRC_NONE = 0,                      /*!< No clock source is selected */
     RMT_CLK_SRC_APB = SOC_MOD_CLK_APB,         /*!< Select APB as the source clock */
     RMT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
     RMT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,       /*!< Select XTAL as the source clock */
@@ -251,7 +250,7 @@ typedef enum {
 ///////////////////////////////////////////////////// I2S //////////////////////////////////////////////////////////////
 
 /**
- * @brief Array initializer for all supported clock sources of
+ * @brief Array initializer for all supported clock sources of I2S
  */
 #define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M}
 
@@ -279,6 +278,21 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,
 } soc_periph_i2c_clk_src_t;
 
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SDM
+ */
+#define SOC_SDM_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Sigma Delta Modulator clock source
+ */
+typedef enum {
+    SDM_CLK_SRC_APB = SOC_MOD_CLK_APB,     /*!< Select APB as the source clock */
+    SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
+} soc_periph_sdm_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

+ 7 - 20
components/soc/esp32s3/include/soc/gpio_sd_reg.h

@@ -1,21 +1,13 @@
-// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_REG_H_
-#define _SOC_GPIO_SD_REG_H_
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
+#pragma once
 
 #include "soc.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -162,11 +154,6 @@ extern "C" {
 #define GPIO_SD_DATE_V  0xFFFFFFF
 #define GPIO_SD_DATE_S  0
 
-
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_GPIO_REG_H_ */

+ 15 - 25
components/soc/esp32s3/include/soc/gpio_sd_struct.h

@@ -1,27 +1,19 @@
-// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_GPIO_SD_STRUCT_H_
-#define _SOC_GPIO_SD_STRUCT_H_
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
+#pragma once
 
 #include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef volatile struct gpio_sd_dev_s {
-    union {
+typedef struct gpio_sd_dev_t {
+    volatile union {
         struct {
             uint32_t duty                          :    8;
             uint32_t prescale                      :    8;
@@ -29,14 +21,14 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } channel[8];
-    union {
+    volatile union {
         struct {
             uint32_t reserved0                     :    31;
             uint32_t clk_en                        :    1;
         };
         uint32_t val;
     } cg;
-    union {
+    volatile union {
         struct {
             uint32_t reserved0                     :    30;
             uint32_t function_clk_en               :    1;
@@ -44,7 +36,7 @@ typedef volatile struct gpio_sd_dev_s {
         };
         uint32_t val;
     } misc;
-    union {
+    volatile union {
         struct {
             uint32_t date                          :    28;
             uint32_t reserved28                    :    4;
@@ -52,11 +44,9 @@ typedef volatile struct gpio_sd_dev_s {
         uint32_t val;
     } version;
 } gpio_sd_dev_t;
-extern gpio_sd_dev_t SIGMADELTA;
+
+extern gpio_sd_dev_t SDM;
+
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_GPIO_STRUCT_H_ */

+ 4 - 4
components/soc/esp32s3/include/soc/soc_caps.h

@@ -51,7 +51,7 @@
 #define SOC_XT_WDT_SUPPORTED            1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-#define SOC_SIGMADELTA_SUPPORTED        1
+#define SOC_SDM_SUPPORTED               1
 #define SOC_SUPPORT_COEXISTENCE         1
 #define SOC_TEMP_SENSOR_SUPPORTED       1
 #define SOC_AES_SUPPORTED               1
@@ -250,9 +250,9 @@
 #define SOC_RTCIO_HOLD_SUPPORTED 1
 #define SOC_RTCIO_WAKE_SUPPORTED 1
 
-/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
-#define SOC_SIGMADELTA_NUM         (1) // 1 sigma-delta peripheral
-#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
+/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
+#define SOC_SDM_GROUPS             1
+#define SOC_SDM_CHANNELS_PER_GROUP 8
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_PERIPH_NUM                  3

+ 1 - 1
components/soc/esp32s3/ld/esp32s3.peripherals.ld

@@ -7,7 +7,7 @@ PROVIDE ( UART0 = 0x60000000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );
-PROVIDE ( SIGMADELTA = 0x60004f00 );
+PROVIDE ( SDM = 0x60004f00 );
 PROVIDE ( EFUSE = 0x60007000 );
 PROVIDE ( RTCCNTL = 0x60008000 );
 PROVIDE ( RTCIO = 0x60008400 );

+ 37 - 0
components/soc/esp32s3/sdm_periph.c

@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        },
+        [4] = {
+            GPIO_SD4_OUT_IDX
+        },
+        [5] = {
+            GPIO_SD5_OUT_IDX
+        },
+        [6] = {
+            GPIO_SD6_OUT_IDX
+        },
+        [7] = {
+            GPIO_SD7_OUT_IDX
+        }
+    }
+};

+ 0 - 45
components/soc/esp32s3/sigmadelta_periph.c

@@ -1,45 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#include "soc/sigmadelta_periph.h"
-#include "soc/gpio_sig_map.h"
-
-const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
-    .channels = {
-        [0] = {
-            GPIO_SD0_OUT_IDX
-        },
-        [1] = {
-            GPIO_SD1_OUT_IDX
-        },
-        [2] = {
-            GPIO_SD2_OUT_IDX
-        },
-        [3] = {
-            GPIO_SD3_OUT_IDX
-        },
-        [4] = {
-            GPIO_SD4_OUT_IDX
-        },
-        [5] = {
-            GPIO_SD5_OUT_IDX
-        },
-        [6] = {
-            GPIO_SD6_OUT_IDX
-        },
-        [7] = {
-            GPIO_SD7_OUT_IDX
-        }
-    }
-};

+ 25 - 0
components/soc/include/soc/sdm_periph.h

@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const int sd_sig;
+    } channels[SOC_SDM_CHANNELS_PER_GROUP];
+} sigma_delta_signal_conn_t;
+
+extern const sigma_delta_signal_conn_t sigma_delta_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif

+ 0 - 36
components/soc/include/soc/sigmadelta_periph.h

@@ -1,36 +0,0 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#include <stdint.h>
-#include "soc/soc_caps.h"
-#include "soc/gpio_sd_reg.h"
-#include "soc/gpio_sd_struct.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct {
-    struct {
-        const uint32_t sd_sig;
-    } channels[SOC_SIGMADELTA_CHANNEL_NUM];
-} sigma_delta_signal_conn_t;
-
-extern const sigma_delta_signal_conn_t sigma_delta_periph_signals;
-
-#ifdef __cplusplus
-}
-#endif

+ 0 - 23
tools/ci/check_copyright_ignore.txt

@@ -741,7 +741,6 @@ components/hal/esp32/include/hal/can_types.h
 components/hal/esp32/include/hal/mpu_ll.h
 components/hal/esp32/include/hal/rtc_io_ll.h
 components/hal/esp32/include/hal/rwdt_ll.h
-components/hal/esp32/include/hal/sigmadelta_ll.h
 components/hal/esp32/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32/include/hal/touch_sensor_hal.h
 components/hal/esp32/include/hal/trace_ll.h
@@ -754,7 +753,6 @@ components/hal/esp32c3/include/hal/hmac_ll.h
 components/hal/esp32c3/include/hal/mpu_ll.h
 components/hal/esp32c3/include/hal/rtc_cntl_ll.h
 components/hal/esp32c3/include/hal/sha_ll.h
-components/hal/esp32c3/include/hal/sigmadelta_ll.h
 components/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32c3/include/hal/uhci_ll.h
 components/hal/esp32c3/include/hal/usb_serial_jtag_ll.h
@@ -767,7 +765,6 @@ components/hal/esp32h2/include/hal/hmac_ll.h
 components/hal/esp32h2/include/hal/mpu_ll.h
 components/hal/esp32h2/include/hal/rtc_cntl_ll.h
 components/hal/esp32h2/include/hal/sha_ll.h
-components/hal/esp32h2/include/hal/sigmadelta_ll.h
 components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32h2/include/hal/uhci_ll.h
 components/hal/esp32h2/include/hal/uhci_types.h
@@ -779,7 +776,6 @@ components/hal/esp32s2/include/hal/dedic_gpio_ll.h
 components/hal/esp32s2/include/hal/mpu_ll.h
 components/hal/esp32s2/include/hal/rtc_io_ll.h
 components/hal/esp32s2/include/hal/sha_ll.h
-components/hal/esp32s2/include/hal/sigmadelta_ll.h
 components/hal/esp32s2/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32s2/include/hal/trace_ll.h
 components/hal/esp32s2/include/hal/usb_ll.h
@@ -788,7 +784,6 @@ components/hal/esp32s3/include/hal/aes_ll.h
 components/hal/esp32s3/include/hal/mpu_ll.h
 components/hal/esp32s3/include/hal/rwdt_ll.h
 components/hal/esp32s3/include/hal/sha_ll.h
-components/hal/esp32s3/include/hal/sigmadelta_ll.h
 components/hal/esp32s3/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32s3/include/hal/uhci_ll.h
 components/hal/esp32s3/include/hal/usb_ll.h
@@ -805,7 +800,6 @@ components/hal/include/hal/rtc_io_types.h
 components/hal/include/hal/sdio_slave_hal.h
 components/hal/include/hal/sdio_slave_ll.h
 components/hal/include/hal/sha_hal.h
-components/hal/include/hal/sigmadelta_hal.h
 components/hal/include/hal/spi_flash_encrypt_hal.h
 components/hal/include/hal/spi_slave_hal.h
 components/hal/include/hal/spi_slave_hd_hal.h
@@ -821,7 +815,6 @@ components/hal/platform_port/include/hal/check.h
 components/hal/platform_port/include/hal/misc.h
 components/hal/rtc_io_hal.c
 components/hal/sha_hal.c
-components/hal/sigmadelta_hal.c
 components/hal/spi_flash_encrypt_hal_iram.c
 components/hal/spi_flash_hal_gpspi.c
 components/hal/spi_slave_hal.c
@@ -1022,8 +1015,6 @@ components/soc/esp32/include/soc/fe_reg.h
 components/soc/esp32/include/soc/flash_encryption_reg.h
 components/soc/esp32/include/soc/gpio_pins.h
 components/soc/esp32/include/soc/gpio_reg.h
-components/soc/esp32/include/soc/gpio_sd_reg.h
-components/soc/esp32/include/soc/gpio_sd_struct.h
 components/soc/esp32/include/soc/gpio_sig_map.h
 components/soc/esp32/include/soc/gpio_struct.h
 components/soc/esp32/include/soc/hinf_reg.h
@@ -1070,7 +1061,6 @@ components/soc/esp32/interrupts.c
 components/soc/esp32/ledc_periph.c
 components/soc/esp32/sdio_slave_periph.c
 components/soc/esp32/sdmmc_periph.c
-components/soc/esp32/sigmadelta_periph.c
 components/soc/esp32/spi_periph.c
 components/soc/esp32/touch_sensor_periph.c
 components/soc/esp32/uart_periph.c
@@ -1088,8 +1078,6 @@ components/soc/esp32c3/include/soc/extmem_reg.h
 components/soc/esp32c3/include/soc/fe_reg.h
 components/soc/esp32c3/include/soc/gpio_pins.h
 components/soc/esp32c3/include/soc/gpio_reg.h
-components/soc/esp32c3/include/soc/gpio_sd_reg.h
-components/soc/esp32c3/include/soc/gpio_sd_struct.h
 components/soc/esp32c3/include/soc/gpio_sig_map.h
 components/soc/esp32c3/include/soc/gpio_struct.h
 components/soc/esp32c3/include/soc/hwcrypto_reg.h
@@ -1126,7 +1114,6 @@ components/soc/esp32c3/include/soc/usb_serial_jtag_struct.h
 components/soc/esp32c3/include/soc/wdev_reg.h
 components/soc/esp32c3/interrupts.c
 components/soc/esp32c3/ledc_periph.c
-components/soc/esp32c3/sigmadelta_periph.c
 components/soc/esp32c3/spi_periph.c
 components/soc/esp32c3/uart_periph.c
 components/soc/esp32h2/i2c_periph.c
@@ -1142,8 +1129,6 @@ components/soc/esp32h2/include/soc/efuse_reg.h
 components/soc/esp32h2/include/soc/efuse_struct.h
 components/soc/esp32h2/include/soc/extmem_reg.h
 components/soc/esp32h2/include/soc/fe_reg.h
-components/soc/esp32h2/include/soc/gpio_sd_reg.h
-components/soc/esp32h2/include/soc/gpio_sd_struct.h
 components/soc/esp32h2/include/soc/hwcrypto_reg.h
 components/soc/esp32h2/include/soc/interrupt_reg.h
 components/soc/esp32h2/include/soc/ledc_reg.h
@@ -1168,7 +1153,6 @@ components/soc/esp32h2/include/soc/usb_serial_jtag_reg.h
 components/soc/esp32h2/include/soc/usb_serial_jtag_struct.h
 components/soc/esp32h2/include/soc/wdev_reg.h
 components/soc/esp32h2/ledc_periph.c
-components/soc/esp32h2/sigmadelta_periph.c
 components/soc/esp32h2/spi_periph.c
 components/soc/esp32h2/uart_periph.c
 components/soc/esp32s2/adc_periph.c
@@ -1191,8 +1175,6 @@ components/soc/esp32s2/include/soc/extmem_reg.h
 components/soc/esp32s2/include/soc/fe_reg.h
 components/soc/esp32s2/include/soc/gpio_pins.h
 components/soc/esp32s2/include/soc/gpio_reg.h
-components/soc/esp32s2/include/soc/gpio_sd_reg.h
-components/soc/esp32s2/include/soc/gpio_sd_struct.h
 components/soc/esp32s2/include/soc/gpio_sig_map.h
 components/soc/esp32s2/include/soc/gpio_struct.h
 components/soc/esp32s2/include/soc/hwcrypto_reg.h
@@ -1243,7 +1225,6 @@ components/soc/esp32s2/include/soc/usbh_struct.h
 components/soc/esp32s2/include/soc/wdev_reg.h
 components/soc/esp32s2/interrupts.c
 components/soc/esp32s2/ledc_periph.c
-components/soc/esp32s2/sigmadelta_periph.c
 components/soc/esp32s2/spi_periph.c
 components/soc/esp32s2/touch_sensor_periph.c
 components/soc/esp32s2/uart_periph.c
@@ -1265,8 +1246,6 @@ components/soc/esp32s3/include/soc/extmem_struct.h
 components/soc/esp32s3/include/soc/fe_reg.h
 components/soc/esp32s3/include/soc/gpio_pins.h
 components/soc/esp32s3/include/soc/gpio_reg.h
-components/soc/esp32s3/include/soc/gpio_sd_reg.h
-components/soc/esp32s3/include/soc/gpio_sd_struct.h
 components/soc/esp32s3/include/soc/gpio_sig_map.h
 components/soc/esp32s3/include/soc/hinf_reg.h
 components/soc/esp32s3/include/soc/hinf_struct.h
@@ -1336,7 +1315,6 @@ components/soc/esp32s3/ledc_periph.c
 components/soc/esp32s3/rtc_io_periph.c
 components/soc/esp32s3/sdio_slave_periph.c
 components/soc/esp32s3/sdmmc_periph.c
-components/soc/esp32s3/sigmadelta_periph.c
 components/soc/esp32s3/spi_periph.c
 components/soc/esp32s3/uart_periph.c
 components/soc/esp32s3/usb_periph.c
@@ -1354,7 +1332,6 @@ components/soc/include/soc/rtc_periph.h
 components/soc/include/soc/sdio_slave_periph.h
 components/soc/include/soc/sdmmc_periph.h
 components/soc/include/soc/sens_periph.h
-components/soc/include/soc/sigmadelta_periph.h
 components/soc/include/soc/spi_periph.h
 components/soc/include/soc/syscon_periph.h
 components/soc/include/soc/touch_sensor_periph.h

+ 0 - 8
tools/ci/check_public_headers_exceptions.txt

@@ -215,18 +215,10 @@ components/soc/esp32c3/include/soc/uhci_struct.h
 
 components/driver/deprecated/driver/i2s_types_legacy.h
 components/driver/deprecated/driver/i2s.h
-components/driver/deprecated/driver/rmt_types_legacy.h
-components/driver/deprecated/driver/rmt.h
 components/driver/include/driver/i2s_common.h
 components/driver/include/driver/i2s_pdm.h
 components/driver/include/driver/i2s_std.h
 components/driver/include/driver/i2s_tdm.h
-components/driver/include/driver/rmt_common.h
-components/driver/include/driver/rmt_encoder.h
-components/driver/include/driver/rmt_rx.h
-components/driver/include/driver/rmt_tx.h
-components/driver/include/driver/rmt_types.h
-components/driver/include/driver/sigmadelta.h
 components/efuse/esp32c2/include/esp_efuse_table.h
 components/soc/esp32c2/include/soc/rtc_cntl_struct.h
 components/soc/esp32c2/include/soc/spi_mem_struct.h