Jelajahi Sumber

global: move the soc component out of the common list

This MR removes the common dependency from every IDF components to the SOC component.

Currently, in the ``idf_functions.cmake`` script, we include the header path of SOC component by default for all components.
But for better code organization (or maybe also benifits to the compiling speed), we may remove the dependency to SOC components for most components except the driver and kernel related components.

In CMAKE, we have two kinds of header visibilities (set by include path visibility):

(Assume component A --(depends on)--> B, B is the current component)

1. public (``COMPONENT_ADD_INCLUDEDIRS``): means this path is visible to other depending components (A) (visible to A and B)
2. private (``COMPONENT_PRIV_INCLUDEDIRS``): means this path is only visible to source files inside the component (visible to B only)

and we have two kinds of depending ways:

(Assume component A --(depends on)--> B --(depends on)--> C, B is the current component)

1. public (```COMPONENT_REQUIRES```): means B can access to public include path of C. All other components rely on you (A) will also be available for the public headers. (visible to A, B)
2. private (``COMPONENT_PRIV_REQUIRES``): means B can access to public include path of C, but don't propagate this relation to other components (A). (visible to B)

1. remove the common requirement in ``idf_functions.cmake``, this makes the SOC components invisible to all other components by default.
2. if a component (for example, DRIVER) really needs the dependency to SOC, add a private dependency to SOC for it.
3. some other components that don't really depends on the SOC may still meet some errors saying "can't find header soc/...", this is because it's depended component (DRIVER) incorrectly include the header of SOC in its public headers. Moving all this kind of #include into source files, or private headers
4. Fix the include requirements for some file which miss sufficient #include directives. (Previously they include some headers by the long long long header include link)

This is a breaking change. Previous code may depends on the long include chain.
You may need to include the following headers for some files after this commit:

- soc/soc.h
- soc/soc_memory_layout.h
- driver/gpio.h
- esp_sleep.h

The major broken include chain includes:

1. esp_system.h no longer includes esp_sleep.h. The latter includes driver/gpio.h and driver/touch_pad.h.
2. ets_sys.h no longer includes soc/soc.h
3. freertos/portmacro.h no longer includes soc/soc_memory_layout.h

some peripheral headers no longer includes their hw related headers, e.g. rom/gpio.h no longer includes soc/gpio_pins.h and soc/gpio_reg.h

BREAKING CHANGE
Michael (XIAO Xufeng) 7 tahun lalu
induk
melakukan
562af8f65e
74 mengubah file dengan 409 tambahan dan 216 penghapusan
  1. 19 0
      Kconfig
  2. 1 1
      components/app_trace/CMakeLists.txt
  3. 2 1
      components/app_update/test/test_switch_ota.c
  4. 5 1
      components/bootloader/subproject/CMakeLists.txt
  5. 2 2
      components/bootloader_support/CMakeLists.txt
  6. 1 0
      components/bootloader_support/src/bootloader_common.c
  7. 1 0
      components/bootloader_support/src/bootloader_init.c
  8. 1 0
      components/bootloader_support/src/flash_qio_mode.c
  9. 1 1
      components/bt/CMakeLists.txt
  10. 101 100
      components/bt/bluedroid/common/include/common/bt_trace.h
  11. 1 0
      components/cxx/test/test_cxx.cpp
  12. 1 1
      components/driver/CMakeLists.txt
  13. 1 0
      components/driver/i2c.c
  14. 8 6
      components/driver/include/driver/gpio.h
  15. 2 1
      components/driver/rmt.c
  16. 2 0
      components/driver/sdio_slave.c
  17. 1 0
      components/driver/test/test_common_spi.c
  18. 1 0
      components/driver/test/test_spi_master.c
  19. 1 0
      components/driver/test/test_spi_slave.c
  20. 1 1
      components/efuse/CMakeLists.txt
  21. 3 2
      components/esp32/CMakeLists.txt
  22. 1 0
      components/esp32/pm_esp32.c
  23. 1 0
      components/esp32/sleep_modes.c
  24. 1 0
      components/esp32/test/test_fastbus.c
  25. 2 1
      components/esp32/test/test_reset_reason.c
  26. 1 0
      components/esp_common/CMakeLists.txt
  27. 57 0
      components/esp_common/include/esp_bit_defs.h
  28. 4 1
      components/esp_common/include/esp_system.h
  29. 1 0
      components/esp_common/src/esp_timer.c
  30. 5 0
      components/esp_rom/include/esp32/rom/ets_sys.h
  31. 5 0
      components/esp_rom/include/esp32/rom/gpio.h
  32. 5 1
      components/esp_rom/include/esp32/rom/spi_flash.h
  33. 3 3
      components/espcoredump/CMakeLists.txt
  34. 1 1
      components/ethernet/CMakeLists.txt
  35. 2 0
      components/ethernet/include/eth_phy/phy_reg.h
  36. 1 0
      components/fatfs/test_fatfs_host/Makefile.files
  37. 3 2
      components/freertos/CMakeLists.txt
  38. 1 1
      components/freertos/component.mk
  39. 8 9
      components/freertos/include/freertos/portmacro.h
  40. 80 0
      components/freertos/portmacro_priv.h
  41. 3 2
      components/freertos/portmux_impl.h
  42. 1 0
      components/freertos/tasks.c
  43. 1 0
      components/freertos/test/test_freertos.c
  44. 1 0
      components/heap/CMakeLists.txt
  45. 1 0
      components/log/CMakeLists.txt
  46. 0 1
      components/lwip/port/esp32/vfs_lwip.c
  47. 3 1
      components/mbedtls/CMakeLists.txt
  48. 1 0
      components/newlib/CMakeLists.txt
  49. 1 0
      components/pthread/pthread.c
  50. 1 0
      components/sdmmc/CMakeLists.txt
  51. 1 1
      components/soc/CMakeLists.txt
  52. 2 41
      components/soc/esp32/include/soc/soc.h
  53. 4 0
      components/soc/include/soc/gpio_periph.h
  54. 5 0
      components/soc/src/soc_include_legacy_warn.c
  55. 2 2
      components/spi_flash/CMakeLists.txt
  56. 3 2
      components/spi_flash/flash_mmap.c
  57. 1 0
      components/spi_flash/flash_ops.c
  58. 1 0
      components/spi_flash/sim/Makefile.files
  59. 1 0
      components/spi_flash/sim/stubs/Makefile.files
  60. 2 0
      components/spi_flash/spi_flash_rom_patch.c
  61. 1 0
      components/spiffs/test_spiffs_host/Makefile.files
  62. 1 1
      components/ulp/test/CMakeLists.txt
  63. 1 0
      components/wear_levelling/test_wl_host/Makefile.files
  64. 1 1
      components/wpa_supplicant/port/os_xtensa.c
  65. 15 14
      components/wpa_supplicant/src/crypto/crypto_mbedtls.c
  66. 2 3
      components/wpa_supplicant/src/wpa2/tls/rsa.c
  67. 0 1
      components/wpa_supplicant/src/wps/wps_attr_build.c
  68. 2 4
      components/wpa_supplicant/src/wps/wps_enrollee.c
  69. 1 0
      components/xtensa/CMakeLists.txt
  70. 3 4
      components/xtensa/include/trax.h
  71. 2 1
      examples/peripherals/spi_slave/receiver/main/app_main.c
  72. 1 0
      examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c
  73. 1 0
      examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c
  74. 5 1
      tools/cmake/idf_functions.cmake

+ 19 - 0
Kconfig

@@ -205,3 +205,22 @@ mainmenu "Espressif IoT Development Framework Configuration"
     menu "Component config"
         source "$COMPONENT_KCONFIGS"
     endmenu
+
+    menu "Compatibility options"
+        config LEGACY_INCLUDE_COMMON_HEADERS
+            bool "Include headers accross components as before IDF v4.0"
+            default n
+            help
+                Soc, esp32, and driver components, the most common
+                components. Some header of these components are included
+                implicitly by headers of other components before IDF v4.0.
+                It's not required for high-level components, but still
+                included through long header chain everywhere.
+
+                This is harmful to the modularity. So it's changed in IDF
+                v4.0.
+
+                You can still include these headers in a legacy way until it
+                is totally deprecated by enable this option.
+
+    endmenu #Compatibility options

+ 1 - 1
components/app_trace/CMakeLists.txt

@@ -23,7 +23,7 @@ if(CONFIG_HEAP_TRACING_TOHOST)
 endif()
 
 set(COMPONENT_REQUIRES)
-set(COMPONENT_PRIV_REQUIRES heap)
+set(COMPONENT_PRIV_REQUIRES heap soc)
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
 
 register_component()

+ 2 - 1
components/app_update/test/test_switch_ota.c

@@ -5,6 +5,7 @@
 #include <esp_types.h>
 #include <stdio.h>
 #include "string.h"
+#include "sdkconfig.h"
 
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/rtc.h"
@@ -28,8 +29,8 @@
 #include "nvs_flash.h"
 
 #include "driver/gpio.h"
+#include "esp_sleep.h"
 
-#include "sdkconfig.h"
 
 RTC_DATA_ATTR static int boot_count = 0;
 static const char *TAG = "ota_test";

+ 5 - 1
components/bootloader/subproject/CMakeLists.txt

@@ -14,7 +14,11 @@ set(COMPONENTS bootloader esptool_py partition_table soc bootloader_support log
 set(BOOTLOADER_BUILD 1)
 add_definitions(-DBOOTLOADER_BUILD=1)
 
-set(COMPONENT_REQUIRES_COMMON log soc esp_rom esp_common xtensa)
+set(COMPONENT_REQUIRES_COMMON log esp_rom esp_common xtensa)
+
+if (CONFIG_LEGACY_INCLUDE_COMMON_HEADERS)
+    list(APPEND COMPONENT_REQUIRES_COMMON "soc")
+endif()
 
 include("${IDF_PATH}/tools/cmake/project.cmake")
 project(bootloader)

+ 2 - 2
components/bootloader_support/CMakeLists.txt

@@ -13,7 +13,7 @@ set(COMPONENT_SRCS "src/bootloader_clock.c"
 
 if(${BOOTLOADER_BUILD})
     set(COMPONENT_ADD_INCLUDEDIRS "include include_bootloader")
-    set(COMPONENT_REQUIRES)
+    set(COMPONENT_REQUIRES soc) #unfortunately the header directly uses SOC registers
     set(COMPONENT_PRIV_REQUIRES spi_flash micro-ecc efuse)
     list(APPEND COMPONENT_SRCS "src/bootloader_init.c")
 
@@ -53,7 +53,7 @@ if(${BOOTLOADER_BUILD})
 else()
     set(COMPONENT_ADD_INCLUDEDIRS "include")
     set(COMPONENT_PRIV_INCLUDEDIRS "include_bootloader")
-    set(COMPONENT_REQUIRES)
+    set(COMPONENT_REQUIRES soc) #unfortunately the header directly uses SOC registers
     set(COMPONENT_PRIV_REQUIRES spi_flash mbedtls efuse)
 endif()
 

+ 1 - 0
components/bootloader_support/src/bootloader_common.c

@@ -26,6 +26,7 @@
 #include "bootloader_flash.h"
 #include "bootloader_common.h"
 #include "soc/gpio_periph.h"
+#include "soc/efuse_reg.h"
 #include "esp_image_format.h"
 #include "bootloader_sha.h"
 #include "sys/param.h"

+ 1 - 0
components/bootloader_support/src/bootloader_init.c

@@ -40,6 +40,7 @@
 #include "soc/gpio_reg.h"
 #include "soc/gpio_sig_map.h"
 #include "soc/rtc_wdt.h"
+#include "soc/spi_reg.h"
 
 #include "sdkconfig.h"
 #include "esp_image_format.h"

+ 1 - 0
components/bootloader_support/src/flash_qio_mode.c

@@ -19,6 +19,7 @@
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/efuse.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "soc/efuse_reg.h"
 #include "sdkconfig.h"
 

+ 1 - 1
components/bt/CMakeLists.txt

@@ -274,7 +274,7 @@ if(CONFIG_BT_ENABLED)
 endif()
 
 # requirements can't depend on config
-set(COMPONENT_PRIV_REQUIRES nvs_flash)
+set(COMPONENT_PRIV_REQUIRES nvs_flash soc)
 
 register_component()
 

+ 101 - 100
components/bt/bluedroid/common/include/common/bt_trace.h

@@ -21,6 +21,7 @@
 
 #include "sdkconfig.h"
 
+#include <assert.h>
 #include <stdio.h>
 #include "stack/bt_types.h"
 
@@ -53,7 +54,7 @@
 #define BT_PRINT_V(tag, format, ...)   {esp_log_write(ESP_LOG_VERBOSE, tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
 
 #ifndef assert
-#define assert(x)   do { if (!(x)) BT_PRINT_E("bt host error %s %u\n", __FILE__, __LINE__); } while (0)
+#define assert(x)   do { if (!(x)) BT_PRINT_E(TAG, "bt host error %s %u\n", __FILE__, __LINE__); } while (0)
 #endif
 
 inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t len)
@@ -70,7 +71,7 @@ inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t len)
 
     for (i = 0; i < len; i+=16) {
         printf("%02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x\r\n",
-                *(data + i), *(data + i + 1), *(data + i + 2), *(data + i + 3), *(data + i + 4), *(data + i + 5), *(data + i + 6), *(data + i + 7), 
+                *(data + i), *(data + i + 1), *(data + i + 2), *(data + i + 3), *(data + i + 4), *(data + i + 5), *(data + i + 6), *(data + i + 7),
                 *(data + i + 8), *(data + i + 9), *(data + i + 10), *(data + i + 11), *(data + i + 12), *(data + i + 13), *(data + i + 14), *(data + i + 15));
     }
     printf("\r\n");
@@ -522,157 +523,157 @@ extern UINT8 btif_trace_level;
 #define BLUFI_TRACE_VERBOSE(fmt, args...)    {if (BLUFI_INITIAL_TRACE_LEVEL >= BT_TRACE_LEVEL_VERBOSE && BT_LOG_LEVEL_CHECK(BLUFI,VERBOSE)) BT_PRINT_V("BT_BLUFI", fmt, ## args);}
 
 #else
-#define LOG_ERROR(fmt, args...)            
-#define LOG_WARN(fmt, args...)             
-#define LOG_INFO(fmt, args...)             
-#define LOG_DEBUG(fmt, args...)            
-#define LOG_VERBOSE(fmt, args...)          
+#define LOG_ERROR(fmt, args...)
+#define LOG_WARN(fmt, args...)
+#define LOG_INFO(fmt, args...)
+#define LOG_DEBUG(fmt, args...)
+#define LOG_VERBOSE(fmt, args...)
 
 /* Define tracing for the HCI unit
 */
-#define HCI_TRACE_ERROR(fmt, args...)      
-#define HCI_TRACE_WARNING(fmt, args...)    
-#define HCI_TRACE_EVENT(fmt, args...)      
-#define HCI_TRACE_DEBUG(fmt, args...)      
+#define HCI_TRACE_ERROR(fmt, args...)
+#define HCI_TRACE_WARNING(fmt, args...)
+#define HCI_TRACE_EVENT(fmt, args...)
+#define HCI_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for BTM
 */
-#define BTM_TRACE_ERROR(fmt, args...)      
-#define BTM_TRACE_WARNING(fmt, args...)    
-#define BTM_TRACE_API(fmt, args...)        
-#define BTM_TRACE_EVENT(fmt, args...)      
-#define BTM_TRACE_DEBUG(fmt, args...)      
+#define BTM_TRACE_ERROR(fmt, args...)
+#define BTM_TRACE_WARNING(fmt, args...)
+#define BTM_TRACE_API(fmt, args...)
+#define BTM_TRACE_EVENT(fmt, args...)
+#define BTM_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for the L2CAP unit
 */
-#define L2CAP_TRACE_ERROR(fmt, args...)    
-#define L2CAP_TRACE_WARNING(fmt, args...)  
-#define L2CAP_TRACE_API(fmt, args...)      
-#define L2CAP_TRACE_EVENT(fmt, args...)    
-#define L2CAP_TRACE_DEBUG(fmt, args...)    
+#define L2CAP_TRACE_ERROR(fmt, args...)
+#define L2CAP_TRACE_WARNING(fmt, args...)
+#define L2CAP_TRACE_API(fmt, args...)
+#define L2CAP_TRACE_EVENT(fmt, args...)
+#define L2CAP_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for the SDP unit
 */
-#define SDP_TRACE_ERROR(fmt, args...)      
-#define SDP_TRACE_WARNING(fmt, args...)    
-#define SDP_TRACE_API(fmt, args...)        
-#define SDP_TRACE_EVENT(fmt, args...)      
-#define SDP_TRACE_DEBUG(fmt, args...)      
+#define SDP_TRACE_ERROR(fmt, args...)
+#define SDP_TRACE_WARNING(fmt, args...)
+#define SDP_TRACE_API(fmt, args...)
+#define SDP_TRACE_EVENT(fmt, args...)
+#define SDP_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for the RFCOMM unit
 */
-#define RFCOMM_TRACE_ERROR(fmt, args...)   
-#define RFCOMM_TRACE_WARNING(fmt, args...) 
-#define RFCOMM_TRACE_API(fmt, args...)     
-#define RFCOMM_TRACE_EVENT(fmt, args...)   
-#define RFCOMM_TRACE_DEBUG(fmt, args...)   
+#define RFCOMM_TRACE_ERROR(fmt, args...)
+#define RFCOMM_TRACE_WARNING(fmt, args...)
+#define RFCOMM_TRACE_API(fmt, args...)
+#define RFCOMM_TRACE_EVENT(fmt, args...)
+#define RFCOMM_TRACE_DEBUG(fmt, args...)
 
 /* Generic Access Profile traces */
-#define GAP_TRACE_ERROR(fmt, args...)      
-#define GAP_TRACE_EVENT(fmt, args...)      
-#define GAP_TRACE_API(fmt, args...)        
-#define GAP_TRACE_WARNING(fmt, args...)    
+#define GAP_TRACE_ERROR(fmt, args...)
+#define GAP_TRACE_EVENT(fmt, args...)
+#define GAP_TRACE_API(fmt, args...)
+#define GAP_TRACE_WARNING(fmt, args...)
 
 /* define traces for HID Host */
-#define HIDH_TRACE_ERROR(fmt, args...)     
-#define HIDH_TRACE_WARNING(fmt, args...)   
-#define HIDH_TRACE_API(fmt, args...)       
-#define HIDH_TRACE_EVENT(fmt, args...)     
-#define HIDH_TRACE_DEBUG(fmt, args...)     
+#define HIDH_TRACE_ERROR(fmt, args...)
+#define HIDH_TRACE_WARNING(fmt, args...)
+#define HIDH_TRACE_API(fmt, args...)
+#define HIDH_TRACE_EVENT(fmt, args...)
+#define HIDH_TRACE_DEBUG(fmt, args...)
 
 /* define traces for BNEP */
 
-#define BNEP_TRACE_ERROR(fmt, args...)     
-#define BNEP_TRACE_WARNING(fmt, args...)   
-#define BNEP_TRACE_API(fmt, args...)       
-#define BNEP_TRACE_EVENT(fmt, args...)     
-#define BNEP_TRACE_DEBUG(fmt, args...)     
+#define BNEP_TRACE_ERROR(fmt, args...)
+#define BNEP_TRACE_WARNING(fmt, args...)
+#define BNEP_TRACE_API(fmt, args...)
+#define BNEP_TRACE_EVENT(fmt, args...)
+#define BNEP_TRACE_DEBUG(fmt, args...)
 
 /* define traces for PAN */
 
-#define PAN_TRACE_ERROR(fmt, args...)      
-#define PAN_TRACE_WARNING(fmt, args...)    
-#define PAN_TRACE_API(fmt, args...)        
-#define PAN_TRACE_EVENT(fmt, args...)      
-#define PAN_TRACE_DEBUG(fmt, args...)      
+#define PAN_TRACE_ERROR(fmt, args...)
+#define PAN_TRACE_WARNING(fmt, args...)
+#define PAN_TRACE_API(fmt, args...)
+#define PAN_TRACE_EVENT(fmt, args...)
+#define PAN_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for the A2DP profile
 */
-#define A2D_TRACE_ERROR(fmt, args...)      
-#define A2D_TRACE_WARNING(fmt, args...)    
-#define A2D_TRACE_EVENT(fmt, args...)      
-#define A2D_TRACE_DEBUG(fmt, args...)      
-#define A2D_TRACE_API(fmt, args...)        
+#define A2D_TRACE_ERROR(fmt, args...)
+#define A2D_TRACE_WARNING(fmt, args...)
+#define A2D_TRACE_EVENT(fmt, args...)
+#define A2D_TRACE_DEBUG(fmt, args...)
+#define A2D_TRACE_API(fmt, args...)
 
 /* AVDTP
 */
-#define AVDT_TRACE_ERROR(fmt, args...)     
-#define AVDT_TRACE_WARNING(fmt, args...)   
-#define AVDT_TRACE_EVENT(fmt, args...)     
-#define AVDT_TRACE_DEBUG(fmt, args...)     
-#define AVDT_TRACE_API(fmt, args...)       
+#define AVDT_TRACE_ERROR(fmt, args...)
+#define AVDT_TRACE_WARNING(fmt, args...)
+#define AVDT_TRACE_EVENT(fmt, args...)
+#define AVDT_TRACE_DEBUG(fmt, args...)
+#define AVDT_TRACE_API(fmt, args...)
 
 /* Define tracing for the AVCTP protocol
 */
-#define AVCT_TRACE_ERROR(fmt, args...)     
-#define AVCT_TRACE_WARNING(fmt, args...)   
-#define AVCT_TRACE_EVENT(fmt, args...)     
-#define AVCT_TRACE_DEBUG(fmt, args...)     
-#define AVCT_TRACE_API(fmt, args...)       
+#define AVCT_TRACE_ERROR(fmt, args...)
+#define AVCT_TRACE_WARNING(fmt, args...)
+#define AVCT_TRACE_EVENT(fmt, args...)
+#define AVCT_TRACE_DEBUG(fmt, args...)
+#define AVCT_TRACE_API(fmt, args...)
 
 /* Define tracing for the AVRCP profile
 */
-#define AVRC_TRACE_ERROR(fmt, args...)     
-#define AVRC_TRACE_WARNING(fmt, args...)   
-#define AVRC_TRACE_EVENT(fmt, args...)     
-#define AVRC_TRACE_DEBUG(fmt, args...)     
-#define AVRC_TRACE_API(fmt, args...)       
+#define AVRC_TRACE_ERROR(fmt, args...)
+#define AVRC_TRACE_WARNING(fmt, args...)
+#define AVRC_TRACE_EVENT(fmt, args...)
+#define AVRC_TRACE_DEBUG(fmt, args...)
+#define AVRC_TRACE_API(fmt, args...)
 
 /* MCAP
 */
-#define MCA_TRACE_ERROR(fmt, args...)      
-#define MCA_TRACE_WARNING(fmt, args...)    
-#define MCA_TRACE_EVENT(fmt, args...)      
-#define MCA_TRACE_DEBUG(fmt, args...)      
-#define MCA_TRACE_API(fmt, args...)        
+#define MCA_TRACE_ERROR(fmt, args...)
+#define MCA_TRACE_WARNING(fmt, args...)
+#define MCA_TRACE_EVENT(fmt, args...)
+#define MCA_TRACE_DEBUG(fmt, args...)
+#define MCA_TRACE_API(fmt, args...)
 
 /* Define tracing for the ATT/GATT unit
 */
-#define GATT_TRACE_ERROR(fmt, args...)     
-#define GATT_TRACE_WARNING(fmt, args...)   
-#define GATT_TRACE_API(fmt, args...)       
-#define GATT_TRACE_EVENT(fmt, args...)     
-#define GATT_TRACE_DEBUG(fmt, args...)     
+#define GATT_TRACE_ERROR(fmt, args...)
+#define GATT_TRACE_WARNING(fmt, args...)
+#define GATT_TRACE_API(fmt, args...)
+#define GATT_TRACE_EVENT(fmt, args...)
+#define GATT_TRACE_DEBUG(fmt, args...)
 
 /* Define tracing for the SMP unit
 */
-#define SMP_TRACE_ERROR(fmt, args...)      
-#define SMP_TRACE_WARNING(fmt, args...)    
-#define SMP_TRACE_API(fmt, args...)        
-#define SMP_TRACE_EVENT(fmt, args...)      
-#define SMP_TRACE_DEBUG(fmt, args...)      
+#define SMP_TRACE_ERROR(fmt, args...)
+#define SMP_TRACE_WARNING(fmt, args...)
+#define SMP_TRACE_API(fmt, args...)
+#define SMP_TRACE_EVENT(fmt, args...)
+#define SMP_TRACE_DEBUG(fmt, args...)
 
 extern UINT8 btif_trace_level;
 
 // define traces for application
-#define BTIF_TRACE_ERROR(fmt, args...)     
-#define BTIF_TRACE_WARNING(fmt, args...)   
-#define BTIF_TRACE_API(fmt, args...)       
-#define BTIF_TRACE_EVENT(fmt, args...)     
-#define BTIF_TRACE_DEBUG(fmt, args...)     
-#define BTIF_TRACE_VERBOSE(fmt, args...)   
+#define BTIF_TRACE_ERROR(fmt, args...)
+#define BTIF_TRACE_WARNING(fmt, args...)
+#define BTIF_TRACE_API(fmt, args...)
+#define BTIF_TRACE_EVENT(fmt, args...)
+#define BTIF_TRACE_DEBUG(fmt, args...)
+#define BTIF_TRACE_VERBOSE(fmt, args...)
 
 /* define traces for application */
 
-#define APPL_TRACE_ERROR(fmt, args...)     
-#define APPL_TRACE_WARNING(fmt, args...)   
-#define APPL_TRACE_API(fmt, args...)       
-#define APPL_TRACE_EVENT(fmt, args...)     
-#define APPL_TRACE_DEBUG(fmt, args...)     
-#define APPL_TRACE_VERBOSE(fmt, args...)   
+#define APPL_TRACE_ERROR(fmt, args...)
+#define APPL_TRACE_WARNING(fmt, args...)
+#define APPL_TRACE_API(fmt, args...)
+#define APPL_TRACE_EVENT(fmt, args...)
+#define APPL_TRACE_DEBUG(fmt, args...)
+#define APPL_TRACE_VERBOSE(fmt, args...)
 
 /* define traces for BTC */
-#define BTC_TRACE_ERROR(fmt, args...) 
+#define BTC_TRACE_ERROR(fmt, args...)
 #define BTC_TRACE_WARNING(fmt, args...)
 #define BTC_TRACE_API(fmt, args...)
 #define BTC_TRACE_EVENT(fmt, args...)
@@ -680,7 +681,7 @@ extern UINT8 btif_trace_level;
 #define BTC_TRACE_VERBOSE(fmt, args...)
 
 /* define traces for OSI */
-#define OSI_TRACE_ERROR(fmt, args...) 
+#define OSI_TRACE_ERROR(fmt, args...)
 #define OSI_TRACE_WARNING(fmt, args...)
 #define OSI_TRACE_API(fmt, args...)
 #define OSI_TRACE_EVENT(fmt, args...)
@@ -688,7 +689,7 @@ extern UINT8 btif_trace_level;
 #define OSI_TRACE_VERBOSE(fmt, args...)
 
 /* define traces for BLUFI */
-#define BLUFI_TRACE_ERROR(fmt, args...) 
+#define BLUFI_TRACE_ERROR(fmt, args...)
 #define BLUFI_TRACE_WARNING(fmt, args...)
 #define BLUFI_TRACE_API(fmt, args...)
 #define BLUFI_TRACE_EVENT(fmt, args...)

+ 1 - 0
components/cxx/test/test_cxx.cpp

@@ -7,6 +7,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
+#include "soc/soc.h"
 
 static const char* TAG = "cxx";
 

+ 1 - 1
components/driver/CMakeLists.txt

@@ -22,7 +22,7 @@ set(COMPONENT_SRCS "can.c"
                    "uart.c")
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 set(COMPONENT_PRIV_INCLUDEDIRS "include/driver")
-set(COMPONENT_REQUIRES esp_ringbuf)
+set(COMPONENT_REQUIRES esp_ringbuf soc) #cannot totally hide soc headers, since there are a lot arguments in the driver are chip-dependent
 
 register_component()
 

+ 1 - 0
components/driver/i2c.c

@@ -30,6 +30,7 @@
 #include "driver/gpio.h"
 #include "driver/periph_ctrl.h"
 #include "esp_pm.h"
+#include "soc/soc_memory_layout.h"
 
 static const char* I2C_TAG = "i2c";
 #define I2C_CHECK(a, str, ret)  if(!(a)) {                                             \

+ 8 - 6
components/driver/include/driver/gpio.h

@@ -16,16 +16,18 @@
 #define _DRIVER_GPIO_H_
 #include "esp_err.h"
 #include <esp_types.h>
-#include "soc/gpio_reg.h"
-#include "soc/gpio_struct.h"
-#include "soc/rtc_io_reg.h"
-#include "soc/io_mux_reg.h"
-#include "soc/gpio_sig_map.h"
+#include <esp_bit_defs.h>
 #include "esp32/rom/gpio.h"
 #include "esp_attr.h"
 #include "esp_intr_alloc.h"
 #include "soc/gpio_periph.h"
 
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/rtc_io_reg.h"
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -566,7 +568,7 @@ esp_err_t gpio_hold_en(gpio_num_t gpio_num);
   * the default level if this function is called. If you dont't want the level changes, the gpio should be configured to
   * a known state before this function is called.
   *  e.g.
-  *     If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called, 
+  *     If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called,
   *     gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior,
   *     you should configure gpio18 as output mode and set it to hight level before calling `gpio_hold_dis`.
   *

+ 2 - 1
components/driver/rmt.c

@@ -26,6 +26,7 @@
 #include "soc/rmt_struct.h"
 #include "driver/periph_ctrl.h"
 #include "driver/rmt.h"
+#include "soc/soc_memory_layout.h"
 
 #include <sys/lock.h>
 
@@ -947,7 +948,7 @@ esp_err_t rmt_get_channel_status(rmt_channel_status_result_t *channel_status)
             if( p_rmt_obj[i]->tx_sem != NULL ) {
                 if( xSemaphoreTake(p_rmt_obj[i]->tx_sem, (TickType_t)0) == pdTRUE ) {
                     channel_status->status[i] = RMT_CHANNEL_IDLE;
-                    xSemaphoreGive(p_rmt_obj[i]->tx_sem); 
+                    xSemaphoreGive(p_rmt_obj[i]->tx_sem);
                 } else {
                     channel_status->status[i] = RMT_CHANNEL_BUSY;
                 }

+ 2 - 0
components/driver/sdio_slave.c

@@ -93,10 +93,12 @@ The driver of FIFOs works as below:
 #include "freertos/FreeRTOS.h"
 #include "soc/dport_access.h"
 #include "soc/dport_reg.h"
+#include "soc/soc_memory_layout.h"
 #include "soc/io_mux_reg.h"
 #include "freertos/semphr.h"
 #include "xtensa/core-macros.h"
 #include "driver/periph_ctrl.h"
+#include "driver/gpio.h"
 
 
 #define SDIO_SLAVE_CHECK(res, str, ret_val) do { if(!(res)){\

+ 1 - 0
components/driver/test/test_common_spi.c

@@ -1,6 +1,7 @@
 #include "test/test_common_spi.h"
 #include "driver/spi_slave.h"
 #include "esp_log.h"
+#include "driver/gpio.h"
 
 int test_freq_default[]=TEST_FREQ_DEFAULT();
 

+ 1 - 0
components/driver/test/test_spi_master.c

@@ -25,6 +25,7 @@
 #include "soc/gpio_periph.h"
 #include "sdkconfig.h"
 #include "../cache_utils.h"
+#include "soc/soc_memory_layout.h"
 
 const static char TAG[] = "test_spi";
 

+ 1 - 0
components/driver/test/test_spi_slave.c

@@ -6,6 +6,7 @@
 #include "unity.h"
 #include "driver/spi_master.h"
 #include "driver/spi_slave.h"
+#include "driver/gpio.h"
 #include "esp_log.h"
 #include "sdkconfig.h"
 #include "test/test_common_spi.h"

+ 1 - 1
components/efuse/CMakeLists.txt

@@ -13,7 +13,7 @@ list(APPEND COMPONENT_SRCS "src/esp_efuse_api.c"
                            "src/esp_efuse_utility.c")
 
 set(COMPONENT_REQUIRES)
-set(COMPONENT_PRIV_REQUIRES bootloader_support)
+set(COMPONENT_PRIV_REQUIRES bootloader_support soc)
 register_component()
 
 set(GEN_EFUSE_TABLE_ARG --max_blk_len ${CONFIG_EFUSE_MAX_BLK_LEN})

+ 3 - 2
components/esp32/CMakeLists.txt

@@ -3,7 +3,7 @@ require_idf_targets(esp32)
 if(BOOTLOADER_BUILD)
     # For bootloader, all we need from esp32 is headers
     set(COMPONENT_ADD_INCLUDEDIRS include)
-    set(COMPONENT_REQUIRES ${IDF_COMPONENTS})
+    set(COMPONENT_REQUIRES ${IDF_COMPONENTS} soc) #unfortunately rom/uart uses SOC registers directly
     set(COMPONENT_SRCS )
     register_component()
 else()
@@ -35,7 +35,8 @@ else()
                    "task_wdt.c")
     set(COMPONENT_ADD_INCLUDEDIRS "include")
 
-    set(COMPONENT_REQUIRES driver esp_event efuse)
+    set(COMPONENT_REQUIRES driver esp_event efuse soc) #unfortunately rom/uart uses SOC registers directly
+
     # driver is a public requirement because esp_sleep.h uses gpio_num_t & touch_pad_t
     # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function.
     set(COMPONENT_PRIV_REQUIRES

+ 1 - 0
components/esp32/pm_esp32.c

@@ -35,6 +35,7 @@
 #include "esp_private/pm_trace.h"
 #include "esp_private/esp_timer_impl.h"
 #include "esp32/pm.h"
+#include "esp_sleep.h"
 
 /* CCOMPARE update timeout, in CPU cycles. Any value above ~600 cycles will work
  * for the purpose of detecting a deadlock.

+ 1 - 0
components/esp32/sleep_modes.c

@@ -33,6 +33,7 @@
 #include "soc/sens_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/rtc_wdt.h"
+#include "soc/soc_memory_layout.h"
 #include "driver/rtc_io.h"
 #include "driver/uart.h"
 #include "freertos/FreeRTOS.h"

+ 1 - 0
components/esp32/test/test_fastbus.c

@@ -12,6 +12,7 @@
 #include "soc/uart_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/io_mux_reg.h"
+#include "driver/gpio.h"
 
 
 /*

+ 2 - 1
components/esp32/test/test_reset_reason.c

@@ -5,6 +5,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "driver/timer.h"
 #include "esp32/rom/rtc.h"
+#include "esp_sleep.h"
 
 #define RTC_BSS_ATTR __attribute__((section(".rtc.bss")))
 
@@ -275,7 +276,7 @@ static void timer_group_test_first_stage(void)
     timer_start(TIMER_GROUP_0, TIMER_0);
     //Waiting for timer_group to generate an interrupt
     while( !TIMERG0.int_raw.t0 && loop_cnt++ < 100) {
-        vTaskDelay(200);    
+        vTaskDelay(200);
     }
     //TIMERG0.int_raw.t0 == 1 means an interruption has occurred
     TEST_ASSERT_EQUAL(1, TIMERG0.int_raw.t0);

+ 1 - 0
components/esp_common/CMakeLists.txt

@@ -18,6 +18,7 @@ else()
     set(COMPONENT_ADD_INCLUDEDIRS "include")
     set(COMPONENT_PRIV_INCLUDEDIRS)
     set(COMPONENT_REQUIRES)
+    set(COMPONENT_PRIV_REQUIRES soc)
 
     register_component()
 

+ 57 - 0
components/esp_common/include/esp_bit_defs.h

@@ -0,0 +1,57 @@
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//Register Bits{{
+#define BIT31   0x80000000
+#define BIT30   0x40000000
+#define BIT29   0x20000000
+#define BIT28   0x10000000
+#define BIT27   0x08000000
+#define BIT26   0x04000000
+#define BIT25   0x02000000
+#define BIT24   0x01000000
+#define BIT23   0x00800000
+#define BIT22   0x00400000
+#define BIT21   0x00200000
+#define BIT20   0x00100000
+#define BIT19   0x00080000
+#define BIT18   0x00040000
+#define BIT17   0x00020000
+#define BIT16   0x00010000
+#define BIT15   0x00008000
+#define BIT14   0x00004000
+#define BIT13   0x00002000
+#define BIT12   0x00001000
+#define BIT11   0x00000800
+#define BIT10   0x00000400
+#define BIT9     0x00000200
+#define BIT8     0x00000100
+#define BIT7     0x00000080
+#define BIT6     0x00000040
+#define BIT5     0x00000020
+#define BIT4     0x00000010
+#define BIT3     0x00000008
+#define BIT2     0x00000004
+#define BIT1     0x00000002
+#define BIT0     0x00000001
+//}}
+
+#ifndef __ASSEMBLER__
+#define BIT(nr)                 (1UL << (nr))
+#define BIT64(nr)               (1ULL << (nr))
+#else
+#define BIT(nr)                 (1 << (nr))
+#endif

+ 4 - 1
components/esp_common/include/esp_system.h

@@ -18,7 +18,10 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "esp_err.h"
-#include "esp_sleep.h"
+#include "esp_attr.h"
+#include "esp_bit_defs.h"
+
+#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {

+ 1 - 0
components/esp_common/src/esp_timer.c

@@ -14,6 +14,7 @@
 
 #include <sys/param.h>
 #include <string.h>
+#include "soc/soc.h"
 #include "esp_types.h"
 #include "esp_attr.h"
 #include "esp_err.h"

+ 5 - 0
components/esp_rom/include/esp32/rom/ets_sys.h

@@ -17,8 +17,13 @@
 
 #include <stdint.h>
 #include <stdbool.h>
+#include <stdlib.h>
 
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
 #include "soc/soc.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {

+ 5 - 0
components/esp_rom/include/esp32/rom/gpio.h

@@ -19,8 +19,13 @@
 #include <stdbool.h>
 
 #include "esp_attr.h"
+
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
 #include "soc/gpio_reg.h"
 #include "soc/gpio_pins.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {

+ 5 - 1
components/esp_rom/include/esp32/rom/spi_flash.h

@@ -20,7 +20,11 @@
 
 #include "esp_attr.h"
 
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
 #include "soc/spi_reg.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -359,7 +363,7 @@ esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
   *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
   *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
   */
-esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, 
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
                                                         uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
 
 /**

+ 3 - 3
components/espcoredump/CMakeLists.txt

@@ -1,11 +1,11 @@
 set(COMPONENT_PRIV_INCLUDEDIRS "include_core_dump")
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 set(COMPONENT_REQUIRES)
-set(COMPONENT_PRIV_REQUIRES spi_flash)
+set(COMPONENT_PRIV_REQUIRES spi_flash soc)
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
-set(COMPONENT_SRCS "src/core_dump_common.c" 
+set(COMPONENT_SRCS "src/core_dump_common.c"
                    "src/core_dump_flash.c"
                    "src/core_dump_port.c"
-                   "src/core_dump_uart.c") 
+                   "src/core_dump_uart.c")
 
 register_component()

+ 1 - 1
components/ethernet/CMakeLists.txt

@@ -7,6 +7,6 @@ set(COMPONENT_SRCS "emac_dev.c"
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 
 set(COMPONENT_REQUIRES)
-set(COMPONENT_PRIV_REQUIRES tcpip_adapter esp_event)
+set(COMPONENT_PRIV_REQUIRES tcpip_adapter esp_event soc)
 
 register_component()

+ 2 - 0
components/ethernet/include/eth_phy/phy_reg.h

@@ -18,6 +18,8 @@
 extern "C" {
 #endif
 
+#include <esp_bit_defs.h>
+
 /**
  * @brief This header contains register/bit masks for the standard PHY MII registers that should be supported by all PHY models.
  *

+ 1 - 0
components/fatfs/test_fatfs_host/Makefile.files

@@ -25,6 +25,7 @@ INCLUDE_DIRS := \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/esp32/include \
+	soc/include \
 	esp32/include \
 	esp_common/include \
 	bootloader_support/include \

+ 3 - 2
components/freertos/CMakeLists.txt

@@ -1,5 +1,5 @@
 set(COMPONENT_ADD_INCLUDEDIRS include)
-set(COMPONENT_PRIV_INCLUDEDIRS include/freertos)
+set(COMPONENT_PRIV_INCLUDEDIRS include/freertos .)
 set(COMPONENT_SRCS "croutine.c"
                    "event_groups.c"
                    "FreeRTOS-openocd.c"
@@ -20,8 +20,9 @@ set(COMPONENT_SRCS "croutine.c"
 # app_trace is required by FreeRTOS headers only when CONFIG_SYSVIEW_ENABLE=y,
 # but requirements can't depend on config options, so always require it.
 set(COMPONENT_REQUIRES app_trace)
-set(COMPONENT_PRIV_REQUIRES esp_common)
+set(COMPONENT_PRIV_REQUIRES esp_common soc)
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
+
 register_component()
 
 target_link_libraries(${COMPONENT_TARGET} "-Wl,--undefined=uxTopUsedPriority")

+ 1 - 1
components/freertos/component.mk

@@ -4,7 +4,7 @@
 
 COMPONENT_ADD_LDFLAGS += -Wl,--undefined=uxTopUsedPriority
 COMPONENT_ADD_INCLUDEDIRS := include
-COMPONENT_PRIV_INCLUDEDIRS := include/freertos
+COMPONENT_PRIV_INCLUDEDIRS := include/freertos .
 
 tasks.o event_groups.o timers.o queue.o: CFLAGS += -D_ESP_FREERTOS_INTERNAL
 COMPONENT_ADD_LDFRAGMENTS += linker.lf

+ 8 - 9
components/freertos/include/freertos/portmacro.h

@@ -73,6 +73,8 @@ extern "C" {
 #ifndef __ASSEMBLER__
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
 
 #include <xtensa/hal.h>
 #include <xtensa/config/core.h>
@@ -83,7 +85,12 @@ extern "C" {
 
 
 #include <esp_heap_caps.h>
+
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
 #include "soc/soc_memory_layout.h"
+#endif
 
 //#include "xtensa_context.h"
 
@@ -197,7 +204,7 @@ This all assumes that interrupts are either entirely disabled or enabled. Interr
 will break this scheme.
 
 Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vTaskEnterCritical, meaning
-that either function can be called both from ISR as well as task context. This is not standard FreeRTOS 
+that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
 behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
 */
 void vPortCPUInitializeMutex(portMUX_TYPE *mux);
@@ -264,14 +271,6 @@ static inline unsigned portENTER_CRITICAL_NESTED() {
 #define pvPortMallocTcbMem(size) heap_caps_malloc(size, portTcbMemoryCaps)
 #define pvPortMallocStackMem(size)  heap_caps_malloc(size, portStackMemoryCaps)
 
-//xTaskCreateStatic uses these functions to check incoming memory.
-#define portVALID_TCB_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
-#define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr)
-#else
-#define portVALID_STACK_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#endif
-
 /*
  * Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
  * *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is updated with the previous

+ 80 - 0
components/freertos/portmacro_priv.h

@@ -0,0 +1,80 @@
+/*
+    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that has become a de facto standard.             *
+     *                                                                       *
+     *    Help yourself get started quickly and support the FreeRTOS         *
+     *    project by purchasing a FreeRTOS tutorial book, reference          *
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
+     *                                                                       *
+     *    Thank you!                                                         *
+     *                                                                       *
+    ***************************************************************************
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
+    link: http://www.freertos.org/a00114.html
+
+    1 tab == 4 spaces!
+
+    ***************************************************************************
+     *                                                                       *
+     *    Having a problem?  Start by reading the FAQ "My application does   *
+     *    not run, what could be wrong?"                                     *
+     *                                                                       *
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
+    license and Real Time Engineers Ltd. contact details.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+
+/* This header holds the macros for porting which should only be used inside FreeRTOS */
+
+#pragma once
+#include "soc/soc_memory_layout.h"
+
+//xTaskCreateStatic uses these functions to check incoming memory.
+#define portVALID_TCB_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
+#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
+#define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr)
+#else
+#define portVALID_STACK_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
+#endif
+
+

+ 3 - 2
components/freertos/portmux_impl.h

@@ -34,18 +34,19 @@
    It should be #included by freertos port.c or tasks.c, in esp-idf.
 
    The way it works is that it essentially uses portmux_impl.inc.h as a
-   generator template of sorts. When no external memory is used, this 
+   generator template of sorts. When no external memory is used, this
    template is only used to generate the vPortCPUAcquireMutexIntsDisabledInternal
    and vPortCPUReleaseMutexIntsDisabledInternal functions, which use S32C1 to
    do an atomic compare & swap. When external memory is used the functions
    vPortCPUAcquireMutexIntsDisabledExtram and vPortCPUReleaseMutexIntsDisabledExtram
    are also generated, which use uxPortCompareSetExtram to fake the S32C1 instruction.
-   The wrapper functions vPortCPUAcquireMutexIntsDisabled and 
+   The wrapper functions vPortCPUAcquireMutexIntsDisabled and
    vPortCPUReleaseMutexIntsDisabled will then use the appropriate function to do the
    actual lock/unlock.
 */
 #include "soc/cpu.h"
 #include "portable.h"
+#include "soc/soc_memory_layout.h"
 
 /* XOR one core ID with this value to get the other core ID */
 #define CORE_ID_XOR_SWAP (CORE_ID_PRO ^ CORE_ID_APP)

+ 1 - 0
components/freertos/tasks.c

@@ -86,6 +86,7 @@ task.h is included from an application file. */
 #include "timers.h"
 #include "StackMacros.h"
 #include "portmacro.h"
+#include "portmacro_priv.h"
 #include "semphr.h"
 
 /* Lint e961 and e750 are suppressed as a MISRA exception justified because the

+ 1 - 0
components/freertos/test/test_freertos.c

@@ -15,6 +15,7 @@
 #include "soc/uart_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/io_mux_reg.h"
+#include "driver/gpio.h"
 
 
 void ets_isr_unmask(uint32_t unmask);

+ 1 - 0
components/heap/CMakeLists.txt

@@ -17,6 +17,7 @@ endif()
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
 set(COMPONENT_REQUIRES "")
+set(COMPONENT_PRIV_REQUIRES soc)
 
 register_component()
 

+ 1 - 0
components/log/CMakeLists.txt

@@ -1,4 +1,5 @@
 set(COMPONENT_SRCS "log.c")
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 set(COMPONENT_REQUIRES)
+set(COMPONENT_PRIV_REQUIRES soc)
 register_component()

+ 0 - 1
components/lwip/port/esp32/vfs_lwip.c

@@ -21,7 +21,6 @@
 #include "esp_vfs.h"
 #include "esp_vfs_dev.h"
 #include "esp_attr.h"
-#include "soc/uart_struct.h"
 #include "lwip/sockets.h"
 #include "sdkconfig.h"
 #include "lwip/sys.h"

+ 3 - 1
components/mbedtls/CMakeLists.txt

@@ -2,6 +2,8 @@ set(COMPONENT_ADD_INCLUDEDIRS "port/include" "mbedtls/include")
 set(COMPONENT_SRCS "mbedtls.c")
 set(COMPONENT_REQUIRES lwip)
 
+set(MBEDTLS_PRIV_REQUIRES ${IDF_COMPONENT_REQUIRES_COMMON} soc)
+
 register_component()
 
 # Only build mbedtls libraries
@@ -95,7 +97,7 @@ foreach(target ${mbedtls_targets})
     target_compile_definitions(${target} PUBLIC -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h")
 
     # The mbedtls targets also depends on core components
-    foreach(common ${IDF_COMPONENT_REQUIRES_COMMON})
+    foreach(common ${MBEDTLS_PRIV_REQUIRES})
         component_get_target(common_target ${common})
         set_property(TARGET ${target} APPEND PROPERTY INTERFACE_LINK_LIBRARIES ${common_target})
         set_property(TARGET ${target} APPEND PROPERTY LINK_LIBRARIES ${common_target})

+ 1 - 0
components/newlib/CMakeLists.txt

@@ -56,6 +56,7 @@ else()
     endif()
 endif()
 set(COMPONENT_REQUIRES vfs)  # for sys/ioctl.h
+set(COMPONENT_PRIV_REQUIRES soc)
 
 list(APPEND COMPONENT_ADD_LDFRAGMENTS newlib.lf)
 

+ 1 - 0
components/pthread/pthread.c

@@ -26,6 +26,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
+#include "soc/soc_memory_layout.h"
 
 #include "pthread_internal.h"
 #include "esp_pthread.h"

+ 1 - 0
components/sdmmc/CMakeLists.txt

@@ -6,4 +6,5 @@ set(COMPONENT_SRCS "sdmmc_cmd.c"
                    "sdmmc_sd.c")
 set(COMPONENT_ADD_INCLUDEDIRS "include")
 set(COMPONENT_REQUIRES driver)
+set(COMPONENT_PRIV_REQUIRES soc)
 register_component()

+ 1 - 1
components/soc/CMakeLists.txt

@@ -9,7 +9,7 @@ if(EXISTS "${COMPONENT_PATH}/${SOC_NAME}")
 endif()
 
 list(APPEND COMPONENT_ADD_INCLUDEDIRS include)
-list(APPEND COMPONENT_SRCS "src/memory_layout_utils.c src/lldesc.c src/hal/spi_hal.c src/hal/spi_hal_iram.c")
+list(APPEND COMPONENT_SRCS "src/memory_layout_utils.c src/lldesc.c src/hal/spi_hal.c src/hal/spi_hal_iram.c src/soc_include_legacy_warn.c")
 
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
 

+ 2 - 41
components/soc/esp32/include/soc/soc.h

@@ -1,4 +1,4 @@
-// Copyright 2010-2018 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
@@ -20,40 +20,7 @@
 #include "esp_assert.h"
 #endif
 
-//Register Bits{{
-#define BIT31   0x80000000
-#define BIT30   0x40000000
-#define BIT29   0x20000000
-#define BIT28   0x10000000
-#define BIT27   0x08000000
-#define BIT26   0x04000000
-#define BIT25   0x02000000
-#define BIT24   0x01000000
-#define BIT23   0x00800000
-#define BIT22   0x00400000
-#define BIT21   0x00200000
-#define BIT20   0x00100000
-#define BIT19   0x00080000
-#define BIT18   0x00040000
-#define BIT17   0x00020000
-#define BIT16   0x00010000
-#define BIT15   0x00008000
-#define BIT14   0x00004000
-#define BIT13   0x00002000
-#define BIT12   0x00001000
-#define BIT11   0x00000800
-#define BIT10   0x00000400
-#define BIT9     0x00000200
-#define BIT8     0x00000100
-#define BIT7     0x00000080
-#define BIT6     0x00000040
-#define BIT5     0x00000020
-#define BIT4     0x00000010
-#define BIT3     0x00000008
-#define BIT2     0x00000004
-#define BIT1     0x00000002
-#define BIT0     0x00000001
-//}}
+#include <esp_bit_defs.h>
 
 #define PRO_CPU_NUM (0)
 #define APP_CPU_NUM (1)
@@ -136,12 +103,6 @@
 #define ETS_UNCACHED_ADDR(addr) (addr)
 #define ETS_CACHED_ADDR(addr) (addr)
 
-#ifndef __ASSEMBLER__
-#define BIT(nr)                 (1UL << (nr))
-#define BIT64(nr)               (1ULL << (nr))
-#else
-#define BIT(nr)                 (1 << (nr))
-#endif
 
 #ifndef __ASSEMBLER__
 

+ 4 - 0
components/soc/include/soc/gpio_periph.h

@@ -17,6 +17,10 @@
 #include "stdint.h"
 #include "soc/gpio_pins.h"
 #include "soc/io_mux_reg.h"
+#include "soc/gpio_struct.h"
+#include "soc/gpio_reg.h"
+#include "soc/gpio_sig_map.h"
+
 #ifdef __cplusplus
 extern "C"
 {

+ 5 - 0
components/soc/src/soc_include_legacy_warn.c

@@ -0,0 +1,5 @@
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#warning Legacy including is enabled. This will be deprecated in the future. You can disable this option in the menuconfig. If there are some including errors, please try to include: "soc/soc.h", "soc/soc_memory_layout.h", "driver/gpio.h", or "esp_sleep.h".
+#endif

+ 2 - 2
components/spi_flash/CMakeLists.txt

@@ -2,14 +2,14 @@ if(BOOTLOADER_BUILD)
     # Bootloader needs SPIUnlock from this file, but doesn't
     # need other parts of this component
     set(COMPONENT_SRCS "spi_flash_rom_patch.c")
-    set(COMPONENT_PRIV_REQUIRES bootloader_support)
+    set(COMPONENT_PRIV_REQUIRES bootloader_support soc)
 else()
     set(COMPONENT_SRCS "cache_utils.c"
                    "flash_mmap.c"
                    "flash_ops.c"
                    "partition.c"
                    "spi_flash_rom_patch.c")
-    set(COMPONENT_PRIV_REQUIRES bootloader_support app_update)
+    set(COMPONENT_PRIV_REQUIRES bootloader_support app_update soc)
 endif()
 
 set(COMPONENT_ADD_INCLUDEDIRS include)

+ 3 - 2
components/spi_flash/flash_mmap.c

@@ -24,6 +24,7 @@
 #include <esp32/rom/cache.h>
 #include <soc/soc.h>
 #include <soc/dport_reg.h>
+#include <soc/soc_memory_layout.h>
 #include "sdkconfig.h"
 #include "esp_ipc.h"
 #include "esp_attr.h"
@@ -163,7 +164,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap_pages(const int *pages, size_t page_count, sp
     // Algorithm is essentially naïve strstr algorithm, except that unused MMU
     // entries are treated as wildcards.
     int start;
-    // the " + 1" is a fix when loop the MMU table pages, because the last MMU page 
+    // the " + 1" is a fix when loop the MMU table pages, because the last MMU page
     // is valid as well if it have not been used
     int end = region_begin + region_size - page_count + 1;
     for (start = region_begin; start < end; ++start) {
@@ -172,7 +173,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap_pages(const int *pages, size_t page_count, sp
         DPORT_INTERRUPT_DISABLE();
         for (pos = start; pos < start + page_count; ++pos, ++pageno) {
             int table_val = (int) DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[pos]);
-            uint8_t refcnt = s_mmap_page_refcnt[pos]; 
+            uint8_t refcnt = s_mmap_page_refcnt[pos];
             if (refcnt != 0 && table_val != pages[pageno]) {
                 break;
             }

+ 1 - 0
components/spi_flash/flash_ops.c

@@ -25,6 +25,7 @@
 #include <esp32/rom/cache.h>
 #include <soc/soc.h>
 #include <soc/dport_reg.h>
+#include <soc/soc_memory_layout.h>
 #include "sdkconfig.h"
 #include "esp_ipc.h"
 #include "esp_attr.h"

+ 1 - 0
components/spi_flash/sim/Makefile.files

@@ -27,6 +27,7 @@ INCLUDE_DIRS := \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/esp32/include \
+	soc/include \
 	esp32/include \
 	bootloader_support/include \
 	app_update/include \

+ 1 - 0
components/spi_flash/sim/stubs/Makefile.files

@@ -20,6 +20,7 @@ INCLUDE_DIRS := \
 	$(addprefix ../../../../components/, \
 	esp_common/include \
 	soc/esp32/include \
+	soc/include \
 	xtensa/include \
 	xtensa/esp32/include \
 	esp32/include \

+ 2 - 0
components/spi_flash/spi_flash_rom_patch.c

@@ -16,6 +16,8 @@
 #include "esp32/rom/gpio.h"
 #include "esp32/rom/spi_flash.h"
 #include "sdkconfig.h"
+#include "soc/spi_reg.h"
+
 
 #define SPI_IDX   1
 #define OTH_IDX   0

+ 1 - 0
components/spiffs/test_spiffs_host/Makefile.files

@@ -29,6 +29,7 @@ INCLUDE_DIRS := \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/esp32/include \
+	soc/include \
 	esp32/include \
 	bootloader_support/include \
 	app_update/include \

+ 1 - 1
components/ulp/test/CMakeLists.txt

@@ -1,7 +1,7 @@
 set(COMPONENT_SRCDIRS ".")
 set(COMPONENT_ADD_INCLUDEDIRS ".")
 
-set(COMPONENT_REQUIRES unity ulp soc)
+set(COMPONENT_REQUIRES unity ulp soc esp_common)
 
 register_component()
 

+ 1 - 0
components/wear_levelling/test_wl_host/Makefile.files

@@ -28,6 +28,7 @@ INCLUDE_DIRS := \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/esp32/include \
+	soc/include \
 	esp32/include \
 	bootloader_support/include \
 	app_update/include \

+ 1 - 1
components/wpa_supplicant/port/os_xtensa.c

@@ -22,12 +22,12 @@
  * examples and are not optimized for speed.
  */
 
-#include "crypto/common.h"
 #include "os.h"
 #include <stdlib.h>
 #include <time.h>
 #include <sys/time.h>
 #include "esp_system.h"
+#include "crypto/common.h"
 
 int os_get_time(struct os_time *t)
 {

+ 15 - 14
components/wpa_supplicant/src/crypto/crypto_mbedtls.c

@@ -12,6 +12,11 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+#ifdef ESP_PLATFORM
+#include "esp_system.h"
+#include "mbedtls/bignum.h"
+#endif
+
 #include "crypto/includes.h"
 #include "crypto/common.h"
 #include "crypto/crypto.h"
@@ -20,10 +25,6 @@
 #include "mbedtls/entropy.h"
 #include "mbedtls/ctr_drbg.h"
 
-#ifdef ESP_PLATFORM
-#include "esp_system.h"
-#include "mbedtls/bignum.h"
-#endif
 
 
 #define IANA_SECP256R1 19
@@ -216,7 +217,7 @@ int crypto_bignum_legendre(const struct crypto_bignum *a,
 
     mbedtls_mpi_init(&exp);
     mbedtls_mpi_init(&tmp);
-    
+
     /* exp = (p-1) / 2 */
     MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(&exp, (const mbedtls_mpi *) p, 1));
     MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(&exp, 1));
@@ -224,10 +225,10 @@ int crypto_bignum_legendre(const struct crypto_bignum *a,
 
     if (mbedtls_mpi_cmp_int(&tmp, 1) == 0) {
         res = 1;
-    } else if (mbedtls_mpi_cmp_int(&tmp, 0) == 0 
-            /* The below check is workaround for the case where HW 
-             * does not behave properly for X ^ A mod M when X is 
-             * power of M. Instead of returning value 0, value M is 
+    } else if (mbedtls_mpi_cmp_int(&tmp, 0) == 0
+            /* The below check is workaround for the case where HW
+             * does not behave properly for X ^ A mod M when X is
+             * power of M. Instead of returning value 0, value M is
              * returned.*/
             || mbedtls_mpi_cmp_mpi(&tmp, (const mbedtls_mpi *)p) == 0) {
         res = 0;
@@ -303,7 +304,7 @@ struct crypto_ec_point *crypto_ec_point_init(struct crypto_ec *e)
     if( pt == NULL) {
         return NULL;
     }
-    
+
     mbedtls_ecp_point_init(pt);
 
     return (struct crypto_ec_point *) pt;
@@ -418,17 +419,17 @@ int crypto_ec_point_mul(struct crypto_ec *e, const struct crypto_ec_point *p,
     int ret;
     mbedtls_entropy_context entropy;
     mbedtls_ctr_drbg_context ctr_drbg;
-    
+
     mbedtls_entropy_init(&entropy);
 
     MBEDTLS_MPI_CHK(mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
-                                    NULL, 0)); 
- 
+                                    NULL, 0));
+
     MBEDTLS_MPI_CHK(mbedtls_ecp_mul(&e->group,
                 (mbedtls_ecp_point *) res,
                 (const mbedtls_mpi *)b,
                 (const mbedtls_ecp_point *)p,
-                mbedtls_ctr_drbg_random, 
+                mbedtls_ctr_drbg_random,
                 &ctr_drbg));
 cleanup:
     mbedtls_ctr_drbg_free( &ctr_drbg );

+ 2 - 3
components/wpa_supplicant/src/wpa2/tls/rsa.c

@@ -12,7 +12,6 @@
 #include "wpa2/tls/asn1.h"
 #include "wpa2/tls/bignum.h"
 #include "wpa2/tls/rsa.h"
-#include "soc/dport_reg.h"
 
 struct crypto_rsa_key {
 	int private_key; /* whether private key is set */
@@ -80,7 +79,7 @@ crypto_rsa_import_public_key(const u8 *buf, size_t len)
 	 * PKCS #1, 7.1:
 	 * RSAPublicKey ::= SEQUENCE {
 	 *     modulus INTEGER, -- n
-	 *     publicExponent INTEGER -- e 
+	 *     publicExponent INTEGER -- e
 	 * }
 	 */
 
@@ -252,7 +251,7 @@ int crypto_rsa_exptmod(const u8 *in, size_t inlen, u8 *out, size_t *outlen,
 	tmp = bignum_init();
 	if (tmp == NULL)
 		return -1;
-	
+
 	if (bignum_set_unsigned_bin(tmp, in, inlen) < 0)
 		goto error;
 	if (bignum_cmp(key->n, tmp) < 0) {

+ 0 - 1
components/wpa_supplicant/src/wps/wps_attr_build.c

@@ -17,7 +17,6 @@
 
 #include "wpa/ieee802_11_defs.h"
 #include "wps/wps_i.h"
-#include "soc/dport_reg.h"
 
 int wps_build_public_key(struct wps_data *wps, struct wpabuf *msg, wps_key_mode_t mode)
 {

+ 2 - 4
components/wpa_supplicant/src/wps/wps_enrollee.c

@@ -17,8 +17,6 @@
 #include "wps/wps.h"
 #include "wps/wps_dev_attr.h"
 
-#include "soc/dport_reg.h"
-
 
 static int wps_build_mac_addr(struct wps_data *wps, struct wpabuf *msg) {
 	wpa_printf(MSG_DEBUG,  "WPS:  * MAC Address");
@@ -1022,7 +1020,7 @@ static enum wps_process_res wps_process_m4(struct wps_data *wps,
 		res = WPS_CONTINUE;
 		goto _out;
 	}
-		
+
 	if (wps->state != RECV_M4) {
 		wpa_printf(MSG_DEBUG,  "WPS: Unexpected state (%d) for "
 			   "receiving M4", wps->state);
@@ -1250,7 +1248,7 @@ static enum wps_process_res wps_process_wsc_start(struct wps_data *wps,
 
 	wpa_printf(MSG_DEBUG,  "WPS: Received WSC_START");
 	ets_timer_disarm(&sm->wps_eapol_start_timer);
-        wps->state = SEND_M1; 
+        wps->state = SEND_M1;
 	return ret;
 }
 

+ 1 - 0
components/xtensa/CMakeLists.txt

@@ -3,6 +3,7 @@ set(COMPONENT_SRCS "eri.c" "trax.c")
 set(COMPONENT_ADD_INCLUDEDIRS "include" "${IDF_TARGET}/include")
 
 set(COMPONENT_ADD_LDFRAGMENTS linker.lf)
+set(COMPONENT_PRIV_REQUIRES soc)
 
 register_component()
 

+ 3 - 4
components/xtensa/include/trax.h

@@ -1,4 +1,3 @@
-#include "soc/dport_reg.h"
 #include "sdkconfig.h"
 #include "esp_err.h"
 #include "eri.h"
@@ -28,8 +27,8 @@ typedef enum {
  *                        the app cpu writes to block 1. Setting this to true
  *                        inverts this.
  *
- * @return esp_err_t. Fails with ESP_ERR_NO_MEM if Trax enable is requested for 2 CPUs 
- *                    but memmap only has room for 1, or if Trax memmap is disabled 
+ * @return esp_err_t. Fails with ESP_ERR_NO_MEM if Trax enable is requested for 2 CPUs
+ *                    but memmap only has room for 1, or if Trax memmap is disabled
  *                    entirely.
  */
 int trax_enable(trax_ena_select_t ena);
@@ -52,7 +51,7 @@ int trax_start_trace(trax_downcount_unit_t units_until_stop);
  *         that delay with the new value. The delay will always start at the time
  *         the function is called.
  *
- * @param  delay : The delay to stop the trace in, in the unit indicated to 
+ * @param  delay : The delay to stop the trace in, in the unit indicated to
  *              trax_start_trace. Note: the trace memory has 4K words available.
  *
  * @return esp_err_t

+ 2 - 1
examples/peripherals/spi_slave/receiver/main/app_main.c

@@ -31,6 +31,7 @@
 #include "driver/spi_slave.h"
 #include "esp_log.h"
 #include "esp_spi_flash.h"
+#include "driver/gpio.h"
 
 
 
@@ -38,7 +39,7 @@
 /*
 SPI receiver (slave) example.
 
-This example is supposed to work together with the SPI sender. It uses the standard SPI pins (MISO, MOSI, SCLK, CS) to 
+This example is supposed to work together with the SPI sender. It uses the standard SPI pins (MISO, MOSI, SCLK, CS) to
 transmit data over in a full-duplex fashion, that is, while the master puts data on the MOSI pin, the slave puts its own
 data on the MISO pin.
 

+ 1 - 0
examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c

@@ -13,6 +13,7 @@
 #include "driver/uart.h"
 #include "soc/uart_struct.h"
 #include "string.h"
+#include "driver/gpio.h"
 
 static const int RX_BUF_SIZE = 1024;
 

+ 1 - 0
examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c

@@ -10,6 +10,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "driver/uart.h"
+#include "driver/gpio.h"
 
 /**
  * This is an example which echos any data it receives on UART1 back to the sender,

+ 5 - 1
tools/cmake/idf_functions.cmake

@@ -58,7 +58,7 @@ macro(idf_set_variables)
 
     set_default(IDF_COMPONENT_DIRS "${IDF_EXTRA_COMPONENT_DIRS} ${IDF_PATH}/components")
     set_default(IDF_COMPONENTS "")
-    set_default(IDF_COMPONENT_REQUIRES_COMMON "cxx ${IDF_TARGET} newlib freertos heap log soc \
+    set_default(IDF_COMPONENT_REQUIRES_COMMON "cxx ${IDF_TARGET} newlib freertos heap log \
                                                 esp_rom esp_common xtensa")
 
     list(FIND IDF_COMPONENT_REQUIRES_COMMON "${IDF_TARGET}" result)
@@ -66,6 +66,10 @@ macro(idf_set_variables)
         list(APPEND IDF_COMPONENT_REQUIRES_COMMON "${IDF_TARGET}")
     endif()
 
+    if(CONFIG_LEGACY_INCLUDE_COMMON_HEADERS)
+        list(APPEND IDF_COMPONENT_REQUIRES_COMMON "soc")
+    endif()
+
     set(IDF_PROJECT_PATH "${CMAKE_SOURCE_DIR}")
 
     set(ESP_PLATFORM 1 CACHE BOOL INTERNAL)