esp_common: move some headers

components/bootloader/subproject/CMakeLists.txt

@@ -19,6 +19,7 @@ set(COMPONENTS
     bootloader
     esptool_py
     esp_hw_support
+    esp_system
     hal
     partition_table
     soc

components/driver/CMakeLists.txt

@@ -75,8 +75,8 @@ endif()
 idf_component_register(SRCS "${srcs}"
                     INCLUDE_DIRS ${includes}
                     PRIV_INCLUDE_DIRS "include/driver"
-                    PRIV_REQUIRES efuse esp_pm esp_timer esp_ipc
-                    REQUIRES esp_ringbuf freertos soc hal esp_hw_support)
+                    PRIV_REQUIRES efuse esp_timer esp_ipc
+                    REQUIRES esp_pm esp_ringbuf freertos soc hal esp_hw_support)
 # (REQUIRES cannot hide soc headers, since many arguments in the driver headers are chip-dependent)
 
 # uses C11 atomic feature

components/esp32/CMakeLists.txt

@@ -30,7 +30,7 @@ else()
     # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function.
     # esp_timer is added here because cpu_start.c uses esp_timer
     set(priv_requires app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread
-        spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc)
+        spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc esp_pm)
     set(fragments linker.lf ld/esp32_fragments.lf)
 
     idf_component_register(SRCS "${srcs}"

components/esp_common/include/esp_private/crosscore_int.h → components/esp_hw_support/include/esp_private/crosscore_int.h

@@ -14,6 +14,9 @@
 #ifndef __ESP_CROSSCORE_INT_H
 #define __ESP_CROSSCORE_INT_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * Initialize the crosscore interrupt system for this CPU.
@@ -61,4 +64,8 @@ void esp_crosscore_int_send_freq_switch(int core_id);
  */
 void esp_crosscore_int_send_print_backtrace(int core_id);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif