bt.c 45 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "esp_random.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "esp_mac.h"
  14. #include "sdkconfig.h"
  15. #include "nimble/nimble_port.h"
  16. #include "nimble/nimble_port_freertos.h"
  17. #include "esp_private/esp_modem_clock.h"
  18. #ifdef ESP_PLATFORM
  19. #include "esp_log.h"
  20. #endif // ESP_PLATFORM
  21. #if CONFIG_SW_COEXIST_ENABLE
  22. #include "private/esp_coexist_internal.h"
  23. #endif // CONFIG_SW_COEXIST_ENABLE
  24. #include "nimble/nimble_npl_os.h"
  25. #include "nimble/ble_hci_trans.h"
  26. #include "os/endian.h"
  27. #include "esp_bt.h"
  28. #include "esp_intr_alloc.h"
  29. #include "esp_sleep.h"
  30. #include "esp_pm.h"
  31. #include "esp_phy_init.h"
  32. #include "esp_private/periph_ctrl.h"
  33. #include "hci_uart.h"
  34. #include "bt_osi_mem.h"
  35. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  36. #include "esp_private/sleep_modem.h"
  37. #include "esp_private/sleep_retention.h"
  38. #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
  39. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  40. #include "hci/hci_hal.h"
  41. #endif // CONFIG_BT_BLUEDROID_ENABLED
  42. #include "freertos/FreeRTOS.h"
  43. #include "freertos/task.h"
  44. #include "esp_private/periph_ctrl.h"
  45. #include "esp_sleep.h"
  46. #include "soc/rtc.h"
  47. /* Macro definition
  48. ************************************************************************
  49. */
  50. #define NIMBLE_PORT_LOG_TAG "BLE_INIT"
  51. #define OSI_COEX_VERSION 0x00010006
  52. #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
  53. #define EXT_FUNC_VERSION 0x20221122
  54. #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
  55. #define BT_ASSERT_PRINT ets_printf
  56. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  57. /* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
  58. #define ACL_DATA_MBUF_LEADINGSPCAE 4
  59. #endif // CONFIG_BT_BLUEDROID_ENABLED
  60. /* Types definition
  61. ************************************************************************
  62. */
  63. struct osi_coex_funcs_t {
  64. uint32_t _magic;
  65. uint32_t _version;
  66. void (* _coex_wifi_sleep_set)(bool sleep);
  67. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  68. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  69. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  70. };
  71. struct ext_funcs_t {
  72. uint32_t ext_version;
  73. int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
  74. int (*_esp_intr_free)(void **ret_handle);
  75. void *(* _malloc)(size_t size);
  76. void (*_free)(void *p);
  77. void (*_hal_uart_start_tx)(int);
  78. int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
  79. int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
  80. int (*_hal_uart_close)(int);
  81. void (*_hal_uart_blocking_tx)(int, uint8_t);
  82. int (*_hal_uart_init)(int, void *);
  83. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param,
  84. uint32_t prio, void *task_handle, uint32_t core_id);
  85. void (* _task_delete)(void *task_handle);
  86. void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  87. uint32_t (* _os_random)(void);
  88. int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
  89. int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y,
  90. const uint8_t *local_priv_key, uint8_t *dhkey);
  91. void (* _esp_reset_rpa_moudle)(void);
  92. uint32_t magic;
  93. };
  94. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  95. typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
  96. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  97. /* External functions or variables
  98. ************************************************************************
  99. */
  100. extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
  101. extern int ble_controller_init(esp_bt_controller_config_t *cfg);
  102. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  103. extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
  104. extern int ble_log_deinit_async(void);
  105. extern void ble_log_async_select_dump_buffers(uint8_t buffers);
  106. extern void ble_log_async_output_dump_all(bool output);
  107. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  108. extern int ble_controller_deinit(void);
  109. extern int ble_controller_enable(uint8_t mode);
  110. extern int ble_controller_disable(void);
  111. extern int esp_register_ext_funcs (struct ext_funcs_t *);
  112. extern void esp_unregister_ext_funcs (void);
  113. extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
  114. extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
  115. extern void esp_unregister_npl_funcs (void);
  116. extern void npl_freertos_mempool_deinit(void);
  117. extern uint32_t r_os_cputime_get32(void);
  118. extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
  119. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  120. extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
  121. extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
  122. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  123. extern void esp_ble_change_rtc_freq(uint32_t freq);
  124. extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
  125. void *w_arg, uint32_t us_to_enabled);
  126. extern void r_ble_rtc_wake_up_state_clr(void);
  127. extern int os_msys_init(void);
  128. extern void os_msys_deinit(void);
  129. extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
  130. const uint8_t *peer_pub_key_y,
  131. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  132. extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
  133. extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
  134. extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
  135. extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
  136. extern uint32_t _bt_bss_start;
  137. extern uint32_t _bt_bss_end;
  138. extern uint32_t _bt_controller_bss_start;
  139. extern uint32_t _bt_controller_bss_end;
  140. extern uint32_t _bt_data_start;
  141. extern uint32_t _bt_data_end;
  142. extern uint32_t _bt_controller_data_start;
  143. extern uint32_t _bt_controller_data_end;
  144. /* Local Function Declaration
  145. *********************************************************************
  146. */
  147. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  148. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  149. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  150. void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  151. static void task_delete_wrapper(void *task_handle);
  152. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  153. static void hci_uart_start_tx_wrapper(int uart_no);
  154. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  155. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
  156. static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
  157. uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
  158. static int hci_uart_close_wrapper(int uart_no);
  159. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
  160. static int hci_uart_init_wrapper(int uart_no, void *cfg);
  161. #endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  162. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  163. void *arg, void **ret_handle_in);
  164. static int esp_intr_free_wrapper(void **ret_handle);
  165. static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  166. static uint32_t osi_random_wrapper(void);
  167. static void esp_reset_rpa_moudle(void);
  168. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
  169. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  170. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  171. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  172. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
  173. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  174. /* Local variable definition
  175. ***************************************************************************
  176. */
  177. /* Static variable declare */
  178. static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  179. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  180. const static uint32_t log_bufs_size[] = {6144, 1024, 2048};
  181. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  182. /* This variable tells if BLE is running */
  183. static bool s_ble_active = false;
  184. #ifdef CONFIG_PM_ENABLE
  185. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
  186. #define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
  187. #endif // CONFIG_PM_ENABLE
  188. #define BLE_RTC_DELAY_US_LIGHT_SLEEP (5100)
  189. #define BLE_RTC_DELAY_US_MODEM_SLEEP (1500)
  190. static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
  191. ._magic = OSI_COEX_MAGIC_VALUE,
  192. ._version = OSI_COEX_VERSION,
  193. ._coex_wifi_sleep_set = NULL,
  194. ._coex_core_ble_conn_dyn_prio_get = NULL,
  195. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  196. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  197. };
  198. struct ext_funcs_t ext_funcs_ro = {
  199. .ext_version = EXT_FUNC_VERSION,
  200. ._esp_intr_alloc = esp_intr_alloc_wrapper,
  201. ._esp_intr_free = esp_intr_free_wrapper,
  202. ._malloc = bt_osi_mem_malloc_internal,
  203. ._free = bt_osi_mem_free,
  204. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  205. ._hal_uart_start_tx = hci_uart_start_tx_wrapper,
  206. ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
  207. ._hal_uart_config = hci_uart_config_wrapper,
  208. ._hal_uart_close = hci_uart_close_wrapper,
  209. ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
  210. ._hal_uart_init = hci_uart_init_wrapper,
  211. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  212. ._task_create = task_create_wrapper,
  213. ._task_delete = task_delete_wrapper,
  214. ._osi_assert = osi_assert_wrapper,
  215. ._os_random = osi_random_wrapper,
  216. ._ecc_gen_key_pair = esp_ecc_gen_key_pair,
  217. ._ecc_gen_dh_key = esp_ecc_gen_dh_key,
  218. ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
  219. .magic = EXT_FUNC_MAGIC_VALUE,
  220. };
  221. static void IRAM_ATTR esp_reset_rpa_moudle(void)
  222. {
  223. }
  224. static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
  225. uint32_t param1, uint32_t param2)
  226. {
  227. BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
  228. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  229. esp_ble_controller_log_dump_all(true);
  230. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  231. assert(0);
  232. }
  233. static uint32_t IRAM_ATTR osi_random_wrapper(void)
  234. {
  235. return esp_random();
  236. }
  237. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  238. {
  239. #if CONFIG_SW_COEXIST_ENABLE
  240. coex_schm_status_bit_set(type, status);
  241. #endif // CONFIG_SW_COEXIST_ENABLE
  242. }
  243. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  244. {
  245. #if CONFIG_SW_COEXIST_ENABLE
  246. coex_schm_status_bit_clear(type, status);
  247. #endif // CONFIG_SW_COEXIST_ENABLE
  248. }
  249. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  250. bool esp_vhci_host_check_send_available(void)
  251. {
  252. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  253. return false;
  254. }
  255. return true;
  256. }
  257. static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
  258. {
  259. struct os_mbuf *om;
  260. int rc;
  261. om = os_msys_get_pkthdr(0, 0);
  262. if (om == NULL) {
  263. return NULL;
  264. }
  265. if (om->om_omp->omp_databuf_len < leading_space) {
  266. rc = os_mbuf_free_chain(om);
  267. assert(rc == 0);
  268. return NULL;
  269. }
  270. om->om_data += leading_space;
  271. return om;
  272. }
  273. struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
  274. {
  275. return ble_hs_mbuf_gen_pkt(4 + 1);
  276. }
  277. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  278. {
  279. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  280. return;
  281. }
  282. if (*(data) == DATA_TYPE_COMMAND) {
  283. struct ble_hci_cmd *cmd = NULL;
  284. cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
  285. assert(cmd);
  286. memcpy((uint8_t *)cmd, data + 1, len - 1);
  287. ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
  288. }
  289. if (*(data) == DATA_TYPE_ACL) {
  290. struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
  291. assert(om);
  292. assert(os_mbuf_append(om, &data[1], len - 1) == 0);
  293. ble_hci_trans_hs_acl_tx(om);
  294. }
  295. }
  296. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  297. {
  298. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  299. return ESP_FAIL;
  300. }
  301. ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
  302. return ESP_OK;
  303. }
  304. #endif // CONFIG_BT_BLUEDROID_ENABLED
  305. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  306. void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  307. {
  308. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle,
  309. (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  310. }
  311. static void task_delete_wrapper(void *task_handle)
  312. {
  313. vTaskDelete(task_handle);
  314. }
  315. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
  316. {
  317. int rc = -1;
  318. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  319. rc = ble_sm_alg_gen_key_pair(pub, priv);
  320. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  321. return rc;
  322. }
  323. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  324. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  325. {
  326. int rc = -1;
  327. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  328. rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
  329. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  330. return rc;
  331. }
  332. #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  333. static void hci_uart_start_tx_wrapper(int uart_no)
  334. {
  335. hci_uart_start_tx(uart_no);
  336. }
  337. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  338. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
  339. {
  340. int rc = -1;
  341. rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
  342. return rc;
  343. }
  344. static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
  345. uint8_t stop_bits, uart_parity_t parity,
  346. uart_hw_flowcontrol_t flow_ctl)
  347. {
  348. int rc = -1;
  349. rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
  350. return rc;
  351. }
  352. static int hci_uart_close_wrapper(int uart_no)
  353. {
  354. int rc = -1;
  355. rc = hci_uart_close(uart_no);
  356. return rc;
  357. }
  358. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
  359. {
  360. //This function is nowhere to use.
  361. }
  362. static int hci_uart_init_wrapper(int uart_no, void *cfg)
  363. {
  364. //This function is nowhere to use.
  365. return 0;
  366. }
  367. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  368. static int ble_hci_unregistered_hook(void*, void*)
  369. {
  370. ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
  371. return 0;
  372. }
  373. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  374. void *arg, void **ret_handle_in)
  375. {
  376. int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
  377. arg, (intr_handle_t *)ret_handle_in);
  378. return rc;
  379. }
  380. static int esp_intr_free_wrapper(void **ret_handle)
  381. {
  382. int rc = 0;
  383. rc = esp_intr_free((intr_handle_t) * ret_handle);
  384. *ret_handle = NULL;
  385. return rc;
  386. }
  387. void esp_bt_rtc_slow_clk_select(uint8_t slow_clk_src)
  388. {
  389. /* Select slow clock source for BT momdule */
  390. switch (slow_clk_src) {
  391. case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
  392. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
  393. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (320 - 1));
  394. break;
  395. case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
  396. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  397. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
  398. break;
  399. case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
  400. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
  401. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
  402. break;
  403. case MODEM_CLOCK_LPCLK_SRC_RC32K:
  404. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  405. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
  406. break;
  407. case MODEM_CLOCK_LPCLK_SRC_EXT32K:
  408. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  409. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
  410. break;
  411. default:
  412. }
  413. }
  414. IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
  415. {
  416. if (!s_ble_active) {
  417. return;
  418. }
  419. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  420. r_ble_rtc_wake_up_state_clr();
  421. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  422. esp_phy_disable(PHY_MODEM_BT);
  423. #ifdef CONFIG_PM_ENABLE
  424. esp_pm_lock_release(s_pm_lock);
  425. #endif // CONFIG_PM_ENABLE
  426. s_ble_active = false;
  427. }
  428. IRAM_ATTR void controller_wakeup_cb(void *arg)
  429. {
  430. if (s_ble_active) {
  431. return;
  432. }
  433. #ifdef CONFIG_PM_ENABLE
  434. esp_pm_lock_acquire(s_pm_lock);
  435. r_ble_rtc_wake_up_state_clr();
  436. #endif //CONFIG_PM_ENABLE
  437. esp_phy_enable(PHY_MODEM_BT);
  438. s_ble_active = true;
  439. }
  440. #ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
  441. static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
  442. {
  443. uint8_t size;
  444. const sleep_retention_entries_config_t *ble_mac_modem_config = esp_ble_mac_retention_link_get(&size, extra);
  445. esp_err_t err = sleep_retention_entries_create(ble_mac_modem_config, size, REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_MAC);
  446. if (err == ESP_OK) {
  447. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
  448. }
  449. return err;
  450. }
  451. static void sleep_modem_ble_mac_modem_state_deinit(void)
  452. {
  453. sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
  454. }
  455. void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
  456. {
  457. esp_ble_set_wakeup_overhead(overhead);
  458. }
  459. #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
  460. esp_err_t controller_sleep_init(void)
  461. {
  462. esp_err_t rc = 0;
  463. #ifdef CONFIG_BT_LE_SLEEP_ENABLE
  464. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
  465. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  466. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  467. BLE_RTC_DELAY_US_LIGHT_SLEEP);
  468. #else
  469. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  470. BLE_RTC_DELAY_US_MODEM_SLEEP);
  471. #endif /* FREERTOS_USE_TICKLESS_IDLE */
  472. #endif // CONFIG_BT_LE_SLEEP_ENABLE
  473. #ifdef CONFIG_PM_ENABLE
  474. rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
  475. if (rc != ESP_OK) {
  476. goto error;
  477. }
  478. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  479. /* Create a new regdma link for BLE related register restoration */
  480. rc = sleep_modem_ble_mac_modem_state_init(0);
  481. assert(rc == 0);
  482. esp_sleep_enable_bt_wakeup();
  483. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
  484. rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
  485. if (rc != ESP_OK) {
  486. goto error;
  487. }
  488. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  489. return rc;
  490. error:
  491. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  492. esp_sleep_disable_bt_wakeup();
  493. esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
  494. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  495. /*lock should release first and then delete*/
  496. if (s_pm_lock != NULL) {
  497. esp_pm_lock_delete(s_pm_lock);
  498. s_pm_lock = NULL;
  499. }
  500. #endif // CONFIG_PM_ENABLE
  501. return rc;
  502. }
  503. void controller_sleep_deinit(void)
  504. {
  505. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  506. r_ble_rtc_wake_up_state_clr();
  507. esp_sleep_disable_bt_wakeup();
  508. sleep_modem_ble_mac_modem_state_deinit();
  509. esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
  510. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  511. #ifdef CONFIG_PM_ENABLE
  512. /* lock should be released first */
  513. esp_pm_lock_delete(s_pm_lock);
  514. s_pm_lock = NULL;
  515. #endif //CONFIG_PM_ENABLE
  516. }
  517. typedef enum {
  518. FILTER_DUPLICATE_PDUTYPE = BIT(0),
  519. FILTER_DUPLICATE_LENGTH = BIT(1),
  520. FILTER_DUPLICATE_ADDRESS = BIT(2),
  521. FILTER_DUPLICATE_ADVDATA = BIT(3),
  522. FILTER_DUPLICATE_DEFAULT = FILTER_DUPLICATE_PDUTYPE | FILTER_DUPLICATE_ADDRESS,
  523. FILTER_DUPLICATE_PDU_ALL = 0xF,
  524. FILTER_DUPLICATE_EXCEPTION_FOR_MESH = BIT(4),
  525. FILTER_DUPLICATE_AD_TYPE = BIT(5),
  526. }disc_duplicate_mode_t;
  527. extern void filter_duplicate_mode_enable(disc_duplicate_mode_t mode);
  528. extern void filter_duplicate_mode_disable(disc_duplicate_mode_t mode);
  529. extern void filter_duplicate_set_ring_list_max_num(uint32_t max_num);
  530. extern void scan_duplicate_cache_refresh_set_time(uint32_t period_time);
  531. int
  532. ble_vhci_disc_duplicate_mode_enable(int mode)
  533. {
  534. // TODO: use vendor hci to update
  535. filter_duplicate_mode_enable(mode);
  536. return true;
  537. }
  538. int
  539. ble_vhci_disc_duplicate_mode_disable(int mode)
  540. {
  541. // TODO: use vendor hci to update
  542. filter_duplicate_mode_disable(mode);
  543. return true;
  544. }
  545. int ble_vhci_disc_duplicate_set_max_cache_size(int max_cache_size){
  546. // TODO: use vendor hci to update
  547. filter_duplicate_set_ring_list_max_num(max_cache_size);
  548. return true;
  549. }
  550. int ble_vhci_disc_duplicate_set_period_refresh_time(int refresh_period_time){
  551. // TODO: use vendor hci to update
  552. scan_duplicate_cache_refresh_set_time(refresh_period_time);
  553. return true;
  554. }
  555. /**
  556. * @brief Config scan duplicate option mode from menuconfig (Adapt to the old configuration method.)
  557. */
  558. void ble_controller_scan_duplicate_config(void)
  559. {
  560. uint32_t duplicate_mode = FILTER_DUPLICATE_DEFAULT;
  561. uint32_t cache_size = 100;
  562. #if CONFIG_BT_LE_SCAN_DUPL == true
  563. cache_size = CONFIG_BT_LE_SCAN_DUPL_CACHE_SIZE;
  564. if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 0) {
  565. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_PDUTYPE;
  566. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 1) {
  567. duplicate_mode = FILTER_DUPLICATE_ADVDATA;
  568. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 2) {
  569. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_ADVDATA;
  570. }
  571. duplicate_mode |= FILTER_DUPLICATE_EXCEPTION_FOR_MESH;
  572. ble_vhci_disc_duplicate_set_period_refresh_time(CONFIG_BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD);
  573. #endif
  574. ble_vhci_disc_duplicate_mode_disable(0xFFFFFFFF);
  575. ble_vhci_disc_duplicate_mode_enable(duplicate_mode);
  576. ble_vhci_disc_duplicate_set_max_cache_size(cache_size);
  577. }
  578. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  579. {
  580. uint8_t mac[6];
  581. esp_err_t ret = ESP_OK;
  582. ble_npl_count_info_t npl_info;
  583. uint32_t slow_clk_freq = 0;
  584. memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
  585. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  586. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  587. return ESP_ERR_INVALID_STATE;
  588. }
  589. if (!cfg) {
  590. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
  591. return ESP_ERR_INVALID_ARG;
  592. }
  593. ret = esp_register_ext_funcs(&ext_funcs_ro);
  594. if (ret != ESP_OK) {
  595. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
  596. return ret;
  597. }
  598. /* Initialize the function pointers for OS porting */
  599. npl_freertos_funcs_init();
  600. struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
  601. if (!p_npl_funcs) {
  602. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
  603. return ESP_ERR_INVALID_ARG;
  604. }
  605. ret = esp_register_npl_funcs(p_npl_funcs);
  606. if (ret != ESP_OK) {
  607. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
  608. goto free_mem;
  609. }
  610. ble_get_npl_element_info(cfg, &npl_info);
  611. npl_freertos_set_controller_npl_info(&npl_info);
  612. if (npl_freertos_mempool_init() != 0) {
  613. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
  614. ret = ESP_ERR_INVALID_ARG;
  615. goto free_mem;
  616. }
  617. #if CONFIG_BT_NIMBLE_ENABLED
  618. /* ble_npl_eventq_init() needs to use npl functions in rom and
  619. * must be called after esp_bt_controller_init().
  620. */
  621. ble_npl_eventq_init(nimble_port_get_dflt_eventq());
  622. #endif // CONFIG_BT_NIMBLE_ENABLED
  623. /* Enable BT-related clocks */
  624. modem_clock_module_enable(PERIPH_BT_MODULE);
  625. modem_clock_module_mac_reset(PERIPH_BT_MODULE);
  626. #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
  627. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
  628. slow_clk_freq = 100000;
  629. #else
  630. #if CONFIG_RTC_CLK_SRC_INT_RC
  631. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
  632. slow_clk_freq = 30000;
  633. #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
  634. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
  635. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
  636. slow_clk_freq = 32768;
  637. } else {
  638. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
  639. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
  640. slow_clk_freq = 100000;
  641. }
  642. #elif CONFIG_RTC_CLK_SRC_INT_RC32K
  643. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
  644. slow_clk_freq = 32000;
  645. #elif CONFIG_RTC_CLK_SRC_EXT_OSC
  646. esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
  647. slow_clk_freq = 32000;
  648. #else
  649. ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
  650. assert(0);
  651. #endif
  652. #endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
  653. if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
  654. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
  655. ret = ESP_ERR_INVALID_ARG;
  656. goto modem_deint;
  657. }
  658. #if CONFIG_SW_COEXIST_ENABLE
  659. coex_init();
  660. #endif // CONFIG_SW_COEXIST_ENABLE
  661. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  662. interface_func_t bt_controller_log_interface;
  663. bt_controller_log_interface = esp_bt_controller_log_interface;
  664. uint8_t buffers = 0;
  665. #if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
  666. buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
  667. #endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
  668. #if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
  669. buffers |= ESP_BLE_LOG_BUF_HCI;
  670. #endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
  671. #if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
  672. ret = ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
  673. #else
  674. ret = ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
  675. #endif // CONFIG_BT_CONTROLLER_LOG_DUMP
  676. if (ret != ESP_OK) {
  677. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
  678. goto modem_deint;
  679. }
  680. #endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
  681. ret = ble_controller_init(cfg);
  682. if (ret != ESP_OK) {
  683. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
  684. goto modem_deint;
  685. }
  686. esp_ble_change_rtc_freq(slow_clk_freq);
  687. ble_controller_scan_duplicate_config();
  688. ret = os_msys_init();
  689. if (ret != ESP_OK) {
  690. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
  691. goto free_controller;
  692. }
  693. ret = controller_sleep_init();
  694. if (ret != ESP_OK) {
  695. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
  696. goto free_controller;
  697. }
  698. ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
  699. swap_in_place(mac, 6);
  700. esp_ble_ll_set_public_addr(mac);
  701. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  702. ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
  703. (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
  704. return ESP_OK;
  705. free_controller:
  706. controller_sleep_deinit();
  707. os_msys_deinit();
  708. ble_controller_deinit();
  709. modem_deint:
  710. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  711. ble_log_deinit_async();
  712. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  713. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  714. modem_clock_module_disable(PERIPH_BT_MODULE);
  715. #if CONFIG_BT_NIMBLE_ENABLED
  716. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  717. #endif // CONFIG_BT_NIMBLE_ENABLED
  718. free_mem:
  719. npl_freertos_mempool_deinit();
  720. esp_unregister_npl_funcs();
  721. npl_freertos_funcs_deinit();
  722. esp_unregister_ext_funcs();
  723. return ret;
  724. }
  725. esp_err_t esp_bt_controller_deinit(void)
  726. {
  727. if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) ||
  728. (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
  729. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  730. return ESP_FAIL;
  731. }
  732. controller_sleep_deinit();
  733. os_msys_deinit();
  734. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  735. modem_clock_module_disable(PERIPH_BT_MODULE);
  736. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  737. ble_log_deinit_async();
  738. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  739. ble_controller_deinit();
  740. #if CONFIG_BT_NIMBLE_ENABLED
  741. /* De-initialize default event queue */
  742. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  743. #endif // CONFIG_BT_NIMBLE_ENABLED
  744. esp_unregister_npl_funcs();
  745. esp_unregister_ext_funcs();
  746. /* De-initialize npl functions */
  747. npl_freertos_funcs_deinit();
  748. npl_freertos_mempool_deinit();
  749. ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  750. return ESP_OK;
  751. }
  752. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  753. {
  754. esp_err_t ret = ESP_OK;
  755. if (mode != ESP_BT_MODE_BLE) {
  756. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
  757. return ESP_FAIL;
  758. }
  759. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  760. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  761. return ESP_FAIL;
  762. }
  763. if (!s_ble_active) {
  764. #if CONFIG_PM_ENABLE
  765. esp_pm_lock_acquire(s_pm_lock);
  766. #endif // CONFIG_PM_ENABLE
  767. esp_phy_enable(PHY_MODEM_BT);
  768. s_ble_active = true;
  769. }
  770. esp_btbb_enable();
  771. #if CONFIG_SW_COEXIST_ENABLE
  772. coex_enable();
  773. #endif // CONFIG_SW_COEXIST_ENABLE
  774. if (ble_controller_enable(mode) != 0) {
  775. ret = ESP_FAIL;
  776. goto error;
  777. }
  778. ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  779. return ESP_OK;
  780. error:
  781. #if CONFIG_SW_COEXIST_ENABLE
  782. coex_disable();
  783. #endif
  784. esp_btbb_disable();
  785. if (s_ble_active) {
  786. esp_phy_disable(PHY_MODEM_BT);
  787. #if CONFIG_PM_ENABLE
  788. esp_pm_lock_release(s_pm_lock);
  789. #endif // CONFIG_PM_ENABLE
  790. s_ble_active = false;
  791. }
  792. return ret;
  793. }
  794. esp_err_t esp_bt_controller_disable(void)
  795. {
  796. if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
  797. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  798. return ESP_FAIL;
  799. }
  800. if (ble_controller_disable() != 0) {
  801. return ESP_FAIL;
  802. }
  803. #if CONFIG_SW_COEXIST_ENABLE
  804. coex_disable();
  805. #endif
  806. esp_btbb_disable();
  807. if (s_ble_active) {
  808. esp_phy_disable(PHY_MODEM_BT);
  809. #if CONFIG_PM_ENABLE
  810. esp_pm_lock_release(s_pm_lock);
  811. #endif // CONFIG_PM_ENABLE
  812. s_ble_active = false;
  813. }
  814. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  815. return ESP_OK;
  816. }
  817. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  818. {
  819. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
  820. return ESP_OK;
  821. }
  822. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  823. {
  824. int ret = heap_caps_add_region(start, end);
  825. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  826. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  827. * we replace it by ESP_OK
  828. */
  829. if (ret == ESP_ERR_INVALID_SIZE) {
  830. return ESP_OK;
  831. }
  832. return ret;
  833. }
  834. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  835. {
  836. intptr_t mem_start, mem_end;
  837. if (mode & ESP_BT_MODE_BLE) {
  838. /* If the addresses of btdm .bss and bt .bss are consecutive,
  839. * they are registered in the system heap as a piece of memory
  840. */
  841. if(_bt_bss_end == _bt_controller_bss_start) {
  842. mem_start = (intptr_t)&_bt_bss_start;
  843. mem_end = (intptr_t)&_bt_controller_bss_end;
  844. if (mem_start != mem_end) {
  845. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d",
  846. mem_start, mem_end, mem_end - mem_start);
  847. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  848. }
  849. } else {
  850. mem_start = (intptr_t)&_bt_bss_start;
  851. mem_end = (intptr_t)&_bt_bss_end;
  852. if (mem_start != mem_end) {
  853. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d",
  854. mem_start, mem_end, mem_end - mem_start);
  855. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  856. }
  857. mem_start = (intptr_t)&_bt_controller_bss_start;
  858. mem_end = (intptr_t)&_bt_controller_bss_end;
  859. if (mem_start != mem_end) {
  860. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller BSS [0x%08x] - [0x%08x], len %d",
  861. mem_start, mem_end, mem_end - mem_start);
  862. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  863. }
  864. }
  865. /* If the addresses of btdm .data and bt .data are consecutive,
  866. * they are registered in the system heap as a piece of memory
  867. */
  868. if(_bt_data_end == _bt_controller_data_start) {
  869. mem_start = (intptr_t)&_bt_data_start;
  870. mem_end = (intptr_t)&_bt_controller_data_end;
  871. if (mem_start != mem_end) {
  872. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d",
  873. mem_start, mem_end, mem_end - mem_start);
  874. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  875. }
  876. } else {
  877. mem_start = (intptr_t)&_bt_data_start;
  878. mem_end = (intptr_t)&_bt_data_end;
  879. if (mem_start != mem_end) {
  880. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d",
  881. mem_start, mem_end, mem_end - mem_start);
  882. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  883. }
  884. mem_start = (intptr_t)&_bt_controller_data_start;
  885. mem_end = (intptr_t)&_bt_controller_data_end;
  886. if (mem_start != mem_end) {
  887. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller Data [0x%08x] - [0x%08x], len %d",
  888. mem_start, mem_end, mem_end - mem_start);
  889. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  890. }
  891. }
  892. }
  893. return ESP_OK;
  894. }
  895. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  896. {
  897. return ble_controller_status;
  898. }
  899. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  900. {
  901. esp_err_t stat = ESP_FAIL;
  902. switch (power_type) {
  903. case ESP_BLE_PWR_TYPE_DEFAULT:
  904. case ESP_BLE_PWR_TYPE_ADV:
  905. case ESP_BLE_PWR_TYPE_SCAN:
  906. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  907. stat = ESP_OK;
  908. }
  909. break;
  910. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  911. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  912. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  913. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  914. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  915. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  916. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  917. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  918. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  919. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
  920. stat = ESP_OK;
  921. }
  922. break;
  923. default:
  924. stat = ESP_ERR_NOT_SUPPORTED;
  925. break;
  926. }
  927. return stat;
  928. }
  929. esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle,
  930. esp_power_level_t power_level)
  931. {
  932. esp_err_t stat = ESP_FAIL;
  933. switch (power_type) {
  934. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  935. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  936. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  937. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  938. stat = ESP_OK;
  939. }
  940. break;
  941. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  942. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  943. if (ble_txpwr_set(power_type, handle, power_level) == 0) {
  944. stat = ESP_OK;
  945. }
  946. break;
  947. default:
  948. stat = ESP_ERR_NOT_SUPPORTED;
  949. break;
  950. }
  951. return stat;
  952. }
  953. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  954. {
  955. int tx_level = 0;
  956. switch (power_type) {
  957. case ESP_BLE_PWR_TYPE_ADV:
  958. case ESP_BLE_PWR_TYPE_SCAN:
  959. case ESP_BLE_PWR_TYPE_DEFAULT:
  960. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  961. break;
  962. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  963. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  964. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  965. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  966. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  967. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  968. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  969. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  970. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  971. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
  972. break;
  973. default:
  974. return ESP_PWR_LVL_INVALID;
  975. }
  976. if (tx_level < 0) {
  977. return ESP_PWR_LVL_INVALID;
  978. }
  979. return (esp_power_level_t)tx_level;
  980. }
  981. esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type,
  982. uint16_t handle)
  983. {
  984. int tx_level = 0;
  985. switch (power_type) {
  986. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  987. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  988. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  989. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  990. break;
  991. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  992. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  993. tx_level = ble_txpwr_get(power_type, handle);
  994. break;
  995. default:
  996. return ESP_PWR_LVL_INVALID;
  997. }
  998. if (tx_level < 0) {
  999. return ESP_PWR_LVL_INVALID;
  1000. }
  1001. return (esp_power_level_t)tx_level;
  1002. }
  1003. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1004. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
  1005. {
  1006. for (int i = 0; i < len; i++) {
  1007. esp_rom_printf("%02x ", addr[i]);
  1008. }
  1009. if (end) {
  1010. esp_rom_printf("\n");
  1011. }
  1012. }
  1013. void esp_ble_controller_log_dump_all(bool output)
  1014. {
  1015. portMUX_TYPE spinlock;
  1016. portENTER_CRITICAL_SAFE(&spinlock);
  1017. BT_ASSERT_PRINT("\r\n[DUMP_START:");
  1018. ble_log_async_output_dump_all(output);
  1019. BT_ASSERT_PRINT("]\r\n");
  1020. portEXIT_CRITICAL_SAFE(&spinlock);
  1021. }
  1022. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1023. #if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
  1024. #define BLE_SM_KEY_ERR 0x17
  1025. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1026. #include "mbedtls/aes.h"
  1027. #if CONFIG_BT_LE_SM_SC
  1028. #include "mbedtls/cipher.h"
  1029. #include "mbedtls/entropy.h"
  1030. #include "mbedtls/ctr_drbg.h"
  1031. #include "mbedtls/cmac.h"
  1032. #include "mbedtls/ecdh.h"
  1033. #include "mbedtls/ecp.h"
  1034. #endif // CONFIG_BT_LE_SM_SC
  1035. #else
  1036. #include "tinycrypt/aes.h"
  1037. #include "tinycrypt/constants.h"
  1038. #include "tinycrypt/utils.h"
  1039. #if CONFIG_BT_LE_SM_SC
  1040. #include "tinycrypt/cmac_mode.h"
  1041. #include "tinycrypt/ecc_dh.h"
  1042. #endif // CONFIG_BT_LE_SM_SC
  1043. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1044. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1045. #if CONFIG_BT_LE_SM_SC
  1046. static mbedtls_ecp_keypair keypair;
  1047. #endif // CONFIG_BT_LE_SM_SC
  1048. #endif// CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1049. int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  1050. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  1051. {
  1052. uint8_t dh[32];
  1053. uint8_t pk[64];
  1054. uint8_t priv[32];
  1055. int rc = BLE_SM_KEY_ERR;
  1056. swap_buf(pk, peer_pub_key_x, 32);
  1057. swap_buf(&pk[32], peer_pub_key_y, 32);
  1058. swap_buf(priv, our_priv_key, 32);
  1059. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1060. struct mbedtls_ecp_point pt = {0}, Q = {0};
  1061. mbedtls_mpi z = {0}, d = {0};
  1062. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1063. mbedtls_entropy_context entropy = {0};
  1064. uint8_t pub[65] = {0};
  1065. /* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
  1066. pub[0] = 0x04;
  1067. memcpy(&pub[1], pk, 64);
  1068. /* Initialize the required structures here */
  1069. mbedtls_ecp_point_init(&pt);
  1070. mbedtls_ecp_point_init(&Q);
  1071. mbedtls_ctr_drbg_init(&ctr_drbg);
  1072. mbedtls_entropy_init(&entropy);
  1073. mbedtls_mpi_init(&d);
  1074. mbedtls_mpi_init(&z);
  1075. /* Below 3 steps are to validate public key on curve secp256r1 */
  1076. if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
  1077. goto exit;
  1078. }
  1079. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
  1080. goto exit;
  1081. }
  1082. if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
  1083. goto exit;
  1084. }
  1085. /* Set PRNG */
  1086. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1087. NULL, 0)) != 0) {
  1088. goto exit;
  1089. }
  1090. /* Prepare point Q from pub key */
  1091. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
  1092. goto exit;
  1093. }
  1094. if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
  1095. goto exit;
  1096. }
  1097. rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
  1098. mbedtls_ctr_drbg_random, &ctr_drbg);
  1099. if (rc != 0) {
  1100. goto exit;
  1101. }
  1102. rc = mbedtls_mpi_write_binary(&z, dh, 32);
  1103. if (rc != 0) {
  1104. goto exit;
  1105. }
  1106. exit:
  1107. mbedtls_ecp_point_free(&pt);
  1108. mbedtls_mpi_free(&z);
  1109. mbedtls_mpi_free(&d);
  1110. mbedtls_ecp_point_free(&Q);
  1111. mbedtls_entropy_free(&entropy);
  1112. mbedtls_ctr_drbg_free(&ctr_drbg);
  1113. if (rc != 0) {
  1114. return BLE_SM_KEY_ERR;
  1115. }
  1116. #else
  1117. if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
  1118. return BLE_SM_KEY_ERR;
  1119. }
  1120. rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
  1121. if (rc == TC_CRYPTO_FAIL) {
  1122. return BLE_SM_KEY_ERR;
  1123. }
  1124. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1125. swap_buf(out_dhkey, dh, 32);
  1126. return 0;
  1127. }
  1128. /* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
  1129. static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
  1130. 0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
  1131. 0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
  1132. 0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
  1133. };
  1134. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1135. static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
  1136. {
  1137. int rc = BLE_SM_KEY_ERR;
  1138. size_t olen = 0;
  1139. uint8_t pub[65] = {0};
  1140. mbedtls_entropy_context entropy = {0};
  1141. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1142. mbedtls_entropy_init(&entropy);
  1143. mbedtls_ctr_drbg_init(&ctr_drbg);
  1144. mbedtls_ecp_keypair_init(&keypair);
  1145. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1146. NULL, 0)) != 0) {
  1147. goto exit;
  1148. }
  1149. if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
  1150. mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
  1151. goto exit;
  1152. }
  1153. if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
  1154. goto exit;
  1155. }
  1156. if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp),
  1157. &keypair.MBEDTLS_PRIVATE(Q),
  1158. MBEDTLS_ECP_PF_UNCOMPRESSED,
  1159. &olen, pub, 65)) != 0) {
  1160. goto exit;
  1161. }
  1162. memcpy(public_key, &pub[1], 64);
  1163. exit:
  1164. mbedtls_ctr_drbg_free(&ctr_drbg);
  1165. mbedtls_entropy_free(&entropy);
  1166. if (rc != 0) {
  1167. mbedtls_ecp_keypair_free(&keypair);
  1168. return BLE_SM_KEY_ERR;
  1169. }
  1170. return 0;
  1171. }
  1172. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1173. /**
  1174. * pub: 64 bytes
  1175. * priv: 32 bytes
  1176. */
  1177. int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
  1178. {
  1179. #if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1180. swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
  1181. swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
  1182. swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
  1183. #else
  1184. uint8_t pk[64];
  1185. do {
  1186. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1187. if (mbedtls_gen_keypair(pk, priv) != 0) {
  1188. return BLE_SM_KEY_ERR;
  1189. }
  1190. #else
  1191. if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
  1192. return BLE_SM_KEY_ERR;
  1193. }
  1194. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1195. /* Make sure generated key isn't debug key. */
  1196. } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
  1197. swap_buf(pub, pk, 32);
  1198. swap_buf(&pub[32], &pk[32], 32);
  1199. swap_in_place(priv, 32);
  1200. #endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1201. return 0;
  1202. }
  1203. #endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)