efuse.h 11 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #ifndef _ROM_EFUSE_H_
  7. #define _ROM_EFUSE_H_
  8. #ifdef __cplusplus
  9. extern "C" {
  10. #endif
  11. #include <stdint.h>
  12. #include <stddef.h>
  13. #include <stdbool.h>
  14. /** \defgroup efuse_APIs efuse APIs
  15. * @brief ESP32 efuse read/write APIs
  16. * @attention
  17. *
  18. */
  19. /** For ESP32-C2, there's no key purpose region for efuse keys, In order to maintain
  20. * compatibility with the previous apis, we should set the parameter of 'ets_efuse_purpose_t'
  21. * as default value ETS_EFUSE_KEY_PURPOSE_INVALID.
  22. * (In fact, this parameter can be any value, the api in the rom will not process key_purpose region)
  23. */
  24. typedef enum {
  25. ETS_EFUSE_KEY_PURPOSE_INVALID = -1,
  26. } ets_efuse_purpose_t;
  27. typedef enum {
  28. ETS_EFUSE_BLOCK0 = 0,
  29. ETS_EFUSE_BLOCK_SYS_DATA1 = 1,
  30. ETS_EFUSE_BLOCK_SYS_DATA2 = 2,
  31. ETS_EFUSE_BLOCK_KEY0 = 3,
  32. ETS_EFUSE_BLOCK_MAX,
  33. } ets_efuse_block_t;
  34. /**
  35. * @brief set timing accroding the apb clock, so no read error or write error happens.
  36. *
  37. * @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
  38. *
  39. * @return : 0 if success, others if clock not accepted
  40. */
  41. int ets_efuse_set_timing(uint32_t clock);
  42. /**
  43. * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
  44. */
  45. void ets_efuse_start(void);
  46. /**
  47. * @brief Efuse read operation: copies data from physical efuses to efuse read registers.
  48. *
  49. * @param null
  50. *
  51. * @return : 0 if success, others if apb clock is not accepted
  52. */
  53. int ets_efuse_read(void);
  54. /**
  55. * @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
  56. *
  57. * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
  58. *
  59. * @return : 0 if success, others if apb clock is not accepted
  60. */
  61. int ets_efuse_program(ets_efuse_block_t block);
  62. /**
  63. * @brief Set all Efuse program registers to zero.
  64. *
  65. * Call this before writing new data to the program registers.
  66. */
  67. void ets_efuse_clear_program_registers(void);
  68. /**
  69. * @brief Program a block of key data to an efuse block
  70. *
  71. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
  72. * @param purpose Purpose to set for this key. Purpose must be already unset.
  73. * @param data Pointer to data to write.
  74. * @param data_len Length of data to write.
  75. *
  76. * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
  77. */
  78. int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
  79. /* @brief Return the address of a particular efuse block's first read register
  80. *
  81. * @param block Index of efuse block to look up
  82. *
  83. * @return 0 if block is invalid, otherwise a numeric read register address
  84. * of the first word in the block.
  85. */
  86. uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
  87. /**
  88. * @brief Return the current purpose set for an efuse key block
  89. *
  90. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
  91. */
  92. ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
  93. /**
  94. * @brief Find a key block with the particular purpose set
  95. *
  96. * @param purpose Purpose to search for.
  97. * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
  98. * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
  99. */
  100. bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
  101. /**
  102. * Return true if the key block is unused, false otherwise.
  103. *
  104. * An unused key block is all zero content, not read or write protected,
  105. * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
  106. *
  107. * @param key_block key block to check.
  108. *
  109. * @return true if key block is unused, false if key block or used
  110. * or the specified block index is not a key block.
  111. */
  112. bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
  113. /**
  114. * @brief Search for an unused key block and return the first one found.
  115. *
  116. * See @ref ets_efuse_key_block_unused for a description of an unused key block.
  117. *
  118. * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
  119. */
  120. ets_efuse_block_t ets_efuse_find_unused_key_block(void);
  121. /**
  122. * @brief Return the number of unused efuse key blocks (0-6)
  123. */
  124. unsigned ets_efuse_count_unused_key_blocks(void);
  125. /**
  126. * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
  127. *
  128. * @param data Pointer to data buffer (length 32 bytes)
  129. * @param rs_values Pointer to write encoded data to (length 12 bytes)
  130. */
  131. void ets_efuse_rs_calculate(const void *data, void *rs_values);
  132. /**
  133. * @brief Read spi flash pads configuration from Efuse
  134. *
  135. * @return
  136. * - 0 for default SPI pins.
  137. * - 1 for default HSPI pins.
  138. * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
  139. * EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
  140. * WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
  141. */
  142. uint32_t ets_efuse_get_spiconfig(void);
  143. /**
  144. * @brief Read spi flash wp pad from Efuse
  145. *
  146. * @return
  147. * - 0x3f for invalid.
  148. * - 0~46 is valid.
  149. */
  150. uint32_t ets_efuse_get_wp_pad(void);
  151. /**
  152. * @brief Read opi flash pads configuration from Efuse
  153. *
  154. * @return
  155. * - 0 for default SPI pins.
  156. * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
  157. * DQS, D4, D5, D6, D7 accordingly.
  158. */
  159. uint32_t ets_efuse_get_opiconfig(void);
  160. /**
  161. * @brief Read if download mode disabled from Efuse
  162. *
  163. * @return
  164. * - true for efuse disable download mode.
  165. * - false for efuse doesn't disable download mode.
  166. */
  167. bool ets_efuse_download_modes_disabled(void);
  168. /**
  169. * @brief Read if legacy spi flash boot mode disabled from Efuse
  170. *
  171. * @return
  172. * - true for efuse disable legacy spi flash boot mode.
  173. * - false for efuse doesn't disable legacy spi flash boot mode.
  174. */
  175. bool ets_efuse_legacy_spi_boot_mode_disabled(void);
  176. /**
  177. * @brief Read if uart print control value from Efuse
  178. *
  179. * @return
  180. * - 0 for uart force print.
  181. * - 1 for uart print when GPIO8 is low when digital reset.
  182. * 2 for uart print when GPIO8 is high when digital reset.
  183. * 3 for uart force slient
  184. */
  185. uint32_t ets_efuse_get_uart_print_control(void);
  186. /**
  187. * @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse
  188. *
  189. * @return
  190. * - 1 for efuse disable USB-Serial-JTAG print during rom boot.
  191. * - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot.
  192. */
  193. uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void);
  194. /**
  195. * @brief Read if usb download mode disabled from Efuse
  196. *
  197. * (Also returns true if security download mode is enabled, as this mode
  198. * disables USB download.)
  199. *
  200. * @return
  201. * - true for efuse disable usb download mode.
  202. * - false for efuse doesn't disable usb download mode.
  203. */
  204. bool ets_efuse_usb_download_mode_disabled(void);
  205. /**
  206. * @brief Read if tiny basic mode disabled from Efuse
  207. *
  208. * @return
  209. * - true for efuse disable tiny basic mode.
  210. * - false for efuse doesn't disable tiny basic mode.
  211. */
  212. bool ets_efuse_tiny_basic_mode_disabled(void);
  213. /**
  214. * @brief Read if usb module disabled from Efuse
  215. *
  216. * @return
  217. * - true for efuse disable usb module.
  218. * - false for efuse doesn't disable usb module.
  219. */
  220. bool ets_efuse_usb_module_disabled(void);
  221. /**
  222. * @brief Read if security download modes enabled from Efuse
  223. *
  224. * @return
  225. * - true for efuse enable security download mode.
  226. * - false for efuse doesn't enable security download mode.
  227. */
  228. bool ets_efuse_security_download_modes_enabled(void);
  229. /**
  230. * @brief Return true if secure boot is enabled in EFuse
  231. */
  232. bool ets_efuse_secure_boot_enabled(void);
  233. /**
  234. * @brief Return true if secure boot aggressive revoke is enabled in EFuse
  235. */
  236. bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
  237. /**
  238. * @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
  239. */
  240. bool ets_efuse_cache_encryption_enabled(void);
  241. /**
  242. * @brief Return true if EFuse indicates an external phy needs to be used for USB
  243. */
  244. bool ets_efuse_usb_use_ext_phy(void);
  245. /**
  246. * @brief Return true if EFuse indicates USB device persistence is disabled
  247. */
  248. bool ets_efuse_usb_force_nopersist(void);
  249. /**
  250. * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
  251. */
  252. bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
  253. /**
  254. * @brief Return true if EFuse indicates an opi flash is attached.
  255. */
  256. bool ets_efuse_flash_opi_mode(void);
  257. /**
  258. * @brief Return true if EFuse indicates to send a flash resume command.
  259. */
  260. bool ets_efuse_force_send_resume(void);
  261. /**
  262. * @brief return the time in us ROM boot need wait flash to power on from Efuse
  263. *
  264. * @return
  265. * - uint32_t the time in us.
  266. */
  267. uint32_t ets_efuse_get_flash_delay_us(void);
  268. #define EFUSE_SPICONFIG_SPI_DEFAULTS 0
  269. #define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
  270. #define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
  271. #define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
  272. #define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
  273. #define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
  274. #define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
  275. #define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
  276. #define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
  277. #define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
  278. #define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
  279. #define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
  280. #define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
  281. #define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
  282. #define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
  283. #define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
  284. #define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
  285. /**
  286. * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
  287. * the JTAG_CTRL registers.
  288. *
  289. * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
  290. *
  291. * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
  292. *
  293. * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
  294. * @param key_block Index of a key block containing the source for this key.
  295. *
  296. * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
  297. */
  298. int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
  299. /**
  300. * @brief A crc8 algorithm used for MAC addresses in efuse
  301. *
  302. * @param unsigned char const *p : Pointer to original data.
  303. *
  304. * @param unsigned int len : Data length in byte.
  305. *
  306. * @return unsigned char: Crc value.
  307. */
  308. unsigned char esp_crc8(unsigned char const *p, unsigned int len);
  309. /**
  310. * @}
  311. */
  312. #ifdef __cplusplus
  313. }
  314. #endif
  315. #endif /* _ROM_EFUSE_H_ */