bt.c 55 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/rtc_cntl_reg.h"
  40. #include "soc/soc_memory_layout.h"
  41. #include "esp_clk.h"
  42. #include "esp_coexist_internal.h"
  43. #if !CONFIG_FREERTOS_UNICORE
  44. #include "esp_ipc.h"
  45. #endif
  46. #if CONFIG_BT_ENABLED
  47. /* Macro definition
  48. ************************************************************************
  49. */
  50. #define BTDM_LOG_TAG "BTDM_INIT"
  51. #define BTDM_INIT_PERIOD (5000) /* ms */
  52. /* Bluetooth system and controller config */
  53. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  54. #define BTDM_CFG_HCI_UART (1<<1)
  55. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  56. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  57. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  58. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  59. /* Sleep mode */
  60. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  61. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  62. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  63. /* Low Power Clock Selection */
  64. #define BTDM_LPCLK_SEL_XTAL (0)
  65. #define BTDM_LPCLK_SEL_XTAL32K (1)
  66. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  67. #define BTDM_LPCLK_SEL_8M (3)
  68. /* Sleep and wakeup interval control */
  69. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  70. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  71. #define BT_DEBUG(...)
  72. #define BT_API_CALL_CHECK(info, api_call, ret) \
  73. do{\
  74. esp_err_t __err = (api_call);\
  75. if ((ret) != __err) {\
  76. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  77. return __err;\
  78. }\
  79. } while(0)
  80. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  81. #define OSI_VERSION 0x00010002
  82. #define OSI_MAGIC_VALUE 0xFADEBEAD
  83. /* SPIRAM Configuration */
  84. #if CONFIG_SPIRAM_USE_MALLOC
  85. #define BTDM_MAX_QUEUE_NUM (5)
  86. #endif
  87. /* Types definition
  88. ************************************************************************
  89. */
  90. /* VHCI function interface */
  91. typedef struct vhci_host_callback {
  92. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  93. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  94. } vhci_host_callback_t;
  95. /* Dram region */
  96. typedef struct {
  97. esp_bt_mode_t mode;
  98. intptr_t start;
  99. intptr_t end;
  100. } btdm_dram_available_region_t;
  101. /* PSRAM configuration */
  102. #if CONFIG_SPIRAM_USE_MALLOC
  103. typedef struct {
  104. QueueHandle_t handle;
  105. void *storage;
  106. void *buffer;
  107. } btdm_queue_item_t;
  108. #endif
  109. /* OSI function */
  110. struct osi_funcs_t {
  111. uint32_t _version;
  112. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  113. void (*_ints_on)(unsigned int mask);
  114. void (*_interrupt_disable)(void);
  115. void (*_interrupt_restore)(void);
  116. void (*_task_yield)(void);
  117. void (*_task_yield_from_isr)(void);
  118. void *(*_semphr_create)(uint32_t max, uint32_t init);
  119. void (*_semphr_delete)(void *semphr);
  120. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  121. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  122. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  123. int32_t (*_semphr_give)(void *semphr);
  124. void *(*_mutex_create)(void);
  125. void (*_mutex_delete)(void *mutex);
  126. int32_t (*_mutex_lock)(void *mutex);
  127. int32_t (*_mutex_unlock)(void *mutex);
  128. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  129. void (* _queue_delete)(void *queue);
  130. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  131. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  132. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  133. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  134. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  135. void (* _task_delete)(void *task_handle);
  136. bool (* _is_in_isr)(void);
  137. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  138. void *(* _malloc)(uint32_t size);
  139. void *(* _malloc_internal)(uint32_t size);
  140. void (* _free)(void *p);
  141. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  142. void (* _srand)(unsigned int seed);
  143. int (* _rand)(void);
  144. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  145. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  146. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  147. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  148. void (* _btdm_sleep_enter_phase2)(void);
  149. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  150. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  151. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  152. bool (* _coex_bt_wakeup_request)(void);
  153. void (* _coex_bt_wakeup_request_end)(void);
  154. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  155. int (* _coex_bt_release)(uint32_t event);
  156. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  157. uint32_t (* _coex_bb_reset_lock)(void);
  158. void (* _coex_bb_reset_unlock)(uint32_t restore);
  159. int (* _coex_schm_register_btdm_callback)(void *callback);
  160. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  161. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  162. uint32_t (* _coex_schm_interval_get)(void);
  163. uint8_t (* _coex_schm_curr_period_get)(void);
  164. void *(* _coex_schm_curr_phase_get)(void);
  165. int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
  166. int (* _coex_register_wifi_channel_change_callback)(void *cb);
  167. uint32_t _magic;
  168. };
  169. typedef void (*workitem_handler_t)(void* arg);
  170. /* External functions or values
  171. ************************************************************************
  172. */
  173. /* not for user call, so don't put to include file */
  174. /* OSI */
  175. extern int btdm_osi_funcs_register(void *osi_funcs);
  176. /* Initialise and De-initialise */
  177. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  178. extern void btdm_controller_deinit(void);
  179. extern int btdm_controller_enable(esp_bt_mode_t mode);
  180. extern void btdm_controller_disable(void);
  181. extern uint8_t btdm_controller_get_mode(void);
  182. extern const char *btdm_controller_get_compile_version(void);
  183. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  184. extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
  185. /* Sleep */
  186. extern void btdm_controller_enable_sleep(bool enable);
  187. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  188. extern uint8_t btdm_controller_get_sleep_mode(void);
  189. extern bool btdm_power_state_active(void);
  190. extern void btdm_wakeup_request(void);
  191. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  192. /* Low Power Clock */
  193. extern bool btdm_lpclk_select_src(uint32_t sel);
  194. extern bool btdm_lpclk_set_div(uint32_t div);
  195. /* VHCI */
  196. extern bool API_vhci_host_check_send_available(void);
  197. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  198. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  199. /* TX power */
  200. extern int ble_txpwr_set(int power_type, int power_level);
  201. extern int ble_txpwr_get(int power_type);
  202. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  203. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  204. extern void bredr_sco_datapath_set(uint8_t data_path);
  205. extern void btdm_controller_scan_duplicate_list_clear(void);
  206. /* Coexistence */
  207. extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
  208. extern int coex_bt_release(uint32_t event);
  209. extern int coex_register_bt_cb(coex_func_cb_t cb);
  210. extern uint32_t coex_bb_reset_lock(void);
  211. extern void coex_bb_reset_unlock(uint32_t restore);
  212. extern int coex_schm_register_btdm_callback(void *callback);
  213. extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
  214. extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
  215. extern uint32_t coex_schm_interval_get(void);
  216. extern uint8_t coex_schm_curr_period_get(void);
  217. extern void * coex_schm_curr_phase_get(void);
  218. extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
  219. extern int coex_register_wifi_channel_change_callback(void *cb);
  220. extern char _bss_start_btdm;
  221. extern char _bss_end_btdm;
  222. extern char _data_start_btdm;
  223. extern char _data_end_btdm;
  224. extern uint32_t _data_start_btdm_rom;
  225. extern uint32_t _data_end_btdm_rom;
  226. extern uint32_t _bt_bss_start;
  227. extern uint32_t _bt_bss_end;
  228. extern uint32_t _btdm_bss_start;
  229. extern uint32_t _btdm_bss_end;
  230. extern uint32_t _bt_data_start;
  231. extern uint32_t _bt_data_end;
  232. extern uint32_t _btdm_data_start;
  233. extern uint32_t _btdm_data_end;
  234. /* Local Function Declare
  235. *********************************************************************
  236. */
  237. #if CONFIG_SPIRAM_USE_MALLOC
  238. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  239. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  240. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  241. static void IRAM_ATTR interrupt_disable(void);
  242. static void IRAM_ATTR interrupt_restore(void);
  243. static void IRAM_ATTR task_yield_from_isr(void);
  244. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  245. static void semphr_delete_wrapper(void *semphr);
  246. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  247. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  248. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  249. static int32_t semphr_give_wrapper(void *semphr);
  250. static void *mutex_create_wrapper(void);
  251. static void mutex_delete_wrapper(void *mutex);
  252. static int32_t mutex_lock_wrapper(void *mutex);
  253. static int32_t mutex_unlock_wrapper(void *mutex);
  254. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  255. static void queue_delete_wrapper(void *queue);
  256. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  257. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  258. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  259. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  260. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  261. static void task_delete_wrapper(void *task_handle);
  262. static bool IRAM_ATTR is_in_isr_wrapper(void);
  263. static void IRAM_ATTR cause_sw_intr(void *arg);
  264. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  265. static void *malloc_internal_wrapper(size_t size);
  266. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  267. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  268. static int IRAM_ATTR rand_wrapper(void);
  269. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  270. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  271. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  272. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  273. static void btdm_sleep_enter_phase2_wrapper(void);
  274. static void btdm_sleep_exit_phase3_wrapper(void);
  275. static bool coex_bt_wakeup_request(void);
  276. static void coex_bt_wakeup_request_end(void);
  277. static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  278. static int coex_bt_release_wrapper(uint32_t event);
  279. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  280. static uint32_t coex_bb_reset_lock_wrapper(void);
  281. static void coex_bb_reset_unlock_wrapper(uint32_t restore);
  282. static int coex_schm_register_btdm_callback_wrapper(void *callback);
  283. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  284. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  285. static uint32_t coex_schm_interval_get_wrapper(void);
  286. static uint8_t coex_schm_curr_period_get_wrapper(void);
  287. static void * coex_schm_curr_phase_get_wrapper(void);
  288. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
  289. static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
  290. /* Local variable definition
  291. ***************************************************************************
  292. */
  293. /* OSI funcs */
  294. static const struct osi_funcs_t osi_funcs_ro = {
  295. ._version = OSI_VERSION,
  296. ._set_isr = xt_set_interrupt_handler,
  297. ._ints_on = xt_ints_on,
  298. ._interrupt_disable = interrupt_disable,
  299. ._interrupt_restore = interrupt_restore,
  300. ._task_yield = vPortYield,
  301. ._task_yield_from_isr = task_yield_from_isr,
  302. ._semphr_create = semphr_create_wrapper,
  303. ._semphr_delete = semphr_delete_wrapper,
  304. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  305. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  306. ._semphr_take = semphr_take_wrapper,
  307. ._semphr_give = semphr_give_wrapper,
  308. ._mutex_create = mutex_create_wrapper,
  309. ._mutex_delete = mutex_delete_wrapper,
  310. ._mutex_lock = mutex_lock_wrapper,
  311. ._mutex_unlock = mutex_unlock_wrapper,
  312. ._queue_create = queue_create_wrapper,
  313. ._queue_delete = queue_delete_wrapper,
  314. ._queue_send = queue_send_wrapper,
  315. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  316. ._queue_recv = queue_recv_wrapper,
  317. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  318. ._task_create = task_create_wrapper,
  319. ._task_delete = task_delete_wrapper,
  320. ._is_in_isr = is_in_isr_wrapper,
  321. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  322. ._malloc = malloc,
  323. ._malloc_internal = malloc_internal_wrapper,
  324. ._free = free,
  325. ._read_efuse_mac = read_mac_wrapper,
  326. ._srand = srand_wrapper,
  327. ._rand = rand_wrapper,
  328. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  329. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  330. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  331. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  332. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  333. ._btdm_sleep_exit_phase1 = NULL,
  334. ._btdm_sleep_exit_phase2 = NULL,
  335. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  336. ._coex_bt_wakeup_request = coex_bt_wakeup_request,
  337. ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
  338. ._coex_bt_request = coex_bt_request_wrapper,
  339. ._coex_bt_release = coex_bt_release_wrapper,
  340. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  341. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  342. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  343. ._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
  344. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  345. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  346. ._coex_schm_interval_get = coex_schm_interval_get_wrapper,
  347. ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
  348. ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
  349. ._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
  350. ._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
  351. ._magic = OSI_MAGIC_VALUE,
  352. };
  353. /* the mode column will be modified by release function to indicate the available region */
  354. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  355. //following is .data
  356. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  357. //following is memory which HW will use
  358. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  359. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  360. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  361. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  362. //following is .bss
  363. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  364. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  365. };
  366. /* Reserve the full memory region used by Bluetooth Controller,
  367. * some may be released later at runtime. */
  368. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  369. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  370. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  371. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  372. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  373. #if CONFIG_SPIRAM_USE_MALLOC
  374. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  375. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  376. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  377. /* Static variable declare */
  378. // timestamp when PHY/RF was switched on
  379. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  380. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  381. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  382. // measured average low power clock period in micro seconds
  383. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  384. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  385. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  386. // used low power clock
  387. static DRAM_ATTR uint8_t btdm_lpclk_sel;
  388. #endif /* #ifdef CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG */
  389. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  390. #ifdef CONFIG_PM_ENABLE
  391. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  392. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  393. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock; // pm_lock to prevent light sleep due to incompatibility currently
  394. static bool s_pm_lock_acquired = true;
  395. static void btdm_slp_tmr_callback(void *arg);
  396. #endif
  397. static inline void btdm_check_and_init_bb(void)
  398. {
  399. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  400. int64_t latest_ts = esp_phy_rf_get_on_ts();
  401. if (latest_ts != s_time_phy_rf_just_enabled ||
  402. s_time_phy_rf_just_enabled == 0) {
  403. btdm_rf_bb_init_phase2();
  404. s_time_phy_rf_just_enabled = latest_ts;
  405. }
  406. }
  407. #if CONFIG_SPIRAM_USE_MALLOC
  408. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  409. {
  410. if (!btdm_queue_table_mux || !queue) {
  411. return NULL;
  412. }
  413. bool ret = false;
  414. btdm_queue_item_t *item;
  415. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  416. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  417. item = &btdm_queue_table[i];
  418. if (item->handle == NULL) {
  419. memcpy(item, queue, sizeof(btdm_queue_item_t));
  420. ret = true;
  421. break;
  422. }
  423. }
  424. xSemaphoreGive(btdm_queue_table_mux);
  425. return ret;
  426. }
  427. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  428. {
  429. if (!btdm_queue_table_mux || !queue) {
  430. return false;
  431. }
  432. bool ret = false;
  433. btdm_queue_item_t *item;
  434. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  435. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  436. item = &btdm_queue_table[i];
  437. if (item->handle == queue->handle) {
  438. memcpy(queue, item, sizeof(btdm_queue_item_t));
  439. memset(item, 0, sizeof(btdm_queue_item_t));
  440. ret = true;
  441. break;
  442. }
  443. }
  444. xSemaphoreGive(btdm_queue_table_mux);
  445. return ret;
  446. }
  447. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  448. static void IRAM_ATTR interrupt_disable(void)
  449. {
  450. if (xPortInIsrContext()) {
  451. portENTER_CRITICAL_ISR(&global_int_mux);
  452. } else {
  453. portENTER_CRITICAL(&global_int_mux);
  454. }
  455. }
  456. static void IRAM_ATTR interrupt_restore(void)
  457. {
  458. if (xPortInIsrContext()) {
  459. portEXIT_CRITICAL_ISR(&global_int_mux);
  460. } else {
  461. portEXIT_CRITICAL(&global_int_mux);
  462. }
  463. }
  464. static void IRAM_ATTR task_yield_from_isr(void)
  465. {
  466. portYIELD_FROM_ISR();
  467. }
  468. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  469. {
  470. #if !CONFIG_SPIRAM_USE_MALLOC
  471. return (void *)xSemaphoreCreateCounting(max, init);
  472. #else
  473. StaticQueue_t *queue_buffer = NULL;
  474. QueueHandle_t handle = NULL;
  475. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  476. if (!queue_buffer) {
  477. goto error;
  478. }
  479. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  480. if (!handle) {
  481. goto error;
  482. }
  483. btdm_queue_item_t item = {
  484. .handle = handle,
  485. .storage = NULL,
  486. .buffer = queue_buffer,
  487. };
  488. if (!btdm_queue_generic_register(&item)) {
  489. goto error;
  490. }
  491. return handle;
  492. error:
  493. if (handle) {
  494. vSemaphoreDelete(handle);
  495. }
  496. if (queue_buffer) {
  497. free(queue_buffer);
  498. }
  499. return NULL;
  500. #endif
  501. }
  502. static void semphr_delete_wrapper(void *semphr)
  503. {
  504. #if !CONFIG_SPIRAM_USE_MALLOC
  505. vSemaphoreDelete(semphr);
  506. #else
  507. btdm_queue_item_t item = {
  508. .handle = semphr,
  509. .storage = NULL,
  510. .buffer = NULL,
  511. };
  512. if (btdm_queue_generic_deregister(&item)) {
  513. vSemaphoreDelete(item.handle);
  514. free(item.buffer);
  515. }
  516. return;
  517. #endif
  518. }
  519. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  520. {
  521. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  522. }
  523. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  524. {
  525. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  526. }
  527. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  528. {
  529. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  530. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  531. } else {
  532. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  533. }
  534. }
  535. static int32_t semphr_give_wrapper(void *semphr)
  536. {
  537. return (int32_t)xSemaphoreGive(semphr);
  538. }
  539. static void *mutex_create_wrapper(void)
  540. {
  541. #if CONFIG_SPIRAM_USE_MALLOC
  542. StaticQueue_t *queue_buffer = NULL;
  543. QueueHandle_t handle = NULL;
  544. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  545. if (!queue_buffer) {
  546. goto error;
  547. }
  548. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  549. if (!handle) {
  550. goto error;
  551. }
  552. btdm_queue_item_t item = {
  553. .handle = handle,
  554. .storage = NULL,
  555. .buffer = queue_buffer,
  556. };
  557. if (!btdm_queue_generic_register(&item)) {
  558. goto error;
  559. }
  560. return handle;
  561. error:
  562. if (handle) {
  563. vSemaphoreDelete(handle);
  564. }
  565. if (queue_buffer) {
  566. free(queue_buffer);
  567. }
  568. return NULL;
  569. #else
  570. return (void *)xSemaphoreCreateMutex();
  571. #endif
  572. }
  573. static void mutex_delete_wrapper(void *mutex)
  574. {
  575. #if !CONFIG_SPIRAM_USE_MALLOC
  576. vSemaphoreDelete(mutex);
  577. #else
  578. btdm_queue_item_t item = {
  579. .handle = mutex,
  580. .storage = NULL,
  581. .buffer = NULL,
  582. };
  583. if (btdm_queue_generic_deregister(&item)) {
  584. vSemaphoreDelete(item.handle);
  585. free(item.buffer);
  586. }
  587. return;
  588. #endif
  589. }
  590. static int32_t mutex_lock_wrapper(void *mutex)
  591. {
  592. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  593. }
  594. static int32_t mutex_unlock_wrapper(void *mutex)
  595. {
  596. return (int32_t)xSemaphoreGive(mutex);
  597. }
  598. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  599. {
  600. #if CONFIG_SPIRAM_USE_MALLOC
  601. StaticQueue_t *queue_buffer = NULL;
  602. uint8_t *queue_storage = NULL;
  603. QueueHandle_t handle = NULL;
  604. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  605. if (!queue_buffer) {
  606. goto error;
  607. }
  608. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  609. if (!queue_storage ) {
  610. goto error;
  611. }
  612. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  613. if (!handle) {
  614. goto error;
  615. }
  616. btdm_queue_item_t item = {
  617. .handle = handle,
  618. .storage = queue_storage,
  619. .buffer = queue_buffer,
  620. };
  621. if (!btdm_queue_generic_register(&item)) {
  622. goto error;
  623. }
  624. return handle;
  625. error:
  626. if (handle) {
  627. vQueueDelete(handle);
  628. }
  629. if (queue_storage) {
  630. free(queue_storage);
  631. }
  632. if (queue_buffer) {
  633. free(queue_buffer);
  634. }
  635. return NULL;
  636. #else
  637. return (void *)xQueueCreate(queue_len, item_size);
  638. #endif
  639. }
  640. static void queue_delete_wrapper(void *queue)
  641. {
  642. #if !CONFIG_SPIRAM_USE_MALLOC
  643. vQueueDelete(queue);
  644. #else
  645. btdm_queue_item_t item = {
  646. .handle = queue,
  647. .storage = NULL,
  648. .buffer = NULL,
  649. };
  650. if (btdm_queue_generic_deregister(&item)) {
  651. vQueueDelete(item.handle);
  652. free(item.storage);
  653. free(item.buffer);
  654. }
  655. return;
  656. #endif
  657. }
  658. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  659. {
  660. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  661. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  662. } else {
  663. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  664. }
  665. }
  666. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  667. {
  668. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  669. }
  670. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  671. {
  672. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  673. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  674. } else {
  675. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  676. }
  677. }
  678. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  679. {
  680. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  681. }
  682. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  683. {
  684. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  685. }
  686. static void task_delete_wrapper(void *task_handle)
  687. {
  688. vTaskDelete(task_handle);
  689. }
  690. static bool IRAM_ATTR is_in_isr_wrapper(void)
  691. {
  692. return !xPortCanYield();
  693. }
  694. static void IRAM_ATTR cause_sw_intr(void *arg)
  695. {
  696. /* just convert void * to int, because the width is the same */
  697. uint32_t intr_no = (uint32_t)arg;
  698. XTHAL_SET_INTSET((1<<intr_no));
  699. }
  700. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  701. {
  702. esp_err_t err = ESP_OK;
  703. #if CONFIG_FREERTOS_UNICORE
  704. cause_sw_intr((void *)intr_no);
  705. #else /* CONFIG_FREERTOS_UNICORE */
  706. if (xPortGetCoreID() == core_id) {
  707. cause_sw_intr((void *)intr_no);
  708. } else {
  709. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  710. }
  711. #endif /* !CONFIG_FREERTOS_UNICORE */
  712. return err;
  713. }
  714. static void *malloc_internal_wrapper(size_t size)
  715. {
  716. return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
  717. }
  718. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  719. {
  720. return esp_read_mac(mac, ESP_MAC_BT);
  721. }
  722. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  723. {
  724. /* empty function */
  725. }
  726. static int IRAM_ATTR rand_wrapper(void)
  727. {
  728. return (int)esp_random();
  729. }
  730. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  731. {
  732. // The number of lp cycles should not lead to overflow. Thrs: 100s
  733. // clock measurement is conducted
  734. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  735. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  736. return (uint32_t)us;
  737. }
  738. /*
  739. * @brief Converts a duration in slots into a number of low power clock cycles.
  740. */
  741. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  742. {
  743. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  744. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  745. // clock measurement is conducted
  746. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  747. return (uint32_t)cycles;
  748. }
  749. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  750. {
  751. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  752. return false;
  753. }
  754. /* wake up in advance considering the delay in enabling PHY/RF */
  755. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  756. return true;
  757. }
  758. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  759. {
  760. #ifdef CONFIG_PM_ENABLE
  761. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  762. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  763. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  764. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  765. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  766. // and set the timer in advance
  767. uint32_t uncertainty = (us_to_sleep >> 11);
  768. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  769. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  770. }
  771. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  772. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  773. }
  774. #endif
  775. }
  776. static void btdm_sleep_enter_phase2_wrapper(void)
  777. {
  778. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  779. esp_modem_sleep_enter(MODEM_BLE_MODULE);
  780. esp_modem_sleep_enter(MODEM_CLASSIC_BT_MODULE);
  781. #ifdef CONFIG_PM_ENABLE
  782. if (s_pm_lock_acquired) {
  783. esp_pm_lock_release(s_pm_lock);
  784. s_pm_lock_acquired = false;
  785. }
  786. #endif
  787. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  788. esp_modem_sleep_enter(MODEM_BLE_MODULE);
  789. // pause bluetooth baseband
  790. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  791. }
  792. }
  793. static void btdm_sleep_exit_phase3_wrapper(void)
  794. {
  795. #ifdef CONFIG_PM_ENABLE
  796. if (!s_pm_lock_acquired) {
  797. s_pm_lock_acquired = true;
  798. esp_pm_lock_acquire(s_pm_lock);
  799. }
  800. #endif
  801. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  802. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  803. esp_modem_sleep_exit(MODEM_CLASSIC_BT_MODULE);
  804. btdm_check_and_init_bb();
  805. #ifdef CONFIG_PM_ENABLE
  806. esp_timer_stop(s_btdm_slp_tmr);
  807. #endif
  808. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  809. // resume bluetooth baseband
  810. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  811. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  812. }
  813. }
  814. #ifdef CONFIG_PM_ENABLE
  815. static void btdm_slp_tmr_customer_callback(void * arg)
  816. {
  817. (void)(arg);
  818. if (!s_pm_lock_acquired) {
  819. s_pm_lock_acquired = true;
  820. esp_pm_lock_acquire(s_pm_lock);
  821. }
  822. }
  823. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  824. {
  825. (void)(arg);
  826. btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
  827. }
  828. #endif
  829. #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
  830. #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
  831. #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
  832. #define BTDM_ASYNC_WAKEUP_REQMAX 3
  833. static void btdm_wakeup_request_callback(void * arg)
  834. {
  835. (void)(arg);
  836. #if CONFIG_PM_ENABLE
  837. if (!s_pm_lock_acquired) {
  838. s_pm_lock_acquired = true;
  839. esp_pm_lock_acquire(s_pm_lock);
  840. }
  841. esp_timer_stop(s_btdm_slp_tmr);
  842. #endif
  843. btdm_wakeup_request();
  844. semphr_give_wrapper(s_wakeup_req_sem);
  845. }
  846. static bool async_wakeup_request(int event)
  847. {
  848. bool do_wakeup_request = false;
  849. switch (event) {
  850. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  851. btdm_in_wakeup_requesting_set(true);
  852. // NO break
  853. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  854. if (!btdm_power_state_active()) {
  855. do_wakeup_request = true;
  856. btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
  857. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  858. }
  859. break;
  860. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  861. if (!btdm_power_state_active()) {
  862. do_wakeup_request = true;
  863. #if CONFIG_PM_ENABLE
  864. if (!s_pm_lock_acquired) {
  865. s_pm_lock_acquired = true;
  866. esp_pm_lock_acquire(s_pm_lock);
  867. }
  868. esp_timer_stop(s_btdm_slp_tmr);
  869. #endif
  870. btdm_wakeup_request();
  871. }
  872. break;
  873. default:
  874. return false;
  875. }
  876. return do_wakeup_request;
  877. }
  878. static void async_wakeup_request_end(int event)
  879. {
  880. bool request_lock = false;
  881. switch (event) {
  882. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  883. request_lock = true;
  884. break;
  885. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  886. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  887. request_lock = false;
  888. break;
  889. default:
  890. return;
  891. }
  892. if (request_lock) {
  893. btdm_in_wakeup_requesting_set(false);
  894. }
  895. return;
  896. }
  897. static bool coex_bt_wakeup_request(void)
  898. {
  899. return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
  900. }
  901. static void coex_bt_wakeup_request_end(void)
  902. {
  903. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
  904. return;
  905. }
  906. static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
  907. {
  908. #if CONFIG_SW_COEXIST_ENABLE
  909. return coex_bt_request(event, latency, duration);
  910. #else
  911. return 0;
  912. #endif
  913. }
  914. static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
  915. {
  916. #if CONFIG_SW_COEXIST_ENABLE
  917. return coex_bt_release(event);
  918. #else
  919. return 0;
  920. #endif
  921. }
  922. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
  923. {
  924. #if CONFIG_SW_COEXIST_ENABLE
  925. return coex_register_bt_cb(cb);
  926. #else
  927. return 0;
  928. #endif
  929. }
  930. static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
  931. {
  932. #if CONFIG_SW_COEXIST_ENABLE
  933. return coex_bb_reset_lock();
  934. #else
  935. return 0;
  936. #endif
  937. }
  938. static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
  939. {
  940. #if CONFIG_SW_COEXIST_ENABLE
  941. coex_bb_reset_unlock(restore);
  942. #endif
  943. }
  944. static int coex_schm_register_btdm_callback_wrapper(void *callback)
  945. {
  946. #if CONFIG_SW_COEXIST_ENABLE
  947. return coex_schm_register_btdm_callback(callback);
  948. #else
  949. return 0;
  950. #endif
  951. }
  952. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  953. {
  954. #if CONFIG_SW_COEXIST_ENABLE
  955. coex_schm_status_bit_clear(type, status);
  956. #endif
  957. }
  958. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  959. {
  960. #if CONFIG_SW_COEXIST_ENABLE
  961. coex_schm_status_bit_set(type, status);
  962. #endif
  963. }
  964. static uint32_t coex_schm_interval_get_wrapper(void)
  965. {
  966. #if CONFIG_SW_COEXIST_ENABLE
  967. return coex_schm_interval_get();
  968. #else
  969. return 0;
  970. #endif
  971. }
  972. static uint8_t coex_schm_curr_period_get_wrapper(void)
  973. {
  974. #if CONFIG_SW_COEXIST_ENABLE
  975. return coex_schm_curr_period_get();
  976. #else
  977. return 1;
  978. #endif
  979. }
  980. static void * coex_schm_curr_phase_get_wrapper(void)
  981. {
  982. #if CONFIG_SW_COEXIST_ENABLE
  983. return coex_schm_curr_phase_get();
  984. #else
  985. return NULL;
  986. #endif
  987. }
  988. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
  989. {
  990. #if CONFIG_SW_COEXIST_ENABLE
  991. return coex_wifi_channel_get(primary, secondary);
  992. #else
  993. return -1;
  994. #endif
  995. }
  996. static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
  997. {
  998. #if CONFIG_SW_COEXIST_ENABLE
  999. return coex_register_wifi_channel_change_callback(cb);
  1000. #else
  1001. return -1;
  1002. #endif
  1003. }
  1004. bool esp_vhci_host_check_send_available(void)
  1005. {
  1006. return API_vhci_host_check_send_available();
  1007. }
  1008. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  1009. {
  1010. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1011. API_vhci_host_send_packet(data, len);
  1012. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1013. }
  1014. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  1015. {
  1016. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  1017. }
  1018. static uint32_t btdm_config_mask_load(void)
  1019. {
  1020. uint32_t mask = 0x0;
  1021. #if CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4
  1022. mask |= BTDM_CFG_HCI_UART;
  1023. #endif
  1024. #if CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE == 1
  1025. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  1026. #endif
  1027. #if CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED
  1028. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  1029. #endif /* CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED */
  1030. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  1031. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  1032. return mask;
  1033. }
  1034. static void btdm_controller_mem_init(void)
  1035. {
  1036. /* initialise .data section */
  1037. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  1038. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  1039. //initial em, .bss section
  1040. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1041. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  1042. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  1043. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  1044. }
  1045. }
  1046. }
  1047. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  1048. {
  1049. int ret = heap_caps_add_region(start, end);
  1050. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  1051. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  1052. * we replace it by ESP_OK
  1053. */
  1054. if (ret == ESP_ERR_INVALID_SIZE) {
  1055. return ESP_OK;
  1056. }
  1057. return ret;
  1058. }
  1059. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  1060. {
  1061. bool update = true;
  1062. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  1063. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1064. return ESP_ERR_INVALID_STATE;
  1065. }
  1066. //already released
  1067. if (!(mode & btdm_dram_available_region[0].mode)) {
  1068. return ESP_ERR_INVALID_STATE;
  1069. }
  1070. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1071. //skip the share mode, idle mode and other mode
  1072. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  1073. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  1074. //clear the bit of the mode which will be released
  1075. btdm_dram_available_region[i].mode &= ~mode;
  1076. continue;
  1077. } else {
  1078. //clear the bit of the mode which will be released
  1079. btdm_dram_available_region[i].mode &= ~mode;
  1080. }
  1081. if (update) {
  1082. mem_start = btdm_dram_available_region[i].start;
  1083. mem_end = btdm_dram_available_region[i].end;
  1084. update = false;
  1085. }
  1086. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  1087. mem_end = btdm_dram_available_region[i].end;
  1088. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  1089. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  1090. && mem_end == btdm_dram_available_region[i+1].start) {
  1091. continue;
  1092. } else {
  1093. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1094. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1095. update = true;
  1096. }
  1097. } else {
  1098. mem_end = btdm_dram_available_region[i].end;
  1099. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1100. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1101. update = true;
  1102. }
  1103. }
  1104. if (mode == ESP_BT_MODE_BTDM) {
  1105. mem_start = (intptr_t)&_btdm_bss_start;
  1106. mem_end = (intptr_t)&_btdm_bss_end;
  1107. if (mem_start != mem_end) {
  1108. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1109. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1110. }
  1111. mem_start = (intptr_t)&_btdm_data_start;
  1112. mem_end = (intptr_t)&_btdm_data_end;
  1113. if (mem_start != mem_end) {
  1114. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1115. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1116. }
  1117. }
  1118. return ESP_OK;
  1119. }
  1120. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  1121. {
  1122. int ret;
  1123. intptr_t mem_start, mem_end;
  1124. ret = esp_bt_controller_mem_release(mode);
  1125. if (ret != ESP_OK) {
  1126. return ret;
  1127. }
  1128. if (mode == ESP_BT_MODE_BTDM) {
  1129. mem_start = (intptr_t)&_bt_bss_start;
  1130. mem_end = (intptr_t)&_bt_bss_end;
  1131. if (mem_start != mem_end) {
  1132. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1133. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1134. }
  1135. mem_start = (intptr_t)&_bt_data_start;
  1136. mem_end = (intptr_t)&_bt_data_end;
  1137. if (mem_start != mem_end) {
  1138. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1139. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1140. }
  1141. }
  1142. return ESP_OK;
  1143. }
  1144. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  1145. {
  1146. esp_err_t err;
  1147. uint32_t btdm_cfg_mask = 0;
  1148. //if all the bt available memory was already released, cannot initialize bluetooth controller
  1149. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  1150. return ESP_ERR_INVALID_STATE;
  1151. }
  1152. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1153. if (osi_funcs_p == NULL) {
  1154. return ESP_ERR_NO_MEM;
  1155. }
  1156. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1157. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1158. return ESP_ERR_INVALID_ARG;
  1159. }
  1160. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1161. return ESP_ERR_INVALID_STATE;
  1162. }
  1163. if (cfg == NULL) {
  1164. return ESP_ERR_INVALID_ARG;
  1165. }
  1166. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  1167. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  1168. return ESP_ERR_INVALID_ARG;
  1169. }
  1170. //overwrite some parameters
  1171. cfg->bt_max_sync_conn = CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF;
  1172. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  1173. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  1174. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  1175. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  1176. return ESP_ERR_INVALID_ARG;
  1177. }
  1178. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1179. #if CONFIG_SPIRAM_USE_MALLOC
  1180. btdm_queue_table_mux = xSemaphoreCreateMutex();
  1181. if (btdm_queue_table_mux == NULL) {
  1182. return ESP_ERR_NO_MEM;
  1183. }
  1184. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1185. #endif
  1186. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1187. if (s_wakeup_req_sem == NULL) {
  1188. err = ESP_ERR_NO_MEM;
  1189. goto error;
  1190. }
  1191. #ifdef CONFIG_PM_ENABLE
  1192. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1193. goto error;
  1194. }
  1195. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1196. goto error;
  1197. }
  1198. esp_timer_create_args_t create_args = {
  1199. .callback = btdm_slp_tmr_callback,
  1200. .arg = NULL,
  1201. .name = "btSlp"
  1202. };
  1203. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1204. goto error;
  1205. }
  1206. s_pm_lock_acquired = true;
  1207. #endif
  1208. btdm_controller_mem_init();
  1209. periph_module_enable(PERIPH_BT_MODULE);
  1210. // set default sleep clock cycle and its fractional bits
  1211. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1212. btdm_lpcycle_us = 2 << btdm_lpcycle_us_frac;
  1213. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  1214. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1215. #if CONFIG_BTDM_LPCLK_SEL_EXT_32K_XTAL
  1216. // check whether or not EXT_CRYS is working
  1217. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  1218. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
  1219. } else {
  1220. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n");
  1221. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1222. }
  1223. #else
  1224. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1225. #endif
  1226. bool select_src_ret, set_div_ret;
  1227. if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1228. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1229. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1230. assert(select_src_ret && set_div_ret);
  1231. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1232. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1233. } else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
  1234. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1235. set_div_ret = btdm_lpclk_set_div(0);
  1236. assert(select_src_ret && set_div_ret);
  1237. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1238. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1239. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1240. assert(btdm_lpcycle_us != 0);
  1241. }
  1242. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1243. #elif CONFIG_BTDM_MODEM_SLEEP_MODE_EVED
  1244. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1245. #else
  1246. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1247. #endif
  1248. btdm_cfg_mask = btdm_config_mask_load();
  1249. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1250. err = ESP_ERR_NO_MEM;
  1251. goto error;
  1252. }
  1253. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1254. return ESP_OK;
  1255. error:
  1256. #ifdef CONFIG_PM_ENABLE
  1257. if (s_light_sleep_pm_lock != NULL) {
  1258. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1259. s_light_sleep_pm_lock = NULL;
  1260. }
  1261. if (s_pm_lock != NULL) {
  1262. esp_pm_lock_delete(s_pm_lock);
  1263. s_pm_lock = NULL;
  1264. }
  1265. if (s_btdm_slp_tmr != NULL) {
  1266. esp_timer_delete(s_btdm_slp_tmr);
  1267. s_btdm_slp_tmr = NULL;
  1268. }
  1269. #endif
  1270. if (s_wakeup_req_sem) {
  1271. semphr_delete_wrapper(s_wakeup_req_sem);
  1272. s_wakeup_req_sem = NULL;
  1273. }
  1274. return err;
  1275. }
  1276. esp_err_t esp_bt_controller_deinit(void)
  1277. {
  1278. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1279. return ESP_ERR_INVALID_STATE;
  1280. }
  1281. btdm_controller_deinit();
  1282. periph_module_disable(PERIPH_BT_MODULE);
  1283. #ifdef CONFIG_PM_ENABLE
  1284. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1285. s_light_sleep_pm_lock = NULL;
  1286. esp_timer_stop(s_btdm_slp_tmr);
  1287. esp_timer_delete(s_btdm_slp_tmr);
  1288. s_btdm_slp_tmr = NULL;
  1289. s_pm_lock_acquired = false;
  1290. #endif
  1291. semphr_delete_wrapper(s_wakeup_req_sem);
  1292. s_wakeup_req_sem = NULL;
  1293. #if CONFIG_SPIRAM_USE_MALLOC
  1294. vSemaphoreDelete(btdm_queue_table_mux);
  1295. btdm_queue_table_mux = NULL;
  1296. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1297. #endif
  1298. free(osi_funcs_p);
  1299. osi_funcs_p = NULL;
  1300. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1301. btdm_lpcycle_us = 0;
  1302. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1303. return ESP_OK;
  1304. }
  1305. static void bt_shutdown(void)
  1306. {
  1307. esp_err_t ret = ESP_OK;
  1308. ESP_LOGD(BTDM_LOG_TAG, "stop Bluetooth");
  1309. ret = esp_bt_controller_disable();
  1310. if (ESP_OK != ret) {
  1311. ESP_LOGW(BTDM_LOG_TAG, "controller disable ret=%d", ret);
  1312. }
  1313. ret = esp_bt_controller_deinit();
  1314. return;
  1315. }
  1316. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1317. {
  1318. int ret;
  1319. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1320. return ESP_ERR_INVALID_STATE;
  1321. }
  1322. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1323. if (mode != btdm_controller_get_mode()) {
  1324. return ESP_ERR_INVALID_ARG;
  1325. }
  1326. #ifdef CONFIG_PM_ENABLE
  1327. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1328. esp_pm_lock_acquire(s_pm_lock);
  1329. #endif
  1330. esp_phy_load_cal_and_init(PHY_BT_MODULE);
  1331. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE) {
  1332. //Just register to sleep module, make the modem sleep modules check BT sleep status when sleep enter.
  1333. //Thus, it will prevent WIFI from disabling RF when BT is not in sleep but is using RF.
  1334. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1335. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1336. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  1337. esp_modem_sleep_exit(MODEM_CLASSIC_BT_MODULE);
  1338. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1339. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1340. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1341. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1342. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1343. }
  1344. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1345. btdm_controller_enable_sleep(true);
  1346. }
  1347. // inititalize bluetooth baseband
  1348. btdm_check_and_init_bb();
  1349. ret = btdm_controller_enable(mode);
  1350. if (ret) {
  1351. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE
  1352. || btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1353. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1354. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1355. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1356. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1357. }
  1358. esp_phy_rf_deinit(PHY_BT_MODULE);
  1359. #ifdef CONFIG_PM_ENABLE
  1360. esp_pm_lock_release(s_light_sleep_pm_lock);
  1361. esp_pm_lock_release(s_pm_lock);
  1362. #endif
  1363. return ESP_ERR_INVALID_STATE;
  1364. }
  1365. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1366. ret = esp_register_shutdown_handler(bt_shutdown);
  1367. if (ret != ESP_OK) {
  1368. ESP_LOGW(BTDM_LOG_TAG, "Register shutdown handler failed, ret = 0x%x", ret);
  1369. }
  1370. return ESP_OK;
  1371. }
  1372. esp_err_t esp_bt_controller_disable(void)
  1373. {
  1374. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1375. return ESP_ERR_INVALID_STATE;
  1376. }
  1377. // disable modem sleep and wake up from sleep mode
  1378. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1379. btdm_controller_enable_sleep(false);
  1380. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
  1381. while (!btdm_power_state_active()) {
  1382. ets_delay_us(1000);
  1383. }
  1384. }
  1385. btdm_controller_disable();
  1386. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE
  1387. || btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1388. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1389. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1390. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1391. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1392. }
  1393. esp_phy_rf_deinit(PHY_BT_MODULE);
  1394. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1395. #ifdef CONFIG_PM_ENABLE
  1396. esp_pm_lock_release(s_light_sleep_pm_lock);
  1397. esp_pm_lock_release(s_pm_lock);
  1398. #endif
  1399. return ESP_OK;
  1400. }
  1401. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1402. {
  1403. return btdm_controller_status;
  1404. }
  1405. /* extra functions */
  1406. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1407. {
  1408. if (ble_txpwr_set(power_type, power_level) != 0) {
  1409. return ESP_ERR_INVALID_ARG;
  1410. }
  1411. return ESP_OK;
  1412. }
  1413. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1414. {
  1415. return (esp_power_level_t)ble_txpwr_get(power_type);
  1416. }
  1417. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1418. {
  1419. esp_err_t err;
  1420. int ret;
  1421. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1422. if (ret == 0) {
  1423. err = ESP_OK;
  1424. } else if (ret == -1) {
  1425. err = ESP_ERR_INVALID_ARG;
  1426. } else {
  1427. err = ESP_ERR_INVALID_STATE;
  1428. }
  1429. return err;
  1430. }
  1431. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1432. {
  1433. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1434. return ESP_ERR_INVALID_ARG;
  1435. }
  1436. return ESP_OK;
  1437. }
  1438. esp_err_t esp_bt_sleep_enable (void)
  1439. {
  1440. esp_err_t status;
  1441. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1442. return ESP_ERR_INVALID_STATE;
  1443. }
  1444. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1445. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1446. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1447. btdm_controller_enable_sleep (true);
  1448. status = ESP_OK;
  1449. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1450. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1451. btdm_controller_enable_sleep (true);
  1452. status = ESP_OK;
  1453. } else {
  1454. status = ESP_ERR_NOT_SUPPORTED;
  1455. }
  1456. return status;
  1457. }
  1458. esp_err_t esp_bt_sleep_disable (void)
  1459. {
  1460. esp_err_t status;
  1461. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1462. return ESP_ERR_INVALID_STATE;
  1463. }
  1464. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1465. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1466. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1467. btdm_controller_enable_sleep (false);
  1468. status = ESP_OK;
  1469. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1470. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1471. btdm_controller_enable_sleep (false);
  1472. status = ESP_OK;
  1473. } else {
  1474. status = ESP_ERR_NOT_SUPPORTED;
  1475. }
  1476. return status;
  1477. }
  1478. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1479. {
  1480. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1481. return ESP_ERR_INVALID_STATE;
  1482. }
  1483. bredr_sco_datapath_set(data_path);
  1484. return ESP_OK;
  1485. }
  1486. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1487. {
  1488. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1489. return ESP_ERR_INVALID_STATE;
  1490. }
  1491. btdm_controller_scan_duplicate_list_clear();
  1492. return ESP_OK;
  1493. }
  1494. #endif /* CONFIG_BT_ENABLED */