bt.c 55 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr_alloc.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp32/clk.h"
  41. #include "esp_coexist_internal.h"
  42. #if !CONFIG_FREERTOS_UNICORE
  43. #include "esp_ipc.h"
  44. #endif
  45. #include "esp_rom_sys.h"
  46. #if CONFIG_BT_ENABLED
  47. /* Macro definition
  48. ************************************************************************
  49. */
  50. #define BTDM_LOG_TAG "BTDM_INIT"
  51. #define BTDM_INIT_PERIOD (5000) /* ms */
  52. /* Bluetooth system and controller config */
  53. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  54. #define BTDM_CFG_HCI_UART (1<<1)
  55. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  56. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  57. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  58. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  59. /* Sleep mode */
  60. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  61. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  62. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  63. /* Low Power Clock Selection */
  64. #define BTDM_LPCLK_SEL_XTAL (0)
  65. #define BTDM_LPCLK_SEL_XTAL32K (1)
  66. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  67. #define BTDM_LPCLK_SEL_8M (3)
  68. /* Sleep and wakeup interval control */
  69. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  70. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  71. #define BT_DEBUG(...)
  72. #define BT_API_CALL_CHECK(info, api_call, ret) \
  73. do{\
  74. esp_err_t __err = (api_call);\
  75. if ((ret) != __err) {\
  76. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  77. return __err;\
  78. }\
  79. } while(0)
  80. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  81. #define OSI_VERSION 0x00010003
  82. #define OSI_MAGIC_VALUE 0xFADEBEAD
  83. /* SPIRAM Configuration */
  84. #if CONFIG_SPIRAM_USE_MALLOC
  85. #define BTDM_MAX_QUEUE_NUM (5)
  86. #endif
  87. /* Types definition
  88. ************************************************************************
  89. */
  90. /* VHCI function interface */
  91. typedef struct vhci_host_callback {
  92. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  93. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  94. } vhci_host_callback_t;
  95. /* Dram region */
  96. typedef struct {
  97. esp_bt_mode_t mode;
  98. intptr_t start;
  99. intptr_t end;
  100. } btdm_dram_available_region_t;
  101. /* PSRAM configuration */
  102. #if CONFIG_SPIRAM_USE_MALLOC
  103. typedef struct {
  104. QueueHandle_t handle;
  105. void *storage;
  106. void *buffer;
  107. } btdm_queue_item_t;
  108. #endif
  109. /* OSI function */
  110. struct osi_funcs_t {
  111. uint32_t _version;
  112. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  113. void (*_ints_on)(unsigned int mask);
  114. void (*_interrupt_disable)(void);
  115. void (*_interrupt_restore)(void);
  116. void (*_task_yield)(void);
  117. void (*_task_yield_from_isr)(void);
  118. void *(*_semphr_create)(uint32_t max, uint32_t init);
  119. void (*_semphr_delete)(void *semphr);
  120. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  121. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  122. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  123. int32_t (*_semphr_give)(void *semphr);
  124. void *(*_mutex_create)(void);
  125. void (*_mutex_delete)(void *mutex);
  126. int32_t (*_mutex_lock)(void *mutex);
  127. int32_t (*_mutex_unlock)(void *mutex);
  128. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  129. void (* _queue_delete)(void *queue);
  130. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  131. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  132. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  133. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  134. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  135. void (* _task_delete)(void *task_handle);
  136. bool (* _is_in_isr)(void);
  137. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  138. void *(* _malloc)(uint32_t size);
  139. void *(* _malloc_internal)(uint32_t size);
  140. void (* _free)(void *p);
  141. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  142. void (* _srand)(unsigned int seed);
  143. int (* _rand)(void);
  144. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  145. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  146. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  147. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  148. void (* _btdm_sleep_enter_phase2)(void);
  149. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  150. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  151. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  152. bool (* _coex_bt_wakeup_request)(void);
  153. void (* _coex_bt_wakeup_request_end)(void);
  154. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  155. int (* _coex_bt_release)(uint32_t event);
  156. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  157. uint32_t (* _coex_bb_reset_lock)(void);
  158. void (* _coex_bb_reset_unlock)(uint32_t restore);
  159. int (* _coex_schm_register_btdm_callback)(void *callback);
  160. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  161. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  162. uint32_t (* _coex_schm_interval_get)(void);
  163. uint8_t (* _coex_schm_curr_period_get)(void);
  164. void *(* _coex_schm_curr_phase_get)(void);
  165. int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
  166. int (* _coex_register_wifi_channel_change_callback)(void *cb);
  167. xt_handler (*_set_isr_l3)(int n, xt_handler f, void *arg);
  168. void (*_interrupt_l3_disable)(void);
  169. void (*_interrupt_l3_restore)(void);
  170. void *(* _customer_queue_create)(uint32_t queue_len, uint32_t item_size);
  171. uint32_t _magic;
  172. };
  173. typedef void (*workitem_handler_t)(void* arg);
  174. /* External functions or values
  175. ************************************************************************
  176. */
  177. /* not for user call, so don't put to include file */
  178. /* OSI */
  179. extern int btdm_osi_funcs_register(void *osi_funcs);
  180. /* Initialise and De-initialise */
  181. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  182. extern void btdm_controller_deinit(void);
  183. extern int btdm_controller_enable(esp_bt_mode_t mode);
  184. extern void btdm_controller_disable(void);
  185. extern uint8_t btdm_controller_get_mode(void);
  186. extern const char *btdm_controller_get_compile_version(void);
  187. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  188. extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
  189. /* Sleep */
  190. extern void btdm_controller_enable_sleep(bool enable);
  191. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  192. extern uint8_t btdm_controller_get_sleep_mode(void);
  193. extern bool btdm_power_state_active(void);
  194. extern void btdm_wakeup_request(void);
  195. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  196. /* Low Power Clock */
  197. extern bool btdm_lpclk_select_src(uint32_t sel);
  198. extern bool btdm_lpclk_set_div(uint32_t div);
  199. /* VHCI */
  200. extern bool API_vhci_host_check_send_available(void);
  201. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  202. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  203. /* TX power */
  204. extern int ble_txpwr_set(int power_type, int power_level);
  205. extern int ble_txpwr_get(int power_type);
  206. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  207. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  208. extern void bredr_sco_datapath_set(uint8_t data_path);
  209. extern void btdm_controller_scan_duplicate_list_clear(void);
  210. /* Coexistence */
  211. extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
  212. extern int coex_bt_release(uint32_t event);
  213. extern int coex_register_bt_cb(coex_func_cb_t cb);
  214. extern uint32_t coex_bb_reset_lock(void);
  215. extern void coex_bb_reset_unlock(uint32_t restore);
  216. extern int coex_schm_register_btdm_callback(void *callback);
  217. extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
  218. extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
  219. extern uint32_t coex_schm_interval_get(void);
  220. extern uint8_t coex_schm_curr_period_get(void);
  221. extern void * coex_schm_curr_phase_get(void);
  222. extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
  223. extern int coex_register_wifi_channel_change_callback(void *cb);
  224. /* Shutdown */
  225. extern void esp_bt_controller_shutdown(void);
  226. extern char _bss_start_btdm;
  227. extern char _bss_end_btdm;
  228. extern char _data_start_btdm;
  229. extern char _data_end_btdm;
  230. extern uint32_t _data_start_btdm_rom;
  231. extern uint32_t _data_end_btdm_rom;
  232. extern uint32_t _bt_bss_start;
  233. extern uint32_t _bt_bss_end;
  234. extern uint32_t _nimble_bss_start;
  235. extern uint32_t _nimble_bss_end;
  236. extern uint32_t _btdm_bss_start;
  237. extern uint32_t _btdm_bss_end;
  238. extern uint32_t _bt_data_start;
  239. extern uint32_t _bt_data_end;
  240. extern uint32_t _nimble_data_start;
  241. extern uint32_t _nimble_data_end;
  242. extern uint32_t _btdm_data_start;
  243. extern uint32_t _btdm_data_end;
  244. /* Local Function Declare
  245. *********************************************************************
  246. */
  247. #if CONFIG_SPIRAM_USE_MALLOC
  248. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  249. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  250. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  251. static void IRAM_ATTR interrupt_disable(void);
  252. static void IRAM_ATTR interrupt_restore(void);
  253. static void IRAM_ATTR task_yield(void);
  254. static void IRAM_ATTR task_yield_from_isr(void);
  255. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  256. static void semphr_delete_wrapper(void *semphr);
  257. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  258. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  259. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  260. static int32_t semphr_give_wrapper(void *semphr);
  261. static void *mutex_create_wrapper(void);
  262. static void mutex_delete_wrapper(void *mutex);
  263. static int32_t mutex_lock_wrapper(void *mutex);
  264. static int32_t mutex_unlock_wrapper(void *mutex);
  265. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  266. static void queue_delete_wrapper(void *queue);
  267. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  268. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  269. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  270. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  271. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  272. static void task_delete_wrapper(void *task_handle);
  273. static bool IRAM_ATTR is_in_isr_wrapper(void);
  274. static void IRAM_ATTR cause_sw_intr(void *arg);
  275. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  276. static void *malloc_internal_wrapper(size_t size);
  277. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  278. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  279. static int IRAM_ATTR rand_wrapper(void);
  280. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  281. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  282. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  283. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  284. static void btdm_sleep_enter_phase2_wrapper(void);
  285. static void btdm_sleep_exit_phase3_wrapper(void);
  286. static bool coex_bt_wakeup_request(void);
  287. static void coex_bt_wakeup_request_end(void);
  288. static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  289. static int coex_bt_release_wrapper(uint32_t event);
  290. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  291. static uint32_t coex_bb_reset_lock_wrapper(void);
  292. static void coex_bb_reset_unlock_wrapper(uint32_t restore);
  293. static int coex_schm_register_btdm_callback_wrapper(void *callback);
  294. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  295. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  296. static uint32_t coex_schm_interval_get_wrapper(void);
  297. static uint8_t coex_schm_curr_period_get_wrapper(void);
  298. static void * coex_schm_curr_phase_get_wrapper(void);
  299. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
  300. static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
  301. /* Local variable definition
  302. ***************************************************************************
  303. */
  304. /* OSI funcs */
  305. static const struct osi_funcs_t osi_funcs_ro = {
  306. ._version = OSI_VERSION,
  307. ._set_isr = xt_set_interrupt_handler,
  308. ._ints_on = xt_ints_on,
  309. ._interrupt_disable = interrupt_disable,
  310. ._interrupt_restore = interrupt_restore,
  311. ._task_yield = task_yield,
  312. ._task_yield_from_isr = task_yield_from_isr,
  313. ._semphr_create = semphr_create_wrapper,
  314. ._semphr_delete = semphr_delete_wrapper,
  315. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  316. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  317. ._semphr_take = semphr_take_wrapper,
  318. ._semphr_give = semphr_give_wrapper,
  319. ._mutex_create = mutex_create_wrapper,
  320. ._mutex_delete = mutex_delete_wrapper,
  321. ._mutex_lock = mutex_lock_wrapper,
  322. ._mutex_unlock = mutex_unlock_wrapper,
  323. ._queue_create = queue_create_wrapper,
  324. ._queue_delete = queue_delete_wrapper,
  325. ._queue_send = queue_send_wrapper,
  326. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  327. ._queue_recv = queue_recv_wrapper,
  328. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  329. ._task_create = task_create_wrapper,
  330. ._task_delete = task_delete_wrapper,
  331. ._is_in_isr = is_in_isr_wrapper,
  332. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  333. ._malloc = malloc,
  334. ._malloc_internal = malloc_internal_wrapper,
  335. ._free = free,
  336. ._read_efuse_mac = read_mac_wrapper,
  337. ._srand = srand_wrapper,
  338. ._rand = rand_wrapper,
  339. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  340. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  341. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  342. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  343. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  344. ._btdm_sleep_exit_phase1 = NULL,
  345. ._btdm_sleep_exit_phase2 = NULL,
  346. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  347. ._coex_bt_wakeup_request = coex_bt_wakeup_request,
  348. ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
  349. ._coex_bt_request = coex_bt_request_wrapper,
  350. ._coex_bt_release = coex_bt_release_wrapper,
  351. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  352. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  353. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  354. ._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
  355. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  356. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  357. ._coex_schm_interval_get = coex_schm_interval_get_wrapper,
  358. ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
  359. ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
  360. ._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
  361. ._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
  362. ._set_isr_l3 = xt_set_interrupt_handler,
  363. ._interrupt_l3_disable = interrupt_disable,
  364. ._interrupt_l3_restore = interrupt_restore,
  365. ._customer_queue_create = NULL,
  366. ._magic = OSI_MAGIC_VALUE,
  367. };
  368. /* the mode column will be modified by release function to indicate the available region */
  369. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  370. //following is .data
  371. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  372. //following is memory which HW will use
  373. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  374. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  375. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  376. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  377. //following is .bss
  378. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  379. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  380. };
  381. /* Reserve the full memory region used by Bluetooth Controller,
  382. * some may be released later at runtime. */
  383. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  384. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  385. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  386. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  387. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  388. #if CONFIG_SPIRAM_USE_MALLOC
  389. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  390. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  391. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  392. /* Static variable declare */
  393. // timestamp when PHY/RF was switched on
  394. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  395. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  396. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  397. // measured average low power clock period in micro seconds
  398. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  399. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  400. #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
  401. // used low power clock
  402. static DRAM_ATTR uint8_t btdm_lpclk_sel;
  403. #endif /* #ifdef CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG */
  404. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  405. #ifdef CONFIG_PM_ENABLE
  406. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  407. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  408. static bool s_pm_lock_acquired = true;
  409. static DRAM_ATTR bool s_btdm_allow_light_sleep;
  410. // pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
  411. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  412. static void btdm_slp_tmr_callback(void *arg);
  413. #endif /* #ifdef CONFIG_PM_ENABLE */
  414. static inline void btdm_check_and_init_bb(void)
  415. {
  416. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  417. int64_t latest_ts = esp_phy_rf_get_on_ts();
  418. if (latest_ts != s_time_phy_rf_just_enabled ||
  419. s_time_phy_rf_just_enabled == 0) {
  420. btdm_rf_bb_init_phase2();
  421. s_time_phy_rf_just_enabled = latest_ts;
  422. }
  423. }
  424. #if CONFIG_SPIRAM_USE_MALLOC
  425. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  426. {
  427. if (!btdm_queue_table_mux || !queue) {
  428. return NULL;
  429. }
  430. bool ret = false;
  431. btdm_queue_item_t *item;
  432. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  433. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  434. item = &btdm_queue_table[i];
  435. if (item->handle == NULL) {
  436. memcpy(item, queue, sizeof(btdm_queue_item_t));
  437. ret = true;
  438. break;
  439. }
  440. }
  441. xSemaphoreGive(btdm_queue_table_mux);
  442. return ret;
  443. }
  444. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  445. {
  446. if (!btdm_queue_table_mux || !queue) {
  447. return false;
  448. }
  449. bool ret = false;
  450. btdm_queue_item_t *item;
  451. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  452. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  453. item = &btdm_queue_table[i];
  454. if (item->handle == queue->handle) {
  455. memcpy(queue, item, sizeof(btdm_queue_item_t));
  456. memset(item, 0, sizeof(btdm_queue_item_t));
  457. ret = true;
  458. break;
  459. }
  460. }
  461. xSemaphoreGive(btdm_queue_table_mux);
  462. return ret;
  463. }
  464. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  465. static void IRAM_ATTR interrupt_disable(void)
  466. {
  467. if (xPortInIsrContext()) {
  468. portENTER_CRITICAL_ISR(&global_int_mux);
  469. } else {
  470. portENTER_CRITICAL(&global_int_mux);
  471. }
  472. }
  473. static void IRAM_ATTR interrupt_restore(void)
  474. {
  475. if (xPortInIsrContext()) {
  476. portEXIT_CRITICAL_ISR(&global_int_mux);
  477. } else {
  478. portEXIT_CRITICAL(&global_int_mux);
  479. }
  480. }
  481. static void IRAM_ATTR task_yield(void)
  482. {
  483. vPortYield();
  484. }
  485. static void IRAM_ATTR task_yield_from_isr(void)
  486. {
  487. portYIELD_FROM_ISR();
  488. }
  489. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  490. {
  491. #if !CONFIG_SPIRAM_USE_MALLOC
  492. return (void *)xSemaphoreCreateCounting(max, init);
  493. #else
  494. StaticQueue_t *queue_buffer = NULL;
  495. QueueHandle_t handle = NULL;
  496. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  497. if (!queue_buffer) {
  498. goto error;
  499. }
  500. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  501. if (!handle) {
  502. goto error;
  503. }
  504. btdm_queue_item_t item = {
  505. .handle = handle,
  506. .storage = NULL,
  507. .buffer = queue_buffer,
  508. };
  509. if (!btdm_queue_generic_register(&item)) {
  510. goto error;
  511. }
  512. return handle;
  513. error:
  514. if (handle) {
  515. vSemaphoreDelete(handle);
  516. }
  517. if (queue_buffer) {
  518. free(queue_buffer);
  519. }
  520. return NULL;
  521. #endif
  522. }
  523. static void semphr_delete_wrapper(void *semphr)
  524. {
  525. #if !CONFIG_SPIRAM_USE_MALLOC
  526. vSemaphoreDelete(semphr);
  527. #else
  528. btdm_queue_item_t item = {
  529. .handle = semphr,
  530. .storage = NULL,
  531. .buffer = NULL,
  532. };
  533. if (btdm_queue_generic_deregister(&item)) {
  534. vSemaphoreDelete(item.handle);
  535. free(item.buffer);
  536. }
  537. return;
  538. #endif
  539. }
  540. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  541. {
  542. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  543. }
  544. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  545. {
  546. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  547. }
  548. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  549. {
  550. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  551. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  552. } else {
  553. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  554. }
  555. }
  556. static int32_t semphr_give_wrapper(void *semphr)
  557. {
  558. return (int32_t)xSemaphoreGive(semphr);
  559. }
  560. static void *mutex_create_wrapper(void)
  561. {
  562. #if CONFIG_SPIRAM_USE_MALLOC
  563. StaticQueue_t *queue_buffer = NULL;
  564. QueueHandle_t handle = NULL;
  565. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  566. if (!queue_buffer) {
  567. goto error;
  568. }
  569. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  570. if (!handle) {
  571. goto error;
  572. }
  573. btdm_queue_item_t item = {
  574. .handle = handle,
  575. .storage = NULL,
  576. .buffer = queue_buffer,
  577. };
  578. if (!btdm_queue_generic_register(&item)) {
  579. goto error;
  580. }
  581. return handle;
  582. error:
  583. if (handle) {
  584. vSemaphoreDelete(handle);
  585. }
  586. if (queue_buffer) {
  587. free(queue_buffer);
  588. }
  589. return NULL;
  590. #else
  591. return (void *)xSemaphoreCreateMutex();
  592. #endif
  593. }
  594. static void mutex_delete_wrapper(void *mutex)
  595. {
  596. #if !CONFIG_SPIRAM_USE_MALLOC
  597. vSemaphoreDelete(mutex);
  598. #else
  599. btdm_queue_item_t item = {
  600. .handle = mutex,
  601. .storage = NULL,
  602. .buffer = NULL,
  603. };
  604. if (btdm_queue_generic_deregister(&item)) {
  605. vSemaphoreDelete(item.handle);
  606. free(item.buffer);
  607. }
  608. return;
  609. #endif
  610. }
  611. static int32_t mutex_lock_wrapper(void *mutex)
  612. {
  613. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  614. }
  615. static int32_t mutex_unlock_wrapper(void *mutex)
  616. {
  617. return (int32_t)xSemaphoreGive(mutex);
  618. }
  619. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  620. {
  621. #if CONFIG_SPIRAM_USE_MALLOC
  622. StaticQueue_t *queue_buffer = NULL;
  623. uint8_t *queue_storage = NULL;
  624. QueueHandle_t handle = NULL;
  625. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  626. if (!queue_buffer) {
  627. goto error;
  628. }
  629. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  630. if (!queue_storage ) {
  631. goto error;
  632. }
  633. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  634. if (!handle) {
  635. goto error;
  636. }
  637. btdm_queue_item_t item = {
  638. .handle = handle,
  639. .storage = queue_storage,
  640. .buffer = queue_buffer,
  641. };
  642. if (!btdm_queue_generic_register(&item)) {
  643. goto error;
  644. }
  645. return handle;
  646. error:
  647. if (handle) {
  648. vQueueDelete(handle);
  649. }
  650. if (queue_storage) {
  651. free(queue_storage);
  652. }
  653. if (queue_buffer) {
  654. free(queue_buffer);
  655. }
  656. return NULL;
  657. #else
  658. return (void *)xQueueCreate(queue_len, item_size);
  659. #endif
  660. }
  661. static void queue_delete_wrapper(void *queue)
  662. {
  663. #if !CONFIG_SPIRAM_USE_MALLOC
  664. vQueueDelete(queue);
  665. #else
  666. btdm_queue_item_t item = {
  667. .handle = queue,
  668. .storage = NULL,
  669. .buffer = NULL,
  670. };
  671. if (btdm_queue_generic_deregister(&item)) {
  672. vQueueDelete(item.handle);
  673. free(item.storage);
  674. free(item.buffer);
  675. }
  676. return;
  677. #endif
  678. }
  679. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  680. {
  681. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  682. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  683. } else {
  684. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  685. }
  686. }
  687. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  688. {
  689. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  690. }
  691. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  692. {
  693. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  694. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  695. } else {
  696. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  697. }
  698. }
  699. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  700. {
  701. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  702. }
  703. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  704. {
  705. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  706. }
  707. static void task_delete_wrapper(void *task_handle)
  708. {
  709. vTaskDelete(task_handle);
  710. }
  711. static bool IRAM_ATTR is_in_isr_wrapper(void)
  712. {
  713. return !xPortCanYield();
  714. }
  715. static void IRAM_ATTR cause_sw_intr(void *arg)
  716. {
  717. /* just convert void * to int, because the width is the same */
  718. uint32_t intr_no = (uint32_t)arg;
  719. XTHAL_SET_INTSET((1<<intr_no));
  720. }
  721. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  722. {
  723. esp_err_t err = ESP_OK;
  724. #if CONFIG_FREERTOS_UNICORE
  725. cause_sw_intr((void *)intr_no);
  726. #else /* CONFIG_FREERTOS_UNICORE */
  727. if (xPortGetCoreID() == core_id) {
  728. cause_sw_intr((void *)intr_no);
  729. } else {
  730. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  731. }
  732. #endif /* !CONFIG_FREERTOS_UNICORE */
  733. return err;
  734. }
  735. static void *malloc_internal_wrapper(size_t size)
  736. {
  737. return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
  738. }
  739. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  740. {
  741. return esp_read_mac(mac, ESP_MAC_BT);
  742. }
  743. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  744. {
  745. /* empty function */
  746. }
  747. static int IRAM_ATTR rand_wrapper(void)
  748. {
  749. return (int)esp_random();
  750. }
  751. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  752. {
  753. // The number of lp cycles should not lead to overflow. Thrs: 100s
  754. // clock measurement is conducted
  755. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  756. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  757. return (uint32_t)us;
  758. }
  759. /*
  760. * @brief Converts a duration in slots into a number of low power clock cycles.
  761. */
  762. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  763. {
  764. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  765. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  766. // clock measurement is conducted
  767. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  768. return (uint32_t)cycles;
  769. }
  770. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  771. {
  772. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  773. return false;
  774. }
  775. /* wake up in advance considering the delay in enabling PHY/RF */
  776. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  777. return true;
  778. }
  779. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  780. {
  781. #ifdef CONFIG_PM_ENABLE
  782. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  783. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  784. #define BTDM_MIN_TIMER_UNCERTAINTY_US (500)
  785. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  786. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  787. // and set the timer in advance
  788. uint32_t uncertainty = (us_to_sleep >> 11);
  789. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  790. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  791. }
  792. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  793. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  794. }
  795. #endif
  796. }
  797. static void btdm_sleep_enter_phase2_wrapper(void)
  798. {
  799. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  800. esp_phy_disable();
  801. #ifdef CONFIG_PM_ENABLE
  802. if (s_pm_lock_acquired) {
  803. esp_pm_lock_release(s_pm_lock);
  804. s_pm_lock_acquired = false;
  805. }
  806. #endif
  807. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  808. esp_phy_disable();
  809. // pause bluetooth baseband
  810. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  811. }
  812. }
  813. static void btdm_sleep_exit_phase3_wrapper(void)
  814. {
  815. #ifdef CONFIG_PM_ENABLE
  816. if (!s_pm_lock_acquired) {
  817. s_pm_lock_acquired = true;
  818. esp_pm_lock_acquire(s_pm_lock);
  819. }
  820. #endif
  821. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  822. esp_phy_enable();
  823. btdm_check_and_init_bb();
  824. #ifdef CONFIG_PM_ENABLE
  825. esp_timer_stop(s_btdm_slp_tmr);
  826. #endif
  827. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  828. // resume bluetooth baseband
  829. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  830. esp_phy_enable();
  831. }
  832. }
  833. #ifdef CONFIG_PM_ENABLE
  834. static void btdm_slp_tmr_customer_callback(void * arg)
  835. {
  836. (void)(arg);
  837. if (!s_pm_lock_acquired) {
  838. s_pm_lock_acquired = true;
  839. esp_pm_lock_acquire(s_pm_lock);
  840. }
  841. }
  842. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  843. {
  844. (void)(arg);
  845. btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
  846. }
  847. #endif
  848. #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
  849. #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
  850. #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
  851. #define BTDM_ASYNC_WAKEUP_REQMAX 3
  852. static void btdm_wakeup_request_callback(void * arg)
  853. {
  854. (void)(arg);
  855. #if CONFIG_PM_ENABLE
  856. if (!s_pm_lock_acquired) {
  857. s_pm_lock_acquired = true;
  858. esp_pm_lock_acquire(s_pm_lock);
  859. }
  860. esp_timer_stop(s_btdm_slp_tmr);
  861. #endif
  862. btdm_wakeup_request();
  863. semphr_give_wrapper(s_wakeup_req_sem);
  864. }
  865. static bool async_wakeup_request(int event)
  866. {
  867. bool do_wakeup_request = false;
  868. switch (event) {
  869. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  870. btdm_in_wakeup_requesting_set(true);
  871. // NO break
  872. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  873. if (!btdm_power_state_active()) {
  874. do_wakeup_request = true;
  875. btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
  876. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  877. }
  878. break;
  879. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  880. if (!btdm_power_state_active()) {
  881. do_wakeup_request = true;
  882. #if CONFIG_PM_ENABLE
  883. if (!s_pm_lock_acquired) {
  884. s_pm_lock_acquired = true;
  885. esp_pm_lock_acquire(s_pm_lock);
  886. }
  887. esp_timer_stop(s_btdm_slp_tmr);
  888. #endif
  889. btdm_wakeup_request();
  890. }
  891. break;
  892. default:
  893. return false;
  894. }
  895. return do_wakeup_request;
  896. }
  897. static void async_wakeup_request_end(int event)
  898. {
  899. bool request_lock = false;
  900. switch (event) {
  901. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  902. request_lock = true;
  903. break;
  904. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  905. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  906. request_lock = false;
  907. break;
  908. default:
  909. return;
  910. }
  911. if (request_lock) {
  912. btdm_in_wakeup_requesting_set(false);
  913. }
  914. return;
  915. }
  916. static bool coex_bt_wakeup_request(void)
  917. {
  918. return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
  919. }
  920. static void coex_bt_wakeup_request_end(void)
  921. {
  922. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
  923. return;
  924. }
  925. static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
  926. {
  927. #if CONFIG_SW_COEXIST_ENABLE
  928. return coex_bt_request(event, latency, duration);
  929. #else
  930. return 0;
  931. #endif
  932. }
  933. static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
  934. {
  935. #if CONFIG_SW_COEXIST_ENABLE
  936. return coex_bt_release(event);
  937. #else
  938. return 0;
  939. #endif
  940. }
  941. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
  942. {
  943. #if CONFIG_SW_COEXIST_ENABLE
  944. return coex_register_bt_cb(cb);
  945. #else
  946. return 0;
  947. #endif
  948. }
  949. static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
  950. {
  951. #if CONFIG_SW_COEXIST_ENABLE
  952. return coex_bb_reset_lock();
  953. #else
  954. return 0;
  955. #endif
  956. }
  957. static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
  958. {
  959. #if CONFIG_SW_COEXIST_ENABLE
  960. coex_bb_reset_unlock(restore);
  961. #endif
  962. }
  963. static int coex_schm_register_btdm_callback_wrapper(void *callback)
  964. {
  965. #if CONFIG_SW_COEXIST_ENABLE
  966. return coex_schm_register_btdm_callback(callback);
  967. #else
  968. return 0;
  969. #endif
  970. }
  971. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  972. {
  973. #if CONFIG_SW_COEXIST_ENABLE
  974. coex_schm_status_bit_clear(type, status);
  975. #endif
  976. }
  977. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  978. {
  979. #if CONFIG_SW_COEXIST_ENABLE
  980. coex_schm_status_bit_set(type, status);
  981. #endif
  982. }
  983. static uint32_t coex_schm_interval_get_wrapper(void)
  984. {
  985. #if CONFIG_SW_COEXIST_ENABLE
  986. return coex_schm_interval_get();
  987. #else
  988. return 0;
  989. #endif
  990. }
  991. static uint8_t coex_schm_curr_period_get_wrapper(void)
  992. {
  993. #if CONFIG_SW_COEXIST_ENABLE
  994. return coex_schm_curr_period_get();
  995. #else
  996. return 1;
  997. #endif
  998. }
  999. static void * coex_schm_curr_phase_get_wrapper(void)
  1000. {
  1001. #if CONFIG_SW_COEXIST_ENABLE
  1002. return coex_schm_curr_phase_get();
  1003. #else
  1004. return NULL;
  1005. #endif
  1006. }
  1007. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
  1008. {
  1009. #if CONFIG_SW_COEXIST_ENABLE
  1010. return coex_wifi_channel_get(primary, secondary);
  1011. #else
  1012. return -1;
  1013. #endif
  1014. }
  1015. static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
  1016. {
  1017. #if CONFIG_SW_COEXIST_ENABLE
  1018. return coex_register_wifi_channel_change_callback(cb);
  1019. #else
  1020. return -1;
  1021. #endif
  1022. }
  1023. bool esp_vhci_host_check_send_available(void)
  1024. {
  1025. return API_vhci_host_check_send_available();
  1026. }
  1027. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  1028. {
  1029. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1030. API_vhci_host_send_packet(data, len);
  1031. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1032. }
  1033. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  1034. {
  1035. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  1036. }
  1037. static uint32_t btdm_config_mask_load(void)
  1038. {
  1039. uint32_t mask = 0x0;
  1040. #if CONFIG_BTDM_CTRL_HCI_MODE_UART_H4
  1041. mask |= BTDM_CFG_HCI_UART;
  1042. #endif
  1043. #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
  1044. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  1045. #endif
  1046. #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
  1047. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  1048. #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
  1049. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  1050. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  1051. return mask;
  1052. }
  1053. static void btdm_controller_mem_init(void)
  1054. {
  1055. /* initialise .data section */
  1056. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  1057. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  1058. //initial em, .bss section
  1059. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1060. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  1061. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  1062. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  1063. }
  1064. }
  1065. }
  1066. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  1067. {
  1068. int ret = heap_caps_add_region(start, end);
  1069. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  1070. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  1071. * we replace it by ESP_OK
  1072. */
  1073. if (ret == ESP_ERR_INVALID_SIZE) {
  1074. return ESP_OK;
  1075. }
  1076. return ret;
  1077. }
  1078. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  1079. {
  1080. bool update = true;
  1081. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  1082. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1083. return ESP_ERR_INVALID_STATE;
  1084. }
  1085. //already released
  1086. if (!(mode & btdm_dram_available_region[0].mode)) {
  1087. return ESP_ERR_INVALID_STATE;
  1088. }
  1089. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1090. //skip the share mode, idle mode and other mode
  1091. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  1092. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  1093. //clear the bit of the mode which will be released
  1094. btdm_dram_available_region[i].mode &= ~mode;
  1095. continue;
  1096. } else {
  1097. //clear the bit of the mode which will be released
  1098. btdm_dram_available_region[i].mode &= ~mode;
  1099. }
  1100. if (update) {
  1101. mem_start = btdm_dram_available_region[i].start;
  1102. mem_end = btdm_dram_available_region[i].end;
  1103. update = false;
  1104. }
  1105. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  1106. mem_end = btdm_dram_available_region[i].end;
  1107. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  1108. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  1109. && mem_end == btdm_dram_available_region[i+1].start) {
  1110. continue;
  1111. } else {
  1112. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1113. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1114. update = true;
  1115. }
  1116. } else {
  1117. mem_end = btdm_dram_available_region[i].end;
  1118. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1119. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1120. update = true;
  1121. }
  1122. }
  1123. if (mode == ESP_BT_MODE_BTDM) {
  1124. mem_start = (intptr_t)&_btdm_bss_start;
  1125. mem_end = (intptr_t)&_btdm_bss_end;
  1126. if (mem_start != mem_end) {
  1127. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1128. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1129. }
  1130. mem_start = (intptr_t)&_btdm_data_start;
  1131. mem_end = (intptr_t)&_btdm_data_end;
  1132. if (mem_start != mem_end) {
  1133. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1134. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1135. }
  1136. }
  1137. return ESP_OK;
  1138. }
  1139. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  1140. {
  1141. int ret;
  1142. intptr_t mem_start, mem_end;
  1143. ret = esp_bt_controller_mem_release(mode);
  1144. if (ret != ESP_OK) {
  1145. return ret;
  1146. }
  1147. if (mode == ESP_BT_MODE_BTDM) {
  1148. mem_start = (intptr_t)&_bt_bss_start;
  1149. mem_end = (intptr_t)&_bt_bss_end;
  1150. if (mem_start != mem_end) {
  1151. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1152. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1153. }
  1154. mem_start = (intptr_t)&_bt_data_start;
  1155. mem_end = (intptr_t)&_bt_data_end;
  1156. if (mem_start != mem_end) {
  1157. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1158. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1159. }
  1160. mem_start = (intptr_t)&_nimble_bss_start;
  1161. mem_end = (intptr_t)&_nimble_bss_end;
  1162. if (mem_start != mem_end) {
  1163. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1164. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1165. }
  1166. mem_start = (intptr_t)&_nimble_data_start;
  1167. mem_end = (intptr_t)&_nimble_data_end;
  1168. if (mem_start != mem_end) {
  1169. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1170. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1171. }
  1172. }
  1173. return ESP_OK;
  1174. }
  1175. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  1176. {
  1177. esp_err_t err;
  1178. uint32_t btdm_cfg_mask = 0;
  1179. //if all the bt available memory was already released, cannot initialize bluetooth controller
  1180. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  1181. return ESP_ERR_INVALID_STATE;
  1182. }
  1183. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1184. if (osi_funcs_p == NULL) {
  1185. return ESP_ERR_NO_MEM;
  1186. }
  1187. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1188. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1189. return ESP_ERR_INVALID_ARG;
  1190. }
  1191. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1192. return ESP_ERR_INVALID_STATE;
  1193. }
  1194. if (cfg == NULL) {
  1195. return ESP_ERR_INVALID_ARG;
  1196. }
  1197. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  1198. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  1199. return ESP_ERR_INVALID_ARG;
  1200. }
  1201. //overwrite some parameters
  1202. cfg->bt_max_sync_conn = CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF;
  1203. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  1204. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  1205. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  1206. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  1207. return ESP_ERR_INVALID_ARG;
  1208. }
  1209. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1210. #if CONFIG_SPIRAM_USE_MALLOC
  1211. btdm_queue_table_mux = xSemaphoreCreateMutex();
  1212. if (btdm_queue_table_mux == NULL) {
  1213. return ESP_ERR_NO_MEM;
  1214. }
  1215. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1216. #endif
  1217. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1218. if (s_wakeup_req_sem == NULL) {
  1219. err = ESP_ERR_NO_MEM;
  1220. goto error;
  1221. }
  1222. btdm_controller_mem_init();
  1223. periph_module_enable(PERIPH_BT_MODULE);
  1224. #ifdef CONFIG_PM_ENABLE
  1225. s_btdm_allow_light_sleep = false;
  1226. #endif
  1227. // set default sleep clock cycle and its fractional bits
  1228. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1229. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1230. #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
  1231. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1232. #if CONFIG_BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
  1233. // check whether or not EXT_CRYS is working
  1234. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  1235. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32kHz XTAL
  1236. #ifdef CONFIG_PM_ENABLE
  1237. s_btdm_allow_light_sleep = true;
  1238. #endif
  1239. } else {
  1240. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  1241. "light sleep mode will not be able to apply when bluetooth is enabled");
  1242. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1243. }
  1244. #else
  1245. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1246. #endif
  1247. bool select_src_ret, set_div_ret;
  1248. if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1249. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1250. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1251. assert(select_src_ret && set_div_ret);
  1252. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1253. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1254. } else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
  1255. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1256. set_div_ret = btdm_lpclk_set_div(0);
  1257. assert(select_src_ret && set_div_ret);
  1258. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1259. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1260. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1261. assert(btdm_lpcycle_us != 0);
  1262. }
  1263. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1264. #elif CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED
  1265. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1266. #else
  1267. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1268. #endif
  1269. #ifdef CONFIG_PM_ENABLE
  1270. if (!s_btdm_allow_light_sleep) {
  1271. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1272. goto error;
  1273. }
  1274. }
  1275. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1276. goto error;
  1277. }
  1278. esp_timer_create_args_t create_args = {
  1279. .callback = btdm_slp_tmr_callback,
  1280. .arg = NULL,
  1281. .name = "btSlp"
  1282. };
  1283. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1284. goto error;
  1285. }
  1286. s_pm_lock_acquired = true;
  1287. #endif
  1288. #if CONFIG_SW_COEXIST_ENABLE
  1289. coex_init();
  1290. #endif
  1291. btdm_cfg_mask = btdm_config_mask_load();
  1292. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1293. err = ESP_ERR_NO_MEM;
  1294. goto error;
  1295. }
  1296. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1297. return ESP_OK;
  1298. error:
  1299. #ifdef CONFIG_PM_ENABLE
  1300. if (!s_btdm_allow_light_sleep) {
  1301. if (s_light_sleep_pm_lock != NULL) {
  1302. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1303. s_light_sleep_pm_lock = NULL;
  1304. }
  1305. }
  1306. if (s_pm_lock != NULL) {
  1307. esp_pm_lock_delete(s_pm_lock);
  1308. s_pm_lock = NULL;
  1309. }
  1310. if (s_btdm_slp_tmr != NULL) {
  1311. esp_timer_delete(s_btdm_slp_tmr);
  1312. s_btdm_slp_tmr = NULL;
  1313. }
  1314. #endif
  1315. if (s_wakeup_req_sem) {
  1316. semphr_delete_wrapper(s_wakeup_req_sem);
  1317. s_wakeup_req_sem = NULL;
  1318. }
  1319. return err;
  1320. }
  1321. esp_err_t esp_bt_controller_deinit(void)
  1322. {
  1323. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1324. return ESP_ERR_INVALID_STATE;
  1325. }
  1326. btdm_controller_deinit();
  1327. periph_module_disable(PERIPH_BT_MODULE);
  1328. #ifdef CONFIG_PM_ENABLE
  1329. if (!s_btdm_allow_light_sleep) {
  1330. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1331. s_light_sleep_pm_lock = NULL;
  1332. }
  1333. if (s_pm_lock != NULL) {
  1334. esp_pm_lock_delete(s_pm_lock);
  1335. s_pm_lock = NULL;
  1336. }
  1337. if (s_btdm_slp_tmr != NULL) {
  1338. esp_timer_stop(s_btdm_slp_tmr);
  1339. esp_timer_delete(s_btdm_slp_tmr);
  1340. s_btdm_slp_tmr = NULL;
  1341. }
  1342. s_pm_lock_acquired = false;
  1343. #endif
  1344. semphr_delete_wrapper(s_wakeup_req_sem);
  1345. s_wakeup_req_sem = NULL;
  1346. #if CONFIG_SPIRAM_USE_MALLOC
  1347. vSemaphoreDelete(btdm_queue_table_mux);
  1348. btdm_queue_table_mux = NULL;
  1349. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1350. #endif
  1351. free(osi_funcs_p);
  1352. osi_funcs_p = NULL;
  1353. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1354. btdm_lpcycle_us = 0;
  1355. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1356. return ESP_OK;
  1357. }
  1358. static void bt_shutdown(void)
  1359. {
  1360. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1361. return;
  1362. }
  1363. esp_bt_controller_shutdown();
  1364. esp_phy_disable();
  1365. return;
  1366. }
  1367. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1368. {
  1369. int ret;
  1370. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1371. return ESP_ERR_INVALID_STATE;
  1372. }
  1373. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1374. if (mode != btdm_controller_get_mode()) {
  1375. return ESP_ERR_INVALID_ARG;
  1376. }
  1377. #ifdef CONFIG_PM_ENABLE
  1378. if (!s_btdm_allow_light_sleep) {
  1379. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1380. }
  1381. esp_pm_lock_acquire(s_pm_lock);
  1382. #endif
  1383. esp_phy_enable();
  1384. #if CONFIG_SW_COEXIST_ENABLE
  1385. coex_enable();
  1386. #endif
  1387. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1388. btdm_controller_enable_sleep(true);
  1389. }
  1390. // inititalize bluetooth baseband
  1391. btdm_check_and_init_bb();
  1392. ret = btdm_controller_enable(mode);
  1393. if (ret != 0) {
  1394. #if CONFIG_SW_COEXIST_ENABLE
  1395. coex_disable();
  1396. #endif
  1397. esp_phy_disable();
  1398. #ifdef CONFIG_PM_ENABLE
  1399. if (!s_btdm_allow_light_sleep) {
  1400. esp_pm_lock_release(s_light_sleep_pm_lock);
  1401. }
  1402. esp_pm_lock_release(s_pm_lock);
  1403. #endif
  1404. return ESP_ERR_INVALID_STATE;
  1405. }
  1406. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1407. ret = esp_register_shutdown_handler(bt_shutdown);
  1408. if (ret != ESP_OK) {
  1409. ESP_LOGW(BTDM_LOG_TAG, "Register shutdown handler failed, ret = 0x%x", ret);
  1410. }
  1411. return ESP_OK;
  1412. }
  1413. esp_err_t esp_bt_controller_disable(void)
  1414. {
  1415. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1416. return ESP_ERR_INVALID_STATE;
  1417. }
  1418. // disable modem sleep and wake up from sleep mode
  1419. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1420. btdm_controller_enable_sleep(false);
  1421. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
  1422. while (!btdm_power_state_active()) {
  1423. esp_rom_delay_us(1000);
  1424. }
  1425. }
  1426. btdm_controller_disable();
  1427. #if CONFIG_SW_COEXIST_ENABLE
  1428. coex_disable();
  1429. #endif
  1430. esp_phy_disable();
  1431. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1432. esp_unregister_shutdown_handler(bt_shutdown);
  1433. #ifdef CONFIG_PM_ENABLE
  1434. if (!s_btdm_allow_light_sleep) {
  1435. esp_pm_lock_release(s_light_sleep_pm_lock);
  1436. }
  1437. esp_pm_lock_release(s_pm_lock);
  1438. #endif
  1439. return ESP_OK;
  1440. }
  1441. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1442. {
  1443. return btdm_controller_status;
  1444. }
  1445. /* extra functions */
  1446. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1447. {
  1448. if (ble_txpwr_set(power_type, power_level) != 0) {
  1449. return ESP_ERR_INVALID_ARG;
  1450. }
  1451. return ESP_OK;
  1452. }
  1453. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1454. {
  1455. return (esp_power_level_t)ble_txpwr_get(power_type);
  1456. }
  1457. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1458. {
  1459. esp_err_t err;
  1460. int ret;
  1461. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1462. if (ret == 0) {
  1463. err = ESP_OK;
  1464. } else if (ret == -1) {
  1465. err = ESP_ERR_INVALID_ARG;
  1466. } else {
  1467. err = ESP_ERR_INVALID_STATE;
  1468. }
  1469. return err;
  1470. }
  1471. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1472. {
  1473. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1474. return ESP_ERR_INVALID_ARG;
  1475. }
  1476. return ESP_OK;
  1477. }
  1478. esp_err_t esp_bt_sleep_enable (void)
  1479. {
  1480. esp_err_t status;
  1481. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1482. return ESP_ERR_INVALID_STATE;
  1483. }
  1484. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1485. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1486. btdm_controller_enable_sleep (true);
  1487. status = ESP_OK;
  1488. } else {
  1489. status = ESP_ERR_NOT_SUPPORTED;
  1490. }
  1491. return status;
  1492. }
  1493. esp_err_t esp_bt_sleep_disable (void)
  1494. {
  1495. esp_err_t status;
  1496. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1497. return ESP_ERR_INVALID_STATE;
  1498. }
  1499. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1500. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1501. btdm_controller_enable_sleep (false);
  1502. status = ESP_OK;
  1503. } else {
  1504. status = ESP_ERR_NOT_SUPPORTED;
  1505. }
  1506. return status;
  1507. }
  1508. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1509. {
  1510. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1511. return ESP_ERR_INVALID_STATE;
  1512. }
  1513. bredr_sco_datapath_set(data_path);
  1514. return ESP_OK;
  1515. }
  1516. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1517. {
  1518. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1519. return ESP_ERR_INVALID_STATE;
  1520. }
  1521. btdm_controller_scan_duplicate_list_clear();
  1522. return ESP_OK;
  1523. }
  1524. #endif /* CONFIG_BT_ENABLED */