uarths.h 8.1 KB

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  1. /* Copyright 2018 Canaan Inc.
  2. *
  3. * Licensed under the Apache License, Version 2.0 (the "License");
  4. * you may not use this file except in compliance with the License.
  5. * You may obtain a copy of the License at
  6. *
  7. * http://www.apache.org/licenses/LICENSE-2.0
  8. *
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. /**
  16. * @file
  17. * @brief Universal Asynchronous Receiver/Transmitter (UART)
  18. *
  19. * The UART peripheral supports the following features:
  20. *
  21. * - 8-N-1 and 8-N-2 formats: 8 data bits, no parity bit, 1 start
  22. * bit, 1 or 2 stop bits
  23. *
  24. * - 8-entry transmit and receive FIFO buffers with programmable
  25. * watermark interrupts
  26. *
  27. * - 16× Rx oversampling with 2/3 majority voting per bit
  28. *
  29. * The UART peripheral does not support hardware flow control or
  30. * other modem control signals, or synchronous serial data
  31. * tranfesrs.
  32. *
  33. * @note UART RAM Layout
  34. *
  35. * | Address | Name | Description |
  36. * |-----------|----------|---------------------------------|
  37. * | 0x000 | txdata | Transmit data register |
  38. * | 0x004 | rxdata | Receive data register |
  39. * | 0x008 | txctrl | Transmit control register |
  40. * | 0x00C | rxctrl | Receive control register |
  41. * | 0x010 | ie | UART interrupt enable |
  42. * | 0x014 | ip | UART Interrupt pending |
  43. * | 0x018 | div | Baud rate divisor |
  44. *
  45. */
  46. #ifndef _DRIVER_UARTHS_H
  47. #define _DRIVER_UARTHS_H
  48. #include <stddef.h>
  49. #include <stdint.h>
  50. #include "platform.h"
  51. #include "plic.h"
  52. #ifdef __cplusplus
  53. extern "C" {
  54. #endif
  55. /* clang-format off */
  56. /* Register address offsets */
  57. #define UARTHS_REG_TXFIFO (0x00)
  58. #define UARTHS_REG_RXFIFO (0x04)
  59. #define UARTHS_REG_TXCTRL (0x08)
  60. #define UARTHS_REG_RXCTRL (0x0c)
  61. #define UARTHS_REG_IE (0x10)
  62. #define UARTHS_REG_IP (0x14)
  63. #define UARTHS_REG_DIV (0x18)
  64. /* TXCTRL register */
  65. #define UARTHS_TXEN (0x01)
  66. #define UARTHS_TXWM(x) (((x) & 0xffff) << 16)
  67. /* RXCTRL register */
  68. #define UARTHS_RXEN (0x01)
  69. #define UARTHS_RXWM(x) (((x) & 0xffff) << 16)
  70. /* IP register */
  71. #define UARTHS_IP_TXWM (0x01)
  72. #define UARTHS_IP_RXWM (0x02)
  73. /* clang-format on */
  74. typedef struct _uarths_txdata
  75. {
  76. /* Bits [7:0] is data */
  77. uint32_t data : 8;
  78. /* Bits [30:8] is 0 */
  79. uint32_t zero : 23;
  80. /* Bit 31 is full status */
  81. uint32_t full : 1;
  82. } __attribute__((packed, aligned(4))) uarths_txdata_t;
  83. typedef struct _uarths_rxdata
  84. {
  85. /* Bits [7:0] is data */
  86. uint32_t data : 8;
  87. /* Bits [30:8] is 0 */
  88. uint32_t zero : 23;
  89. /* Bit 31 is empty status */
  90. uint32_t empty : 1;
  91. } __attribute__((packed, aligned(4))) uarths_rxdata_t;
  92. typedef struct _uarths_txctrl
  93. {
  94. /* Bit 0 is txen, controls whether the Tx channel is active. */
  95. uint32_t txen : 1;
  96. /* Bit 1 is nstop, 0 for one stop bit and 1 for two stop bits */
  97. uint32_t nstop : 1;
  98. /* Bits [15:2] is reserved */
  99. uint32_t resv0 : 14;
  100. /* Bits [18:16] is threshold of interrupt triggers */
  101. uint32_t txcnt : 3;
  102. /* Bits [31:19] is reserved */
  103. uint32_t resv1 : 13;
  104. } __attribute__((packed, aligned(4))) uarths_txctrl_t;
  105. typedef struct _uarths_rxctrl
  106. {
  107. /* Bit 0 is txen, controls whether the Tx channel is active. */
  108. uint32_t rxen : 1;
  109. /* Bits [15:1] is reserved */
  110. uint32_t resv0 : 15;
  111. /* Bits [18:16] is threshold of interrupt triggers */
  112. uint32_t rxcnt : 3;
  113. /* Bits [31:19] is reserved */
  114. uint32_t resv1 : 13;
  115. } __attribute__((packed, aligned(4))) uarths_rxctrl_t;
  116. typedef struct _uarths_ip
  117. {
  118. /* Bit 0 is txwm, raised less than txcnt */
  119. uint32_t txwm : 1;
  120. /* Bit 1 is txwm, raised greater than rxcnt */
  121. uint32_t rxwm : 1;
  122. /* Bits [31:2] is 0 */
  123. uint32_t zero : 30;
  124. } __attribute__((packed, aligned(4))) uarths_ip_t;
  125. typedef struct _uarths_ie
  126. {
  127. /* Bit 0 is txwm, raised less than txcnt */
  128. uint32_t txwm : 1;
  129. /* Bit 1 is txwm, raised greater than rxcnt */
  130. uint32_t rxwm : 1;
  131. /* Bits [31:2] is 0 */
  132. uint32_t zero : 30;
  133. } __attribute__((packed, aligned(4))) uarths_ie_t;
  134. typedef struct _uarths_div
  135. {
  136. /* Bits [31:2] is baud rate divisor register */
  137. uint32_t div : 16;
  138. /* Bits [31:16] is 0 */
  139. uint32_t zero : 16;
  140. } __attribute__((packed, aligned(4))) uarths_div_t;
  141. typedef struct _uarths
  142. {
  143. /* Address offset 0x00 */
  144. uarths_txdata_t txdata;
  145. /* Address offset 0x04 */
  146. uarths_rxdata_t rxdata;
  147. /* Address offset 0x08 */
  148. uarths_txctrl_t txctrl;
  149. /* Address offset 0x0c */
  150. uarths_rxctrl_t rxctrl;
  151. /* Address offset 0x10 */
  152. uarths_ie_t ie;
  153. /* Address offset 0x14 */
  154. uarths_ip_t ip;
  155. /* Address offset 0x18 */
  156. uarths_div_t div;
  157. } __attribute__((packed, aligned(4))) uarths_t;
  158. typedef enum _uarths_interrupt_mode
  159. {
  160. UARTHS_SEND = 1,
  161. UARTHS_RECEIVE = 2,
  162. UARTHS_SEND_RECEIVE = 3,
  163. } uarths_interrupt_mode_t;
  164. typedef enum _uarths_stopbit
  165. {
  166. UARTHS_STOP_1,
  167. UARTHS_STOP_2
  168. } uarths_stopbit_t;
  169. extern volatile uarths_t *const uarths;
  170. /**
  171. * @brief Initialization Core UART
  172. *
  173. * @return result
  174. * - 0 Success
  175. * - Other Fail
  176. */
  177. void uarths_init(void);
  178. /**
  179. * @brief Put a char to UART
  180. *
  181. * @param[in] c The char to put
  182. *
  183. * @return result
  184. * - Byte On success, returns the written character.
  185. * - EOF On failure, returns EOF and sets the error indicator (see ferror()) on stdout.
  186. */
  187. int uarths_putchar(char c);
  188. /**
  189. * @brief Get a byte from UART
  190. *
  191. * @return byte as int type from UART
  192. * - Byte The character read as an unsigned char cast to an int
  193. * - EOF EOF on end of file or error, no enough byte to read
  194. */
  195. int uarths_getchar(void);
  196. /**
  197. * @brief Send a string to UART
  198. *
  199. * @param[in] s The string to send
  200. *
  201. * @note The string must ending with '\0'
  202. *
  203. * @return result
  204. * - 0 Success
  205. * - Other Fail
  206. */
  207. int uarths_puts(const char *s);
  208. /**
  209. * @brief [Deprecated] Get a byte from UART
  210. *
  211. * @return byte as int type from UART
  212. * - Byte The character read as an unsigned char cast to an int
  213. * - EOF EOF on end of file or error, no enough byte to read
  214. */
  215. int uarths_getc(void);
  216. /**
  217. * @brief Set uarths interrupt callback
  218. *
  219. * @param[in] interrupt_mode Interrupt mode recevice or send
  220. * @param[in] uarths_callback Interrupt callback
  221. * @param[in] ctx Param of callback
  222. * @param[in] priority Interrupt priority
  223. *
  224. */
  225. void uarths_set_irq(uarths_interrupt_mode_t interrupt_mode, plic_irq_callback_t uarths_callback, void *ctx, uint32_t priority);
  226. /**
  227. * @brief Uarths receive data
  228. *
  229. * @param[in] buf The data received
  230. * @param[in] buf_len The length of data
  231. *
  232. * @return Number of received data
  233. */
  234. size_t uarths_receive_data(uint8_t *buf, size_t buf_len);
  235. /**
  236. * @brief Uarths receive data
  237. *
  238. * @param[in] buf The data sended
  239. * @param[in] buf_len The length of data
  240. *
  241. * @return Number of sended data
  242. */
  243. size_t uarths_send_data(const uint8_t *buf, size_t buf_len);
  244. /**
  245. * @brief Get interrupt mode
  246. *
  247. * @return Mode of interrupt
  248. */
  249. uarths_interrupt_mode_t uarths_get_interrupt_mode(void);
  250. /**
  251. * @brief Set uarths baud rate and stopbit
  252. *
  253. * @param[in] baud_rate The baud rate
  254. * @param[in] stopbit The stopbit of data
  255. *
  256. */
  257. void uarths_config(uint32_t baud_rate, uarths_stopbit_t stopbit);
  258. /**
  259. * @brief Set uart interrupt condition
  260. *
  261. * @param[in] interrupt_mode The interrupt mode
  262. * @param[in] cnt The count of tigger
  263. *
  264. */
  265. void uarths_set_interrupt_cnt(uarths_interrupt_mode_t interrupt_mode, uint8_t cnt);
  266. #ifdef __cplusplus
  267. }
  268. #endif
  269. #endif /* _DRIVER_UARTHS_H */