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@@ -51,6 +51,13 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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+enum
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+{
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+ MSC_STAGE_CMD = 0,
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+ MSC_STAGE_DATA,
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+ MSC_STAGE_STATUS
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+};
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+
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typedef struct {
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typedef struct {
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uint8_t scsi_data[64]; // buffer for scsi's response other than read10 & write10. NOTE should be multiple of 64 to be compatible with lpc11/13u
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uint8_t scsi_data[64]; // buffer for scsi's response other than read10 & write10. NOTE should be multiple of 64 to be compatible with lpc11/13u
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ATTR_USB_MIN_ALIGNMENT msc_cbw_t cbw;
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ATTR_USB_MIN_ALIGNMENT msc_cbw_t cbw;
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@@ -63,8 +70,9 @@ typedef struct {
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uint8_t max_lun;
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uint8_t max_lun;
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uint8_t interface_num;
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uint8_t interface_num;
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-
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uint8_t ep_in, ep_out;
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uint8_t ep_in, ep_out;
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+
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+ uint8_t stage;
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}mscd_interface_t;
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}mscd_interface_t;
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TUSB_CFG_ATTR_USBRAM STATIC_VAR mscd_interface_t mscd_data;
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TUSB_CFG_ATTR_USBRAM STATIC_VAR mscd_interface_t mscd_data;
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@@ -153,75 +161,109 @@ tusb_error_t mscd_control_request_st(uint8_t port, tusb_control_request_t const
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// MSCD APPLICATION CALLBACK
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// MSCD APPLICATION CALLBACK
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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-tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
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+static bool send_status(uint8_t port, mscd_interface_t* p_msc)
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{
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{
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- static bool is_waiting_read10_write10 = false; // indicate we are transferring data in READ10, WRITE10 command
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+ TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t), false) );
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- mscd_interface_t * const p_msc = &mscd_data;
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- msc_cbw_t * const p_cbw = &p_msc->cbw;
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- msc_csw_t * const p_csw = &p_msc->csw;
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+ //------------- Queue the next CBW -------------//
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+ TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t), true) );
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+
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+ return true;
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+}
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+
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+tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
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+{
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+ mscd_interface_t* const p_msc = &mscd_data;
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+ msc_cbw_t* const p_cbw = &p_msc->cbw;
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+ msc_csw_t* const p_csw = &p_msc->csw;
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VERIFY( (ep_addr == p_msc->ep_out) || (ep_addr == p_msc->ep_in), TUSB_ERROR_INVALID_PARA);
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VERIFY( (ep_addr == p_msc->ep_out) || (ep_addr == p_msc->ep_in), TUSB_ERROR_INVALID_PARA);
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- //------------- new CBW received -------------//
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- if ( !is_waiting_read10_write10 )
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+ switch (p_msc->stage)
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{
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{
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-// if ( ep_addr == p_msc->edpt_in ) return TUSB_ERROR_NONE; // bulk in interrupt for dcd to clean up
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-
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- TU_ASSERT( (ep_addr == p_msc->ep_out) &&
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- event == TUSB_EVENT_XFER_COMPLETE &&
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- xferred_bytes == sizeof(msc_cbw_t) &&
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- p_cbw->signature == MSC_CBW_SIGNATURE, TUSB_ERROR_INVALID_PARA );
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+ //------------- new CBW received -------------//
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+ case MSC_STAGE_CMD:
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+ TU_ASSERT( (ep_addr == p_msc->ep_out) &&
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+ event == TUSB_EVENT_XFER_COMPLETE &&
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+ xferred_bytes == sizeof(msc_cbw_t) &&
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+ p_cbw->signature == MSC_CBW_SIGNATURE, TUSB_ERROR_INVALID_PARA );
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+
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+ p_csw->signature = MSC_CSW_SIGNATURE;
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+ p_csw->tag = p_cbw->tag;
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+ p_csw->data_residue = 0;
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+
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+ // Valid command -> move to Data Stage
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+ p_msc->stage = MSC_STAGE_DATA;
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+
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+ // If not read10 & write10, invoke application callback
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+ if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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+ {
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+ if ( read10_write10_data_xfer(port, p_msc) )
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+ {
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+ // read10 & write10 data is complete -> move to Status Stage
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+ p_msc->stage = MSC_STAGE_STATUS;
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+ }
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+ }
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+ else
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+ {
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+ void const *p_buffer = NULL;
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+ uint16_t actual_length = (uint16_t) p_cbw->xfer_bytes;
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- p_csw->signature = MSC_CSW_SIGNATURE;
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- p_csw->tag = p_cbw->tag;
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- p_csw->data_residue = 0;
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+ // TODO SCSI data out transfer is not yet supported
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+ ASSERT_FALSE( p_cbw->xfer_bytes > 0 && !BIT_TEST_(p_cbw->dir, 7), TUSB_ERROR_NOT_SUPPORTED_YET);
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- if ( (SCSI_CMD_READ_10 != p_cbw->command[0]) && (SCSI_CMD_WRITE_10 != p_cbw->command[0]) )
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- {
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- void const *p_buffer = NULL;
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- uint16_t actual_length = (uint16_t) p_cbw->xfer_bytes;
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+ p_csw->status = tud_msc_scsi_cb(port, p_cbw->lun, p_cbw->command, &p_buffer, &actual_length);
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- // TODO SCSI data out transfer is not yet supported
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- ASSERT_FALSE( p_cbw->xfer_bytes > 0 && !BIT_TEST_(p_cbw->dir, 7), TUSB_ERROR_NOT_SUPPORTED_YET);
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+ //------------- Data Phase (non READ10, WRITE10) -------------//
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+ if ( p_cbw->xfer_bytes )
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+ {
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+ ASSERT( p_cbw->xfer_bytes >= actual_length, TUSB_ERROR_INVALID_PARA );
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+ ASSERT( sizeof(p_msc->scsi_data) >= actual_length, TUSB_ERROR_NOT_ENOUGH_MEMORY); // needs to increase size for scsi_data
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+
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+ uint8_t const edpt_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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+
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+ if ( p_buffer == NULL || actual_length == 0 )
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+ {
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+ // application does not provide data to response --> possibly unsupported SCSI command
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+ tusb_dcd_edpt_stall(port, edpt_data);
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+ p_csw->status = MSC_CSW_STATUS_FAILED;
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+ }else
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+ {
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+ memcpy(p_msc->scsi_data, p_buffer, actual_length);
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+ TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, edpt_data, p_msc->scsi_data, actual_length), TUSB_ERROR_DCD_EDPT_XFER );
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+ }
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+ }
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- p_csw->status = tud_msc_scsi_cb(port, p_cbw->lun, p_cbw->command, &p_buffer, &actual_length);
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+ // consider other SCSI is complete after one DATA transfer
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+ p_msc->stage = MSC_STAGE_STATUS;
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+ }
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+ break;
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- //------------- Data Phase (non READ10, WRITE10) -------------//
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- if ( p_cbw->xfer_bytes )
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+ case MSC_STAGE_DATA:
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+ // Can be executed several times e.g write 8K bytes (several flash write)
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+ if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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{
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{
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- ASSERT( p_cbw->xfer_bytes >= actual_length, TUSB_ERROR_INVALID_PARA );
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- ASSERT( sizeof(p_msc->scsi_data) >= actual_length, TUSB_ERROR_NOT_ENOUGH_MEMORY); // needs to increase size for scsi_data
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-
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- uint8_t const edpt_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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-
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- if ( p_buffer == NULL || actual_length == 0 )
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- { // application does not provide data to response --> possibly unsupported SCSI command
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- tusb_dcd_edpt_stall(port, edpt_data);
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- p_csw->status = MSC_CSW_STATUS_FAILED;
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- }else
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+ if ( read10_write10_data_xfer(port, p_msc) )
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{
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{
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- memcpy(p_msc->scsi_data, p_buffer, actual_length);
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- TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, edpt_data, p_msc->scsi_data, actual_length), TUSB_ERROR_DCD_EDPT_XFER );
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+ // read10 & write10 data is complete -> move to Status Stage
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+ p_msc->stage = MSC_STAGE_STATUS;
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}
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}
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}
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}
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- }
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- }
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+ break;
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- //------------- Data Phase For READ10 & WRITE10 (can be executed several times) -------------//
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- if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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- {
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- is_waiting_read10_write10 = !read10_write10_data_xfer(port, p_msc);
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+ case MSC_STAGE_STATUS: break;
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+ default : break;
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}
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}
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- //------------- Status Phase -------------//
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- // Either bulk in & out can be stalled in the data phase, dcd must make sure these queued transfer will be resumed after host clear stall
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- if (!is_waiting_read10_write10)
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+ if ( p_msc->stage == MSC_STAGE_STATUS )
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{
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{
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- TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_in , (uint8_t*) p_csw, sizeof(msc_csw_t), false), TUSB_ERROR_DCD_EDPT_XFER );
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+ // Move to default CMD stage after sending status
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+ p_msc->stage = MSC_STAGE_CMD;
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+
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+ TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t), false) );
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//------------- Queue the next CBW -------------//
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//------------- Queue the next CBW -------------//
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- TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_out, (uint8_t*) p_cbw, sizeof(msc_cbw_t), true), TUSB_ERROR_DCD_EDPT_XFER );
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+ TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t), true) );
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}
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}
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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@@ -230,10 +272,11 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
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// return true if data phase is complete, false if not yet complete
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// return true if data phase is complete, false if not yet complete
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static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
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static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
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{
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{
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- msc_cbw_t* const p_cbw = &p_msc->cbw;
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+ msc_cbw_t* const p_cbw = &p_msc->cbw;
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msc_csw_t* const p_csw = &p_msc->csw;
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msc_csw_t* const p_csw = &p_msc->csw;
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- scsi_read10_t* p_readwrite = (scsi_read10_t*) &p_cbw->command; // read10 & write10 has the same format
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+ // read10 & write10 has the same format
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+ scsi_read10_t* p_readwrite = (scsi_read10_t*) &p_cbw->command;
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uint8_t const ep_addr = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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uint8_t const ep_addr = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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@@ -241,34 +284,43 @@ static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
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uint16_t const block_count = __be2n_16(p_readwrite->block_count);
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uint16_t const block_count = __be2n_16(p_readwrite->block_count);
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void *p_buffer = NULL;
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void *p_buffer = NULL;
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- uint16_t xferred_block = (SCSI_CMD_READ_10 == p_cbw->command[0]) ? tud_msc_read10_cb (port, p_cbw->lun, &p_buffer, lba, block_count) :
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- tud_msc_write10_cb(port, p_cbw->lun, &p_buffer, lba, block_count);
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- xferred_block = min16_of(xferred_block, block_count);
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+ uint16_t xfer_block;
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+
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+ if (SCSI_CMD_READ_10 == p_cbw->command[0])
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+ {
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+ xfer_block = tud_msc_read10_cb (port, p_cbw->lun, &p_buffer, lba, block_count);
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+ }else
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+ {
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+ xfer_block = tud_msc_write10_cb(port, p_cbw->lun, &p_buffer, lba, block_count);
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+ }
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+
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+ xfer_block = min16_of(xfer_block, block_count);
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- uint16_t const xferred_byte = xferred_block * (p_cbw->xfer_bytes / block_count);
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+ uint16_t const xfer_byte = xfer_block * (p_cbw->xfer_bytes / block_count);
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- if ( 0 == xferred_block )
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- { // xferred_block is zero will cause pipe is stalled & status in CSW set to failed
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+ if ( 0 == xfer_block )
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+ {
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+ // xferred_block is zero will cause pipe is stalled & status in CSW set to failed
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p_csw->data_residue = p_cbw->xfer_bytes;
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p_csw->data_residue = p_cbw->xfer_bytes;
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p_csw->status = MSC_CSW_STATUS_FAILED;
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p_csw->status = MSC_CSW_STATUS_FAILED;
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tusb_dcd_edpt_stall(port, ep_addr);
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tusb_dcd_edpt_stall(port, ep_addr);
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return true;
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return true;
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- } else if (xferred_block < block_count)
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+ } else if (xfer_block < block_count)
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{
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{
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- TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_addr, p_buffer, xferred_byte, true), TUSB_ERROR_DCD_EDPT_XFER );
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+ TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_addr, p_buffer, xfer_byte, true), TUSB_ERROR_DCD_EDPT_XFER );
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// adjust lba, block_count, xfer_bytes for the next call
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// adjust lba, block_count, xfer_bytes for the next call
|
|
|
- p_readwrite->lba = __n2be(lba+xferred_block);
|
|
|
|
|
- p_readwrite->block_count = __n2be_16(block_count - xferred_block);
|
|
|
|
|
- p_cbw->xfer_bytes -= xferred_byte;
|
|
|
|
|
|
|
+ p_readwrite->lba = __n2be(lba+xfer_block);
|
|
|
|
|
+ p_readwrite->block_count = __n2be_16(block_count - xfer_block);
|
|
|
|
|
+ p_cbw->xfer_bytes -= xfer_byte;
|
|
|
|
|
|
|
|
return false;
|
|
return false;
|
|
|
}else
|
|
}else
|
|
|
{
|
|
{
|
|
|
p_csw->status = MSC_CSW_STATUS_PASSED;
|
|
p_csw->status = MSC_CSW_STATUS_PASSED;
|
|
|
- TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, ep_addr, p_buffer, xferred_byte), TUSB_ERROR_DCD_EDPT_XFER );
|
|
|
|
|
|
|
+ TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, ep_addr, p_buffer, xfer_byte), TUSB_ERROR_DCD_EDPT_XFER );
|
|
|
return true;
|
|
return true;
|
|
|
}
|
|
}
|
|
|
}
|
|
}
|