more chipidea

src/portable/chipidea/ci_hs/ci_hs_imxrt.h

@@ -27,10 +27,6 @@
 #ifndef _CI_HS_IMXRT_H_
 #define _CI_HS_IMXRT_H_
 
-#ifdef __cplusplus
- extern "C" {
-#endif
-
 #include "fsl_device_registers.h"
 
 static const ci_hs_controller_t _ci_controller[] =
@@ -44,18 +40,11 @@ static const ci_hs_controller_t _ci_controller[] =
   #endif
 };
 
-void dcd_int_enable(uint8_t rhport)
-{
-  NVIC_EnableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
-void dcd_int_disable(uint8_t rhport)
-{
-  NVIC_DisableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
-#ifdef __cplusplus
- }
-#endif
 
 #endif

src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h

@@ -27,10 +27,6 @@
 #ifndef _CI_HS_LPC18_43_H_
 #define _CI_HS_LPC18_43_H_
 
-#ifdef __cplusplus
- extern "C" {
-#endif
-
 // LPCOpen for 18xx & 43xx
 #include "chip.h"
 
@@ -40,18 +36,10 @@ static const ci_hs_controller_t _ci_controller[] =
   { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
 };
 
-void dcd_int_enable(uint8_t rhport)
-{
-  NVIC_EnableIRQ(_ci_controller[rhport].irqnum);
-}
-
-void dcd_int_disable(uint8_t rhport)
-{
-  NVIC_DisableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
-#ifdef __cplusplus
- }
-#endif
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
 #endif

src/portable/chipidea/ci_hs/ci_hs_type.h

@@ -127,7 +127,7 @@ typedef struct
   volatile uint32_t ENDPTSTAT;       ///< Endpoint Status
   volatile uint32_t ENDPTCOMPLETE;   ///< Endpoint Complete
   volatile uint32_t ENDPTCTRL[8];    ///< Endpoint Control 0 - 7
-} ci_hs_regs_t, hcd_registers_t;
+} ci_hs_regs_t;
 
 
 typedef struct

src/portable/chipidea/ci_hs/dcd_ci_hs.c

@@ -43,6 +43,9 @@
   #error "Unsupported MCUs"
 #endif
 
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
 
 #define CI_HS_REG(_port)      ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
 
@@ -52,9 +55,6 @@
   #define CleanInvalidateDCache_by_Addr(_addr, _dsize)
 #endif
 
-//--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
-//--------------------------------------------------------------------+
 
 // ENDPTCTRL
 enum {
@@ -230,6 +230,16 @@ void dcd_init(uint8_t rhport)
   dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect
 }
 
+void dcd_int_enable(uint8_t rhport)
+{
+  CI_DCD_INT_ENABLE(rhport);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+  CI_DCD_INT_DISABLE(rhport);
+}
+
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
   // Response with status first before changing device address

src/portable/chipidea/ci_hs/hcd_ci_hs.c

@@ -34,47 +34,23 @@
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
+#include "common/tusb_common.h"
+#include "portable/ehci/ehci_api.h"
+#include "ci_hs_type.h"
+
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
-  #include "fsl_device_registers.h"
+  #include "ci_hs_imxrt.h"
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+  #include "ci_hs_lpc18_43.h"
 #else
-  // LPCOpen for 18xx & 43xx
-  #include "chip.h"
+  #error "Unsupported MCUs"
 #endif
 
-#include "common/tusb_common.h"
-#include "ci_hs_type.h"
-#include "portable/ehci/ehci_api.h"
-
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-// TODO can be merged with dcd_controller_t
-typedef struct
-{
-  uint32_t regs_base;     // registers base
-  const IRQn_Type irqnum; // IRQ number
-}hcd_controller_t;
-
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
-  static const hcd_controller_t _hcd_controller[] =
-  {
-    // RT1010 and RT1020 only has 1 USB controller
-    #if FSL_FEATURE_SOC_USBHS_COUNT == 1
-      { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn }
-    #else
-      { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn },
-      { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn }
-    #endif
-  };
-
-#else
-  static const hcd_controller_t _hcd_controller[] =
-  {
-    { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },
-    { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn }
-  };
-#endif
+#define CI_HS_REG(_port)      ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
 
 //--------------------------------------------------------------------+
 // Controller API
@@ -82,7 +58,7 @@ typedef struct
 
 bool hcd_init(uint8_t rhport)
 {
-  hcd_registers_t* hcd_reg = (hcd_registers_t*) _hcd_controller[rhport].regs_base;
+  ci_hs_regs_t* hcd_reg = CI_HS_REG(rhport);
 
   // Reset controller
   hcd_reg->USBCMD |= USBCMD_RESET;
@@ -106,12 +82,12 @@ bool hcd_init(uint8_t rhport)
 
 void hcd_int_enable(uint8_t rhport)
 {
-  NVIC_EnableIRQ(_hcd_controller[rhport].irqnum);
+  CI_HCD_INT_ENABLE(rhport);
 }
 
 void hcd_int_disable(uint8_t rhport)
 {
-  NVIC_DisableIRQ(_hcd_controller[rhport].irqnum);
+  CI_HCD_INT_DISABLE(rhport);
 }
 
 #endif