clean up

src/common/tusb_verify.h

@@ -60,15 +60,13 @@
 
 // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
 #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
-
-#define TU_BREAKPOINT() do                                                                                \
-{                                                                                                         \
-  volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
-  if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */            \
-} while(0)
-
+  #define TU_BREAKPOINT() do                                                                                \
+  {                                                                                                         \
+    volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+    if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */            \
+  } while(0)
 #else
-#define TU_BREAKPOINT()
+  #define TU_BREAKPOINT()
 #endif
 
 /*------------------------------------------------------------------*/

src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c

@@ -69,7 +69,7 @@
  * - M3/M4 can transfer nbytes = 1023 (maximum)
  */
 enum {
-  #ifdef __ARM_ARCH_6M__  // Cortex M0/M0+
+  #if __ARM_ARCH_6M__  == 1 // Cortex M0/M0+
     DMA_NBYTES_MAX = 64
   #else
     DMA_NBYTES_MAX = 1023