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@@ -47,6 +47,7 @@
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//--------------------------------------------------------------------+
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#include "dcd.h"
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#include "dcd_lpc175x_6x.h"
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+#include "usbd_dcd.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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@@ -56,22 +57,192 @@ STATIC_ dcd_dma_descriptor_t* dcd_udca[32] ATTR_ALIGNED(128) TUSB_CFG_ATTR_USBRA
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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+static inline void endpoint_set_max_packet_size(uint8_t endpoint_idx, uint16_t max_packet_size) ATTR_ALWAYS_INLINE;
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+static inline void endpoint_set_max_packet_size(uint8_t endpoint_idx, uint16_t max_packet_size)
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+{
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+ LPC_USB->USBEpInd = endpoint_idx; // select index before setting packet size
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+ LPC_USB->USBMaxPSize = max_packet_size;
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+}
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+
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+static inline void sie_commamd_code (uint8_t phase, uint8_t code_data) ATTR_ALWAYS_INLINE;
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+static inline void sie_commamd_code (uint8_t phase, uint8_t code_data)
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+{
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+ LPC_USB->USBDevIntClr = (DEV_INT_COMMAND_CODE_EMPTY_MASK | DEV_INT_COMMAND_DATA_FULL_MASK);
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+ LPC_USB->USBCmdCode = (phase << 8) | (code_data << 16);
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+
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+ uint32_t const wait_flag = (phase == SIE_CMDPHASE_READ) ? DEV_INT_COMMAND_DATA_FULL_MASK : DEV_INT_COMMAND_CODE_EMPTY_MASK;
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+ while ((LPC_USB->USBDevIntSt & wait_flag) == 0); // TODO blocking forever potential
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+ LPC_USB->USBDevIntClr = wait_flag;
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+}
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+
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+static inline void sie_command_write (uint8_t cmd_code, uint8_t data_len, uint8_t data) ATTR_ALWAYS_INLINE;
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+static inline void sie_command_write (uint8_t cmd_code, uint8_t data_len, uint8_t data)
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+{
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+ sie_commamd_code(SIE_CMDPHASE_COMMAND, cmd_code);
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+
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+ if (data_len)
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+ {
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+ sie_commamd_code(SIE_CMDPHASE_WRITE, data);
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+ }
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+}
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+
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+static inline uint32_t sie_command_read (uint8_t cmd_code, uint8_t data_len) ATTR_ALWAYS_INLINE;
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+static inline uint32_t sie_command_read (uint8_t cmd_code, uint8_t data_len)
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+{
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+ // TODO multiple read
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+ sie_commamd_code(SIE_CMDPHASE_READ, cmd_code);
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+ return LPC_USB->USBCmdData;
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+}
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//--------------------------------------------------------------------+
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// IMPLEMENTATION
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//--------------------------------------------------------------------+
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+void endpoint_control_isr(uint8_t coreid)
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+{
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+ (void) coreid; // suppress compiler warning
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+ uint32_t const endpoint_int_status = LPC_USB->USBEpIntSt & LPC_USB->USBEpIntEn;
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+
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+ // control OUT
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+ if (endpoint_int_status & BIT_(0))
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+ {
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+ uint32_t const endpoint_status = sie_command_read(SIE_CMDCODE_ENDPOINT_SELECT+0, 1);
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+ if (endpoint_status & SIE_ENDPOINT_STATUS_SETUP_RECEIVED_MASK)
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+ {
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+ (void) sie_command_read(SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT+0, 1); // clear setup bit
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+
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+ // read endpoint
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+ LPC_USB->USBCtrl = SLAVE_CONTROL_READ_ENABLE_MASK; // logical endpoint = 0
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+ while ((LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_READY_MASK) == 0) {}
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+
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+ ASSERT_INT(8, LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_LENGTH_MASK, (void) 0);
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+
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+ uint32_t *p_setup = (uint32_t*) &usbd_devices[0].setup_packet;
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+ *p_setup = LPC_USB->USBRxData;
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+ p_setup += 4;
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+ *p_setup = LPC_USB->USBRxData;
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+ // TODO setup received callback
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+ usbd_isr(0, TUSB_EVENT_SETUP_RECEIVED);
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+ }else
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+ {
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+// ASSERT(false, (void) 0); // not current supported
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+ }
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+
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+ sie_command_write(SIE_CMDCODE_BUFFER_CLEAR, 0, 0);
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+ }
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+
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+ // control IN
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+ if (endpoint_int_status & BIT_(1))
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+ {
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+
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+ }
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+
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+ LPC_USB->USBEpIntClr = endpoint_int_status; // acknowledge interrupt
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+}
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+
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void dcd_isr(uint8_t coreid)
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{
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+ uint32_t device_int_status = LPC_USB->USBDevIntSt & LPC_USB->USBDevIntEn & DEV_INT_ALL_MASK;
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+ LPC_USB->USBDevIntClr = device_int_status;// Acknowledge handled interrupt
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+
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+ //------------- usb bus event -------------//
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+ if (device_int_status & DEV_INT_DEVICE_STATUS_MASK)
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+ {
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+ uint32_t dev_status_reg = sie_command_read(SIE_CMDCODE_DEVICE_STATUS, 1);
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+ if (dev_status_reg & SIE_DEV_STATUS_RESET_MASK)
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+ {
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+ usbd_isr(coreid, TUSB_EVENT_BUS_RESET);
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+ }
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+
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+ // TODO invoke some callbacks
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+ if (dev_status_reg & SIE_DEV_STATUS_CONNECT_CHANGE_MASK)
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+ {
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+
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+ }
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+ if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK)
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+ {
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+
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+ }
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+ }
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+
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+ //------------- slave mode, control endpoint -------------//
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+ if (device_int_status & DEV_INT_ENDPOINT_SLOW_MASK)
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+ {
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+ // only occur on control endpoint, all other use DMA
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+ endpoint_control_isr(coreid);
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+ }
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+
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+ if (device_int_status & DEV_INT_ERROR_MASK)
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+ {
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+ ASSERT(false, (void) 0);
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+ }
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}
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+//--------------------------------------------------------------------+
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+// USBD-DCD API
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+//--------------------------------------------------------------------+
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tusb_error_t dcd_init(void)
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+{
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+ //------------- user manual 11.13 usb device controller initialization -------------// LPC_USB->USBEpInd = 0;
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+ // step 6 : set up control endpoint
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+ endpoint_set_max_packet_size(0, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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+ endpoint_set_max_packet_size(1, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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+ while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0);
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+
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+ // step 7 : slave mode set up
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+ LPC_USB->USBEpIntEn = (uint32_t) BIN8(11); // control endpoint cannot use DMA, non-control all use DMA
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+
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+ LPC_USB->USBDevIntEn = (DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK);
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+ LPC_USB->USBDevIntClr = 0xFFFFFFFF; // clear all pending interrupt
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+
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+ LPC_USB->USBEpIntClr = 0xFFFFFFFF; // clear all pending interrupt
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+ LPC_USB->USBEpIntPri = 0; // same priority for all endpoint
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+
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+ // step 8 : DMA set up
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+ LPC_USB->USBEpDMADis = 0xFFFFFFFF; // firstly disable all dma
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+ LPC_USB->USBDMARClr = 0xFFFFFFFF; // clear all pending interrupt
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+ LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
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+ LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
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+ LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
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+
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+ for (uint8_t index = 0; index < DCD_MAX_DD; index++)
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+ {
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+ dcd_udca[index] = 0;
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+ }
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+ LPC_USB->USBUDCAH = (uint32_t) dcd_udca;
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+ LPC_USB->USBDMAIntEn = (DMA_INT_END_OF_XFER_MASK | DMA_INT_NEW_DD_REQUEST_MASK | DMA_INT_ERROR_MASK );
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+
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+ // clear all stall on control endpoint IN & OUT if any
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+ sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS , 0, 0);
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+ sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS + 1, 0, 0);
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+
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+ return TUSB_ERROR_NONE;
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+}
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+
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+tusb_error_t dcd_endpoint_configure(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc)
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{
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return TUSB_ERROR_NONE;
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}
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void dcd_controller_connect(uint8_t coreid)
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{
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+ sie_command_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1);
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+}
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+void dcd_device_set_address(uint8_t coreid, uint8_t dev_addr)
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+{
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+ sie_command_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable
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}
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+
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+void dcd_pipe_control_write_zero_length(uint8_t coreid)
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+{
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+ LPC_USB->USBCtrl = SLAVE_CONTROL_WRITE_ENABLE_MASK; // logical endpoint = 0
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+ LPC_USB->USBTxPLen = 0;
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+
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+ LPC_USB->USBCtrl = 0;
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+
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+ sie_command_write(SIE_CMDCODE_ENDPOINT_SELECT+1, 0, 0); // select control IN endpoint
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+ sie_command_write(SIE_CMDCODE_BUFFER_VALIDATE, 0, 0);
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+}
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+
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#endif
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