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@@ -48,20 +48,21 @@
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// Init these in dcd_init
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static uint8_t *next_buffer_ptr;
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-// USB_MAX_ENDPOINTS Endpoints, direction 0 for out and 1 for in.
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+// USB_MAX_ENDPOINTS Endpoints, direction TUSB_DIR_OUT for out and TUSB_DIR_IN for in.
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static struct hw_endpoint hw_endpoints[USB_MAX_ENDPOINTS][2] = {0};
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-static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, uint8_t in)
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+static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir)
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{
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- return &hw_endpoints[num][in];
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+ return &hw_endpoints[num][dir];
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}
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static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr)
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{
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uint8_t num = tu_edpt_number(ep_addr);
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- uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
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- return hw_endpoint_get_by_num(num, in);
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+ tusb_dir_t dir = tu_edpt_dir(ep_addr);
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+ return hw_endpoint_get_by_num(num, dir);
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}
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+
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static void _hw_endpoint_alloc(struct hw_endpoint *ep)
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{
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uint16_t size = tu_min16(64, ep->wMaxPacketSize);
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@@ -101,13 +102,11 @@ static void _hw_endpoint_alloc(struct hw_endpoint *ep)
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static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type)
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{
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- uint8_t num = tu_edpt_number(ep_addr);
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- bool in = ep_addr & TUSB_DIR_IN_MASK;
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+ const uint8_t num = tu_edpt_number(ep_addr);
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+ const tusb_dir_t dir = tu_edpt_dir(ep_addr);
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ep->ep_addr = ep_addr;
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- ep->in = in;
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// For device, IN is a tx transfer and OUT is an rx transfer
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- ep->rx = in == false;
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- ep->num = num;
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+ ep->rx = (dir == TUSB_DIR_OUT);
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// Response to a setup packet on EP0 starts with pid of 1
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ep->next_pid = num == 0 ? 1u : 0u;
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@@ -131,7 +130,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t
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ep->transfer_type = transfer_type;
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// Every endpoint has a buffer control register in dpram
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- if (ep->in)
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+ if (dir == TUSB_DIR_IN)
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{
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ep->buffer_control = &usb_dpram->ep_buf_ctrl[num].in;
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}
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@@ -143,7 +142,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t
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// Clear existing buffer control state
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*ep->buffer_control = 0;
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- if (ep->num == 0)
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+ if (num == 0)
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{
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// EP0 has no endpoint control register because
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// the buffer offsets are fixed
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@@ -155,7 +154,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t
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else
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{
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// Set the endpoint control register (starts at EP1, hence num-1)
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- if (in)
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+ if (dir == TUSB_DIR_IN)
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{
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ep->endpoint_control = &usb_dpram->ep_ctrl[num-1].in;
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}
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@@ -259,10 +258,10 @@ static void ep0_0len_status(void)
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static void _hw_endpoint_stall(struct hw_endpoint *ep)
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{
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assert(!ep->stalled);
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- if (ep->num == 0)
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+ if (tu_edpt_number(ep->ep_addr) == 0)
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{
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// A stall on EP0 has to be armed so it can be cleared on the next setup packet
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- usb_hw_set->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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+ usb_hw_set->ep_stall_arm = (tu_edpt_dir(ep->ep_addr) == TUSB_DIR_IN) ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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}
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_hw_endpoint_buffer_control_set_mask32(ep, USB_BUF_CTRL_STALL);
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ep->stalled = true;
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@@ -276,10 +275,10 @@ static void hw_endpoint_stall(uint8_t ep_addr)
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static void _hw_endpoint_clear_stall(struct hw_endpoint *ep)
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{
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- if (ep->num == 0)
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+ if (tu_edpt_number(ep->ep_addr) == 0)
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{
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// Probably already been cleared but no harm
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- usb_hw_clear->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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+ usb_hw_clear->ep_stall_arm = (tu_edpt_dir(ep->ep_addr) == TUSB_DIR_IN) ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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}
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_hw_endpoint_buffer_control_clear_mask32(ep, USB_BUF_CTRL_STALL);
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ep->stalled = false;
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