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@@ -106,14 +106,17 @@
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#include "tusb_option.h"
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#include "tusb_option.h"
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+#define STM32F1_FSDEV ( \
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+ defined(STM32F102x6) || defined(STM32F102xB) || \
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+ defined(STM32F103x6) || defined(STM32F103xB) || \
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+ defined(STM32F103xE) || defined(STM32F103xG) \
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+)
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+
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#if (TUSB_OPT_DEVICE_ENABLED) && ( \
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#if (TUSB_OPT_DEVICE_ENABLED) && ( \
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- ((CFG_TUSB_MCU) == OPT_MCU_STM32F0) || \
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- (((CFG_TUSB_MCU) == OPT_MCU_STM32F1) && ( \
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- defined(stm32f102x6) || defined(stm32f102xb) || \
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- defined(stm32f103x6) || defined(stm32f103xb) || \
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- defined(stm32f103xe) || defined(stm32f103xg) \
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- )) || \
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- ((CFG_TUSB_MCU) == OPT_MCU_STM32F3) \
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+ (CFG_TUSB_MCU == OPT_MCU_STM32F0 ) || \
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+ (CFG_TUSB_MCU == OPT_MCU_STM32F1 && STM32F1_FSDEV ) || \
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+ (CFG_TUSB_MCU == OPT_MCU_STM32F3 ) || \
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+ (CFG_TUSB_MCU == OPT_MCU_STM32L0 ) \
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)
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)
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// In order to reduce the dependance on HAL, we undefine this.
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// In order to reduce the dependance on HAL, we undefine this.
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@@ -165,7 +168,7 @@ typedef struct
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static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
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static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
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-static xfer_ctl_t* xfer_ctl_ptr(uint32_t epnum, uint32_t dir)
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+static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t epnum, uint32_t dir)
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{
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{
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return &xfer_status[epnum][dir];
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return &xfer_status[epnum][dir];
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}
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}
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@@ -252,9 +255,10 @@ void dcd_init (uint8_t rhport)
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void dcd_int_enable (uint8_t rhport)
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void dcd_int_enable (uint8_t rhport)
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{
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{
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(void)rhport;
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(void)rhport;
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-#if defined(STM32F0)
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+
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+#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0
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NVIC_EnableIRQ(USB_IRQn);
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NVIC_EnableIRQ(USB_IRQn);
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-#elif defined(STM32F3)
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+#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
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NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn);
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NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn);
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NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
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NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
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NVIC_EnableIRQ(USBWakeUp_IRQn);
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NVIC_EnableIRQ(USBWakeUp_IRQn);
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@@ -265,14 +269,15 @@ void dcd_int_enable (uint8_t rhport)
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void dcd_int_disable(uint8_t rhport)
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void dcd_int_disable(uint8_t rhport)
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{
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{
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(void)rhport;
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(void)rhport;
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-#if defined(STM32F0)
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+
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+#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0
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NVIC_DisableIRQ(USB_IRQn);
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NVIC_DisableIRQ(USB_IRQn);
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-#elif defined(STM32F3)
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+#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
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NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn);
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NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn);
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NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
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NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
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NVIC_DisableIRQ(USBWakeUp_IRQn);
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NVIC_DisableIRQ(USBWakeUp_IRQn);
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#else
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#else
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-#error Unknown arch in USB driver
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+ #error Unknown arch in USB driver
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#endif
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#endif
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// I'm not convinced that memory synchronization is completely necessary, but
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// I'm not convinced that memory synchronization is completely necessary, but
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// it isn't a bad idea.
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// it isn't a bad idea.
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@@ -305,7 +310,7 @@ void dcd_remote_wakeup(uint8_t rhport)
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{
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{
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(void) rhport;
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(void) rhport;
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- USB->CNTR |= (uint16_t)USB_CNTR_RESUME;
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+ USB->CNTR |= (uint16_t) USB_CNTR_RESUME;
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remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
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remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
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}
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}
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@@ -448,14 +453,11 @@ static uint16_t dcd_ep_ctr_handler(void)
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{
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{
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pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);// Await next SETUP
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pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);// Await next SETUP
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}
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}
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-
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}
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}
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-
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}
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}
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}
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}
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else /* Decode and service non control endpoints interrupt */
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else /* Decode and service non control endpoints interrupt */
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{
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{
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-
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/* process related endpoint register */
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/* process related endpoint register */
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wEPVal = pcd_get_endpoint(USB, EPindex);
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wEPVal = pcd_get_endpoint(USB, EPindex);
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if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT
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if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT
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@@ -809,7 +811,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
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// Interrupt handlers
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// Interrupt handlers
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-#if (CFG_TUSB_MCU) == (OPT_MCU_STM32F0)
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+#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0
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void USB_IRQHandler(void)
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void USB_IRQHandler(void)
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{
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{
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dcd_fs_irqHandler();
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dcd_fs_irqHandler();
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