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@@ -79,11 +79,42 @@ enum {
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INTR_NAK = TU_BIT(16)
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};
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-// PORTSC
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+// PORTSC1
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enum {
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- PORTSC_CURRENT_CONNECT_STATUS = TU_BIT(0),
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- PORTSC_FORCE_PORT_RESUME = TU_BIT(6),
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- PORTSC_SUSPEND = TU_BIT(7)
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+ PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0),
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+ PORTSC1_FORCE_PORT_RESUME = TU_BIT(6),
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+ PORTSC1_SUSPEND = TU_BIT(7),
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+ PORTSC1_FORCE_FULL_SPEED = TU_BIT(24),
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+};
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+
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+// OTGSC
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+enum {
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+ OTGSC_VBUS_DISCHARGE = TU_BIT(0),
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+ OTGSC_VBUS_CHARGE = TU_BIT(1),
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+// OTGSC_HWASSIST_AUTORESET = TU_BIT(2),
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+ OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode
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+ OTGSC_DATA_PULSING = TU_BIT(4),
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+ OTGSC_ID_PULLUP = TU_BIT(5),
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+// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6),
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+// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7),
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+ OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device
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+ OTGSC_A_VBUS_VALID = TU_BIT(9),
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+ OTGSC_A_SESSION_VALID = TU_BIT(10),
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+ OTGSC_B_SESSION_VALID = TU_BIT(11),
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+ OTGSC_B_SESSION_END = TU_BIT(12),
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+ OTGSC_1MS_TOGGLE = TU_BIT(13),
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+ OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14),
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+};
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+
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+// USBMode
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+enum {
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+ USBMODE_CM_DEVICE = 2,
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+ USBMODE_CM_HOST = 3,
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+
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+ USBMODE_SLOM = TU_BIT(3),
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+ USBMODE_SDIS = TU_BIT(4),
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+
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+ USBMODE_VBUS_POWER_SELCT = TU_BIT(5), // Enable for LPC18XX/43XX in host most only
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};
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// Device Registers
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@@ -258,9 +289,20 @@ static void bus_reset(uint8_t rhport)
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void dcd_init(uint8_t rhport)
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{
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+ tu_memclr(&_dcd_data, sizeof(dcd_data_t));
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+
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dcd_registers_t* const dcd_reg = DCD_REGS[rhport];
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- tu_memclr(&_dcd_data, sizeof(dcd_data_t));
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+ // Reset controller
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+ dcd_reg->USBCMD |= USBCMD_RESET;
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+ while( dcd_reg->USBCMD & USBCMD_RESET ) {}
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+
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+ // Set mode to device, must be set immediately after reset
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+ dcd_reg->USBMODE = USBMODE_CM_DEVICE;
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+ dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION;
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+
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+ // TODO Force fullspeed on non-highspeed port
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+ // dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
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dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment
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dcd_reg->USBSTS = dcd_reg->USBSTS;
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@@ -423,7 +465,7 @@ void dcd_isr(uint8_t rhport)
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if (int_status & INTR_SUSPEND)
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{
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- if (dcd_reg->PORTSC1 & PORTSC_SUSPEND)
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+ if (dcd_reg->PORTSC1 & PORTSC1_SUSPEND)
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{
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// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
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if ((dcd_reg->DEVICEADDR >> 25) & 0x0f)
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@@ -436,7 +478,7 @@ void dcd_isr(uint8_t rhport)
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// TODO disconnection does not generate interrupt !!!!!!
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// if (int_status & INTR_PORT_CHANGE)
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// {
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-// if ( !(dcd_reg->PORTSC1 & PORTSC_CURRENT_CONNECT_STATUS) )
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+// if ( !(dcd_reg->PORTSC1 & PORTSC1_CURRENT_CONNECT_STATUS) )
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// {
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// dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_UNPLUGGED };
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// dcd_event_handler(&event, true);
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