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+/**************************************************************************/
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+/*!
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+ @file msc_flash_qspi.c
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+ @author hathach (tinyusb.org)
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+
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+ @section LICENSE
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+
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+ Software License Agreement (BSD License)
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+
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+ Copyright (c) 2018, hathach (tinyusb.org)
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+ All rights reserved.
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+
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+ Redistribution and use in source and binary forms, with or without
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+ modification, are permitted provided that the following conditions are met:
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+ 1. Redistributions of source code must retain the above copyright
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+ notice, this list of conditions and the following disclaimer.
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+ 2. Redistributions in binary form must reproduce the above copyright
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+ notice, this list of conditions and the following disclaimer in the
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+ documentation and/or other materials provided with the distribution.
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+ 3. Neither the name of the copyright holders nor the
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+ names of its contributors may be used to endorse or promote products
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+ derived from this software without specific prior written permission.
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+
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+
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+ This file is part of the tinyusb stack.
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+*/
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+/**************************************************************************/
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+
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+#include "msc_app.h"
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+
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+#if CFG_TUD_MSC && defined (BOARD_MSC_FLASH_QSPI)
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+
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+void flash_read (void *dst, uint32_t src, int len);
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+void flash_write (uint32_t dst, const void *src, int len);
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+void flash_flush (void);
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+
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+//--------------------------------------------------------------------+
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+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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+//--------------------------------------------------------------------+
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+enum
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+{
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+ FLASH_STATE_IDLE,
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+ FLASH_STATE_BUSY,
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+ FLASH_STATE_COMPLETE
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+};
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+
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+volatile uint8_t _fl_state = FLASH_STATE_IDLE;
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+
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+void qspi_flash_complete (void)
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+{
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+ _fl_state = FLASH_STATE_COMPLETE;
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+}
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+
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+//------------- IMPLEMENTATION -------------//
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+// Callback invoked when received READ10 command.
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+// Copy disk's data to buffer (up to bufsize) and return number of copied bytes.
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+int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize)
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+{
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+ uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
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+
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+ switch ( _fl_state )
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+ {
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+ case FLASH_STATE_IDLE:
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+ _fl_state = FLASH_STATE_BUSY;
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+ flash_read(buffer, addr, bufsize);
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+ return 0; // data not ready
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+
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+ case FLASH_STATE_BUSY:
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+ return 0; // data not ready
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+
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+ case FLASH_STATE_COMPLETE:
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+ _fl_state = FLASH_STATE_IDLE;
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+ return bufsize;
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+
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+ default:
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+ _fl_state = FLASH_STATE_IDLE;
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+ return -1;
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+ }
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+}
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+
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+// Callback invoked when received WRITE10 command.
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+// Process data in buffer to disk's storage and return number of written bytes
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+int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize)
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+{
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+ uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
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+
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+ flash_write(addr, buffer, bufsize);
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+
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+ return bufsize;
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+}
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+
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+// Callback invoked when WRITE10 command is completed (status received and accepted by host).
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+// used to flush any pending cache.
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+void tud_msc_write10_complete_cb (uint8_t lun)
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+{
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+ (void) lun;
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+
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+ // flush pending cache when write10 is complete
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+ flash_flush();
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+}
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+
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+//--------------------------------------------------------------------+
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+// Flash caching
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+//--------------------------------------------------------------------+
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+#define FLASH_PAGE_SIZE 4096
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+
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+#define NO_CACHE 0xffffffff
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+
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+static uint32_t _fl_addr = NO_CACHE;
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+static uint8_t _fl_buf[FLASH_PAGE_SIZE] __attribute__((aligned(4)));
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+
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+void flash_flush (void)
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+{
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+ if ( _fl_addr == NO_CACHE ) return;
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+
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+ TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, _fl_addr),);
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+ while ( _fl_state != FLASH_STATE_COMPLETE )
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+ {
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+ }
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+ _fl_state = FLASH_STATE_IDLE;
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+
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+ TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_write(_fl_buf, FLASH_PAGE_SIZE, _fl_addr),);
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+ while ( _fl_state != FLASH_STATE_COMPLETE )
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+ {
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+ }
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+ _fl_state = FLASH_STATE_IDLE;
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+
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+ _fl_addr = NO_CACHE;
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+}
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+
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+void flash_write (uint32_t dst, const void *src, int len)
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+{
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+ uint32_t newAddr = dst & ~(FLASH_PAGE_SIZE - 1);
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+
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+ if ( newAddr != _fl_addr )
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+ {
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+ flash_flush();
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+ _fl_addr = newAddr;
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+
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+ flash_read(_fl_buf, newAddr, FLASH_PAGE_SIZE);
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+ }
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+
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+ memcpy(_fl_buf + (dst & (FLASH_PAGE_SIZE - 1)), src, len);
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+}
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+
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+void flash_read (void *dst, uint32_t src, int len)
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+{
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+ TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_read(dst, len, src),);
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+}
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+
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+
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+#endif
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