refactor[STM32][DMA]: unify DMA config descriptors in HAL driver configs

- migrate STM32 HAL driver DMA config macros to shared descriptor init helpers
- add overridable DMA priority and NVIC priority fields for board-level configs
- align SPI, UART, I2C, SDIO, and QSPI DMA descriptors across visible STM32 series configs
- simplify per-series DMA config definitions and reduce duplicated field assignments

bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,67 +21,127 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_TX_DMA_RCC,                \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_TX_DMA_IRQ,                \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_RX_DMA_RCC,                \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_RX_DMA_IRQ,                \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-10-30     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,45 +20,77 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/dma_config.h

@@ -120,6 +120,11 @@ extern "C" {
 #define SPI3_RX_DMA_RCC                 RCC_AHBENR_DMA2EN
 #define SPI3_RX_DMA_INSTANCE            DMA2_Channel1
 #define SPI3_RX_DMA_IRQ                 DMA2_Channel1_IRQn
+#elif defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE)
+#define UART5_DMA_TX_IRQHandler         DMA2_Channel1_IRQHandler
+#define UART5_TX_DMA_RCC                RCC_AHBENR_DMA2EN
+#define UART5_TX_DMA_INSTANCE           DMA2_Channel1
+#define UART5_TX_DMA_IRQ                DMA2_Channel1_IRQn
 #endif
 
 /* DMA2 channel2 */
@@ -149,6 +154,18 @@ extern "C" {
 #define SDIO_RX_DMA_RCC                 RCC_AHBENR_DMA2EN
 #define SDIO_RX_DMA_INSTANCE            DMA2_Channel4
 #define SDIO_RX_DMA_IRQ                 DMA2_Channel4_5_IRQn
+#elif defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE)
+#if defined(DMA2_Channel4_5_IRQHandler) && defined(DMA2_Channel4_5_IRQn)
+#define UART5_DMA_RX_IRQHandler         DMA2_Channel4_5_IRQHandler
+#define UART5_RX_DMA_IRQ                DMA2_Channel4_5_IRQn
+#elif defined(DMA2_Channel4_IRQHandler) && defined(DMA2_Channel4_IRQn)
+#define UART5_DMA_RX_IRQHandler         DMA2_Channel4_IRQHandler
+#define UART5_RX_DMA_IRQ                DMA2_Channel4_IRQn
+#else
+#error "Unsupported STM32F1 UART5 RX DMA IRQ mapping"
+#endif
+#define UART5_RX_DMA_RCC                RCC_AHBENR_DMA2EN
+#define UART5_RX_DMA_INSTANCE           DMA2_Channel4
 #endif
 
 /* DMA2 channel5 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/i2c_hard_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2024-02-06     Dyyt587   first version
  * 2024-04-23     Zeidan    Add I2Cx_xx_DMA_CONFIG
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 #ifndef __I2C_HARD_CONFIG_H__
 #define __I2C_HARD_CONFIG_H__
@@ -19,109 +20,199 @@ extern "C" {
 
 #ifdef BSP_USING_HARD_I2C1
 #ifndef I2C1_BUS_CONFIG
-#define I2C1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C1,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c1",                           \
-        .evirq_type = I2C1_EV_IRQn,                 \
-        .erirq_type = I2C1_ER_IRQn,                 \
+#define I2C1_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C1,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c1",           \
+        .evirq_type = I2C1_EV_IRQn, \
+        .erirq_type = I2C1_ER_IRQn, \
     }
 #endif /* I2C1_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C1 */
 
 #ifdef BSP_I2C1_TX_USING_DMA
+#ifndef I2C1_TX_DMA_PRIORITY
+#define I2C1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_TX_DMA_PRIORITY */
+
+#ifndef I2C1_TX_DMA_PREEMPT_PRIORITY
+#define I2C1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_TX_DMA_SUB_PRIORITY
+#define I2C1_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_TX_DMA_SUB_PRIORITY */
 #ifndef I2C1_TX_DMA_CONFIG
-#define I2C1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_TX_DMA_RCC,                 \
-        .Instance = I2C1_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_TX_DMA_IRQ,                 \
-    }
+#define I2C1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C1_TX_DMA_INSTANCE,         \
+        I2C1_TX_DMA_RCC,              \
+        I2C1_TX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C1_TX_DMA_PRIORITY,         \
+        I2C1_TX_DMA_PREEMPT_PRIORITY, \
+        I2C1_TX_DMA_SUB_PRIORITY)
 #endif /* I2C1_TX_DMA_CONFIG */
 #endif /* BSP_I2C1_TX_USING_DMA */
 
 #ifdef BSP_I2C1_RX_USING_DMA
+#ifndef I2C1_RX_DMA_PRIORITY
+#define I2C1_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_RX_DMA_PRIORITY */
+
+#ifndef I2C1_RX_DMA_PREEMPT_PRIORITY
+#define I2C1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_RX_DMA_SUB_PRIORITY
+#define I2C1_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_RX_DMA_SUB_PRIORITY */
 #ifndef I2C1_RX_DMA_CONFIG
-#define I2C1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_RX_DMA_RCC,                 \
-        .Instance = I2C1_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_RX_DMA_IRQ,                 \
-    }
+#define I2C1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C1_RX_DMA_INSTANCE,         \
+        I2C1_RX_DMA_RCC,              \
+        I2C1_RX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C1_RX_DMA_PRIORITY,         \
+        I2C1_RX_DMA_PREEMPT_PRIORITY, \
+        I2C1_RX_DMA_SUB_PRIORITY)
 #endif /* I2C1_RX_DMA_CONFIG */
 #endif /* BSP_I2C1_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C2
 #ifndef I2C2_BUS_CONFIG
-#define I2C2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C2,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c2",                           \
-        .evirq_type = I2C2_EV_IRQn,                 \
-        .erirq_type = I2C2_ER_IRQn,                 \
+#define I2C2_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C2,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c2",           \
+        .evirq_type = I2C2_EV_IRQn, \
+        .erirq_type = I2C2_ER_IRQn, \
     }
 #endif /* I2C2_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C2 */
 
 #ifdef BSP_I2C2_TX_USING_DMA
+#ifndef I2C2_TX_DMA_PRIORITY
+#define I2C2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_TX_DMA_PRIORITY */
+
+#ifndef I2C2_TX_DMA_PREEMPT_PRIORITY
+#define I2C2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_TX_DMA_SUB_PRIORITY
+#define I2C2_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_TX_DMA_SUB_PRIORITY */
 #ifndef I2C2_TX_DMA_CONFIG
-#define I2C2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_TX_DMA_RCC,                 \
-        .Instance = I2C2_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_TX_DMA_IRQ,                 \
-    }
+#define I2C2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C2_TX_DMA_INSTANCE,         \
+        I2C2_TX_DMA_RCC,              \
+        I2C2_TX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C2_TX_DMA_PRIORITY,         \
+        I2C2_TX_DMA_PREEMPT_PRIORITY, \
+        I2C2_TX_DMA_SUB_PRIORITY)
 #endif /* I2C2_TX_DMA_CONFIG */
 #endif /* BSP_I2C2_TX_USING_DMA */
 
 #ifdef BSP_I2C2_RX_USING_DMA
+#ifndef I2C2_RX_DMA_PRIORITY
+#define I2C2_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_RX_DMA_PRIORITY */
+
+#ifndef I2C2_RX_DMA_PREEMPT_PRIORITY
+#define I2C2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_RX_DMA_SUB_PRIORITY
+#define I2C2_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_RX_DMA_SUB_PRIORITY */
 #ifndef I2C2_RX_DMA_CONFIG
-#define I2C2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_RX_DMA_RCC,                 \
-        .Instance = I2C2_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_RX_DMA_IRQ,                 \
-    }
+#define I2C2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C2_RX_DMA_INSTANCE,         \
+        I2C2_RX_DMA_RCC,              \
+        I2C2_RX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C2_RX_DMA_PRIORITY,         \
+        I2C2_RX_DMA_PREEMPT_PRIORITY, \
+        I2C2_RX_DMA_SUB_PRIORITY)
 #endif /* I2C2_RX_DMA_CONFIG */
 #endif /* BSP_I2C2_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C3
 #ifndef I2C3_BUS_CONFIG
-#define I2C3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C3,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c3",                           \
-        .evirq_type = I2C3_EV_IRQn,                 \
-        .erirq_type = I2C3_ER_IRQn,                 \
+#define I2C3_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C3,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c3",           \
+        .evirq_type = I2C3_EV_IRQn, \
+        .erirq_type = I2C3_ER_IRQn, \
     }
 #endif /* I2C3_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C3 */
 
 #ifdef BSP_I2C3_TX_USING_DMA
+#ifndef I2C3_TX_DMA_PRIORITY
+#define I2C3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_TX_DMA_PRIORITY */
+
+#ifndef I2C3_TX_DMA_PREEMPT_PRIORITY
+#define I2C3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_TX_DMA_SUB_PRIORITY
+#define I2C3_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_TX_DMA_SUB_PRIORITY */
 #ifndef I2C3_TX_DMA_CONFIG
-#define I2C3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_TX_DMA_RCC,                 \
-        .Instance = I2C3_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_TX_DMA_IRQ,                 \
-    }
+#define I2C3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C3_TX_DMA_INSTANCE,         \
+        I2C3_TX_DMA_RCC,              \
+        I2C3_TX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C3_TX_DMA_PRIORITY,         \
+        I2C3_TX_DMA_PREEMPT_PRIORITY, \
+        I2C3_TX_DMA_SUB_PRIORITY)
 #endif /* I2C3_TX_DMA_CONFIG */
 #endif /* BSP_I2C3_TX_USING_DMA */
 
 #ifdef BSP_I2C3_RX_USING_DMA
+#ifndef I2C3_RX_DMA_PRIORITY
+#define I2C3_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_RX_DMA_PRIORITY */
+
+#ifndef I2C3_RX_DMA_PREEMPT_PRIORITY
+#define I2C3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_RX_DMA_SUB_PRIORITY
+#define I2C3_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_RX_DMA_SUB_PRIORITY */
 #ifndef I2C3_RX_DMA_CONFIG
-#define I2C3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_RX_DMA_RCC,                 \
-        .Instance = I2C3_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_RX_DMA_IRQ,                 \
-    }
+#define I2C3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C3_RX_DMA_INSTANCE,         \
+        I2C3_RX_DMA_RCC,              \
+        I2C3_RX_DMA_IRQ,              \
+        0U,                           \
+        0U,                           \
+        I2C3_RX_DMA_PRIORITY,         \
+        I2C3_RX_DMA_PREEMPT_PRIORITY, \
+        I2C3_RX_DMA_SUB_PRIORITY)
 #endif /* I2C3_RX_DMA_CONFIG */
 #endif /* BSP_I2C3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,15 +20,59 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDIO,                                \
-        .dma_rx.dma_rcc = RCC_AHBENR_DMA2EN,             \
-        .dma_tx.dma_rcc = RCC_AHBENR_DMA2EN,             \
-        .dma_rx.Instance = DMA2_Channel4,                \
-        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
-        .dma_tx.Instance = DMA2_Channel4,                \
-        .dma_tx.dma_irq = DMA2_Channel4_IRQn,            \
+#if defined(DMA2_Channel4_5_IRQn)
+#define SDIO_DMA_IRQ_VALUE                      DMA2_Channel4_5_IRQn
+#elif defined(DMA2_Channel4_IRQn)
+#define SDIO_DMA_IRQ_VALUE                      DMA2_Channel4_IRQn
+#else
+#error "Unsupported STM32F1 SDIO DMA IRQ mapping"
+#endif
+
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SDIO,                           \
+        .dma_rx = STM32_DMA_RX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHBENR_DMA2EN,                      \
+            SDIO_DMA_IRQ_VALUE,                     \
+            0U,                                     \
+            0U,                                     \
+            SDIO_RX_DMA_PRIORITY,                   \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_RX_DMA_SUB_PRIORITY),              \
+        .dma_tx = STM32_DMA_TX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHBENR_DMA2EN,                      \
+            SDIO_DMA_IRQ_VALUE,                     \
+            0U,                                     \
+            0U,                                     \
+            SDIO_TX_DMA_PRIORITY,                   \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_TX_DMA_SUB_PRIORITY),              \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,100 +21,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_TX_DMA_RCC,                \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_TX_DMA_IRQ,                \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_RX_DMA_RCC,                \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_RX_DMA_IRQ,                \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI3_TX_DMA_RCC,                \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI3_TX_DMA_IRQ,                \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI3_RX_DMA_RCC,                \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI3_RX_DMA_IRQ,                \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     BalanceTWK   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -15,162 +16,336 @@
 #include <rtthread.h>
 #include "dma_config.h"
 
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART4_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART4_RX_DMA_RCC,                               \
-        .dma_irq  = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART4_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART4_TX_DMA_RCC,                               \
-        .dma_irq  = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
 #endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG             \
+    {                            \
+        .name = "uart5",        \
+        .Instance = UART5,       \
+        .irq_type = UART5_IRQn,  \
     }
 #endif /* UART5_CONFIG */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = DMA_NOT_AVAILABLE,                              \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
+#if defined(BSP_UART5_TX_USING_DMA)
+#ifndef UART5_TX_DMA_PRIORITY
+#define UART5_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_TX_DMA_PRIORITY */
+
+#ifndef UART5_TX_DMA_PREEMPT_PRIORITY
+#define UART5_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_TX_DMA_SUB_PRIORITY
+#define UART5_TX_DMA_SUB_PRIORITY             0
+#endif /* UART5_TX_DMA_SUB_PRIORITY */
+
+#ifndef UART5_DMA_TX_CONFIG
+#define UART5_DMA_TX_CONFIG                    \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(          \
+        UART5_TX_DMA_INSTANCE,                 \
+        UART5_TX_DMA_RCC,                      \
+        UART5_TX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART5_TX_DMA_PRIORITY,                 \
+        UART5_TX_DMA_PREEMPT_PRIORITY,         \
+        UART5_TX_DMA_SUB_PRIORITY)
+#endif /* UART5_DMA_TX_CONFIG */
+#endif /* BSP_UART5_TX_USING_DMA */
+
 #ifdef __cplusplus
 }
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,71 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDIO,                                \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Stream3,                 \
-        .dma_rx.channel = DMA_CHANNEL_4,                 \
-        .dma_rx.dma_irq = DMA2_Stream3_IRQn,             \
-        .dma_tx.Instance = DMA2_Stream6,                 \
-        .dma_tx.channel = DMA_CHANNEL_4,                 \
-        .dma_tx.dma_irq = DMA2_Stream6_IRQn,             \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                          \
+    {                                            \
+        .Instance = SDIO,                        \
+        .dma_rx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream3,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream3_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_RX_DMA_PRIORITY,                \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_RX_DMA_SUB_PRIORITY,            \
+            DMA_PERIPH_TO_MEMORY,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
+        .dma_tx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream6,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream6_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_TX_DMA_PRIORITY,                \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_TX_DMA_SUB_PRIORITY,            \
+            DMA_MEMORY_TO_PERIPH,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,106 +21,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .channel = SPI1_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .channel = SPI1_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .channel = SPI2_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .channel = SPI2_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .channel = SPI3_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .channel = SPI3_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,210 +21,390 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .channel = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        UART1_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_TX_DMA_INSTANCE,                         \
-        .channel = UART1_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_TX_DMA_RCC,                               \
-        .dma_irq = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        UART1_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .channel = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        UART2_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_TX_DMA_INSTANCE,                         \
-        .channel = UART2_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_TX_DMA_RCC,                               \
-        .dma_irq = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        UART2_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .channel = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        UART3_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_TX_DMA_INSTANCE,                         \
-        .channel = UART3_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_TX_DMA_RCC,                               \
-        .dma_irq = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        UART3_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_RX_DMA_INSTANCE,                         \
-        .channel = UART4_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_RX_DMA_RCC,                               \
-        .dma_irq = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        UART4_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_TX_DMA_INSTANCE,                         \
-        .channel = UART4_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_TX_DMA_RCC,                               \
-        .dma_irq = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        UART4_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
-#endif /* BSP_UART4_RX_USING_DMA */
+#endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_RX_DMA_INSTANCE,                         \
-        .channel = UART5_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_RX_DMA_RCC,                               \
-        .dma_irq = UART5_RX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        UART5_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_UART5_TX_USING_DMA)
+#ifndef UART5_TX_DMA_PRIORITY
+#define UART5_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_TX_DMA_PRIORITY */
+
+#ifndef UART5_TX_DMA_PREEMPT_PRIORITY
+#define UART5_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_TX_DMA_SUB_PRIORITY
+#define UART5_TX_DMA_SUB_PRIORITY             0
+#endif /* UART5_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_TX_CONFIG
-#define UART5_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_TX_DMA_INSTANCE,                         \
-        .channel = UART5_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_TX_DMA_RCC,                               \
-        .dma_irq = UART5_TX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART5_TX_DMA_INSTANCE,         \
+        UART5_TX_DMA_RCC,              \
+        UART5_TX_DMA_IRQ,              \
+        UART5_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART5_TX_DMA_PRIORITY,         \
+        UART5_TX_DMA_PREEMPT_PRIORITY, \
+        UART5_TX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_TX_CONFIG */
 #endif /* BSP_UART5_TX_USING_DMA */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_USING_UART6)
 #ifndef UART6_CONFIG
-#define UART6_CONFIG                                                \
-    {                                                               \
-        .name = "uart6",                                            \
-        .Instance = USART6,                                         \
-        .irq_type = USART6_IRQn,                                    \
+#define UART6_CONFIG             \
+    {                            \
+        .name = "uart6",         \
+        .Instance = USART6,      \
+        .irq_type = USART6_IRQn, \
     }
 #endif /* UART6_CONFIG */
 
 #if defined(BSP_UART6_RX_USING_DMA)
+#ifndef UART6_RX_DMA_PRIORITY
+#define UART6_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_RX_DMA_PRIORITY */
+
+#ifndef UART6_RX_DMA_PREEMPT_PRIORITY
+#define UART6_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_RX_DMA_SUB_PRIORITY
+#define UART6_RX_DMA_SUB_PRIORITY             0
+#endif /* UART6_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_RX_CONFIG
-#define UART6_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_RX_DMA_INSTANCE,                         \
-        .channel = UART6_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_RX_DMA_RCC,                               \
-        .dma_irq = UART6_RX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART6_RX_DMA_INSTANCE,                 \
+        UART6_RX_DMA_RCC,                      \
+        UART6_RX_DMA_IRQ,                      \
+        UART6_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART6_RX_DMA_PRIORITY,                 \
+        UART6_RX_DMA_PREEMPT_PRIORITY,         \
+        UART6_RX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_RX_CONFIG */
 #endif /* BSP_UART6_RX_USING_DMA */
 
 #if defined(BSP_UART6_TX_USING_DMA)
+#ifndef UART6_TX_DMA_PRIORITY
+#define UART6_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_TX_DMA_PRIORITY */
+
+#ifndef UART6_TX_DMA_PREEMPT_PRIORITY
+#define UART6_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_TX_DMA_SUB_PRIORITY
+#define UART6_TX_DMA_SUB_PRIORITY             0
+#endif /* UART6_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_TX_CONFIG
-#define UART6_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_TX_DMA_INSTANCE,                         \
-        .channel = UART6_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_TX_DMA_RCC,                               \
-        .dma_irq = UART6_TX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART6_TX_DMA_INSTANCE,         \
+        UART6_TX_DMA_RCC,              \
+        UART6_TX_DMA_IRQ,              \
+        UART6_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART6_TX_DMA_PRIORITY,         \
+        UART6_TX_DMA_PREEMPT_PRIORITY, \
+        UART6_TX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_TX_CONFIG */
 #endif /* BSP_UART6_TX_USING_DMA */
 #endif /* BSP_USING_UART6 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/f3/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,105 +21,195 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .channel = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_TX_DMA_INSTANCE,                         \
-        .channel = UART1_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_TX_DMA_RCC,                               \
-        .dma_irq = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .channel = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_TX_DMA_INSTANCE,                         \
-        .channel = UART2_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_TX_DMA_RCC,                               \
-        .dma_irq = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .channel = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_TX_DMA_INSTANCE,                         \
-        .channel = UART3_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_TX_DMA_RCC,                               \
-        .dma_irq = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/dma_config.h

@@ -454,6 +454,12 @@ extern "C" {
 #define MEMTOMEM7_DMA_INSTANCE           DMA2_Stream7
 #define MEMTOMEM7_DMA_CHANNEL            DMA_CHANNEL_6
 #define MEMTOMEM7_DMA_IRQ                DMA2_Stream7_IRQn
+#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
+#define QSPI_DMA_IRQHandler              DMA2_Stream7_IRQHandler
+#define QSPI_DMA_RCC                     RCC_AHB1ENR_DMA2EN
+#define QSPI_DMA_INSTANCE                DMA2_Stream7
+#define QSPI_DMA_CHANNEL                 DMA_CHANNEL_3
+#define QSPI_DMA_IRQ                     DMA2_Stream7_IRQn
 #endif
 
 #ifdef __cplusplus

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/i2c_hard_config.h

@@ -8,6 +8,7 @@
  * 2024-02-06     Dyyt587   first version
  * 2024-04-23     Zeidan    Add I2Cx_xx_DMA_CONFIG
  * 2024-06-23     wdfk-prog Add I2C4 config entries
+ * 2026-04-13     wdfk-prog Unify DMA config descriptors
  */
 #ifndef __I2C_HARD_CONFIG_H__
 #define __I2C_HARD_CONFIG_H__
@@ -20,233 +21,273 @@ extern "C" {
 
 #ifdef BSP_USING_HARD_I2C1
 #ifndef I2C1_BUS_CONFIG
-#define I2C1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C1,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c1",                           \
-        .evirq_type = I2C1_EV_IRQn,                 \
-        .erirq_type = I2C1_ER_IRQn,                 \
+#define I2C1_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C1,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c1",           \
+        .evirq_type = I2C1_EV_IRQn, \
+        .erirq_type = I2C1_ER_IRQn, \
     }
 #endif /* I2C1_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C1 */
 
 #ifdef BSP_I2C1_TX_USING_DMA
+#ifndef I2C1_TX_DMA_PRIORITY
+#define I2C1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_TX_DMA_PRIORITY */
+
+#ifndef I2C1_TX_DMA_PREEMPT_PRIORITY
+#define I2C1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_TX_DMA_SUB_PRIORITY
+#define I2C1_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_TX_DMA_SUB_PRIORITY */
+
 #ifndef I2C1_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_TX_DMA_RCC,                 \
-        .Instance = I2C1_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_TX_DMA_IRQ,                 \
-        .channel = I2C1_TX_DMA_CHANNEL              \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_TX_DMA_RCC,                 \
-        .Instance = I2C1_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C1_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C1_TX_DMA_INSTANCE,         \
+        I2C1_TX_DMA_RCC,              \
+        I2C1_TX_DMA_IRQ,              \
+        I2C1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C1_TX_DMA_PRIORITY,         \
+        I2C1_TX_DMA_PREEMPT_PRIORITY, \
+        I2C1_TX_DMA_SUB_PRIORITY)
 #endif /* I2C1_TX_DMA_CONFIG */
 #endif /* BSP_I2C1_TX_USING_DMA */
 
 #ifdef BSP_I2C1_RX_USING_DMA
+#ifndef I2C1_RX_DMA_PRIORITY
+#define I2C1_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_RX_DMA_PRIORITY */
+
+#ifndef I2C1_RX_DMA_PREEMPT_PRIORITY
+#define I2C1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_RX_DMA_SUB_PRIORITY
+#define I2C1_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_RX_DMA_SUB_PRIORITY */
+
 #ifndef I2C1_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_RX_DMA_RCC,                 \
-        .Instance = I2C1_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_RX_DMA_IRQ,                 \
-        .channel = I2C1_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_RX_DMA_RCC,                 \
-        .Instance = I2C1_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C1_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C1_RX_DMA_INSTANCE,         \
+        I2C1_RX_DMA_RCC,              \
+        I2C1_RX_DMA_IRQ,              \
+        I2C1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C1_RX_DMA_PRIORITY,         \
+        I2C1_RX_DMA_PREEMPT_PRIORITY, \
+        I2C1_RX_DMA_SUB_PRIORITY)
 #endif /* I2C1_RX_DMA_CONFIG */
 #endif /* BSP_I2C1_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C2
 #ifndef I2C2_BUS_CONFIG
-#define I2C2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C2,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c2",                           \
-        .evirq_type = I2C2_EV_IRQn,                 \
-        .erirq_type = I2C2_ER_IRQn,                 \
+#define I2C2_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C2,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c2",           \
+        .evirq_type = I2C2_EV_IRQn, \
+        .erirq_type = I2C2_ER_IRQn, \
     }
 #endif /* I2C2_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C2 */
 
 #ifdef BSP_I2C2_TX_USING_DMA
+#ifndef I2C2_TX_DMA_PRIORITY
+#define I2C2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_TX_DMA_PRIORITY */
+
+#ifndef I2C2_TX_DMA_PREEMPT_PRIORITY
+#define I2C2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_TX_DMA_SUB_PRIORITY
+#define I2C2_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_TX_DMA_SUB_PRIORITY */
+
 #ifndef I2C2_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_TX_DMA_RCC,                 \
-        .Instance = I2C2_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_TX_DMA_IRQ,                 \
-        .channel = I2C2_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_TX_DMA_RCC,                 \
-        .Instance = I2C2_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C2_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C2_TX_DMA_INSTANCE,         \
+        I2C2_TX_DMA_RCC,              \
+        I2C2_TX_DMA_IRQ,              \
+        I2C2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C2_TX_DMA_PRIORITY,         \
+        I2C2_TX_DMA_PREEMPT_PRIORITY, \
+        I2C2_TX_DMA_SUB_PRIORITY)
 #endif /* I2C2_TX_DMA_CONFIG */
 #endif /* BSP_I2C2_TX_USING_DMA */
 
 #ifdef BSP_I2C2_RX_USING_DMA
+#ifndef I2C2_RX_DMA_PRIORITY
+#define I2C2_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_RX_DMA_PRIORITY */
+
+#ifndef I2C2_RX_DMA_PREEMPT_PRIORITY
+#define I2C2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_RX_DMA_SUB_PRIORITY
+#define I2C2_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_RX_DMA_SUB_PRIORITY */
+
 #ifndef I2C2_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_RX_DMA_RCC,                 \
-        .Instance = I2C2_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_RX_DMA_IRQ,                 \
-        .channel = I2C2_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_RX_DMA_RCC,                 \
-        .Instance = I2C2_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C2_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C2_RX_DMA_INSTANCE,         \
+        I2C2_RX_DMA_RCC,              \
+        I2C2_RX_DMA_IRQ,              \
+        I2C2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C2_RX_DMA_PRIORITY,         \
+        I2C2_RX_DMA_PREEMPT_PRIORITY, \
+        I2C2_RX_DMA_SUB_PRIORITY)
 #endif /* I2C2_RX_DMA_CONFIG */
 #endif /* BSP_I2C2_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C3
 #ifndef I2C3_BUS_CONFIG
-#define I2C3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C3,                           \
-        .timing = 100000,                           \
-        .timeout=0x1000,                            \
-        .name = "hwi2c3",                           \
-        .evirq_type = I2C3_EV_IRQn,                 \
-        .erirq_type = I2C3_ER_IRQn,                 \
+#define I2C3_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C3,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c3",           \
+        .evirq_type = I2C3_EV_IRQn, \
+        .erirq_type = I2C3_ER_IRQn, \
     }
 #endif /* I2C3_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C3 */
 
 #ifdef BSP_I2C3_TX_USING_DMA
+#ifndef I2C3_TX_DMA_PRIORITY
+#define I2C3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_TX_DMA_PRIORITY */
+
+#ifndef I2C3_TX_DMA_PREEMPT_PRIORITY
+#define I2C3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_TX_DMA_SUB_PRIORITY
+#define I2C3_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_TX_DMA_SUB_PRIORITY */
+
 #ifndef I2C3_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_TX_DMA_RCC,                 \
-        .Instance = I2C3_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_TX_DMA_IRQ,                 \
-        .channel = I2C3_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_TX_DMA_RCC,                 \
-        .Instance = I2C3_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C3_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C3_TX_DMA_INSTANCE,         \
+        I2C3_TX_DMA_RCC,              \
+        I2C3_TX_DMA_IRQ,              \
+        I2C3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C3_TX_DMA_PRIORITY,         \
+        I2C3_TX_DMA_PREEMPT_PRIORITY, \
+        I2C3_TX_DMA_SUB_PRIORITY)
 #endif /* I2C3_TX_DMA_CONFIG */
 #endif /* BSP_I2C3_TX_USING_DMA */
 
 #ifdef BSP_I2C3_RX_USING_DMA
+#ifndef I2C3_RX_DMA_PRIORITY
+#define I2C3_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_RX_DMA_PRIORITY */
+
+#ifndef I2C3_RX_DMA_PREEMPT_PRIORITY
+#define I2C3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_RX_DMA_SUB_PRIORITY
+#define I2C3_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_RX_DMA_SUB_PRIORITY */
+
 #ifndef I2C3_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_RX_DMA_RCC,                 \
-        .Instance = I2C3_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_RX_DMA_IRQ,                 \
-        .channel = I2C3_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_RX_DMA_RCC,                 \
-        .Instance = I2C3_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C3_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C3_RX_DMA_INSTANCE,         \
+        I2C3_RX_DMA_RCC,              \
+        I2C3_RX_DMA_IRQ,              \
+        I2C3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C3_RX_DMA_PRIORITY,         \
+        I2C3_RX_DMA_PREEMPT_PRIORITY, \
+        I2C3_RX_DMA_SUB_PRIORITY)
 #endif /* I2C3_RX_DMA_CONFIG */
 #endif /* BSP_I2C3_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C4
 #ifndef I2C4_BUS_CONFIG
-#define I2C4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C4,                           \
-        .timing = 100000,                           \
-        .timeout = 0x1000,                          \
-        .name = "hwi2c4",                           \
-        .evirq_type = I2C4_EV_IRQn,                 \
-        .erirq_type = I2C4_ER_IRQn,                 \
+#define I2C4_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C4,           \
+        .timing = 100000,           \
+        .timeout=0x1000,            \
+        .name = "hwi2c4",           \
+        .evirq_type = I2C4_EV_IRQn, \
+        .erirq_type = I2C4_ER_IRQn, \
     }
 #endif /* I2C4_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C4 */
 
 #ifdef BSP_I2C4_TX_USING_DMA
+#ifndef I2C4_TX_DMA_PRIORITY
+#define I2C4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C4_TX_DMA_PRIORITY */
+
+#ifndef I2C4_TX_DMA_PREEMPT_PRIORITY
+#define I2C4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C4_TX_DMA_SUB_PRIORITY
+#define I2C4_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C4_TX_DMA_SUB_PRIORITY */
+
 #ifndef I2C4_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_TX_DMA_RCC,                 \
-        .Instance = I2C4_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_TX_DMA_IRQ,                 \
-        .channel = I2C4_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_TX_DMA_RCC,                 \
-        .Instance = I2C4_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C4_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C4_TX_DMA_INSTANCE,         \
+        I2C4_TX_DMA_RCC,              \
+        I2C4_TX_DMA_IRQ,              \
+        I2C4_TX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C4_TX_DMA_PRIORITY,         \
+        I2C4_TX_DMA_PREEMPT_PRIORITY, \
+        I2C4_TX_DMA_SUB_PRIORITY)
 #endif /* I2C4_TX_DMA_CONFIG */
 #endif /* BSP_I2C4_TX_USING_DMA */
 
 #ifdef BSP_I2C4_RX_USING_DMA
+#ifndef I2C4_RX_DMA_PRIORITY
+#define I2C4_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C4_RX_DMA_PRIORITY */
+
+#ifndef I2C4_RX_DMA_PREEMPT_PRIORITY
+#define I2C4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C4_RX_DMA_SUB_PRIORITY
+#define I2C4_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C4_RX_DMA_SUB_PRIORITY */
+
 #ifndef I2C4_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_RX_DMA_RCC,                 \
-        .Instance = I2C4_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_RX_DMA_IRQ,                 \
-        .channel = I2C4_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_RX_DMA_RCC,                 \
-        .Instance = I2C4_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C4_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C4_RX_DMA_INSTANCE,         \
+        I2C4_RX_DMA_RCC,              \
+        I2C4_RX_DMA_IRQ,              \
+        I2C4_RX_DMA_CHANNEL,          \
+        0U,                           \
+        I2C4_RX_DMA_PRIORITY,         \
+        I2C4_RX_DMA_PREEMPT_PRIORITY, \
+        I2C4_RX_DMA_SUB_PRIORITY)
 #endif /* I2C4_RX_DMA_CONFIG */
 #endif /* BSP_I2C4_RX_USING_DMA */
 
@@ -254,4 +295,4 @@ extern "C" {
 }
 #endif
 
-#endif /*__I2C_CONFIG_H__ */
+#endif /* __I2C_HARD_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG                 \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX(   \
+        QSPI_DMA_INSTANCE,              \
+        QSPI_DMA_RCC,                   \
+        QSPI_DMA_IRQ,                   \
+        QSPI_DMA_CHANNEL,               \
+        0U,                             \
+        QSPI_DMA_PRIORITY,              \
+        QSPI_DMA_PREEMPT_PRIORITY,      \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,71 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDIO,                                \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Stream3,                 \
-        .dma_rx.channel = DMA_CHANNEL_4,                 \
-        .dma_rx.dma_irq = DMA2_Stream3_IRQn,             \
-        .dma_tx.Instance = DMA2_Stream6,                 \
-        .dma_tx.channel = DMA_CHANNEL_4,                 \
-        .dma_tx.dma_irq = DMA2_Stream6_IRQn,             \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                          \
+    {                                            \
+        .Instance = SDIO,                        \
+        .dma_rx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream3,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream3_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_RX_DMA_PRIORITY,                \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_RX_DMA_SUB_PRIORITY,            \
+            DMA_PERIPH_TO_MEMORY,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
+        .dma_tx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream6,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream6_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_TX_DMA_PRIORITY,                \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_TX_DMA_SUB_PRIORITY,            \
+            DMA_MEMORY_TO_PERIPH,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
     }
 
 #endif
@@ -39,6 +94,3 @@ extern "C" {
 #endif
 
 #endif /*__SDIO_CONFIG_H__ */
-
-
-

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-03     zylx         modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,179 +21,394 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
+
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .channel = SPI1_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
+
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .channel = SPI1_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
+
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .channel = SPI2_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
+
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .channel = SPI2_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
+
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .channel = SPI3_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
+
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .channel = SPI3_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI4
 #ifndef SPI4_BUS_CONFIG
-#define SPI4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI4,                           \
-        .bus_name = "spi4",                         \
-        .irq_type = SPI4_IRQn,                      \
+#define SPI4_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI4,      \
+        .bus_name = "spi4",    \
+        .irq_type = SPI4_IRQn, \
     }
 #endif /* SPI4_BUS_CONFIG */
 #endif /* BSP_USING_SPI4 */
 
 #ifdef BSP_SPI4_TX_USING_DMA
+#ifndef SPI4_TX_DMA_PRIORITY
+#define SPI4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI4_TX_DMA_PRIORITY */
+
+#ifndef SPI4_TX_DMA_PREEMPT_PRIORITY
+#define SPI4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_TX_DMA_SUB_PRIORITY
+#define SPI4_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_TX_DMA_SUB_PRIORITY */
+
 #ifndef SPI4_TX_DMA_CONFIG
-#define SPI4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_TX_DMA_RCC,                 \
-        .Instance = SPI4_TX_DMA_INSTANCE,           \
-        .channel = SPI4_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_TX_DMA_IRQ,                 \
-    }
+#define SPI4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI4_TX_DMA_INSTANCE,         \
+        SPI4_TX_DMA_RCC,              \
+        SPI4_TX_DMA_IRQ,              \
+        SPI4_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_TX_DMA_PRIORITY,         \
+        SPI4_TX_DMA_PREEMPT_PRIORITY, \
+        SPI4_TX_DMA_SUB_PRIORITY)
 #endif /* SPI4_TX_DMA_CONFIG */
 #endif /* BSP_SPI4_TX_USING_DMA */
 
 #ifdef BSP_SPI4_RX_USING_DMA
+#ifndef SPI4_RX_DMA_PRIORITY
+#define SPI4_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI4_RX_DMA_PRIORITY */
+
+#ifndef SPI4_RX_DMA_PREEMPT_PRIORITY
+#define SPI4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_RX_DMA_SUB_PRIORITY
+#define SPI4_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_RX_DMA_SUB_PRIORITY */
+
 #ifndef SPI4_RX_DMA_CONFIG
-#define SPI4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_RX_DMA_RCC,                 \
-        .Instance = SPI4_RX_DMA_INSTANCE,           \
-        .channel = SPI4_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_RX_DMA_IRQ,                 \
-    }
+#define SPI4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI4_RX_DMA_INSTANCE,         \
+        SPI4_RX_DMA_RCC,              \
+        SPI4_RX_DMA_IRQ,              \
+        SPI4_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_RX_DMA_PRIORITY,         \
+        SPI4_RX_DMA_PREEMPT_PRIORITY, \
+        SPI4_RX_DMA_SUB_PRIORITY)
 #endif /* SPI4_RX_DMA_CONFIG */
 #endif /* BSP_SPI4_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI5
 #ifndef SPI5_BUS_CONFIG
-#define SPI5_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI5,                           \
-        .bus_name = "spi5",                         \
-        .irq_type = SPI5_IRQn,                      \
+#define SPI5_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI5,      \
+        .bus_name = "spi5",    \
+        .irq_type = SPI5_IRQn, \
     }
 #endif /* SPI5_BUS_CONFIG */
 #endif /* BSP_USING_SPI5 */
 
 #ifdef BSP_SPI5_TX_USING_DMA
+#ifndef SPI5_TX_DMA_PRIORITY
+#define SPI5_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI5_TX_DMA_PRIORITY */
+
+#ifndef SPI5_TX_DMA_PREEMPT_PRIORITY
+#define SPI5_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_TX_DMA_SUB_PRIORITY
+#define SPI5_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_TX_DMA_SUB_PRIORITY */
+
 #ifndef SPI5_TX_DMA_CONFIG
-#define SPI5_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_TX_DMA_RCC,                 \
-        .Instance = SPI5_TX_DMA_INSTANCE,           \
-        .channel = SPI5_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_TX_DMA_IRQ,                 \
-    }
+#define SPI5_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI5_TX_DMA_INSTANCE,         \
+        SPI5_TX_DMA_RCC,              \
+        SPI5_TX_DMA_IRQ,              \
+        SPI5_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_TX_DMA_PRIORITY,         \
+        SPI5_TX_DMA_PREEMPT_PRIORITY, \
+        SPI5_TX_DMA_SUB_PRIORITY)
 #endif /* SPI5_TX_DMA_CONFIG */
 #endif /* BSP_SPI5_TX_USING_DMA */
 
 #ifdef BSP_SPI5_RX_USING_DMA
+#ifndef SPI5_RX_DMA_PRIORITY
+#define SPI5_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI5_RX_DMA_PRIORITY */
+
+#ifndef SPI5_RX_DMA_PREEMPT_PRIORITY
+#define SPI5_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_RX_DMA_SUB_PRIORITY
+#define SPI5_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_RX_DMA_SUB_PRIORITY */
+
 #ifndef SPI5_RX_DMA_CONFIG
-#define SPI5_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_RX_DMA_RCC,                 \
-        .Instance = SPI5_RX_DMA_INSTANCE,           \
-        .channel = SPI5_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_RX_DMA_IRQ,                 \
-    }
+#define SPI5_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI5_RX_DMA_INSTANCE,         \
+        SPI5_RX_DMA_RCC,              \
+        SPI5_RX_DMA_IRQ,              \
+        SPI5_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_RX_DMA_PRIORITY,         \
+        SPI5_RX_DMA_PREEMPT_PRIORITY, \
+        SPI5_RX_DMA_SUB_PRIORITY)
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 
+#ifdef BSP_USING_SPI6
+#ifndef SPI6_BUS_CONFIG
+#define SPI6_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI6,      \
+        .bus_name = "spi6",    \
+        .irq_type = SPI6_IRQn, \
+    }
+#endif /* SPI6_BUS_CONFIG */
+#endif /* BSP_USING_SPI6 */
+
+#ifdef BSP_SPI6_TX_USING_DMA
+#ifndef SPI6_TX_DMA_PRIORITY
+#define SPI6_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI6_TX_DMA_PRIORITY */
+
+#ifndef SPI6_TX_DMA_PREEMPT_PRIORITY
+#define SPI6_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI6_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI6_TX_DMA_SUB_PRIORITY
+#define SPI6_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI6_TX_DMA_SUB_PRIORITY */
+
+#ifndef SPI6_TX_DMA_CONFIG
+#define SPI6_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI6_TX_DMA_INSTANCE,         \
+        SPI6_TX_DMA_RCC,              \
+        SPI6_TX_DMA_IRQ,              \
+        SPI6_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI6_TX_DMA_PRIORITY,         \
+        SPI6_TX_DMA_PREEMPT_PRIORITY, \
+        SPI6_TX_DMA_SUB_PRIORITY)
+#endif /* SPI6_TX_DMA_CONFIG */
+#endif /* BSP_SPI6_TX_USING_DMA */
+
+#ifdef BSP_SPI6_RX_USING_DMA
+#ifndef SPI6_RX_DMA_PRIORITY
+#define SPI6_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI6_RX_DMA_PRIORITY */
+
+#ifndef SPI6_RX_DMA_PREEMPT_PRIORITY
+#define SPI6_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI6_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI6_RX_DMA_SUB_PRIORITY
+#define SPI6_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI6_RX_DMA_SUB_PRIORITY */
+
+#ifndef SPI6_RX_DMA_CONFIG
+#define SPI6_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI6_RX_DMA_INSTANCE,         \
+        SPI6_RX_DMA_RCC,              \
+        SPI6_RX_DMA_IRQ,              \
+        SPI6_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI6_RX_DMA_PRIORITY,         \
+        SPI6_RX_DMA_PREEMPT_PRIORITY, \
+        SPI6_RX_DMA_SUB_PRIORITY)
+#endif /* SPI6_RX_DMA_CONFIG */
+#endif /* BSP_SPI6_RX_USING_DMA */
+
 #ifdef __cplusplus
 }
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,280 +21,520 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .channel = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        UART1_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_TX_DMA_INSTANCE,                         \
-        .channel = UART1_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_TX_DMA_RCC,                               \
-        .dma_irq = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        UART1_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .channel = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        UART2_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_TX_DMA_INSTANCE,                         \
-        .channel = UART2_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_TX_DMA_RCC,                               \
-        .dma_irq = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        UART2_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .channel = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        UART3_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_TX_DMA_INSTANCE,                         \
-        .channel = UART3_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_TX_DMA_RCC,                               \
-        .dma_irq = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        UART3_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_RX_DMA_INSTANCE,                         \
-        .channel = UART4_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_RX_DMA_RCC,                               \
-        .dma_irq = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        UART4_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_TX_DMA_INSTANCE,                         \
-        .channel = UART4_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_TX_DMA_RCC,                               \
-        .dma_irq = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        UART4_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
-#endif /* BSP_UART4_RX_USING_DMA */
+#endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_RX_DMA_INSTANCE,                         \
-        .channel = UART5_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_RX_DMA_RCC,                               \
-        .dma_irq = UART5_RX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        UART5_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_UART5_TX_USING_DMA)
+#ifndef UART5_TX_DMA_PRIORITY
+#define UART5_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_TX_DMA_PRIORITY */
+
+#ifndef UART5_TX_DMA_PREEMPT_PRIORITY
+#define UART5_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_TX_DMA_SUB_PRIORITY
+#define UART5_TX_DMA_SUB_PRIORITY             0
+#endif /* UART5_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_TX_CONFIG
-#define UART5_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_TX_DMA_INSTANCE,                         \
-        .channel = UART5_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_TX_DMA_RCC,                               \
-        .dma_irq = UART5_TX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART5_TX_DMA_INSTANCE,         \
+        UART5_TX_DMA_RCC,              \
+        UART5_TX_DMA_IRQ,              \
+        UART5_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART5_TX_DMA_PRIORITY,         \
+        UART5_TX_DMA_PREEMPT_PRIORITY, \
+        UART5_TX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_TX_CONFIG */
 #endif /* BSP_UART5_TX_USING_DMA */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_USING_UART6)
 #ifndef UART6_CONFIG
-#define UART6_CONFIG                                                \
-    {                                                               \
-        .name = "uart6",                                            \
-        .Instance = USART6,                                         \
-        .irq_type = USART6_IRQn,                                    \
+#define UART6_CONFIG             \
+    {                            \
+        .name = "uart6",         \
+        .Instance = USART6,      \
+        .irq_type = USART6_IRQn, \
     }
 #endif /* UART6_CONFIG */
 
 #if defined(BSP_UART6_RX_USING_DMA)
+#ifndef UART6_RX_DMA_PRIORITY
+#define UART6_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_RX_DMA_PRIORITY */
+
+#ifndef UART6_RX_DMA_PREEMPT_PRIORITY
+#define UART6_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_RX_DMA_SUB_PRIORITY
+#define UART6_RX_DMA_SUB_PRIORITY             0
+#endif /* UART6_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_RX_CONFIG
-#define UART6_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_RX_DMA_INSTANCE,                         \
-        .channel = UART6_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_RX_DMA_RCC,                               \
-        .dma_irq = UART6_RX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART6_RX_DMA_INSTANCE,                 \
+        UART6_RX_DMA_RCC,                      \
+        UART6_RX_DMA_IRQ,                      \
+        UART6_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART6_RX_DMA_PRIORITY,                 \
+        UART6_RX_DMA_PREEMPT_PRIORITY,         \
+        UART6_RX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_RX_CONFIG */
 #endif /* BSP_UART6_RX_USING_DMA */
 
 #if defined(BSP_UART6_TX_USING_DMA)
+#ifndef UART6_TX_DMA_PRIORITY
+#define UART6_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_TX_DMA_PRIORITY */
+
+#ifndef UART6_TX_DMA_PREEMPT_PRIORITY
+#define UART6_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_TX_DMA_SUB_PRIORITY
+#define UART6_TX_DMA_SUB_PRIORITY             0
+#endif /* UART6_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_TX_CONFIG
-#define UART6_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_TX_DMA_INSTANCE,                         \
-        .channel = UART6_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_TX_DMA_RCC,                               \
-        .dma_irq = UART6_TX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART6_TX_DMA_INSTANCE,         \
+        UART6_TX_DMA_RCC,              \
+        UART6_TX_DMA_IRQ,              \
+        UART6_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART6_TX_DMA_PRIORITY,         \
+        UART6_TX_DMA_PREEMPT_PRIORITY, \
+        UART6_TX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_TX_CONFIG */
 #endif /* BSP_UART6_TX_USING_DMA */
 #endif /* BSP_USING_UART6 */
 
 #if defined(BSP_USING_UART7)
 #ifndef UART7_CONFIG
-#define UART7_CONFIG                                                \
-    {                                                               \
-        .name = "uart7",                                            \
-        .Instance = UART7,                                         \
-        .irq_type = UART7_IRQn,                                    \
+#define UART7_CONFIG            \
+    {                           \
+        .name = "uart7",        \
+        .Instance = UART7,      \
+        .irq_type = UART7_IRQn, \
     }
 #endif /* UART7_CONFIG */
 
 #if defined(BSP_UART7_RX_USING_DMA)
+#ifndef UART7_RX_DMA_PRIORITY
+#define UART7_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART7_RX_DMA_PRIORITY */
+
+#ifndef UART7_RX_DMA_PREEMPT_PRIORITY
+#define UART7_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART7_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART7_RX_DMA_SUB_PRIORITY
+#define UART7_RX_DMA_SUB_PRIORITY             0
+#endif /* UART7_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART7_DMA_RX_CONFIG
-#define UART7_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART7_RX_DMA_INSTANCE,                         \
-        .channel = UART7_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART7_RX_DMA_RCC,                               \
-        .dma_irq = UART7_RX_DMA_IRQ,                               \
-    }
+#define UART7_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART7_RX_DMA_INSTANCE,                 \
+        UART7_RX_DMA_RCC,                      \
+        UART7_RX_DMA_IRQ,                      \
+        UART7_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART7_RX_DMA_PRIORITY,                 \
+        UART7_RX_DMA_PREEMPT_PRIORITY,         \
+        UART7_RX_DMA_SUB_PRIORITY)
 #endif /* UART7_DMA_RX_CONFIG */
 #endif /* BSP_UART7_RX_USING_DMA */
 
 #if defined(BSP_UART7_TX_USING_DMA)
+#ifndef UART7_TX_DMA_PRIORITY
+#define UART7_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART7_TX_DMA_PRIORITY */
+
+#ifndef UART7_TX_DMA_PREEMPT_PRIORITY
+#define UART7_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART7_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART7_TX_DMA_SUB_PRIORITY
+#define UART7_TX_DMA_SUB_PRIORITY             0
+#endif /* UART7_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART7_DMA_TX_CONFIG
-#define UART7_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART7_TX_DMA_INSTANCE,                         \
-        .channel = UART7_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART7_TX_DMA_RCC,                               \
-        .dma_irq = UART7_TX_DMA_IRQ,                               \
-    }
+#define UART7_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART7_TX_DMA_INSTANCE,         \
+        UART7_TX_DMA_RCC,              \
+        UART7_TX_DMA_IRQ,              \
+        UART7_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART7_TX_DMA_PRIORITY,         \
+        UART7_TX_DMA_PREEMPT_PRIORITY, \
+        UART7_TX_DMA_SUB_PRIORITY)
 #endif /* UART7_DMA_TX_CONFIG */
 #endif /* BSP_UART7_TX_USING_DMA */
 #endif /* BSP_USING_UART7 */
 
 #if defined(BSP_USING_UART8)
 #ifndef UART8_CONFIG
-#define UART8_CONFIG                                                \
-    {                                                               \
-        .name = "uart8",                                            \
-        .Instance = UART8,                                         \
-        .irq_type = UART8_IRQn,                                    \
+#define UART8_CONFIG            \
+    {                           \
+        .name = "uart8",        \
+        .Instance = UART8,      \
+        .irq_type = UART8_IRQn, \
     }
 #endif /* UART8_CONFIG */
 
 #if defined(BSP_UART8_RX_USING_DMA)
+#ifndef UART8_RX_DMA_PRIORITY
+#define UART8_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART8_RX_DMA_PRIORITY */
+
+#ifndef UART8_RX_DMA_PREEMPT_PRIORITY
+#define UART8_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART8_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART8_RX_DMA_SUB_PRIORITY
+#define UART8_RX_DMA_SUB_PRIORITY             0
+#endif /* UART8_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART8_DMA_RX_CONFIG
-#define UART8_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART8_RX_DMA_INSTANCE,                         \
-        .channel = UART8_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART8_RX_DMA_RCC,                               \
-        .dma_irq = UART8_RX_DMA_IRQ,                               \
-    }
+#define UART8_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART8_RX_DMA_INSTANCE,                 \
+        UART8_RX_DMA_RCC,                      \
+        UART8_RX_DMA_IRQ,                      \
+        UART8_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART8_RX_DMA_PRIORITY,                 \
+        UART8_RX_DMA_PREEMPT_PRIORITY,         \
+        UART8_RX_DMA_SUB_PRIORITY)
 #endif /* UART8_DMA_RX_CONFIG */
 #endif /* BSP_UART8_RX_USING_DMA */
 
 #if defined(BSP_UART8_TX_USING_DMA)
+#ifndef UART8_TX_DMA_PRIORITY
+#define UART8_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART8_TX_DMA_PRIORITY */
+
+#ifndef UART8_TX_DMA_PREEMPT_PRIORITY
+#define UART8_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART8_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART8_TX_DMA_SUB_PRIORITY
+#define UART8_TX_DMA_SUB_PRIORITY             0
+#endif /* UART8_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART8_DMA_TX_CONFIG
-#define UART8_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART8_TX_DMA_INSTANCE,                         \
-        .channel = UART8_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART8_TX_DMA_RCC,                               \
-        .dma_irq = UART8_TX_DMA_IRQ,                               \
-    }
+#define UART8_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART8_TX_DMA_INSTANCE,         \
+        UART8_TX_DMA_RCC,              \
+        UART8_TX_DMA_IRQ,              \
+        UART8_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART8_TX_DMA_PRIORITY,         \
+        UART8_TX_DMA_PREEMPT_PRIORITY, \
+        UART8_TX_DMA_SUB_PRIORITY)
 #endif /* UART8_DMA_TX_CONFIG */
 #endif /* BSP_UART8_TX_USING_DMA */
 #endif /* BSP_USING_UART8 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        QSPI_DMA_CHANNEL,             \
+        0U,                           \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,71 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDMMC1,                              \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Stream3,                 \
-        .dma_rx.channel = DMA_CHANNEL_4,                 \
-        .dma_rx.dma_irq = DMA2_Stream3_IRQn,             \
-        .dma_tx.Instance = DMA2_Stream6,                 \
-        .dma_tx.channel = DMA_CHANNEL_4,                 \
-        .dma_tx.dma_irq = DMA2_Stream6_IRQn,             \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                          \
+    {                                            \
+        .Instance = SDMMC1,                      \
+        .dma_rx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream3,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream3_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_RX_DMA_PRIORITY,                \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_RX_DMA_SUB_PRIORITY,            \
+            DMA_PERIPH_TO_MEMORY,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
+        .dma_tx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream6,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream6_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_TX_DMA_PRIORITY,                \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_TX_DMA_SUB_PRIORITY,            \
+            DMA_MEMORY_TO_PERIPH,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,176 +20,316 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .channel = SPI1_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .channel = SPI1_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .channel = SPI2_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .channel = SPI2_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .channel = SPI3_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .channel = SPI3_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI4
 #ifndef SPI4_BUS_CONFIG
-#define SPI4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI4,                           \
-        .bus_name = "spi4",                         \
-        .irq_type = SPI4_IRQn,                      \
+#define SPI4_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI4,      \
+        .bus_name = "spi4",    \
+        .irq_type = SPI4_IRQn, \
     }
 #endif /* SPI4_BUS_CONFIG */
 #endif /* BSP_USING_SPI4 */
 
 #ifdef BSP_SPI4_TX_USING_DMA
+#ifndef SPI4_TX_DMA_PRIORITY
+#define SPI4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI4_TX_DMA_PRIORITY */
+
+#ifndef SPI4_TX_DMA_PREEMPT_PRIORITY
+#define SPI4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_TX_DMA_SUB_PRIORITY
+#define SPI4_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_TX_DMA_SUB_PRIORITY */
 #ifndef SPI4_TX_DMA_CONFIG
-#define SPI4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_TX_DMA_RCC,                 \
-        .Instance = SPI4_TX_DMA_INSTANCE,           \
-        .channel = SPI4_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_TX_DMA_IRQ,                 \
-    }
+#define SPI4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI4_TX_DMA_INSTANCE,         \
+        SPI4_TX_DMA_RCC,              \
+        SPI4_TX_DMA_IRQ,              \
+        SPI4_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_TX_DMA_PRIORITY,         \
+        SPI4_TX_DMA_PREEMPT_PRIORITY, \
+        SPI4_TX_DMA_SUB_PRIORITY)
 #endif /* SPI4_TX_DMA_CONFIG */
 #endif /* BSP_SPI4_TX_USING_DMA */
 
 #ifdef BSP_SPI4_RX_USING_DMA
+#ifndef SPI4_RX_DMA_PRIORITY
+#define SPI4_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI4_RX_DMA_PRIORITY */
+
+#ifndef SPI4_RX_DMA_PREEMPT_PRIORITY
+#define SPI4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_RX_DMA_SUB_PRIORITY
+#define SPI4_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_RX_DMA_SUB_PRIORITY */
 #ifndef SPI4_RX_DMA_CONFIG
-#define SPI4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_RX_DMA_RCC,                 \
-        .Instance = SPI4_RX_DMA_INSTANCE,           \
-        .channel = SPI4_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_RX_DMA_IRQ,                 \
-    }
+#define SPI4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI4_RX_DMA_INSTANCE,         \
+        SPI4_RX_DMA_RCC,              \
+        SPI4_RX_DMA_IRQ,              \
+        SPI4_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_RX_DMA_PRIORITY,         \
+        SPI4_RX_DMA_PREEMPT_PRIORITY, \
+        SPI4_RX_DMA_SUB_PRIORITY)
 #endif /* SPI4_RX_DMA_CONFIG */
 #endif /* BSP_SPI4_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI5
 #ifndef SPI5_BUS_CONFIG
-#define SPI5_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI5,                           \
-        .bus_name = "spi5",                         \
-        .irq_type = SPI5_IRQn,                      \
+#define SPI5_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI5,      \
+        .bus_name = "spi5",    \
+        .irq_type = SPI5_IRQn, \
     }
 #endif /* SPI5_BUS_CONFIG */
 #endif /* BSP_USING_SPI5 */
 
 #ifdef BSP_SPI5_TX_USING_DMA
+#ifndef SPI5_TX_DMA_PRIORITY
+#define SPI5_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI5_TX_DMA_PRIORITY */
+
+#ifndef SPI5_TX_DMA_PREEMPT_PRIORITY
+#define SPI5_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_TX_DMA_SUB_PRIORITY
+#define SPI5_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_TX_DMA_SUB_PRIORITY */
 #ifndef SPI5_TX_DMA_CONFIG
-#define SPI5_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_TX_DMA_RCC,                 \
-        .Instance = SPI5_TX_DMA_INSTANCE,           \
-        .channel = SPI5_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_TX_DMA_IRQ,                 \
-    }
+#define SPI5_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI5_TX_DMA_INSTANCE,         \
+        SPI5_TX_DMA_RCC,              \
+        SPI5_TX_DMA_IRQ,              \
+        SPI5_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_TX_DMA_PRIORITY,         \
+        SPI5_TX_DMA_PREEMPT_PRIORITY, \
+        SPI5_TX_DMA_SUB_PRIORITY)
 #endif /* SPI5_TX_DMA_CONFIG */
 #endif /* BSP_SPI5_TX_USING_DMA */
 
 #ifdef BSP_SPI5_RX_USING_DMA
+#ifndef SPI5_RX_DMA_PRIORITY
+#define SPI5_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI5_RX_DMA_PRIORITY */
+
+#ifndef SPI5_RX_DMA_PREEMPT_PRIORITY
+#define SPI5_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_RX_DMA_SUB_PRIORITY
+#define SPI5_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_RX_DMA_SUB_PRIORITY */
 #ifndef SPI5_RX_DMA_CONFIG
-#define SPI5_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_RX_DMA_RCC,                 \
-        .Instance = SPI5_RX_DMA_INSTANCE,           \
-        .channel = SPI5_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_RX_DMA_IRQ,                 \
-    }
+#define SPI5_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI5_RX_DMA_INSTANCE,         \
+        SPI5_RX_DMA_RCC,              \
+        SPI5_RX_DMA_IRQ,              \
+        SPI5_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_RX_DMA_PRIORITY,         \
+        SPI5_RX_DMA_PREEMPT_PRIORITY, \
+        SPI5_RX_DMA_SUB_PRIORITY)
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-05     zylx         modify dma support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,139 +21,229 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .channel = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        UART1_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .channel = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        UART2_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .channel = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        UART3_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART4_RX_DMA_INSTANCE,                         \
-        .channel = UART4_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_RX_DMA_RCC,                               \
-        .dma_irq = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        UART4_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART5_RX_DMA_INSTANCE,                         \
-        .channel = UART5_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_RX_DMA_RCC,                               \
-        .dma_irq = UART5_RX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        UART5_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_USING_UART6)
 #ifndef UART6_CONFIG
-#define UART6_CONFIG                                                \
-    {                                                               \
-        .name = "uart6",                                            \
-        .Instance = USART6,                                          \
-        .irq_type = USART6_IRQn,                                     \
+#define UART6_CONFIG             \
+    {                            \
+        .name = "uart6",         \
+        .Instance = USART6,      \
+        .irq_type = USART6_IRQn, \
     }
 #endif /* UART6_CONFIG */
 #endif /* BSP_USING_UART6 */
 
 #if defined(BSP_UART6_RX_USING_DMA)
+#ifndef UART6_RX_DMA_PRIORITY
+#define UART6_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_RX_DMA_PRIORITY */
+
+#ifndef UART6_RX_DMA_PREEMPT_PRIORITY
+#define UART6_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_RX_DMA_SUB_PRIORITY
+#define UART6_RX_DMA_SUB_PRIORITY             0
+#endif /* UART6_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_RX_CONFIG
-#define UART6_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART6_RX_DMA_INSTANCE,                         \
-        .channel = UART6_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_RX_DMA_RCC,                               \
-        .dma_irq = UART6_RX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART6_RX_DMA_INSTANCE,                 \
+        UART6_RX_DMA_RCC,                      \
+        UART6_RX_DMA_IRQ,                      \
+        UART6_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART6_RX_DMA_PRIORITY,                 \
+        UART6_RX_DMA_PREEMPT_PRIORITY,         \
+        UART6_RX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_RX_CONFIG */
 #endif /* BSP_UART6_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-01-05     zylx         first version
  * 2019-01-08     SummerGift   clean up the code
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,80 +21,136 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .request = SPI1_TX_DMA_REQUEST,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_REQUEST,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .request = SPI1_RX_DMA_REQUEST,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_RX_DMA_REQUEST,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
 #if defined(STM32G0B0xx) || defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_3_IRQn,                    \
+#define SPI2_BUS_CONFIG          \
+    {                            \
+        .Instance = SPI2,        \
+        .bus_name = "spi2",      \
+        .irq_type = SPI2_3_IRQn, \
     }
 #else
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* defined(STM32G0B0xx) || defined(STM32G0B1xx) || defined(STM32G0C1xx) */
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .request = SPI2_TX_DMA_REQUEST,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_TX_DMA_REQUEST,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .request = SPI2_RX_DMA_REQUEST,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_RX_DMA_REQUEST,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-10-30     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,252 +21,375 @@ extern "C" {
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
 #if defined(STM32G071xx) || defined(STM32G081xx)
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = USART3_4_LPUART1_IRQn,                          \
+#define LPUART1_CONFIG                     \
+    {                                      \
+        .name = "lpuart1",                 \
+        .Instance = LPUART1,               \
+        .irq_type = USART3_4_LPUART1_IRQn, \
     }
 #elif defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = USART3_4_5_6_LPUART1_IRQn,                      \
+#define LPUART1_CONFIG                         \
+    {                                          \
+        .name = "lpuart1",                     \
+        .Instance = LPUART1,                   \
+        .irq_type = USART3_4_5_6_LPUART1_IRQn, \
     }
 #endif /* defined(STM32G071xx) || defined(STM32G081xx) */
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request =  LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        0U,                                    \
+        LPUART1_RX_DMA_REQUEST,                \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request =  UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request =  UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        UART1_TX_DMA_REQUEST,          \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
 #if defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_LPUART2_IRQn ,                           \
+#define UART2_CONFIG                      \
+    {                                     \
+        .name = "uart2",                  \
+        .Instance = USART2,               \
+        .irq_type = USART2_LPUART2_IRQn , \
     }
 #else
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request =  UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request =  UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_REQUEST,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
 #if defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_4_5_6_LPUART1_IRQn,                      \
+#define UART3_CONFIG                           \
+    {                                          \
+        .name = "uart3",                       \
+        .Instance = USART3,                    \
+        .irq_type = USART3_4_5_6_LPUART1_IRQn, \
     }
 #elif defined(STM32G070xx)
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_4_IRQn,                                  \
+#define UART3_CONFIG               \
+    {                              \
+        .name = "uart3",           \
+        .Instance = USART3,        \
+        .irq_type = USART3_4_IRQn, \
     }
 #elif defined(STM32G071xx) || defined(STM32G081xx)
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_4_LPUART1_IRQn,                          \
+#define UART3_CONFIG                       \
+    {                                      \
+        .name = "uart3",                   \
+        .Instance = USART3,                \
+        .irq_type = USART3_4_LPUART1_IRQn, \
     }
 #elif defined(STM32G0B0xx)
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_4_5_6_IRQn,                              \
+#define UART3_CONFIG                   \
+    {                                  \
+        .name = "uart3",               \
+        .Instance = USART3,            \
+        .irq_type = USART3_4_5_6_IRQn, \
     }
 #else
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request =  UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
 #if defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = USART4,                                         \
-        .irq_type = USART3_4_5_6_LPUART1_IRQn,                      \
+#define UART4_CONFIG                           \
+    {                                          \
+        .name = "uart4",                       \
+        .Instance = USART4,                    \
+        .irq_type = USART3_4_5_6_LPUART1_IRQn, \
     }
 #elif defined(STM32G070xx)
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = USART4,                                         \
-        .irq_type = USART3_4_IRQn,                                  \
+#define UART4_CONFIG               \
+    {                              \
+        .name = "uart4",           \
+        .Instance = USART4,        \
+        .irq_type = USART3_4_IRQn, \
     }
 #elif defined(STM32G071xx) || defined(STM32G081xx)
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = USART4,                                         \
-        .irq_type = USART3_4_LPUART1_IRQn,                          \
+#define UART4_CONFIG                       \
+    {                                      \
+        .name = "uart4",                   \
+        .Instance = USART4,                \
+        .irq_type = USART3_4_LPUART1_IRQn, \
     }
 #elif defined(STM32G0B0xx)
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = USART4,                                         \
-        .irq_type = USART3_4_5_6_IRQn,                              \
+#define UART4_CONFIG                   \
+    {                                  \
+        .name = "uart4",               \
+        .Instance = USART4,            \
+        .irq_type = USART3_4_5_6_IRQn, \
     }
 #else
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = USART4,                                         \
-        .irq_type = USART4_IRQn,                                    \
+#define UART4_CONFIG             \
+    {                            \
+        .name = "uart4",         \
+        .Instance = USART4,      \
+        .irq_type = USART4_IRQn, \
     }
 #endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
 #endif /* UART4_CONFIG */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART4_RX_DMA_INSTANCE,                          \
-        .request =  UART4_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART4_RX_DMA_RCC,                               \
-        .dma_irq  = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART4_RX_DMA_REQUEST,                  \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
 #if defined(STM32G0B1xx) || defined(STM32G0C1xx)
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = USART3_4_5_6_LPUART1_IRQn,                      \
+#define UART5_CONFIG                           \
+    {                                          \
+        .name = "uart5",                       \
+        .Instance = UART5,                     \
+        .irq_type = USART3_4_5_6_LPUART1_IRQn, \
     }
 #elif defined(STM32G0B0xx)
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = USART3_4_5_6_IRQn,                              \
+#define UART5_CONFIG                   \
+    {                                  \
+        .name = "uart5",               \
+        .Instance = UART5,             \
+        .irq_type = USART3_4_5_6_IRQn, \
     }
 #else
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
 #endif /* UART5_CONFIG */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = DMA_NOT_AVAILABLE,                              \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART5_RX_DMA_REQUEST,                  \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/dma_config.h

@@ -193,6 +193,12 @@ extern "C" {
 #define UART1_RX_DMA_INSTANCE           DMA2_Stream2
 #define UART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
 #define UART1_RX_DMA_IRQ                DMA2_Stream2_IRQn
+#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
+#define QSPI_DMA_IRQHandler             DMA2_Stream2_IRQHandler
+#define QSPI_DMA_RCC                    RCC_AHB1ENR_DMA2EN
+#define QSPI_DMA_INSTANCE               DMA2_Stream2
+#define QSPI_DMA_CHANNEL                DMA_CHANNEL_11
+#define QSPI_DMA_IRQ                    DMA2_Stream2_IRQn
 #endif
 
 /* DMA2 stream3 */
@@ -274,6 +280,12 @@ extern "C" {
 #define UART1_TX_DMA_INSTANCE           DMA2_Stream7
 #define UART1_TX_DMA_CHANNEL            DMA_CHANNEL_4
 #define UART1_TX_DMA_IRQ                DMA2_Stream7_IRQn
+#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
+#define QSPI_DMA_IRQHandler             DMA2_Stream7_IRQHandler
+#define QSPI_DMA_RCC                    RCC_AHB1ENR_DMA2EN
+#define QSPI_DMA_INSTANCE               DMA2_Stream7
+#define QSPI_DMA_CHANNEL                DMA_CHANNEL_3
+#define QSPI_DMA_IRQ                    DMA2_Stream7_IRQn
 #endif
 
 #ifdef __cplusplus

bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG                 \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX(   \
+        QSPI_DMA_INSTANCE,              \
+        QSPI_DMA_RCC,                   \
+        QSPI_DMA_IRQ,                   \
+        QSPI_DMA_CHANNEL,               \
+        0U,                             \
+        QSPI_DMA_PRIORITY,              \
+        QSPI_DMA_PREEMPT_PRIORITY,      \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,71 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDIO,                                \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Stream3,                 \
-        .dma_rx.channel = DMA_CHANNEL_4,                 \
-        .dma_rx.dma_irq = DMA2_Stream3_IRQn,             \
-        .dma_tx.Instance = DMA2_Stream6,                 \
-        .dma_tx.channel = DMA_CHANNEL_4,                 \
-        .dma_tx.dma_irq = DMA2_Stream6_IRQn,             \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                          \
+    {                                            \
+        .Instance = SDIO,                        \
+        .dma_rx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream3,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream3_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_RX_DMA_PRIORITY,                \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_RX_DMA_SUB_PRIORITY,            \
+            DMA_PERIPH_TO_MEMORY,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
+        .dma_tx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream6,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream6_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_TX_DMA_PRIORITY,                \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_TX_DMA_SUB_PRIORITY,            \
+            DMA_MEMORY_TO_PERIPH,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-03     zylx         modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,176 +21,316 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .channel = SPI1_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .channel = SPI1_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .channel = SPI2_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .channel = SPI2_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .channel = SPI3_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .channel = SPI3_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI4
 #ifndef SPI4_BUS_CONFIG
-#define SPI4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI4,                           \
-        .bus_name = "spi4",                         \
-        .irq_type = SPI4_IRQn,                      \
+#define SPI4_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI4,      \
+        .bus_name = "spi4",    \
+        .irq_type = SPI4_IRQn, \
     }
 #endif /* SPI4_BUS_CONFIG */
 #endif /* BSP_USING_SPI4 */
 
 #ifdef BSP_SPI4_TX_USING_DMA
+#ifndef SPI4_TX_DMA_PRIORITY
+#define SPI4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI4_TX_DMA_PRIORITY */
+
+#ifndef SPI4_TX_DMA_PREEMPT_PRIORITY
+#define SPI4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_TX_DMA_SUB_PRIORITY
+#define SPI4_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_TX_DMA_SUB_PRIORITY */
 #ifndef SPI4_TX_DMA_CONFIG
-#define SPI4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_TX_DMA_RCC,                 \
-        .Instance = SPI4_TX_DMA_INSTANCE,           \
-        .channel = SPI4_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_TX_DMA_IRQ,                 \
-    }
+#define SPI4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI4_TX_DMA_INSTANCE,         \
+        SPI4_TX_DMA_RCC,              \
+        SPI4_TX_DMA_IRQ,              \
+        SPI4_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_TX_DMA_PRIORITY,         \
+        SPI4_TX_DMA_PREEMPT_PRIORITY, \
+        SPI4_TX_DMA_SUB_PRIORITY)
 #endif /* SPI4_TX_DMA_CONFIG */
 #endif /* BSP_SPI4_TX_USING_DMA */
 
 #ifdef BSP_SPI4_RX_USING_DMA
+#ifndef SPI4_RX_DMA_PRIORITY
+#define SPI4_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI4_RX_DMA_PRIORITY */
+
+#ifndef SPI4_RX_DMA_PREEMPT_PRIORITY
+#define SPI4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_RX_DMA_SUB_PRIORITY
+#define SPI4_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_RX_DMA_SUB_PRIORITY */
 #ifndef SPI4_RX_DMA_CONFIG
-#define SPI4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_RX_DMA_RCC,                 \
-        .Instance = SPI4_RX_DMA_INSTANCE,           \
-        .channel = SPI4_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_RX_DMA_IRQ,                 \
-    }
+#define SPI4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI4_RX_DMA_INSTANCE,         \
+        SPI4_RX_DMA_RCC,              \
+        SPI4_RX_DMA_IRQ,              \
+        SPI4_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI4_RX_DMA_PRIORITY,         \
+        SPI4_RX_DMA_PREEMPT_PRIORITY, \
+        SPI4_RX_DMA_SUB_PRIORITY)
 #endif /* SPI4_RX_DMA_CONFIG */
 #endif /* BSP_SPI4_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI5
 #ifndef SPI5_BUS_CONFIG
-#define SPI5_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI5,                           \
-        .bus_name = "spi5",                         \
-        .irq_type = SPI5_IRQn,                      \
+#define SPI5_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI5,      \
+        .bus_name = "spi5",    \
+        .irq_type = SPI5_IRQn, \
     }
 #endif /* SPI5_BUS_CONFIG */
 #endif /* BSP_USING_SPI5 */
 
 #ifdef BSP_SPI5_TX_USING_DMA
+#ifndef SPI5_TX_DMA_PRIORITY
+#define SPI5_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI5_TX_DMA_PRIORITY */
+
+#ifndef SPI5_TX_DMA_PREEMPT_PRIORITY
+#define SPI5_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_TX_DMA_SUB_PRIORITY
+#define SPI5_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_TX_DMA_SUB_PRIORITY */
 #ifndef SPI5_TX_DMA_CONFIG
-#define SPI5_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_TX_DMA_RCC,                 \
-        .Instance = SPI5_TX_DMA_INSTANCE,           \
-        .channel = SPI5_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_TX_DMA_IRQ,                 \
-    }
+#define SPI5_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI5_TX_DMA_INSTANCE,         \
+        SPI5_TX_DMA_RCC,              \
+        SPI5_TX_DMA_IRQ,              \
+        SPI5_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_TX_DMA_PRIORITY,         \
+        SPI5_TX_DMA_PREEMPT_PRIORITY, \
+        SPI5_TX_DMA_SUB_PRIORITY)
 #endif /* SPI5_TX_DMA_CONFIG */
 #endif /* BSP_SPI5_TX_USING_DMA */
 
 #ifdef BSP_SPI5_RX_USING_DMA
+#ifndef SPI5_RX_DMA_PRIORITY
+#define SPI5_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI5_RX_DMA_PRIORITY */
+
+#ifndef SPI5_RX_DMA_PREEMPT_PRIORITY
+#define SPI5_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_RX_DMA_SUB_PRIORITY
+#define SPI5_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_RX_DMA_SUB_PRIORITY */
 #ifndef SPI5_RX_DMA_CONFIG
-#define SPI5_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_RX_DMA_RCC,                 \
-        .Instance = SPI5_RX_DMA_INSTANCE,           \
-        .channel = SPI5_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_RX_DMA_IRQ,                 \
-    }
+#define SPI5_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI5_RX_DMA_INSTANCE,         \
+        SPI5_RX_DMA_RCC,              \
+        SPI5_RX_DMA_IRQ,              \
+        SPI5_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI5_RX_DMA_PRIORITY,         \
+        SPI5_RX_DMA_PREEMPT_PRIORITY, \
+        SPI5_RX_DMA_SUB_PRIORITY)
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/uart_config.h

@@ -8,6 +8,7 @@
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
  * 2019-10-03     xuzhuoyi     modify for STM32G4
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -21,197 +22,362 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        LPUART1_RX_DMA_CHANNEL,                \
+        0U,                                    \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .channel = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        UART1_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_TX_DMA_INSTANCE,                         \
-        .channel = UART1_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_TX_DMA_RCC,                               \
-        .dma_irq = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        UART1_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .channel = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        UART2_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_TX_DMA_INSTANCE,                         \
-        .channel = UART2_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_TX_DMA_RCC,                               \
-        .dma_irq = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        UART2_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .channel = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        UART3_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_TX_DMA_INSTANCE,                         \
-        .channel = UART3_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_TX_DMA_RCC,                               \
-        .dma_irq = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        UART3_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_RX_DMA_INSTANCE,                         \
-        .channel = UART4_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_RX_DMA_RCC,                               \
-        .dma_irq = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        UART4_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_TX_DMA_INSTANCE,                         \
-        .channel = UART4_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_TX_DMA_RCC,                               \
-        .dma_irq = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        UART4_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
-#endif /* BSP_UART4_RX_USING_DMA */
+#endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_RX_DMA_INSTANCE,                         \
-        .channel = UART5_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_RX_DMA_RCC,                               \
-        .dma_irq = UART5_RX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        UART5_RX_DMA_CHANNEL,                  \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_UART5_TX_USING_DMA)
+#ifndef UART5_TX_DMA_PRIORITY
+#define UART5_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_TX_DMA_PRIORITY */
+
+#ifndef UART5_TX_DMA_PREEMPT_PRIORITY
+#define UART5_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_TX_DMA_SUB_PRIORITY
+#define UART5_TX_DMA_SUB_PRIORITY             0
+#endif /* UART5_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_TX_CONFIG
-#define UART5_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_TX_DMA_INSTANCE,                         \
-        .channel = UART5_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_TX_DMA_RCC,                               \
-        .dma_irq = UART5_TX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART5_TX_DMA_INSTANCE,         \
+        UART5_TX_DMA_RCC,              \
+        UART5_TX_DMA_IRQ,              \
+        UART5_TX_DMA_CHANNEL,          \
+        0U,                            \
+        UART5_TX_DMA_PRIORITY,         \
+        UART5_TX_DMA_PREEMPT_PRIORITY, \
+        UART5_TX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_TX_CONFIG */
 #endif /* BSP_UART5_TX_USING_DMA */
 #endif /* BSP_USING_UART5 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/h5/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,128 +20,226 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                       \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,                 \
+        LPUART1_RX_DMA_RCC,                      \
+        LPUART1_RX_DMA_IRQ,                      \
+        LPUART1_RX_DMA_REQUEST,                  \
+        LPUART1_DMA_PRIORITY,                    \
+        LPUART1_DMA_PREEMPT_PRIORITY,            \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                   \
+        UART1_RX_DMA_RCC,                        \
+        UART1_RX_DMA_IRQ,                        \
+        UART1_RX_DMA_REQUEST,                    \
+        UART1_RX_DMA_PRIORITY,                   \
+        UART1_RX_DMA_PREEMPT_PRIORITY,           \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request  = UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART1_TX_DMA_INSTANCE,          \
+        UART1_TX_DMA_RCC,               \
+        UART1_TX_DMA_IRQ,               \
+        UART1_TX_DMA_REQUEST,           \
+        UART1_TX_DMA_PRIORITY,          \
+        UART1_TX_DMA_PREEMPT_PRIORITY,  \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                   \
+        UART2_RX_DMA_RCC,                        \
+        UART2_RX_DMA_IRQ,                        \
+        UART2_RX_DMA_REQUEST,                    \
+        UART2_RX_DMA_PRIORITY,                   \
+        UART2_RX_DMA_PREEMPT_PRIORITY,           \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request  = UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART2_TX_DMA_INSTANCE,          \
+        UART2_TX_DMA_RCC,               \
+        UART2_TX_DMA_IRQ,               \
+        UART2_TX_DMA_REQUEST,           \
+        UART2_TX_DMA_PRIORITY,          \
+        UART2_TX_DMA_PREEMPT_PRIORITY,  \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                   \
+        UART3_RX_DMA_RCC,                        \
+        UART3_RX_DMA_IRQ,                        \
+        UART3_RX_DMA_REQUEST,                    \
+        UART3_RX_DMA_PRIORITY,                   \
+        UART3_RX_DMA_PREEMPT_PRIORITY,           \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .request  = UART3_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART3_TX_DMA_INSTANCE,          \
+        UART3_TX_DMA_RCC,               \
+        UART3_TX_DMA_IRQ,               \
+        UART3_TX_DMA_REQUEST,           \
+        UART3_TX_DMA_PRIORITY,          \
+        UART3_TX_DMA_PREEMPT_PRIORITY,  \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/dma_config.h

@@ -141,6 +141,11 @@ extern "C" {
 #define QSPI_DMA_IRQHandler              DMA2_Stream7_IRQHandler
 #define QSPI_DMA_RCC                     RCC_AHB1ENR_DMA2EN
 #define QSPI_DMA_INSTANCE                DMA2_Stream7
+#if defined(DMA_REQUEST_QUADSPI)
+#define QSPI_DMA_REQUEST                 DMA_REQUEST_QUADSPI
+#elif defined(DMA_REQUEST_QUADSPI1)
+#define QSPI_DMA_REQUEST                 DMA_REQUEST_QUADSPI1
+#endif
 #define QSPI_DMA_IRQ                     DMA2_Stream7_IRQn
 #endif
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/i2c_hard_config.h

@@ -8,6 +8,7 @@
  * 2024-02-06     Dyyt587   first version
  * 2024-04-23     Zeidan    Add I2Cx_xx_DMA_CONFIG
  * 2024-06-23     wdfk-prog Add H7 hard I2C config
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 #ifndef __I2C_HARD_CONFIG_H__
 #define __I2C_HARD_CONFIG_H__
@@ -20,233 +21,265 @@ extern "C" {
 
 #ifdef BSP_USING_HARD_I2C1
 #ifndef I2C1_BUS_CONFIG
-#define I2C1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C1,                           \
-        .timing = 0x307075B1,                       \
-        .timeout = 1000,                            \
-        .name = "hwi2c1",                           \
-        .evirq_type = I2C1_EV_IRQn,                 \
-        .erirq_type = I2C1_ER_IRQn,                 \
+#define I2C1_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C1,           \
+        .timing = 0x307075B1,       \
+        .timeout = 1000,            \
+        .name = "hwi2c1",           \
+        .evirq_type = I2C1_EV_IRQn, \
+        .erirq_type = I2C1_ER_IRQn, \
     }
 #endif /* I2C1_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C1 */
 
 #ifdef BSP_I2C1_TX_USING_DMA
+#ifndef I2C1_TX_DMA_PRIORITY
+#define I2C1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_TX_DMA_PRIORITY */
+
+#ifndef I2C1_TX_DMA_PREEMPT_PRIORITY
+#define I2C1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_TX_DMA_SUB_PRIORITY
+#define I2C1_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_TX_DMA_SUB_PRIORITY */
 #ifndef I2C1_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_TX_DMA_RCC,                 \
-        .Instance = I2C1_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_TX_DMA_IRQ,                 \
-        .channel = I2C1_TX_DMA_CHANNEL              \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_TX_DMA_RCC,                 \
-        .Instance = I2C1_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C1_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C1_TX_DMA_INSTANCE,         \
+        I2C1_TX_DMA_RCC,              \
+        I2C1_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C1_TX,          \
+        I2C1_TX_DMA_PRIORITY,         \
+        I2C1_TX_DMA_PREEMPT_PRIORITY, \
+        I2C1_TX_DMA_SUB_PRIORITY)
 #endif /* I2C1_TX_DMA_CONFIG */
 #endif /* BSP_I2C1_TX_USING_DMA */
 
 #ifdef BSP_I2C1_RX_USING_DMA
+#ifndef I2C1_RX_DMA_PRIORITY
+#define I2C1_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C1_RX_DMA_PRIORITY */
+
+#ifndef I2C1_RX_DMA_PREEMPT_PRIORITY
+#define I2C1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C1_RX_DMA_SUB_PRIORITY
+#define I2C1_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C1_RX_DMA_SUB_PRIORITY */
 #ifndef I2C1_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_RX_DMA_RCC,                 \
-        .Instance = I2C1_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_RX_DMA_IRQ,                 \
-        .channel = I2C1_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C1_RX_DMA_RCC,                 \
-        .Instance = I2C1_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C1_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C1_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C1_RX_DMA_INSTANCE,         \
+        I2C1_RX_DMA_RCC,              \
+        I2C1_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C1_RX,          \
+        I2C1_RX_DMA_PRIORITY,         \
+        I2C1_RX_DMA_PREEMPT_PRIORITY, \
+        I2C1_RX_DMA_SUB_PRIORITY)
 #endif /* I2C1_RX_DMA_CONFIG */
 #endif /* BSP_I2C1_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C2
 #ifndef I2C2_BUS_CONFIG
-#define I2C2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C2,                           \
-        .timing = 0x307075B1,                       \
-        .timeout = 1000,                            \
-        .name = "hwi2c2",                           \
-        .evirq_type = I2C2_EV_IRQn,                 \
-        .erirq_type = I2C2_ER_IRQn,                 \
+#define I2C2_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C2,           \
+        .timing = 0x307075B1,       \
+        .timeout = 1000,            \
+        .name = "hwi2c2",           \
+        .evirq_type = I2C2_EV_IRQn, \
+        .erirq_type = I2C2_ER_IRQn, \
     }
 #endif /* I2C2_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C2 */
 
 #ifdef BSP_I2C2_TX_USING_DMA
+#ifndef I2C2_TX_DMA_PRIORITY
+#define I2C2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_TX_DMA_PRIORITY */
+
+#ifndef I2C2_TX_DMA_PREEMPT_PRIORITY
+#define I2C2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_TX_DMA_SUB_PRIORITY
+#define I2C2_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_TX_DMA_SUB_PRIORITY */
 #ifndef I2C2_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_TX_DMA_RCC,                 \
-        .Instance = I2C2_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_TX_DMA_IRQ,                 \
-        .channel = I2C2_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_TX_DMA_RCC,                 \
-        .Instance = I2C2_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C2_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C2_TX_DMA_INSTANCE,         \
+        I2C2_TX_DMA_RCC,              \
+        I2C2_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C2_TX,          \
+        I2C2_TX_DMA_PRIORITY,         \
+        I2C2_TX_DMA_PREEMPT_PRIORITY, \
+        I2C2_TX_DMA_SUB_PRIORITY)
 #endif /* I2C2_TX_DMA_CONFIG */
 #endif /* BSP_I2C2_TX_USING_DMA */
 
 #ifdef BSP_I2C2_RX_USING_DMA
+#ifndef I2C2_RX_DMA_PRIORITY
+#define I2C2_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C2_RX_DMA_PRIORITY */
+
+#ifndef I2C2_RX_DMA_PREEMPT_PRIORITY
+#define I2C2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C2_RX_DMA_SUB_PRIORITY
+#define I2C2_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C2_RX_DMA_SUB_PRIORITY */
 #ifndef I2C2_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_RX_DMA_RCC,                 \
-        .Instance = I2C2_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_RX_DMA_IRQ,                 \
-        .channel = I2C2_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C2_RX_DMA_RCC,                 \
-        .Instance = I2C2_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C2_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C2_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C2_RX_DMA_INSTANCE,         \
+        I2C2_RX_DMA_RCC,              \
+        I2C2_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C2_RX,          \
+        I2C2_RX_DMA_PRIORITY,         \
+        I2C2_RX_DMA_PREEMPT_PRIORITY, \
+        I2C2_RX_DMA_SUB_PRIORITY)
 #endif /* I2C2_RX_DMA_CONFIG */
 #endif /* BSP_I2C2_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C3
 #ifndef I2C3_BUS_CONFIG
-#define I2C3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C3,                           \
-        .timing = 0x307075B1,                       \
-        .timeout = 1000,                            \
-        .name = "hwi2c3",                           \
-        .evirq_type = I2C3_EV_IRQn,                 \
-        .erirq_type = I2C3_ER_IRQn,                 \
+#define I2C3_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C3,           \
+        .timing = 0x307075B1,       \
+        .timeout = 1000,            \
+        .name = "hwi2c3",           \
+        .evirq_type = I2C3_EV_IRQn, \
+        .erirq_type = I2C3_ER_IRQn, \
     }
 #endif /* I2C3_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C3 */
 
 #ifdef BSP_I2C3_TX_USING_DMA
+#ifndef I2C3_TX_DMA_PRIORITY
+#define I2C3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_TX_DMA_PRIORITY */
+
+#ifndef I2C3_TX_DMA_PREEMPT_PRIORITY
+#define I2C3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_TX_DMA_SUB_PRIORITY
+#define I2C3_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_TX_DMA_SUB_PRIORITY */
 #ifndef I2C3_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_TX_DMA_RCC,                 \
-        .Instance = I2C3_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_TX_DMA_IRQ,                 \
-        .channel = I2C3_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_TX_DMA_RCC,                 \
-        .Instance = I2C3_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C3_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C3_TX_DMA_INSTANCE,         \
+        I2C3_TX_DMA_RCC,              \
+        I2C3_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C3_TX,          \
+        I2C3_TX_DMA_PRIORITY,         \
+        I2C3_TX_DMA_PREEMPT_PRIORITY, \
+        I2C3_TX_DMA_SUB_PRIORITY)
 #endif /* I2C3_TX_DMA_CONFIG */
 #endif /* BSP_I2C3_TX_USING_DMA */
 
 #ifdef BSP_I2C3_RX_USING_DMA
+#ifndef I2C3_RX_DMA_PRIORITY
+#define I2C3_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C3_RX_DMA_PRIORITY */
+
+#ifndef I2C3_RX_DMA_PREEMPT_PRIORITY
+#define I2C3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C3_RX_DMA_SUB_PRIORITY
+#define I2C3_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C3_RX_DMA_SUB_PRIORITY */
 #ifndef I2C3_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_RX_DMA_RCC,                 \
-        .Instance = I2C3_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_RX_DMA_IRQ,                 \
-        .channel = I2C3_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C3_RX_DMA_RCC,                 \
-        .Instance = I2C3_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C3_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C3_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C3_RX_DMA_INSTANCE,         \
+        I2C3_RX_DMA_RCC,              \
+        I2C3_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C3_RX,          \
+        I2C3_RX_DMA_PRIORITY,         \
+        I2C3_RX_DMA_PREEMPT_PRIORITY, \
+        I2C3_RX_DMA_SUB_PRIORITY)
 #endif /* I2C3_RX_DMA_CONFIG */
 #endif /* BSP_I2C3_RX_USING_DMA */
 
 #ifdef BSP_USING_HARD_I2C4
 #ifndef I2C4_BUS_CONFIG
-#define I2C4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = I2C4,                           \
-        .timing = 0x307075B1,                       \
-        .timeout = 1000,                            \
-        .name = "hwi2c4",                           \
-        .evirq_type = I2C4_EV_IRQn,                 \
-        .erirq_type = I2C4_ER_IRQn,                 \
+#define I2C4_BUS_CONFIG             \
+    {                               \
+        .Instance = I2C4,           \
+        .timing = 0x307075B1,       \
+        .timeout = 1000,            \
+        .name = "hwi2c4",           \
+        .evirq_type = I2C4_EV_IRQn, \
+        .erirq_type = I2C4_ER_IRQn, \
     }
 #endif /* I2C4_BUS_CONFIG */
 #endif /* BSP_USING_HARD_I2C4 */
 
 #ifdef BSP_I2C4_TX_USING_DMA
+#ifndef I2C4_TX_DMA_PRIORITY
+#define I2C4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C4_TX_DMA_PRIORITY */
+
+#ifndef I2C4_TX_DMA_PREEMPT_PRIORITY
+#define I2C4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* I2C4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C4_TX_DMA_SUB_PRIORITY
+#define I2C4_TX_DMA_SUB_PRIORITY              0
+#endif /* I2C4_TX_DMA_SUB_PRIORITY */
 #ifndef I2C4_TX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_TX_DMA_RCC,                 \
-        .Instance = I2C4_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_TX_DMA_IRQ,                 \
-        .channel = I2C4_TX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_TX_DMA_RCC,                 \
-        .Instance = I2C4_TX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C4_TX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        I2C4_TX_DMA_INSTANCE,         \
+        I2C4_TX_DMA_RCC,              \
+        I2C4_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C4_TX,          \
+        I2C4_TX_DMA_PRIORITY,         \
+        I2C4_TX_DMA_PREEMPT_PRIORITY, \
+        I2C4_TX_DMA_SUB_PRIORITY)
 #endif /* I2C4_TX_DMA_CONFIG */
 #endif /* BSP_I2C4_TX_USING_DMA */
 
 #ifdef BSP_I2C4_RX_USING_DMA
+#ifndef I2C4_RX_DMA_PRIORITY
+#define I2C4_RX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* I2C4_RX_DMA_PRIORITY */
+
+#ifndef I2C4_RX_DMA_PREEMPT_PRIORITY
+#define I2C4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* I2C4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef I2C4_RX_DMA_SUB_PRIORITY
+#define I2C4_RX_DMA_SUB_PRIORITY              0
+#endif /* I2C4_RX_DMA_SUB_PRIORITY */
 #ifndef I2C4_RX_DMA_CONFIG
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-#define I2C4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_RX_DMA_RCC,                 \
-        .Instance = I2C4_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_RX_DMA_IRQ,                 \
-        .channel = I2C4_RX_DMA_CHANNEL,             \
-    }
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
-#define I2C4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = I2C4_RX_DMA_RCC,                 \
-        .Instance = I2C4_RX_DMA_INSTANCE,           \
-        .dma_irq = I2C4_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_I2C4_RX              \
-    }
-#endif /* defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) */
+#define I2C4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        I2C4_RX_DMA_INSTANCE,         \
+        I2C4_RX_DMA_RCC,              \
+        I2C4_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_I2C4_RX,          \
+        I2C4_RX_DMA_PRIORITY,         \
+        I2C4_RX_DMA_PREEMPT_PRIORITY, \
+        I2C4_RX_DMA_SUB_PRIORITY)
 #endif /* I2C4_RX_DMA_CONFIG */
 #endif /* BSP_I2C4_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        0U,                           \
+        QSPI_DMA_REQUEST,             \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,71 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDMMC1,                              \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Stream3,                 \
-        .dma_rx.channel = DMA_CHANNEL_4,                 \
-        .dma_rx.dma_irq = DMA2_Stream3_IRQn,             \
-        .dma_tx.Instance = DMA2_Stream6,                 \
-        .dma_tx.channel = DMA_CHANNEL_4,                 \
-        .dma_tx.dma_irq = DMA2_Stream6_IRQn,             \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                          \
+    {                                            \
+        .Instance = SDMMC1,                      \
+        .dma_rx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream3,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream3_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_RX_DMA_PRIORITY,                \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_RX_DMA_SUB_PRIORITY,            \
+            DMA_PERIPH_TO_MEMORY,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
+        .dma_tx = STM32_DMA_CONFIG_INIT_FIFO_EX( \
+            DMA2_Stream6,                        \
+            RCC_AHB1ENR_DMA2EN,                  \
+            DMA2_Stream6_IRQn,                   \
+            DMA_CHANNEL_4,                       \
+            0U,                                  \
+            SDIO_TX_DMA_PRIORITY,                \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,        \
+            SDIO_TX_DMA_SUB_PRIORITY,            \
+            DMA_MEMORY_TO_PERIPH,                \
+            DMA_PINC_DISABLE,                    \
+            DMA_MINC_ENABLE,                     \
+            DMA_PDATAALIGN_WORD,                 \
+            DMA_MDATAALIGN_WORD,                 \
+            DMA_PFCTRL,                          \
+            DMA_FIFOMODE_ENABLE,                 \
+            DMA_FIFO_THRESHOLD_FULL,             \
+            DMA_MBURST_INC4,                     \
+            DMA_PBURST_INC4),                    \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,176 +20,316 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI1_TX              \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI1_TX,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI1_RX              \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI1_RX,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI2_TX              \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI2_TX,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI2_RX              \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI2_RX,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI3_TX              \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI3_TX,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI3_RX              \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI3_RX,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI4
 #ifndef SPI4_BUS_CONFIG
-#define SPI4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI4,                           \
-        .bus_name = "spi4",                         \
-        .irq_type = SPI4_IRQn,                      \
+#define SPI4_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI4,      \
+        .bus_name = "spi4",    \
+        .irq_type = SPI4_IRQn, \
     }
 #endif /* SPI4_BUS_CONFIG */
 #endif /* BSP_USING_SPI4 */
 
 #ifdef BSP_SPI4_TX_USING_DMA
+#ifndef SPI4_TX_DMA_PRIORITY
+#define SPI4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI4_TX_DMA_PRIORITY */
+
+#ifndef SPI4_TX_DMA_PREEMPT_PRIORITY
+#define SPI4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_TX_DMA_SUB_PRIORITY
+#define SPI4_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_TX_DMA_SUB_PRIORITY */
 #ifndef SPI4_TX_DMA_CONFIG
-#define SPI4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_TX_DMA_RCC,                 \
-        .Instance = SPI4_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI4_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI4_TX              \
-    }
+#define SPI4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI4_TX_DMA_INSTANCE,         \
+        SPI4_TX_DMA_RCC,              \
+        SPI4_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI4_TX,          \
+        SPI4_TX_DMA_PRIORITY,         \
+        SPI4_TX_DMA_PREEMPT_PRIORITY, \
+        SPI4_TX_DMA_SUB_PRIORITY)
 #endif /* SPI4_TX_DMA_CONFIG */
 #endif /* BSP_SPI4_TX_USING_DMA */
 
 #ifdef BSP_SPI4_RX_USING_DMA
+#ifndef SPI4_RX_DMA_PRIORITY
+#define SPI4_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI4_RX_DMA_PRIORITY */
+
+#ifndef SPI4_RX_DMA_PREEMPT_PRIORITY
+#define SPI4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_RX_DMA_SUB_PRIORITY
+#define SPI4_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_RX_DMA_SUB_PRIORITY */
 #ifndef SPI4_RX_DMA_CONFIG
-#define SPI4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_RX_DMA_RCC,                 \
-        .Instance = SPI4_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI4_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI4_RX              \
-    }
+#define SPI4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI4_RX_DMA_INSTANCE,         \
+        SPI4_RX_DMA_RCC,              \
+        SPI4_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI4_RX,          \
+        SPI4_RX_DMA_PRIORITY,         \
+        SPI4_RX_DMA_PREEMPT_PRIORITY, \
+        SPI4_RX_DMA_SUB_PRIORITY)
 #endif /* SPI4_RX_DMA_CONFIG */
 #endif /* BSP_SPI4_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI5
 #ifndef SPI5_BUS_CONFIG
-#define SPI5_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI5,                           \
-        .bus_name = "spi5",                         \
-        .irq_type = SPI5_IRQn,                      \
+#define SPI5_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI5,      \
+        .bus_name = "spi5",    \
+        .irq_type = SPI5_IRQn, \
     }
 #endif /* SPI5_BUS_CONFIG */
 #endif /* BSP_USING_SPI5 */
 
 #ifdef BSP_SPI5_TX_USING_DMA
+#ifndef SPI5_TX_DMA_PRIORITY
+#define SPI5_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI5_TX_DMA_PRIORITY */
+
+#ifndef SPI5_TX_DMA_PREEMPT_PRIORITY
+#define SPI5_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_TX_DMA_SUB_PRIORITY
+#define SPI5_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_TX_DMA_SUB_PRIORITY */
 #ifndef SPI5_TX_DMA_CONFIG
-#define SPI5_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_TX_DMA_RCC,                 \
-        .Instance = SPI5_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI5_TX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI5_TX              \
-    }
+#define SPI5_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI5_TX_DMA_INSTANCE,         \
+        SPI5_TX_DMA_RCC,              \
+        SPI5_TX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI5_TX,          \
+        SPI5_TX_DMA_PRIORITY,         \
+        SPI5_TX_DMA_PREEMPT_PRIORITY, \
+        SPI5_TX_DMA_SUB_PRIORITY)
 #endif /* SPI5_TX_DMA_CONFIG */
 #endif /* BSP_SPI5_TX_USING_DMA */
 
 #ifdef BSP_SPI5_RX_USING_DMA
+#ifndef SPI5_RX_DMA_PRIORITY
+#define SPI5_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI5_RX_DMA_PRIORITY */
+
+#ifndef SPI5_RX_DMA_PREEMPT_PRIORITY
+#define SPI5_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_RX_DMA_SUB_PRIORITY
+#define SPI5_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_RX_DMA_SUB_PRIORITY */
 #ifndef SPI5_RX_DMA_CONFIG
-#define SPI5_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_RX_DMA_RCC,                 \
-        .Instance = SPI5_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI5_RX_DMA_IRQ,                 \
-        .request = DMA_REQUEST_SPI5_RX              \
-    }
+#define SPI5_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI5_RX_DMA_INSTANCE,         \
+        SPI5_RX_DMA_RCC,              \
+        SPI5_RX_DMA_IRQ,              \
+        0U,                           \
+        DMA_REQUEST_SPI5_RX,          \
+        SPI5_RX_DMA_PRIORITY,         \
+        SPI5_RX_DMA_PREEMPT_PRIORITY, \
+        SPI5_RX_DMA_SUB_PRIORITY)
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/uart_config.h

@@ -8,6 +8,7 @@
  * 2018-10-30     SummerGift   first version
  * 2019-01-05     zylx         modify dma support
  * 2020-05-02     whj4674672   support stm32h7 uart dma
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -21,137 +22,227 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request = UART1_RX_DMA_REQUEST,                            \
-        .dma_rcc = UART1_RX_DMA_RCC,                                \
-        .dma_irq = UART1_RX_DMA_IRQ,                                \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request = UART2_RX_DMA_REQUEST,                            \
-        .dma_rcc = UART2_RX_DMA_RCC,                                \
-        .dma_irq = UART2_RX_DMA_IRQ,                                \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request = UART2_TX_DMA_REQUEST,                            \
-        .dma_rcc = UART2_TX_DMA_RCC,                                \
-        .dma_irq = UART2_TX_DMA_IRQ,                                \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_REQUEST,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request = UART3_RX_DMA_REQUEST,                            \
-        .dma_rcc = UART3_RX_DMA_RCC,                                \
-        .dma_irq = UART3_RX_DMA_IRQ,                                \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART4_RX_DMA_INSTANCE,                          \
-        .request = UART4_RX_DMA_REQUEST,                            \
-        .dma_rcc = UART4_RX_DMA_RCC,                                \
-        .dma_irq = UART4_RX_DMA_IRQ,                                \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART4_RX_DMA_REQUEST,                  \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART5_RX_DMA_INSTANCE,                          \
-        .request = UART5_RX_DMA_REQUEST,                            \
-        .dma_rcc = UART5_RX_DMA_RCC,                                \
-        .dma_irq = UART5_RX_DMA_IRQ,                                \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART5_RX_DMA_REQUEST,                  \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "hlpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "hlpuart1",       \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #endif /* BSP_USING_LPUART1 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/l0/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-10-30     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,45 +20,77 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,15 +20,51 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDIO,                                \
-        .dma_rx.dma_rcc = RCC_AHBENR_DMA2EN,             \
-        .dma_tx.dma_rcc = RCC_AHBENR_DMA2EN,             \
-        .dma_rx.Instance = DMA2_Channel4,                \
-        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
-        .dma_tx.Instance = DMA2_Channel4,                \
-        .dma_tx.dma_irq = DMA2_Channel4_IRQn,            \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SDIO,                           \
+        .dma_rx = STM32_DMA_RX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHBENR_DMA2EN,                      \
+            DMA2_Channel4_IRQn,                     \
+            0U,                                     \
+            0U,                                     \
+            SDIO_RX_DMA_PRIORITY,                   \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_RX_DMA_SUB_PRIORITY),              \
+        .dma_tx = STM32_DMA_TX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHBENR_DMA2EN,                      \
+            DMA2_Channel4_IRQn,                     \
+            0U,                                     \
+            0U,                                     \
+            SDIO_TX_DMA_PRIORITY,                   \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_TX_DMA_SUB_PRIORITY),              \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/spi_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -20,100 +21,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        SPI1_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        SPI1_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_TX_DMA_RCC,                \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_TX_DMA_IRQ,                \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        SPI2_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_RX_DMA_RCC,                \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_RX_DMA_IRQ,                \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        SPI2_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI3_TX_DMA_RCC,                \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI3_TX_DMA_IRQ,                \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        SPI3_TX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI3_RX_DMA_RCC,                \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI3_RX_DMA_IRQ,                \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        SPI3_RX_DMA_CHANNEL,          \
+        0U,                           \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     BalanceTWK   first version
  * 2019-01-05     SummerGift   modify DMA support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -21,153 +22,299 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART4_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART4_RX_DMA_RCC,                               \
-        .dma_irq  = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                         \
-    {                                                               \
-        .Instance = UART4_TX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART4_TX_DMA_RCC,                               \
-        .dma_irq  = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        0U,                            \
+        0U,                            \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
 #endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = DMA_NOT_AVAILABLE,                              \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        0U,                                    \
+        0U,                                    \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Request = QSPI_DMA_REQUEST,                      \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        0U,                           \
+        QSPI_DMA_REQUEST,             \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,51 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDMMC1,                              \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Channel4,                \
-        .dma_rx.request = DMA_REQUEST_7,                 \
-        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
-        .dma_tx.Instance = DMA2_Channel5,                \
-        .dma_tx.request = DMA_REQUEST_7,                 \
-        .dma_tx.dma_irq = DMA2_Channel5_IRQn,            \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SDMMC1,                         \
+        .dma_rx = STM32_DMA_RX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHB1ENR_DMA2EN,                     \
+            DMA2_Channel4_IRQn,                     \
+            0U,                                     \
+            DMA_REQUEST_7,                          \
+            SDIO_RX_DMA_PRIORITY,                   \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_RX_DMA_SUB_PRIORITY),              \
+        .dma_tx = STM32_DMA_TX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel5,                          \
+            RCC_AHB1ENR_DMA2EN,                     \
+            DMA2_Channel5_IRQn,                     \
+            0U,                                     \
+            DMA_REQUEST_7,                          \
+            SDIO_TX_DMA_PRIORITY,                   \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_TX_DMA_SUB_PRIORITY),              \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,106 +20,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI1,                                   \
-        .bus_name = "spi1",                                 \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_TX_DMA_RCC,                         \
-        .Instance = SPI1_TX_DMA_INSTANCE,                   \
-        .request = SPI1_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_TX_DMA_IRQ,                         \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_REQUEST,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_RX_DMA_RCC,                         \
-        .Instance = SPI1_RX_DMA_INSTANCE,                   \
-        .request = SPI1_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_RX_DMA_IRQ,                         \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_RX_DMA_REQUEST,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI2,                                   \
-        .bus_name = "spi2",                                 \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_TX_DMA_RCC,                         \
-        .Instance = SPI2_TX_DMA_INSTANCE,                   \
-        .request = SPI2_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_TX_DMA_IRQ,                         \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_TX_DMA_REQUEST,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_RX_DMA_RCC,                         \
-        .Instance = SPI2_RX_DMA_INSTANCE,                   \
-        .request = SPI2_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_RX_DMA_IRQ,                         \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_RX_DMA_REQUEST,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI3,                                   \
-        .bus_name = "spi3",                                 \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_TX_DMA_RCC,                         \
-        .Instance = SPI3_TX_DMA_INSTANCE,                   \
-        .request = SPI3_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_TX_DMA_IRQ,                         \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_TX_DMA_REQUEST,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_RX_DMA_RCC,                         \
-        .Instance = SPI3_RX_DMA_INSTANCE,                   \
-        .request = SPI3_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_RX_DMA_IRQ,                         \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_RX_DMA_REQUEST,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,128 +20,233 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        0U,                                    \
+        LPUART1_RX_DMA_REQUEST,                \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request  = UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        UART1_TX_DMA_REQUEST,          \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request  = UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_REQUEST,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .request  = UART3_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        UART3_TX_DMA_REQUEST,          \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Request = QSPI_DMA_REQUEST,                      \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        0U,                           \
+        QSPI_DMA_REQUEST,             \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,51 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDMMC1,                              \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Channel4,                \
-        .dma_rx.request = DMA_REQUEST_7,                 \
-        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
-        .dma_tx.Instance = DMA2_Channel5,                \
-        .dma_tx.request = DMA_REQUEST_7,                 \
-        .dma_tx.dma_irq = DMA2_Channel5_IRQn,            \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SDMMC1,                         \
+        .dma_rx = STM32_DMA_RX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                          \
+            RCC_AHB1ENR_DMA2EN,                     \
+            DMA2_Channel4_IRQn,                     \
+            0U,                                     \
+            DMA_REQUEST_7,                          \
+            SDIO_RX_DMA_PRIORITY,                   \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_RX_DMA_SUB_PRIORITY),              \
+        .dma_tx = STM32_DMA_TX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel5,                          \
+            RCC_AHB1ENR_DMA2EN,                     \
+            DMA2_Channel5_IRQn,                     \
+            0U,                                     \
+            DMA_REQUEST_7,                          \
+            SDIO_TX_DMA_PRIORITY,                   \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,           \
+            SDIO_TX_DMA_SUB_PRIORITY),              \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,106 +20,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI1,                                   \
-        .bus_name = "spi1",                                 \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_TX_DMA_RCC,                         \
-        .Instance = SPI1_TX_DMA_INSTANCE,                   \
-        .request = SPI1_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_TX_DMA_IRQ,                         \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_REQUEST,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_RX_DMA_RCC,                         \
-        .Instance = SPI1_RX_DMA_INSTANCE,                   \
-        .request = SPI1_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_RX_DMA_IRQ,                         \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                             \
+        SPI1_RX_DMA_REQUEST,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI2,                                   \
-        .bus_name = "spi2",                                 \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_TX_DMA_RCC,                         \
-        .Instance = SPI2_TX_DMA_INSTANCE,                   \
-        .request = SPI2_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_TX_DMA_IRQ,                         \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                             \
+        SPI2_TX_DMA_REQUEST,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_RX_DMA_RCC,                         \
-        .Instance = SPI2_RX_DMA_INSTANCE,                   \
-        .request = SPI2_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_RX_DMA_IRQ,                         \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                             \
+        SPI2_RX_DMA_REQUEST,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI3,                                   \
-        .bus_name = "spi3",                                 \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_TX_DMA_RCC,                         \
-        .Instance = SPI3_TX_DMA_INSTANCE,                   \
-        .request = SPI3_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_TX_DMA_IRQ,                         \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                             \
+        SPI3_TX_DMA_REQUEST,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_RX_DMA_RCC,                         \
-        .Instance = SPI3_RX_DMA_INSTANCE,                   \
-        .request = SPI3_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_RX_DMA_IRQ,                         \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                             \
+        SPI3_RX_DMA_REQUEST,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,128 +20,233 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        0U,                                    \
+        LPUART1_RX_DMA_REQUEST,                \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request  = UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        UART1_TX_DMA_REQUEST,          \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request  = UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_REQUEST,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .request  = UART3_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        UART3_TX_DMA_REQUEST,          \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/dma_config.h

@@ -68,6 +68,11 @@ extern "C" {
 #define QSPI_DMA_IRQHandler              DMA2_Stream2_IRQHandler
 #define QSPI_DMA_RCC                     RCC_MC_AHB2ENSETR_DMA2EN
 #define QSPI_DMA_INSTANCE                DMA2_Stream2
+#if defined(DMA_REQUEST_QUADSPI)
+#define QSPI_DMA_REQUEST                 DMA_REQUEST_QUADSPI
+#elif defined(DMA_REQUEST_QUADSPI1)
+#define QSPI_DMA_REQUEST                 DMA_REQUEST_QUADSPI1
+#endif
 #define QSPI_DMA_CHANNEL                 DMA_CHANNEL_11
 #define QSPI_DMA_IRQ                     DMA2_Stream2_IRQn
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        0U,                           \
+        QSPI_DMA_REQUEST,             \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,176 +20,316 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .request = SPI1_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_CHANNEL,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .request = SPI1_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_RX_DMA_CHANNEL,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_TX_DMA_RCC,                 \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .request = SPI2_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_TX_DMA_IRQ,                 \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_TX_DMA_CHANNEL,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI2_RX_DMA_RCC,                 \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .request = SPI2_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI2_RX_DMA_IRQ,                 \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_RX_DMA_CHANNEL,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI3,                           \
-        .bus_name = "spi3",                         \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_TX_DMA_RCC,                 \
-        .Instance = SPI3_TX_DMA_INSTANCE,           \
-        .request = SPI3_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_TX_DMA_IRQ,                 \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_TX_DMA_CHANNEL,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI3_RX_DMA_RCC,                 \
-        .Instance = SPI3_RX_DMA_INSTANCE,           \
-        .request = SPI3_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI3_RX_DMA_IRQ,                 \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_RX_DMA_CHANNEL,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI4
 #ifndef SPI4_BUS_CONFIG
-#define SPI4_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI4,                           \
-        .bus_name = "spi4",                         \
-        .irq_type = SPI4_IRQn,                      \
+#define SPI4_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI4,      \
+        .bus_name = "spi4",    \
+        .irq_type = SPI4_IRQn, \
     }
 #endif /* SPI4_BUS_CONFIG */
 #endif /* BSP_USING_SPI4 */
 
 #ifdef BSP_SPI4_TX_USING_DMA
+#ifndef SPI4_TX_DMA_PRIORITY
+#define SPI4_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI4_TX_DMA_PRIORITY */
+
+#ifndef SPI4_TX_DMA_PREEMPT_PRIORITY
+#define SPI4_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_TX_DMA_SUB_PRIORITY
+#define SPI4_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_TX_DMA_SUB_PRIORITY */
 #ifndef SPI4_TX_DMA_CONFIG
-#define SPI4_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_TX_DMA_RCC,                 \
-        .Instance = SPI4_TX_DMA_INSTANCE,           \
-        .request = SPI4_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_TX_DMA_IRQ,                 \
-    }
+#define SPI4_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI4_TX_DMA_INSTANCE,         \
+        SPI4_TX_DMA_RCC,              \
+        SPI4_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI4_TX_DMA_CHANNEL,          \
+        SPI4_TX_DMA_PRIORITY,         \
+        SPI4_TX_DMA_PREEMPT_PRIORITY, \
+        SPI4_TX_DMA_SUB_PRIORITY)
 #endif /* SPI4_TX_DMA_CONFIG */
 #endif /* BSP_SPI4_TX_USING_DMA */
 
 #ifdef BSP_SPI4_RX_USING_DMA
+#ifndef SPI4_RX_DMA_PRIORITY
+#define SPI4_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI4_RX_DMA_PRIORITY */
+
+#ifndef SPI4_RX_DMA_PREEMPT_PRIORITY
+#define SPI4_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI4_RX_DMA_SUB_PRIORITY
+#define SPI4_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI4_RX_DMA_SUB_PRIORITY */
 #ifndef SPI4_RX_DMA_CONFIG
-#define SPI4_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI4_RX_DMA_RCC,                 \
-        .Instance = SPI4_RX_DMA_INSTANCE,           \
-        .request = SPI4_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI4_RX_DMA_IRQ,                 \
-    }
+#define SPI4_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI4_RX_DMA_INSTANCE,         \
+        SPI4_RX_DMA_RCC,              \
+        SPI4_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI4_RX_DMA_CHANNEL,          \
+        SPI4_RX_DMA_PRIORITY,         \
+        SPI4_RX_DMA_PREEMPT_PRIORITY, \
+        SPI4_RX_DMA_SUB_PRIORITY)
 #endif /* SPI4_RX_DMA_CONFIG */
 #endif /* BSP_SPI4_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI5
 #ifndef SPI5_BUS_CONFIG
-#define SPI5_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI5,                           \
-        .bus_name = "spi5",                         \
-        .irq_type = SPI5_IRQn,                      \
+#define SPI5_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI5,      \
+        .bus_name = "spi5",    \
+        .irq_type = SPI5_IRQn, \
     }
 #endif /* SPI5_BUS_CONFIG */
 #endif /* BSP_USING_SPI5 */
 
 #ifdef BSP_SPI5_TX_USING_DMA
+#ifndef SPI5_TX_DMA_PRIORITY
+#define SPI5_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI5_TX_DMA_PRIORITY */
+
+#ifndef SPI5_TX_DMA_PREEMPT_PRIORITY
+#define SPI5_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_TX_DMA_SUB_PRIORITY
+#define SPI5_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_TX_DMA_SUB_PRIORITY */
 #ifndef SPI5_TX_DMA_CONFIG
-#define SPI5_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_TX_DMA_RCC,                 \
-        .Instance = SPI5_TX_DMA_INSTANCE,           \
-        .request = SPI5_TX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_TX_DMA_IRQ,                 \
-    }
+#define SPI5_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI5_TX_DMA_INSTANCE,         \
+        SPI5_TX_DMA_RCC,              \
+        SPI5_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI5_TX_DMA_CHANNEL,          \
+        SPI5_TX_DMA_PRIORITY,         \
+        SPI5_TX_DMA_PREEMPT_PRIORITY, \
+        SPI5_TX_DMA_SUB_PRIORITY)
 #endif /* SPI5_TX_DMA_CONFIG */
 #endif /* BSP_SPI5_TX_USING_DMA */
 
 #ifdef BSP_SPI5_RX_USING_DMA
+#ifndef SPI5_RX_DMA_PRIORITY
+#define SPI5_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI5_RX_DMA_PRIORITY */
+
+#ifndef SPI5_RX_DMA_PREEMPT_PRIORITY
+#define SPI5_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI5_RX_DMA_SUB_PRIORITY
+#define SPI5_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI5_RX_DMA_SUB_PRIORITY */
 #ifndef SPI5_RX_DMA_CONFIG
-#define SPI5_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI5_RX_DMA_RCC,                 \
-        .Instance = SPI5_RX_DMA_INSTANCE,           \
-        .request = SPI5_RX_DMA_CHANNEL,             \
-        .dma_irq = SPI5_RX_DMA_IRQ,                 \
-    }
+#define SPI5_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI5_RX_DMA_INSTANCE,         \
+        SPI5_RX_DMA_RCC,              \
+        SPI5_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI5_RX_DMA_CHANNEL,          \
+        SPI5_RX_DMA_PRIORITY,         \
+        SPI5_RX_DMA_PREEMPT_PRIORITY, \
+        SPI5_RX_DMA_SUB_PRIORITY)
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/uart_config.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2018-10-30     SummerGift   first version
  * 2019-01-03     zylx         modify dma support
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -20,210 +21,390 @@ extern "C" {
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_RX_DMA_INSTANCE,                         \
-        .request = UART1_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_RX_DMA_RCC,                               \
-        .dma_irq = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_CHANNEL,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART1_TX_DMA_INSTANCE,                         \
-        .request = UART1_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART1_TX_DMA_RCC,                               \
-        .dma_irq = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        UART1_TX_DMA_CHANNEL,          \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_RX_DMA_INSTANCE,                         \
-        .request = UART2_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_RX_DMA_RCC,                               \
-        .dma_irq = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_CHANNEL,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART2_TX_DMA_INSTANCE,                         \
-        .request = UART2_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART2_TX_DMA_RCC,                               \
-        .dma_irq = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_CHANNEL,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_RX_DMA_INSTANCE,                         \
-        .request = UART3_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_RX_DMA_RCC,                               \
-        .dma_irq = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_CHANNEL,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART3_TX_DMA_INSTANCE,                         \
-        .request = UART3_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART3_TX_DMA_RCC,                               \
-        .dma_irq = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        UART3_TX_DMA_CHANNEL,          \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
 #ifndef UART4_CONFIG
-#define UART4_CONFIG                                                \
-    {                                                               \
-        .name = "uart4",                                            \
-        .Instance = UART4,                                          \
-        .irq_type = UART4_IRQn,                                     \
+#define UART4_CONFIG            \
+    {                           \
+        .name = "uart4",        \
+        .Instance = UART4,      \
+        .irq_type = UART4_IRQn, \
     }
 #endif /* UART4_CONFIG */
 
 #if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_RX_DMA_PRIORITY
+#define UART4_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_RX_DMA_PRIORITY */
+
+#ifndef UART4_RX_DMA_PREEMPT_PRIORITY
+#define UART4_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_RX_DMA_SUB_PRIORITY
+#define UART4_RX_DMA_SUB_PRIORITY             0
+#endif /* UART4_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_RX_CONFIG
-#define UART4_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_RX_DMA_INSTANCE,                         \
-        .request = UART4_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_RX_DMA_RCC,                               \
-        .dma_irq = UART4_RX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART4_RX_DMA_INSTANCE,                 \
+        UART4_RX_DMA_RCC,                      \
+        UART4_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART4_RX_DMA_CHANNEL,                  \
+        UART4_RX_DMA_PRIORITY,                 \
+        UART4_RX_DMA_PREEMPT_PRIORITY,         \
+        UART4_RX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_RX_CONFIG */
 #endif /* BSP_UART4_RX_USING_DMA */
 
 #if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_DMA_PRIORITY
+#define UART4_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART4_TX_DMA_PRIORITY */
+
+#ifndef UART4_TX_DMA_PREEMPT_PRIORITY
+#define UART4_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART4_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART4_TX_DMA_SUB_PRIORITY
+#define UART4_TX_DMA_SUB_PRIORITY             0
+#endif /* UART4_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART4_DMA_TX_CONFIG
-#define UART4_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART4_TX_DMA_INSTANCE,                         \
-        .request = UART4_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART4_TX_DMA_RCC,                               \
-        .dma_irq = UART4_TX_DMA_IRQ,                               \
-    }
+#define UART4_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART4_TX_DMA_INSTANCE,         \
+        UART4_TX_DMA_RCC,              \
+        UART4_TX_DMA_IRQ,              \
+        0U,                            \
+        UART4_TX_DMA_CHANNEL,          \
+        UART4_TX_DMA_PRIORITY,         \
+        UART4_TX_DMA_PREEMPT_PRIORITY, \
+        UART4_TX_DMA_SUB_PRIORITY)
 #endif /* UART4_DMA_TX_CONFIG */
-#endif /* BSP_UART4_RX_USING_DMA */
+#endif /* BSP_UART4_TX_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
-#define UART5_CONFIG                                                \
-    {                                                               \
-        .name = "uart5",                                            \
-        .Instance = UART5,                                          \
-        .irq_type = UART5_IRQn,                                     \
+#define UART5_CONFIG            \
+    {                           \
+        .name = "uart5",        \
+        .Instance = UART5,      \
+        .irq_type = UART5_IRQn, \
     }
 #endif /* UART5_CONFIG */
 
 #if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_RX_DMA_PRIORITY
+#define UART5_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_RX_DMA_PRIORITY */
+
+#ifndef UART5_RX_DMA_PREEMPT_PRIORITY
+#define UART5_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_RX_DMA_SUB_PRIORITY
+#define UART5_RX_DMA_SUB_PRIORITY             0
+#endif /* UART5_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_RX_CONFIG
-#define UART5_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_RX_DMA_INSTANCE,                         \
-        .request = UART5_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_RX_DMA_RCC,                               \
-        .dma_irq = UART5_RX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART5_RX_DMA_INSTANCE,                 \
+        UART5_RX_DMA_RCC,                      \
+        UART5_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART5_RX_DMA_CHANNEL,                  \
+        UART5_RX_DMA_PRIORITY,                 \
+        UART5_RX_DMA_PREEMPT_PRIORITY,         \
+        UART5_RX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_RX_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
 #if defined(BSP_UART5_TX_USING_DMA)
+#ifndef UART5_TX_DMA_PRIORITY
+#define UART5_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART5_TX_DMA_PRIORITY */
+
+#ifndef UART5_TX_DMA_PREEMPT_PRIORITY
+#define UART5_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART5_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART5_TX_DMA_SUB_PRIORITY
+#define UART5_TX_DMA_SUB_PRIORITY             0
+#endif /* UART5_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART5_DMA_TX_CONFIG
-#define UART5_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART5_TX_DMA_INSTANCE,                         \
-        .request = UART5_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART5_TX_DMA_RCC,                               \
-        .dma_irq = UART5_TX_DMA_IRQ,                               \
-    }
+#define UART5_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART5_TX_DMA_INSTANCE,         \
+        UART5_TX_DMA_RCC,              \
+        UART5_TX_DMA_IRQ,              \
+        0U,                            \
+        UART5_TX_DMA_CHANNEL,          \
+        UART5_TX_DMA_PRIORITY,         \
+        UART5_TX_DMA_PREEMPT_PRIORITY, \
+        UART5_TX_DMA_SUB_PRIORITY)
 #endif /* UART5_DMA_TX_CONFIG */
 #endif /* BSP_UART5_TX_USING_DMA */
 #endif /* BSP_USING_UART5 */
 
 #if defined(BSP_USING_UART6)
 #ifndef UART6_CONFIG
-#define UART6_CONFIG                                                \
-    {                                                               \
-        .name = "uart6",                                            \
-        .Instance = USART6,                                         \
-        .irq_type = USART6_IRQn,                                    \
+#define UART6_CONFIG             \
+    {                            \
+        .name = "uart6",         \
+        .Instance = USART6,      \
+        .irq_type = USART6_IRQn, \
     }
 #endif /* UART6_CONFIG */
 
 #if defined(BSP_UART6_RX_USING_DMA)
+#ifndef UART6_RX_DMA_PRIORITY
+#define UART6_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_RX_DMA_PRIORITY */
+
+#ifndef UART6_RX_DMA_PREEMPT_PRIORITY
+#define UART6_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_RX_DMA_SUB_PRIORITY
+#define UART6_RX_DMA_SUB_PRIORITY             0
+#endif /* UART6_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_RX_CONFIG
-#define UART6_DMA_RX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_RX_DMA_INSTANCE,                         \
-        .request = UART6_RX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_RX_DMA_RCC,                               \
-        .dma_irq = UART6_RX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART6_RX_DMA_INSTANCE,                 \
+        UART6_RX_DMA_RCC,                      \
+        UART6_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART6_RX_DMA_CHANNEL,                  \
+        UART6_RX_DMA_PRIORITY,                 \
+        UART6_RX_DMA_PREEMPT_PRIORITY,         \
+        UART6_RX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_RX_CONFIG */
 #endif /* BSP_UART6_RX_USING_DMA */
 
 #if defined(BSP_UART6_TX_USING_DMA)
+#ifndef UART6_TX_DMA_PRIORITY
+#define UART6_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART6_TX_DMA_PRIORITY */
+
+#ifndef UART6_TX_DMA_PREEMPT_PRIORITY
+#define UART6_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART6_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART6_TX_DMA_SUB_PRIORITY
+#define UART6_TX_DMA_SUB_PRIORITY             0
+#endif /* UART6_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART6_DMA_TX_CONFIG
-#define UART6_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = UART6_TX_DMA_INSTANCE,                         \
-        .request = UART6_TX_DMA_CHANNEL,                           \
-        .dma_rcc = UART6_TX_DMA_RCC,                               \
-        .dma_irq = UART6_TX_DMA_IRQ,                               \
-    }
+#define UART6_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART6_TX_DMA_INSTANCE,         \
+        UART6_TX_DMA_RCC,              \
+        UART6_TX_DMA_IRQ,              \
+        0U,                            \
+        UART6_TX_DMA_CHANNEL,          \
+        UART6_TX_DMA_PRIORITY,         \
+        UART6_TX_DMA_PREEMPT_PRIORITY, \
+        UART6_TX_DMA_SUB_PRIORITY)
 #endif /* UART6_DMA_TX_CONFIG */
 #endif /* BSP_UART6_TX_USING_DMA */
 #endif /* BSP_USING_UART6 */

bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-22     zylx         first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,28 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Request = QSPI_DMA_REQUEST,                      \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG                 \
+    STM32_GPDMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,              \
+        QSPI_DMA_RCC,                   \
+        QSPI_DMA_IRQ,                   \
+        QSPI_DMA_REQUEST,               \
+        QSPI_DMA_PRIORITY,              \
+        QSPI_DMA_PREEMPT_PRIORITY,      \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/sdio_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-12-13     BalanceTWK   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SDIO_CONFIG_H__
@@ -19,17 +20,49 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_SDIO
-#define SDIO_BUS_CONFIG                                  \
-    {                                                    \
-        .Instance = SDMMC1,                              \
-        .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN,            \
-        .dma_rx.Instance = DMA2_Channel4,                \
-        .dma_rx.request = DMA_REQUEST_7,                 \
-        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
-        .dma_tx.Instance = DMA2_Channel5,                \
-        .dma_tx.request = DMA_REQUEST_7,                 \
-        .dma_tx.dma_irq = DMA2_Channel5_IRQn,            \
+#ifndef SDIO_RX_DMA_PRIORITY
+#define SDIO_RX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_RX_DMA_PRIORITY */
+
+#ifndef SDIO_RX_DMA_PREEMPT_PRIORITY
+#define SDIO_RX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_RX_DMA_SUB_PRIORITY
+#define SDIO_RX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_RX_DMA_SUB_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PRIORITY
+#define SDIO_TX_DMA_PRIORITY                      DMA_PRIORITY_MEDIUM
+#endif /* SDIO_TX_DMA_PRIORITY */
+
+#ifndef SDIO_TX_DMA_PREEMPT_PRIORITY
+#define SDIO_TX_DMA_PREEMPT_PRIORITY              0
+#endif /* SDIO_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SDIO_TX_DMA_SUB_PRIORITY
+#define SDIO_TX_DMA_SUB_PRIORITY                  0
+#endif /* SDIO_TX_DMA_SUB_PRIORITY */
+
+#define SDIO_BUS_CONFIG                               \
+    {                                                 \
+        .Instance = SDMMC1,                           \
+        .dma_rx = STM32_GPDMA_RX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel4,                            \
+            RCC_AHB1ENR_DMA2EN,                       \
+            DMA2_Channel4_IRQn,                       \
+            DMA_REQUEST_7,                            \
+            SDIO_RX_DMA_PRIORITY,                     \
+            SDIO_RX_DMA_PREEMPT_PRIORITY,             \
+            SDIO_RX_DMA_SUB_PRIORITY),                \
+        .dma_tx = STM32_GPDMA_TX_WORD_CONFIG_INIT_EX( \
+            DMA2_Channel5,                            \
+            RCC_AHB1ENR_DMA2EN,                       \
+            DMA2_Channel5_IRQn,                       \
+            DMA_REQUEST_7,                            \
+            SDIO_TX_DMA_PRIORITY,                     \
+            SDIO_TX_DMA_PREEMPT_PRIORITY,             \
+            SDIO_TX_DMA_SUB_PRIORITY),                \
     }
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,106 +20,184 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI1,                                   \
-        .bus_name = "spi1",                                 \
-        .irq_type = SPI1_IRQn,                      \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_TX_DMA_RCC,                         \
-        .Instance = SPI1_TX_DMA_INSTANCE,                   \
-        .request = SPI1_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_TX_DMA_IRQ,                         \
-    }
+#define SPI1_TX_DMA_CONFIG              \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,           \
+        SPI1_TX_DMA_RCC,                \
+        SPI1_TX_DMA_IRQ,                \
+        SPI1_TX_DMA_REQUEST,            \
+        SPI1_TX_DMA_PRIORITY,           \
+        SPI1_TX_DMA_PREEMPT_PRIORITY,   \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_RX_DMA_RCC,                         \
-        .Instance = SPI1_RX_DMA_INSTANCE,                   \
-        .request = SPI1_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_RX_DMA_IRQ,                         \
-    }
+#define SPI1_RX_DMA_CONFIG              \
+    STM32_GPDMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,           \
+        SPI1_RX_DMA_RCC,                \
+        SPI1_RX_DMA_IRQ,                \
+        SPI1_RX_DMA_REQUEST,            \
+        SPI1_RX_DMA_PRIORITY,           \
+        SPI1_RX_DMA_PREEMPT_PRIORITY,   \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI2,                                   \
-        .bus_name = "spi2",                                 \
-        .irq_type = SPI2_IRQn,                      \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_TX_DMA_RCC,                         \
-        .Instance = SPI2_TX_DMA_INSTANCE,                   \
-        .request = SPI2_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_TX_DMA_IRQ,                         \
-    }
+#define SPI2_TX_DMA_CONFIG              \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,           \
+        SPI2_TX_DMA_RCC,                \
+        SPI2_TX_DMA_IRQ,                \
+        SPI2_TX_DMA_REQUEST,            \
+        SPI2_TX_DMA_PRIORITY,           \
+        SPI2_TX_DMA_PREEMPT_PRIORITY,   \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_RX_DMA_RCC,                         \
-        .Instance = SPI2_RX_DMA_INSTANCE,                   \
-        .request = SPI2_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_RX_DMA_IRQ,                         \
-    }
+#define SPI2_RX_DMA_CONFIG              \
+    STM32_GPDMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,           \
+        SPI2_RX_DMA_RCC,                \
+        SPI2_RX_DMA_IRQ,                \
+        SPI2_RX_DMA_REQUEST,            \
+        SPI2_RX_DMA_PRIORITY,           \
+        SPI2_RX_DMA_PREEMPT_PRIORITY,   \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI3,                                   \
-        .bus_name = "spi3",                                 \
-        .irq_type = SPI3_IRQn,                      \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_TX_DMA_RCC,                         \
-        .Instance = SPI3_TX_DMA_INSTANCE,                   \
-        .request = SPI3_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_TX_DMA_IRQ,                         \
-    }
+#define SPI3_TX_DMA_CONFIG              \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,           \
+        SPI3_TX_DMA_RCC,                \
+        SPI3_TX_DMA_IRQ,                \
+        SPI3_TX_DMA_REQUEST,            \
+        SPI3_TX_DMA_PRIORITY,           \
+        SPI3_TX_DMA_PREEMPT_PRIORITY,   \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_RX_DMA_RCC,                         \
-        .Instance = SPI3_RX_DMA_INSTANCE,                   \
-        .request = SPI3_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_RX_DMA_IRQ,                         \
-    }
+#define SPI3_RX_DMA_CONFIG              \
+    STM32_GPDMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,           \
+        SPI3_RX_DMA_RCC,                \
+        SPI3_RX_DMA_IRQ,                \
+        SPI3_RX_DMA_REQUEST,            \
+        SPI3_RX_DMA_PRIORITY,           \
+        SPI3_RX_DMA_PREEMPT_PRIORITY,   \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,128 +20,226 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                       \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,                 \
+        LPUART1_RX_DMA_RCC,                      \
+        LPUART1_RX_DMA_IRQ,                      \
+        LPUART1_RX_DMA_REQUEST,                  \
+        LPUART1_DMA_PRIORITY,                    \
+        LPUART1_DMA_PREEMPT_PRIORITY,            \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                   \
+        UART1_RX_DMA_RCC,                        \
+        UART1_RX_DMA_IRQ,                        \
+        UART1_RX_DMA_REQUEST,                    \
+        UART1_RX_DMA_PRIORITY,                   \
+        UART1_RX_DMA_PREEMPT_PRIORITY,           \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request  = UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART1_TX_DMA_INSTANCE,          \
+        UART1_TX_DMA_RCC,               \
+        UART1_TX_DMA_IRQ,               \
+        UART1_TX_DMA_REQUEST,           \
+        UART1_TX_DMA_PRIORITY,          \
+        UART1_TX_DMA_PREEMPT_PRIORITY,  \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                   \
+        UART2_RX_DMA_RCC,                        \
+        UART2_RX_DMA_IRQ,                        \
+        UART2_RX_DMA_REQUEST,                    \
+        UART2_RX_DMA_PRIORITY,                   \
+        UART2_RX_DMA_PREEMPT_PRIORITY,           \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request  = UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART2_TX_DMA_INSTANCE,          \
+        UART2_TX_DMA_RCC,               \
+        UART2_TX_DMA_IRQ,               \
+        UART2_TX_DMA_REQUEST,           \
+        UART2_TX_DMA_PRIORITY,          \
+        UART2_TX_DMA_PREEMPT_PRIORITY,  \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                      \
+    STM32_GPDMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                   \
+        UART3_RX_DMA_RCC,                        \
+        UART3_RX_DMA_IRQ,                        \
+        UART3_RX_DMA_REQUEST,                    \
+        UART3_RX_DMA_PRIORITY,                   \
+        UART3_RX_DMA_PREEMPT_PRIORITY,           \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .request  = UART3_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG             \
+    STM32_GPDMA_TX_BYTE_CONFIG_INIT_EX( \
+        UART3_TX_DMA_INSTANCE,          \
+        UART3_TX_DMA_RCC,               \
+        UART3_TX_DMA_IRQ,               \
+        UART3_TX_DMA_REQUEST,           \
+        UART3_TX_DMA_PRIORITY,          \
+        UART3_TX_DMA_PREEMPT_PRIORITY,  \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/qspi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author            Notes
  * 2020-10-14     PeakRacing   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __QSPI_CONFIG_H__
@@ -30,19 +31,29 @@ extern "C" {
 #endif /* BSP_USING_QSPI */
 
 #ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_PRIORITY
+#define QSPI_DMA_PRIORITY                         DMA_PRIORITY_LOW
+#endif /* QSPI_DMA_PRIORITY */
+
+#ifndef QSPI_DMA_PREEMPT_PRIORITY
+#define QSPI_DMA_PREEMPT_PRIORITY                 0
+#endif /* QSPI_DMA_PREEMPT_PRIORITY */
+
+#ifndef QSPI_DMA_SUB_PRIORITY
+#define QSPI_DMA_SUB_PRIORITY                     0
+#endif /* QSPI_DMA_SUB_PRIORITY */
+
 #ifndef QSPI_DMA_CONFIG
-#define QSPI_DMA_CONFIG                                        \
-    {                                                          \
-        .Instance = QSPI_DMA_INSTANCE,                         \
-        .Init.Request = QSPI_DMA_REQUEST,                      \
-        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
-        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
-        .Init.MemInc = DMA_MINC_ENABLE,                        \
-        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
-        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
-        .Init.Mode = DMA_NORMAL,                               \
-        .Init.Priority = DMA_PRIORITY_LOW                      \
-    }
+#define QSPI_DMA_CONFIG               \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        QSPI_DMA_INSTANCE,            \
+        QSPI_DMA_RCC,                 \
+        QSPI_DMA_IRQ,                 \
+        0U,                           \
+        QSPI_DMA_REQUEST,             \
+        QSPI_DMA_PRIORITY,            \
+        QSPI_DMA_PREEMPT_PRIORITY,    \
+        QSPI_DMA_SUB_PRIORITY)
 #endif /* QSPI_DMA_CONFIG */
 #endif /* BSP_QSPI_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author            Notes
  * 2020-10-14     PeakRacing   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,106 +20,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI1,                                   \
-        .bus_name = "spi1",                                 \
-        .irq_type = SPI1_IRQn,                              \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_TX_DMA_RCC,                         \
-        .Instance = SPI1_TX_DMA_INSTANCE,                   \
-        .request = SPI1_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_TX_DMA_IRQ,                         \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_REQUEST,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_RX_DMA_RCC,                         \
-        .Instance = SPI1_RX_DMA_INSTANCE,                   \
-        .request = SPI1_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_RX_DMA_IRQ,                         \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_RX_DMA_REQUEST,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI2,                                   \
-        .bus_name = "spi2",                                 \
-        .irq_type = SPI2_IRQn,                              \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_TX_DMA_RCC,                         \
-        .Instance = SPI2_TX_DMA_INSTANCE,                   \
-        .request = SPI2_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_TX_DMA_IRQ,                         \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_TX_DMA_REQUEST,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_RX_DMA_RCC,                         \
-        .Instance = SPI2_RX_DMA_INSTANCE,                   \
-        .request = SPI2_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_RX_DMA_IRQ,                         \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_RX_DMA_REQUEST,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI3,                                   \
-        .bus_name = "spi3",                                 \
-        .irq_type = SPI3_IRQn,                              \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_TX_DMA_RCC,                         \
-        .Instance = SPI3_TX_DMA_INSTANCE,                   \
-        .request = SPI3_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_TX_DMA_IRQ,                         \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_TX_DMA_REQUEST,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_RX_DMA_RCC,                         \
-        .Instance = SPI3_RX_DMA_INSTANCE,                   \
-        .request = SPI3_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_RX_DMA_IRQ,                         \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_RX_DMA_REQUEST,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author            Notes
  * 2020-10-14     PeakRacing   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,128 +20,233 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_CONFIG
-#define LPUART1_DMA_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        0U,                                    \
+        LPUART1_RX_DMA_REQUEST,                \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 #endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_DMA_PRIORITY
+#define UART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_TX_DMA_PRIORITY */
+
+#ifndef UART1_TX_DMA_PREEMPT_PRIORITY
+#define UART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_TX_DMA_SUB_PRIORITY
+#define UART1_TX_DMA_SUB_PRIORITY             0
+#endif /* UART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_TX_CONFIG
-#define UART1_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_TX_DMA_INSTANCE,                          \
-        .request  = UART1_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_TX_DMA_RCC,                               \
-        .dma_irq  = UART1_TX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART1_TX_DMA_INSTANCE,         \
+        UART1_TX_DMA_RCC,              \
+        UART1_TX_DMA_IRQ,              \
+        0U,                            \
+        UART1_TX_DMA_REQUEST,          \
+        UART1_TX_DMA_PRIORITY,         \
+        UART1_TX_DMA_PREEMPT_PRIORITY, \
+        UART1_TX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_TX_CONFIG */
 #endif /* BSP_UART1_TX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_DMA_PRIORITY
+#define UART2_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_TX_DMA_PRIORITY */
+
+#ifndef UART2_TX_DMA_PREEMPT_PRIORITY
+#define UART2_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_TX_DMA_SUB_PRIORITY
+#define UART2_TX_DMA_SUB_PRIORITY             0
+#endif /* UART2_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_TX_CONFIG
-#define UART2_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_TX_DMA_INSTANCE,                          \
-        .request  = UART2_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_TX_DMA_RCC,                               \
-        .dma_irq  = UART2_TX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART2_TX_DMA_INSTANCE,         \
+        UART2_TX_DMA_RCC,              \
+        UART2_TX_DMA_IRQ,              \
+        0U,                            \
+        UART2_TX_DMA_REQUEST,          \
+        UART2_TX_DMA_PRIORITY,         \
+        UART2_TX_DMA_PREEMPT_PRIORITY, \
+        UART2_TX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_TX_CONFIG */
 #endif /* BSP_UART2_TX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */
 
 #if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_DMA_PRIORITY
+#define UART3_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_TX_DMA_PRIORITY */
+
+#ifndef UART3_TX_DMA_PREEMPT_PRIORITY
+#define UART3_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_TX_DMA_SUB_PRIORITY
+#define UART3_TX_DMA_SUB_PRIORITY             0
+#endif /* UART3_TX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_TX_CONFIG
-#define UART3_DMA_TX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_TX_DMA_INSTANCE,                          \
-        .request  = UART3_TX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_TX_DMA_RCC,                               \
-        .dma_irq  = UART3_TX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(  \
+        UART3_TX_DMA_INSTANCE,         \
+        UART3_TX_DMA_RCC,              \
+        UART3_TX_DMA_IRQ,              \
+        0U,                            \
+        UART3_TX_DMA_REQUEST,          \
+        UART3_TX_DMA_PRIORITY,         \
+        UART3_TX_DMA_PREEMPT_PRIORITY, \
+        UART3_TX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_TX_CONFIG */
 #endif /* BSP_UART3_TX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/spi_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -19,106 +20,190 @@ extern "C" {
 
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI1,                                   \
-        .bus_name = "spi1",                                 \
-        .irq_type = SPI1_IRQn,                              \
+#define SPI1_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI1,      \
+        .bus_name = "spi1",    \
+        .irq_type = SPI1_IRQn, \
     }
 #endif /* SPI1_BUS_CONFIG */
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_PRIORITY
+#define SPI1_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI1_TX_DMA_PRIORITY */
+
+#ifndef SPI1_TX_DMA_PREEMPT_PRIORITY
+#define SPI1_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_TX_DMA_SUB_PRIORITY
+#define SPI1_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_TX_DMA_SUB_PRIORITY */
 #ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_TX_DMA_RCC,                         \
-        .Instance = SPI1_TX_DMA_INSTANCE,                   \
-        .request = SPI1_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_TX_DMA_IRQ,                         \
-    }
+#define SPI1_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI1_TX_DMA_INSTANCE,         \
+        SPI1_TX_DMA_RCC,              \
+        SPI1_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_TX_DMA_REQUEST,          \
+        SPI1_TX_DMA_PRIORITY,         \
+        SPI1_TX_DMA_PREEMPT_PRIORITY, \
+        SPI1_TX_DMA_SUB_PRIORITY)
 #endif /* SPI1_TX_DMA_CONFIG */
 #endif /* BSP_SPI1_TX_USING_DMA */
 
 #ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_PRIORITY
+#define SPI1_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI1_RX_DMA_PRIORITY */
+
+#ifndef SPI1_RX_DMA_PREEMPT_PRIORITY
+#define SPI1_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI1_RX_DMA_SUB_PRIORITY
+#define SPI1_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI1_RX_DMA_SUB_PRIORITY */
 #ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI1_RX_DMA_RCC,                         \
-        .Instance = SPI1_RX_DMA_INSTANCE,                   \
-        .request = SPI1_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI1_RX_DMA_IRQ,                         \
-    }
+#define SPI1_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI1_RX_DMA_INSTANCE,         \
+        SPI1_RX_DMA_RCC,              \
+        SPI1_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI1_RX_DMA_REQUEST,          \
+        SPI1_RX_DMA_PRIORITY,         \
+        SPI1_RX_DMA_PREEMPT_PRIORITY, \
+        SPI1_RX_DMA_SUB_PRIORITY)
 #endif /* SPI1_RX_DMA_CONFIG */
 #endif /* BSP_SPI1_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI2
 #ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI2,                                   \
-        .bus_name = "spi2",                                 \
-        .irq_type = SPI2_IRQn,                              \
+#define SPI2_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI2,      \
+        .bus_name = "spi2",    \
+        .irq_type = SPI2_IRQn, \
     }
 #endif /* SPI2_BUS_CONFIG */
 #endif /* BSP_USING_SPI2 */
 
 #ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_PRIORITY
+#define SPI2_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI2_TX_DMA_PRIORITY */
+
+#ifndef SPI2_TX_DMA_PREEMPT_PRIORITY
+#define SPI2_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI2_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_TX_DMA_SUB_PRIORITY
+#define SPI2_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_TX_DMA_SUB_PRIORITY */
 #ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_TX_DMA_RCC,                         \
-        .Instance = SPI2_TX_DMA_INSTANCE,                   \
-        .request = SPI2_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_TX_DMA_IRQ,                         \
-    }
+#define SPI2_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI2_TX_DMA_INSTANCE,         \
+        SPI2_TX_DMA_RCC,              \
+        SPI2_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_TX_DMA_REQUEST,          \
+        SPI2_TX_DMA_PRIORITY,         \
+        SPI2_TX_DMA_PREEMPT_PRIORITY, \
+        SPI2_TX_DMA_SUB_PRIORITY)
 #endif /* SPI2_TX_DMA_CONFIG */
 #endif /* BSP_SPI2_TX_USING_DMA */
 
 #ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_PRIORITY
+#define SPI2_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI2_RX_DMA_PRIORITY */
+
+#ifndef SPI2_RX_DMA_PREEMPT_PRIORITY
+#define SPI2_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI2_RX_DMA_SUB_PRIORITY
+#define SPI2_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI2_RX_DMA_SUB_PRIORITY */
 #ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI2_RX_DMA_RCC,                         \
-        .Instance = SPI2_RX_DMA_INSTANCE,                   \
-        .request = SPI2_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI2_RX_DMA_IRQ,                         \
-    }
+#define SPI2_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI2_RX_DMA_INSTANCE,         \
+        SPI2_RX_DMA_RCC,              \
+        SPI2_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI2_RX_DMA_REQUEST,          \
+        SPI2_RX_DMA_PRIORITY,         \
+        SPI2_RX_DMA_PREEMPT_PRIORITY, \
+        SPI2_RX_DMA_SUB_PRIORITY)
 #endif /* SPI2_RX_DMA_CONFIG */
 #endif /* BSP_SPI2_RX_USING_DMA */
 
 #ifdef BSP_USING_SPI3
 #ifndef SPI3_BUS_CONFIG
-#define SPI3_BUS_CONFIG                                     \
-    {                                                       \
-        .Instance = SPI3,                                   \
-        .bus_name = "spi3",                                 \
-        .irq_type = SPI3_IRQn,                              \
+#define SPI3_BUS_CONFIG        \
+    {                          \
+        .Instance = SPI3,      \
+        .bus_name = "spi3",    \
+        .irq_type = SPI3_IRQn, \
     }
 #endif /* SPI3_BUS_CONFIG */
 #endif /* BSP_USING_SPI3 */
 
 #ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_PRIORITY
+#define SPI3_TX_DMA_PRIORITY                  DMA_PRIORITY_LOW
+#endif /* SPI3_TX_DMA_PRIORITY */
+
+#ifndef SPI3_TX_DMA_PREEMPT_PRIORITY
+#define SPI3_TX_DMA_PREEMPT_PRIORITY          1
+#endif /* SPI3_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_TX_DMA_SUB_PRIORITY
+#define SPI3_TX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_TX_DMA_SUB_PRIORITY */
 #ifndef SPI3_TX_DMA_CONFIG
-#define SPI3_TX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_TX_DMA_RCC,                         \
-        .Instance = SPI3_TX_DMA_INSTANCE,                   \
-        .request = SPI3_TX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_TX_DMA_IRQ,                         \
-    }
+#define SPI3_TX_DMA_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX( \
+        SPI3_TX_DMA_INSTANCE,         \
+        SPI3_TX_DMA_RCC,              \
+        SPI3_TX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_TX_DMA_REQUEST,          \
+        SPI3_TX_DMA_PRIORITY,         \
+        SPI3_TX_DMA_PREEMPT_PRIORITY, \
+        SPI3_TX_DMA_SUB_PRIORITY)
 #endif /* SPI3_TX_DMA_CONFIG */
 #endif /* BSP_SPI3_TX_USING_DMA */
 
 #ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_PRIORITY
+#define SPI3_RX_DMA_PRIORITY                  DMA_PRIORITY_HIGH
+#endif /* SPI3_RX_DMA_PRIORITY */
+
+#ifndef SPI3_RX_DMA_PREEMPT_PRIORITY
+#define SPI3_RX_DMA_PREEMPT_PRIORITY          0
+#endif /* SPI3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef SPI3_RX_DMA_SUB_PRIORITY
+#define SPI3_RX_DMA_SUB_PRIORITY              0
+#endif /* SPI3_RX_DMA_SUB_PRIORITY */
 #ifndef SPI3_RX_DMA_CONFIG
-#define SPI3_RX_DMA_CONFIG                                  \
-    {                                                       \
-        .dma_rcc = SPI3_RX_DMA_RCC,                         \
-        .Instance = SPI3_RX_DMA_INSTANCE,                   \
-        .request = SPI3_RX_DMA_REQUEST,                     \
-        .dma_irq = SPI3_RX_DMA_IRQ,                         \
-    }
+#define SPI3_RX_DMA_CONFIG            \
+    STM32_DMA_RX_BYTE_CONFIG_INIT_EX( \
+        SPI3_RX_DMA_INSTANCE,         \
+        SPI3_RX_DMA_RCC,              \
+        SPI3_RX_DMA_IRQ,              \
+        0U,                           \
+        SPI3_RX_DMA_REQUEST,          \
+        SPI3_RX_DMA_PRIORITY,         \
+        SPI3_RX_DMA_PREEMPT_PRIORITY, \
+        SPI3_RX_DMA_SUB_PRIORITY)
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 

bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/uart_config.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2026-04-13     wdfk-prog    Unify DMA config descriptors
  */
 
 #ifndef __UART_CONFIG_H__
@@ -19,104 +20,180 @@ extern "C" {
 
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
-#define LPUART1_CONFIG                                              \
-    {                                                               \
-        .name = "lpuart1",                                          \
-        .Instance = LPUART1,                                        \
-        .irq_type = LPUART1_IRQn,                                   \
+#define LPUART1_CONFIG            \
+    {                             \
+        .name = "lpuart1",        \
+        .Instance = LPUART1,      \
+        .irq_type = LPUART1_IRQn, \
     }
 #endif /* LPUART1_CONFIG */
 #if defined(BSP_LPUART1_RX_USING_DMA)
-#ifndef LPUART1_DMA_RX_CONFIG
-#define LPUART1_DMA_RX_CONFIG                                          \
-    {                                                               \
-        .Instance = LPUART1_RX_DMA_INSTANCE,                        \
-        .request  = LPUART1_RX_DMA_REQUEST,                         \
-        .dma_rcc  = LPUART1_RX_DMA_RCC,                             \
-        .dma_irq  = LPUART1_RX_DMA_IRQ,                             \
-    }
+#ifndef LPUART1_DMA_PRIORITY
+#define LPUART1_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_DMA_PRIORITY */
+
+#ifndef LPUART1_DMA_PREEMPT_PRIORITY
+#define LPUART1_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_DMA_SUB_PRIORITY
+#define LPUART1_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_DMA_SUB_PRIORITY */
+
+#ifndef LPUART1_DMA_CONFIG
+#define LPUART1_DMA_CONFIG                     \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        LPUART1_RX_DMA_INSTANCE,               \
+        LPUART1_RX_DMA_RCC,                    \
+        LPUART1_RX_DMA_IRQ,                    \
+        0U,                                    \
+        LPUART1_RX_DMA_REQUEST,                \
+        LPUART1_DMA_PRIORITY,                  \
+        LPUART1_DMA_PREEMPT_PRIORITY,          \
+        LPUART1_DMA_SUB_PRIORITY)
 #endif /* LPUART1_DMA_CONFIG */
 #endif /* BSP_LPUART1_RX_USING_DMA */
 
 
 #if defined(BSP_LPUART1_TX_USING_DMA)
+#ifndef LPUART1_TX_DMA_PRIORITY
+#define LPUART1_TX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* LPUART1_TX_DMA_PRIORITY */
+
+#ifndef LPUART1_TX_DMA_PREEMPT_PRIORITY
+#define LPUART1_TX_DMA_PREEMPT_PRIORITY         0
+#endif /* LPUART1_TX_DMA_PREEMPT_PRIORITY */
+
+#ifndef LPUART1_TX_DMA_SUB_PRIORITY
+#define LPUART1_TX_DMA_SUB_PRIORITY             0
+#endif /* LPUART1_TX_DMA_SUB_PRIORITY */
+
 #ifndef LPUART1_DMA_TX_CONFIG
-#define LPUART1_DMA_TX_CONFIG                                        \
-    {                                                              \
-        .Instance = LPUART1_TX_DMA_INSTANCE,                         \
-        .dma_rcc = LPUART1_TX_DMA_RCC,                               \
-        .dma_irq = LPUART1_TX_DMA_IRQ,                               \
-    }
-#endif /* UART1_DMA_TX_CONFIG */
-#endif /* BSP_UART1_TX_USING_DMA */
-#endif /* BSP_USING_UART1 */
+#define LPUART1_DMA_TX_CONFIG            \
+    STM32_DMA_TX_BYTE_CONFIG_INIT_EX(    \
+        LPUART1_TX_DMA_INSTANCE,         \
+        LPUART1_TX_DMA_RCC,              \
+        LPUART1_TX_DMA_IRQ,              \
+        0U,                              \
+        LPUART1_TX_DMA_REQUEST,          \
+        LPUART1_TX_DMA_PRIORITY,         \
+        LPUART1_TX_DMA_PREEMPT_PRIORITY, \
+        LPUART1_TX_DMA_SUB_PRIORITY)
+#endif /* LPUART1_DMA_TX_CONFIG */
+#endif /* BSP_LPUART1_TX_USING_DMA */
+#endif /* BSP_USING_LPUART1 */
 
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
-#define UART1_CONFIG                                                \
-    {                                                               \
-        .name = "uart1",                                            \
-        .Instance = USART1,                                         \
-        .irq_type = USART1_IRQn,                                    \
+#define UART1_CONFIG             \
+    {                            \
+        .name = "uart1",         \
+        .Instance = USART1,      \
+        .irq_type = USART1_IRQn, \
     }
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */
 
 #if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_RX_DMA_PRIORITY
+#define UART1_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART1_RX_DMA_PRIORITY */
+
+#ifndef UART1_RX_DMA_PREEMPT_PRIORITY
+#define UART1_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART1_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART1_RX_DMA_SUB_PRIORITY
+#define UART1_RX_DMA_SUB_PRIORITY             0
+#endif /* UART1_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .request  = UART1_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
+#define UART1_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART1_RX_DMA_INSTANCE,                 \
+        UART1_RX_DMA_RCC,                      \
+        UART1_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART1_RX_DMA_REQUEST,                  \
+        UART1_RX_DMA_PRIORITY,                 \
+        UART1_RX_DMA_PREEMPT_PRIORITY,         \
+        UART1_RX_DMA_SUB_PRIORITY)
 #endif /* UART1_DMA_RX_CONFIG */
 #endif /* BSP_UART1_RX_USING_DMA */
 
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
-#define UART2_CONFIG                                                \
-    {                                                               \
-        .name = "uart2",                                            \
-        .Instance = USART2,                                         \
-        .irq_type = USART2_IRQn,                                    \
+#define UART2_CONFIG             \
+    {                            \
+        .name = "uart2",         \
+        .Instance = USART2,      \
+        .irq_type = USART2_IRQn, \
     }
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */
 
 #if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_RX_DMA_PRIORITY
+#define UART2_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART2_RX_DMA_PRIORITY */
+
+#ifndef UART2_RX_DMA_PREEMPT_PRIORITY
+#define UART2_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART2_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART2_RX_DMA_SUB_PRIORITY
+#define UART2_RX_DMA_SUB_PRIORITY             0
+#endif /* UART2_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .request  = UART2_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
+#define UART2_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART2_RX_DMA_INSTANCE,                 \
+        UART2_RX_DMA_RCC,                      \
+        UART2_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART2_RX_DMA_REQUEST,                  \
+        UART2_RX_DMA_PRIORITY,                 \
+        UART2_RX_DMA_PREEMPT_PRIORITY,         \
+        UART2_RX_DMA_SUB_PRIORITY)
 #endif /* UART2_DMA_RX_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
 #if defined(BSP_USING_UART3)
 #ifndef UART3_CONFIG
-#define UART3_CONFIG                                                \
-    {                                                               \
-        .name = "uart3",                                            \
-        .Instance = USART3,                                         \
-        .irq_type = USART3_IRQn,                                    \
+#define UART3_CONFIG             \
+    {                            \
+        .name = "uart3",         \
+        .Instance = USART3,      \
+        .irq_type = USART3_IRQn, \
     }
 #endif /* UART3_CONFIG */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_RX_DMA_PRIORITY
+#define UART3_RX_DMA_PRIORITY                 DMA_PRIORITY_MEDIUM
+#endif /* UART3_RX_DMA_PRIORITY */
+
+#ifndef UART3_RX_DMA_PREEMPT_PRIORITY
+#define UART3_RX_DMA_PREEMPT_PRIORITY         0
+#endif /* UART3_RX_DMA_PREEMPT_PRIORITY */
+
+#ifndef UART3_RX_DMA_SUB_PRIORITY
+#define UART3_RX_DMA_SUB_PRIORITY             0
+#endif /* UART3_RX_DMA_SUB_PRIORITY */
+
 #ifndef UART3_DMA_RX_CONFIG
-#define UART3_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART3_RX_DMA_INSTANCE,                          \
-        .request  = UART3_RX_DMA_REQUEST,                           \
-        .dma_rcc  = UART3_RX_DMA_RCC,                               \
-        .dma_irq  = UART3_RX_DMA_IRQ,                               \
-    }
+#define UART3_DMA_RX_CONFIG                    \
+    STM32_DMA_RX_BYTE_CIRCULAR_CONFIG_INIT_EX( \
+        UART3_RX_DMA_INSTANCE,                 \
+        UART3_RX_DMA_RCC,                      \
+        UART3_RX_DMA_IRQ,                      \
+        0U,                                    \
+        UART3_RX_DMA_REQUEST,                  \
+        UART3_RX_DMA_PRIORITY,                 \
+        UART3_RX_DMA_PREEMPT_PRIORITY,         \
+        UART3_RX_DMA_SUB_PRIORITY)
 #endif /* UART3_DMA_RX_CONFIG */
 #endif /* BSP_UART3_RX_USING_DMA */