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[bsp][cvitek] fix timer clock frequency for 25MHz crystal

  Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.

  The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
CYFS 1 неделя назад
Родитель
Сommit
fa0a61c45b
2 измененных файлов с 2 добавлено и 2 удалено
  1. 1 1
      bsp/cvitek/c906_little/board/board.c
  2. 1 1
      bsp/cvitek/cv18xx_risc-v/board/board.c

+ 1 - 1
bsp/cvitek/c906_little/board/board.c

@@ -16,7 +16,7 @@
 
 
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 {
 {
-    return 245000000ULL;
+    return 25000000ULL;
 }
 }
 
 
 void rt_hw_board_init(void)
 void rt_hw_board_init(void)

+ 1 - 1
bsp/cvitek/cv18xx_risc-v/board/board.c

@@ -48,7 +48,7 @@ struct mem_desc platform_mem_desc[] = {
 
 
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 {
 {
-    return 245000000ULL;
+    return 25000000ULL;
 }
 }
 
 
 void init_bss(void)
 void init_bss(void)