board.h 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2024-02-20 CDT first version
  10. */
  11. #ifndef __BOARD_H__
  12. #define __BOARD_H__
  13. #include <rtthread.h>
  14. #include "hc32_ll.h"
  15. #include "drv_gpio.h"
  16. #ifdef __cplusplus
  17. extern "C" {
  18. #endif
  19. #define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
  20. #define HC32_FLASH_WRITE_GRANULARITY (4)
  21. #define HC32_FLASH_SIZE (256 * 1024)
  22. #define HC32_FLASH_START_ADDRESS (0)
  23. #define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)
  24. #define HC32_SRAM_SIZE (64)
  25. #define HC32_SRAM_END (0x1FFF8000 + HC32_SRAM_SIZE * 1024)
  26. #ifdef __ARMCC_VERSION
  27. extern int Image$$RW_IRAM2$$ZI$$Limit;
  28. #define HEAP_BEGIN (&Image$$RW_IRAM2$$ZI$$Limit)
  29. #elif __ICCARM__
  30. #pragma section="HEAP"
  31. #define HEAP_BEGIN (__segment_end("HEAP"))
  32. #else
  33. extern int __bss_end;
  34. #define HEAP_BEGIN (&__bss_end)
  35. #endif
  36. #define HEAP_END HC32_SRAM_END
  37. void PeripheralRegister_Unlock(void);
  38. void PeripheralClock_Config(void);
  39. void SystemBase_Config(void);
  40. void SystemClock_Config(void);
  41. #ifdef __cplusplus
  42. }
  43. #endif
  44. #endif