serial.c 8.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-06-11 Bernard first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <inc/hw_types.h>
  13. #include <inc/hw_memmap.h>
  14. #include <inc/hw_uart.h>
  15. #include <inc/hw_ints.h>
  16. #include <driverlib/gpio.h>
  17. #include <driverlib/sysctl.h>
  18. #include <driverlib/interrupt.h>
  19. #include <driverlib/uart.h>
  20. #include "board.h"
  21. extern void rt_hw_interrupt_thread_switch(void);
  22. #define RT_UART_RX_BUFFER_SIZE 64
  23. /* LM3S serial device */
  24. struct rt_lm3s_serial
  25. {
  26. /* inherit from device */
  27. struct rt_device parent;
  28. rt_uint32_t hw_base;
  29. rt_uint32_t baudrate;
  30. /* reception field */
  31. rt_uint16_t save_index, read_index;
  32. rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
  33. };
  34. #ifdef RT_USING_UART1
  35. struct rt_lm3s_serial serial1;
  36. #endif
  37. #ifdef RT_USING_UART2
  38. struct rt_lm3s_serial serial2;
  39. #endif
  40. void rt_hw_serial_init(void);
  41. void rt_hw_uart_isr(struct rt_lm3s_serial* serial)
  42. {
  43. rt_device_t device;
  44. rt_uint32_t status;
  45. device = (struct rt_device*)serial;
  46. status = UARTIntStatus(serial->hw_base, true);
  47. /* clear interrupt status */
  48. UARTIntClear(serial->hw_base, status);
  49. if (device->flag & RT_DEVICE_FLAG_INT_RX)
  50. {
  51. char ch;
  52. rt_base_t level;
  53. while (UARTCharsAvail(serial->hw_base))
  54. {
  55. ch = UARTCharGetNonBlocking(serial->hw_base);
  56. /* disable interrupt */
  57. level = rt_hw_interrupt_disable();
  58. /* read character */
  59. serial->rx_buffer[serial->save_index] = ch;
  60. serial->save_index ++;
  61. if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
  62. serial->save_index = 0;
  63. /* if the next position is read index, discard this 'read char' */
  64. if (serial->save_index == serial->read_index)
  65. {
  66. serial->read_index ++;
  67. if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
  68. serial->read_index = 0;
  69. }
  70. /* enable interrupt */
  71. rt_hw_interrupt_enable(level);
  72. }
  73. /* invoke callback */
  74. if(device->rx_indicate != RT_NULL)
  75. {
  76. rt_int32_t length;
  77. length = serial->save_index - serial->read_index;
  78. if (length < 0) length += RT_UART_RX_BUFFER_SIZE;
  79. device->rx_indicate(device, length);
  80. }
  81. }
  82. }
  83. #ifdef RT_USING_UART1
  84. void rt_hw_uart_isr_1(int irqno)
  85. {
  86. /* enter interrupt */
  87. rt_interrupt_enter();
  88. /* get serial device */
  89. rt_hw_uart_isr(&serial1);
  90. /* leave interrupt */
  91. rt_interrupt_leave();
  92. rt_hw_interrupt_thread_switch();
  93. }
  94. #endif
  95. #ifdef RT_USING_UART2
  96. void rt_hw_uart_isr_2(int irqno)
  97. {
  98. /* enter interrupt */
  99. rt_interrupt_enter();
  100. /* get serial device */
  101. rt_hw_uart_isr(&serial2);
  102. /* leave interrupt */
  103. rt_interrupt_leave();
  104. rt_hw_interrupt_thread_switch();
  105. }
  106. #endif
  107. /**
  108. * @addtogroup LM3S
  109. */
  110. /*@{*/
  111. static rt_err_t rt_serial_init (rt_device_t dev)
  112. {
  113. return RT_EOK;
  114. }
  115. static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
  116. {
  117. struct rt_lm3s_serial* serial;
  118. serial = (struct rt_lm3s_serial*) dev;
  119. RT_ASSERT(serial != RT_NULL);
  120. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  121. {
  122. /* enable interrupt */
  123. if (serial->hw_base == UART0_BASE)
  124. IntEnable(INT_UART0);
  125. else if (serial->hw_base == UART1_BASE)
  126. IntEnable(INT_UART1);
  127. UARTIntEnable(serial->hw_base, UART_INT_RX | UART_INT_RT);
  128. }
  129. return RT_EOK;
  130. }
  131. static rt_err_t rt_serial_close(rt_device_t dev)
  132. {
  133. struct rt_lm3s_serial* serial;
  134. serial = (struct rt_lm3s_serial*) dev;
  135. RT_ASSERT(serial != RT_NULL);
  136. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  137. {
  138. /* disable UART rx interrupt */
  139. UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT);
  140. }
  141. return RT_EOK;
  142. }
  143. static rt_err_t rt_serial_control(rt_device_t dev, int cmd, void *args)
  144. {
  145. return RT_EOK;
  146. }
  147. static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  148. {
  149. rt_uint8_t* ptr;
  150. struct rt_lm3s_serial *serial = (struct rt_lm3s_serial*)dev;
  151. RT_ASSERT(serial != RT_NULL);
  152. /* point to buffer */
  153. ptr = (rt_uint8_t*) buffer;
  154. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  155. {
  156. while (size)
  157. {
  158. /* interrupt receive */
  159. rt_base_t level;
  160. /* disable interrupt */
  161. level = rt_hw_interrupt_disable();
  162. if (serial->read_index != serial->save_index)
  163. {
  164. *ptr = serial->rx_buffer[serial->read_index];
  165. serial->read_index ++;
  166. if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
  167. serial->read_index = 0;
  168. }
  169. else
  170. {
  171. /* no data in rx buffer */
  172. /* enable interrupt */
  173. rt_hw_interrupt_enable(level);
  174. break;
  175. }
  176. /* enable interrupt */
  177. rt_hw_interrupt_enable(level);
  178. ptr ++; size --;
  179. }
  180. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  181. }
  182. else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  183. {
  184. /* not support right now */
  185. RT_ASSERT(0);
  186. }
  187. /* polling mode */
  188. while (size)
  189. {
  190. *ptr = UARTCharGetNonBlocking(serial->hw_base);
  191. ptr ++; size --;
  192. }
  193. return (rt_size_t)ptr - (rt_size_t)buffer;
  194. }
  195. static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  196. {
  197. struct rt_lm3s_serial* serial;
  198. char *ptr;
  199. serial = (struct rt_lm3s_serial*) dev;
  200. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  201. {
  202. /* not support */
  203. RT_ASSERT(0);
  204. }
  205. else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  206. {
  207. /* not support */
  208. RT_ASSERT(0);
  209. }
  210. /* polling write */
  211. ptr = (char *)buffer;
  212. if (dev->flag & RT_DEVICE_FLAG_STREAM)
  213. {
  214. /* stream mode */
  215. while (size)
  216. {
  217. if (*ptr == '\n')
  218. while (UARTCharPutNonBlocking(serial->hw_base, '\r') == false);
  219. while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false);
  220. ptr ++;
  221. size --;
  222. }
  223. }
  224. else
  225. {
  226. while (size)
  227. {
  228. while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false);
  229. ptr ++;
  230. size --;
  231. }
  232. }
  233. return (rt_size_t) ptr - (rt_size_t) buffer;
  234. }
  235. void rt_hw_serial_init(void)
  236. {
  237. struct rt_lm3s_serial* serial;
  238. #ifdef RT_USING_UART1
  239. serial = &serial1;
  240. serial->parent.type = RT_Device_Class_Char;
  241. serial->hw_base = UART0_BASE;
  242. serial->baudrate = 115200;
  243. rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer));
  244. serial->read_index = serial->save_index = 0;
  245. /* enable UART0 clock */
  246. SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
  247. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
  248. /* set UART0 pinmux */
  249. GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
  250. /* Configure the UART for 115,200, 8-N-1 operation. */
  251. UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial->baudrate,
  252. (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
  253. UART_CONFIG_PAR_NONE));
  254. serial->parent.init = rt_serial_init;
  255. serial->parent.open = rt_serial_open;
  256. serial->parent.close = rt_serial_close;
  257. serial->parent.read = rt_serial_read;
  258. serial->parent.write = rt_serial_write;
  259. serial->parent.control = rt_serial_control;
  260. serial->parent.user_data = RT_NULL;
  261. rt_device_register(&serial->parent,
  262. "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  263. #endif
  264. #ifdef RT_USING_UART2
  265. serial = &serial2;
  266. serial->parent.type = RT_Device_Class_Char;
  267. serial->hw_base = 0xE0010000;
  268. serial->baudrate = 115200;
  269. rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer));
  270. serial->read_index = serial->save_index = 0;
  271. serial->parent.init = rt_serial_init;
  272. serial->parent.open = rt_serial_open;
  273. serial->parent.close = rt_serial_close;
  274. serial->parent.read = rt_serial_read;
  275. serial->parent.write = rt_serial_write;
  276. serial->parent.control = rt_serial_control;
  277. serial->parent.user_data = RT_NULL;
  278. rt_device_register(&serial->parent,
  279. "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  280. #endif
  281. }
  282. /*@}*/