startup.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2008-12-11 xuxinming first version
  9. * 2010-4-3 LiJin add init soft timer thread
  10. * 2013-05-24 Grissiom port to RM48x50
  11. */
  12. #include <rthw.h>
  13. #include <rtthread.h>
  14. #ifdef RT_USING_FINSH
  15. #include <finsh.h>
  16. extern int finsh_system_init(void);
  17. #endif
  18. #include <board.h>
  19. /**
  20. * @addtogroup LPC2478
  21. */
  22. /*@{*/
  23. extern int rt_application_init(void);
  24. #ifdef RT_USING_DEVICE
  25. extern rt_err_t rt_hw_serial_init(void);
  26. #endif
  27. #ifdef __CC_ARM
  28. extern int Image$$RW_IRAM1$$ZI$$Limit;
  29. #elif defined(__GNUC__)
  30. extern int __bss_end;
  31. #elif defined(__TI_COMPILER_VERSION__)
  32. extern unsigned char * const system_data_end;
  33. #endif
  34. #define MEMEND 0x08040000
  35. void rt_hw_pmu_enable_cnt(void)
  36. {
  37. unsigned long tmp;
  38. __asm (" MRC p15, #0, r0, c9, c12, #0");
  39. __asm (" ORR r0, r0, #0x09\n");
  40. __asm (" MCR p15, #0, r0, c9, c12, #0\n");
  41. __asm (" MOV r0, #1\n");
  42. __asm (" RBIT r0, r0\n");
  43. __asm (" MCR p15, #0, r0, c9, c12, #1\n");
  44. }
  45. void rt_hw_pmu_setcnt(unsigned long val)
  46. {
  47. __asm (" MCR p15, #0, r0, c9, c13, #0");
  48. }
  49. unsigned long rt_hw_pmu_getcnt(void)
  50. {
  51. __asm (" MRC p15, #0, r0, c9, c13, #0");
  52. }
  53. /**
  54. * This function will startup RT-Thread RTOS.
  55. */
  56. void rtthread_startup(void)
  57. {
  58. /*// RM48 does not have cache implemented
  59. *rt_hw_cpu_icache_enable();
  60. *rt_hw_cpu_dcache_enable();
  61. */
  62. /* init hardware interrupt */
  63. rt_hw_interrupt_init();
  64. /* init board */
  65. rt_hw_board_init();
  66. /* init tick */
  67. rt_system_tick_init();
  68. /* init kernel object */
  69. rt_system_object_init();
  70. rt_show_version();
  71. /* init timer system */
  72. rt_system_timer_init();
  73. /* init memory system */
  74. #ifdef RT_USING_HEAP
  75. #ifdef __CC_ARM
  76. rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)MEMEND);
  77. #elif defined(__GNUC__)
  78. rt_system_heap_init((void*)&__bss_end, (void*)MEMEND);
  79. #elif defined(__TI_COMPILER_VERSION__)
  80. rt_system_heap_init((void*)&system_data_end, (void*)MEMEND);
  81. #else
  82. #error Unkown compiler
  83. #endif
  84. #endif
  85. /* init scheduler system */
  86. rt_system_scheduler_init();
  87. /* init application */
  88. rt_application_init();
  89. #ifdef RT_USING_FINSH
  90. /* init finsh */
  91. finsh_system_init();
  92. finsh_set_device("sci2");
  93. #endif
  94. /* init soft timer thread */
  95. rt_system_timer_thread_init();
  96. /* init idle thread */
  97. rt_thread_idle_init();
  98. /* start scheduler */
  99. rt_system_scheduler_start();
  100. /* never reach here */
  101. return ;
  102. }
  103. int main(void)
  104. {
  105. /* disable interrupt first */
  106. rt_hw_interrupt_disable();
  107. /* invoke rtthread_startup */
  108. rtthread_startup();
  109. return 0;
  110. }
  111. /*@}*/