rk8xx.h 35 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-11-26 GuEe-GUI first version
  9. */
  10. #ifndef __RK8XX_H__
  11. #define __RK8XX_H__
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. /* CONFIG REGISTER */
  15. #define RK805_VB_MON_REG 0x21
  16. #define RK805_THERMAL_REG 0x22
  17. /* POWER CHANNELS ENABLE REGISTER */
  18. #define RK805_DCDC_EN_REG 0x23
  19. #define RK805_SLP_DCDC_EN_REG 0x25
  20. #define RK805_SLP_LDO_EN_REG 0x26
  21. #define RK805_LDO_EN_REG 0x27
  22. /* BUCK AND LDO CONFIG REGISTER */
  23. #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2a
  24. #define RK805_BUCK1_CONFIG_REG 0x2e
  25. #define RK805_BUCK1_ON_VSEL_REG 0x2f
  26. #define RK805_BUCK1_SLP_VSEL_REG 0x30
  27. #define RK805_BUCK2_CONFIG_REG 0x32
  28. #define RK805_BUCK2_ON_VSEL_REG 0x33
  29. #define RK805_BUCK2_SLP_VSEL_REG 0x34
  30. #define RK805_BUCK3_CONFIG_REG 0x36
  31. #define RK805_BUCK4_CONFIG_REG 0x37
  32. #define RK805_BUCK4_ON_VSEL_REG 0x38
  33. #define RK805_BUCK4_SLP_VSEL_REG 0x39
  34. #define RK805_LDO1_ON_VSEL_REG 0x3b
  35. #define RK805_LDO1_SLP_VSEL_REG 0x3c
  36. #define RK805_LDO2_ON_VSEL_REG 0x3d
  37. #define RK805_LDO2_SLP_VSEL_REG 0x3e
  38. #define RK805_LDO3_ON_VSEL_REG 0x3f
  39. #define RK805_LDO3_SLP_VSEL_REG 0x40
  40. /* INTERRUPT REGISTER */
  41. #define RK805_PWRON_LP_INT_TIME_REG 0x47
  42. #define RK805_PWRON_DB_REG 0x48
  43. #define RK805_DEV_CTRL_REG 0x4b
  44. #define RK805_INT_STS_REG 0x4c
  45. #define RK805_INT_STS_MSK_REG 0x4d
  46. #define RK805_GPIO_IO_POL_REG 0x50
  47. #define RK805_OUT_REG 0x52
  48. #define RK805_ON_SOURCE_REG 0xae
  49. #define RK805_OFF_SOURCE_REG 0xaf
  50. #define RK805_NUM_REGULATORS 7
  51. #define RK805_PWRON_FALL_RISE_INT_EN 0x0
  52. #define RK805_PWRON_FALL_RISE_INT_MSK 0x81
  53. #define RK805_BUCK1_2_ILMAX_2500MA 0x0
  54. #define RK805_BUCK1_2_ILMAX_3000MA 0x1
  55. #define RK805_BUCK1_2_ILMAX_3500MA 0x2
  56. #define RK805_BUCK1_2_ILMAX_4000MA 0x3
  57. #define RK805_BUCK3_ILMAX_1500MA 0x0
  58. #define RK805_BUCK3_ILMAX_2000MA 0x1
  59. #define RK805_BUCK3_ILMAX_2500MA 0x2
  60. #define RK805_BUCK3_ILMAX_3000MA 0x3
  61. #define RK805_BUCK4_ILMAX_2000MA 0x0
  62. #define RK805_BUCK4_ILMAX_2500MA 0x1
  63. #define RK805_BUCK4_ILMAX_3000MA 0x2
  64. #define RK805_BUCK4_ILMAX_3500MA 0x3
  65. /* RK805 IRQ Definitions */
  66. #define RK805_IRQ_PWRON_RISE 0
  67. #define RK805_IRQ_VB_LOW 1
  68. #define RK805_IRQ_PWRON 2
  69. #define RK805_IRQ_PWRON_LP 3
  70. #define RK805_IRQ_HOTDIE 4
  71. #define RK805_IRQ_RTC_ALARM 5
  72. #define RK805_IRQ_RTC_PERIOD 6
  73. #define RK805_IRQ_PWRON_FALL 7
  74. #define RK805_IRQ_PWRON_RISE_MSK RT_BIT(0)
  75. #define RK805_IRQ_VB_LOW_MSK RT_BIT(1)
  76. #define RK805_IRQ_PWRON_MSK RT_BIT(2)
  77. #define RK805_IRQ_PWRON_LP_MSK RT_BIT(3)
  78. #define RK805_IRQ_HOTDIE_MSK RT_BIT(4)
  79. #define RK805_IRQ_RTC_ALARM_MSK RT_BIT(5)
  80. #define RK805_IRQ_RTC_PERIOD_MSK RT_BIT(6)
  81. #define RK805_IRQ_PWRON_FALL_MSK RT_BIT(7)
  82. #define RK805_PWR_RISE_INT_STATUS RT_BIT(0)
  83. #define RK805_VB_LOW_INT_STATUS RT_BIT(1)
  84. #define RK805_PWRON_INT_STATUS RT_BIT(2)
  85. #define RK805_PWRON_LP_INT_STATUS RT_BIT(3)
  86. #define RK805_HOTDIE_INT_STATUS RT_BIT(4)
  87. #define RK805_ALARM_INT_STATUS RT_BIT(5)
  88. #define RK805_PERIOD_INT_STATUS RT_BIT(6)
  89. #define RK805_PWR_FALL_INT_STATUS RT_BIT(7)
  90. #define RK805_BUCK1_2_ILMAX_MASK (3 << 6)
  91. #define RK805_BUCK3_4_ILMAX_MASK (3 << 3)
  92. #define RK805_RTC_PERIOD_INT_MASK (1 << 6)
  93. #define RK805_RTC_ALARM_INT_MASK (1 << 5)
  94. #define RK805_INT_ALARM_EN (1 << 3)
  95. #define RK805_INT_TIMER_EN (1 << 2)
  96. #define RK806_POWER_EN0 0x0
  97. #define RK806_POWER_EN1 0x1
  98. #define RK806_POWER_EN2 0x2
  99. #define RK806_POWER_EN3 0x3
  100. #define RK806_POWER_EN4 0x4
  101. #define RK806_POWER_EN5 0x5
  102. #define RK806_POWER_SLP_EN0 0x6
  103. #define RK806_POWER_SLP_EN1 0x7
  104. #define RK806_POWER_SLP_EN2 0x8
  105. #define RK806_POWER_DISCHRG_EN0 0x9
  106. #define RK806_POWER_DISCHRG_EN1 0xa
  107. #define RK806_POWER_DISCHRG_EN2 0xb
  108. #define RK806_BUCK_FB_CONFIG 0xc
  109. #define RK806_SLP_LP_CONFIG 0xd
  110. #define RK806_POWER_FPWM_EN0 0xe
  111. #define RK806_POWER_FPWM_EN1 0xf
  112. #define RK806_BUCK1_CONFIG 0x10
  113. #define RK806_BUCK2_CONFIG 0x11
  114. #define RK806_BUCK3_CONFIG 0x12
  115. #define RK806_BUCK4_CONFIG 0x13
  116. #define RK806_BUCK5_CONFIG 0x14
  117. #define RK806_BUCK6_CONFIG 0x15
  118. #define RK806_BUCK7_CONFIG 0x16
  119. #define RK806_BUCK8_CONFIG 0x17
  120. #define RK806_BUCK9_CONFIG 0x18
  121. #define RK806_BUCK10_CONFIG 0x19
  122. #define RK806_BUCK1_ON_VSEL 0x1a
  123. #define RK806_BUCK2_ON_VSEL 0x1b
  124. #define RK806_BUCK3_ON_VSEL 0x1c
  125. #define RK806_BUCK4_ON_VSEL 0x1d
  126. #define RK806_BUCK5_ON_VSEL 0x1e
  127. #define RK806_BUCK6_ON_VSEL 0x1f
  128. #define RK806_BUCK7_ON_VSEL 0x20
  129. #define RK806_BUCK8_ON_VSEL 0x21
  130. #define RK806_BUCK9_ON_VSEL 0x22
  131. #define RK806_BUCK10_ON_VSEL 0x23
  132. #define RK806_BUCK1_SLP_VSEL 0x24
  133. #define RK806_BUCK2_SLP_VSEL 0x25
  134. #define RK806_BUCK3_SLP_VSEL 0x26
  135. #define RK806_BUCK4_SLP_VSEL 0x27
  136. #define RK806_BUCK5_SLP_VSEL 0x28
  137. #define RK806_BUCK6_SLP_VSEL 0x29
  138. #define RK806_BUCK7_SLP_VSEL 0x2a
  139. #define RK806_BUCK8_SLP_VSEL 0x2b
  140. #define RK806_BUCK9_SLP_VSEL 0x2d
  141. #define RK806_BUCK10_SLP_VSEL 0x2e
  142. #define RK806_BUCK_DEBUG1 0x30
  143. #define RK806_BUCK_DEBUG2 0x31
  144. #define RK806_BUCK_DEBUG3 0x32
  145. #define RK806_BUCK_DEBUG4 0x33
  146. #define RK806_BUCK_DEBUG5 0x34
  147. #define RK806_BUCK_DEBUG6 0x35
  148. #define RK806_BUCK_DEBUG7 0x36
  149. #define RK806_BUCK_DEBUG8 0x37
  150. #define RK806_BUCK_DEBUG9 0x38
  151. #define RK806_BUCK_DEBUG10 0x39
  152. #define RK806_BUCK_DEBUG11 0x3a
  153. #define RK806_BUCK_DEBUG12 0x3b
  154. #define RK806_BUCK_DEBUG13 0x3c
  155. #define RK806_BUCK_DEBUG14 0x3d
  156. #define RK806_BUCK_DEBUG15 0x3e
  157. #define RK806_BUCK_DEBUG16 0x3f
  158. #define RK806_BUCK_DEBUG17 0x40
  159. #define RK806_BUCK_DEBUG18 0x41
  160. #define RK806_NLDO_IMAX 0x42
  161. #define RK806_NLDO1_ON_VSEL 0x43
  162. #define RK806_NLDO2_ON_VSEL 0x44
  163. #define RK806_NLDO3_ON_VSEL 0x45
  164. #define RK806_NLDO4_ON_VSEL 0x46
  165. #define RK806_NLDO5_ON_VSEL 0x47
  166. #define RK806_NLDO1_SLP_VSEL 0x48
  167. #define RK806_NLDO2_SLP_VSEL 0x49
  168. #define RK806_NLDO3_SLP_VSEL 0x4a
  169. #define RK806_NLDO4_SLP_VSEL 0x4b
  170. #define RK806_NLDO5_SLP_VSEL 0x4c
  171. #define RK806_PLDO_IMAX 0x4d
  172. #define RK806_PLDO1_ON_VSEL 0x4e
  173. #define RK806_PLDO2_ON_VSEL 0x4f
  174. #define RK806_PLDO3_ON_VSEL 0x50
  175. #define RK806_PLDO4_ON_VSEL 0x51
  176. #define RK806_PLDO5_ON_VSEL 0x52
  177. #define RK806_PLDO6_ON_VSEL 0x53
  178. #define RK806_PLDO1_SLP_VSEL 0x54
  179. #define RK806_PLDO2_SLP_VSEL 0x55
  180. #define RK806_PLDO3_SLP_VSEL 0x56
  181. #define RK806_PLDO4_SLP_VSEL 0x57
  182. #define RK806_PLDO5_SLP_VSEL 0x58
  183. #define RK806_PLDO6_SLP_VSEL 0x59
  184. #define RK806_CHIP_NAME 0x5a
  185. #define RK806_CHIP_VER 0x5b
  186. #define RK806_OTP_VER 0x5c
  187. #define RK806_SYS_STS 0x5d
  188. #define RK806_SYS_CFG0 0x5e
  189. #define RK806_SYS_CFG1 0x5f
  190. #define RK806_SYS_OPTION 0x61
  191. #define RK806_SLEEP_CONFIG0 0x62
  192. #define RK806_SLEEP_CONFIG1 0x63
  193. #define RK806_SLEEP_CTR_SEL0 0x64
  194. #define RK806_SLEEP_CTR_SEL1 0x65
  195. #define RK806_SLEEP_CTR_SEL2 0x66
  196. #define RK806_SLEEP_CTR_SEL3 0x67
  197. #define RK806_SLEEP_CTR_SEL4 0x68
  198. #define RK806_SLEEP_CTR_SEL5 0x69
  199. #define RK806_DVS_CTRL_SEL0 0x6a
  200. #define RK806_DVS_CTRL_SEL1 0x6b
  201. #define RK806_DVS_CTRL_SEL2 0x6c
  202. #define RK806_DVS_CTRL_SEL3 0x6d
  203. #define RK806_DVS_CTRL_SEL4 0x6e
  204. #define RK806_DVS_CTRL_SEL5 0x6f
  205. #define RK806_DVS_START_CTRL 0x70
  206. #define RK806_SLEEP_GPIO 0x71
  207. #define RK806_SYS_CFG3 0x72
  208. #define RK806_WDT 0x73
  209. #define RK806_ON_SOURCE 0x74
  210. #define RK806_OFF_SOURCE 0x75
  211. #define RK806_PWRON_KEY 0x76
  212. #define RK806_INT_STS0 0x77
  213. #define RK806_INT_MSK0 0x78
  214. #define RK806_INT_STS1 0x79
  215. #define RK806_INT_MSK1 0x7a
  216. #define RK806_GPIO_INT_CONFIG 0x7b
  217. #define RK806_DATA_REG0 0x7c
  218. #define RK806_DATA_REG1 0x7d
  219. #define RK806_DATA_REG2 0x7e
  220. #define RK806_DATA_REG3 0x7f
  221. #define RK806_DATA_REG4 0x80
  222. #define RK806_DATA_REG5 0x81
  223. #define RK806_DATA_REG6 0x82
  224. #define RK806_DATA_REG7 0x83
  225. #define RK806_DATA_REG8 0x84
  226. #define RK806_DATA_REG9 0x85
  227. #define RK806_DATA_REG10 0x86
  228. #define RK806_DATA_REG11 0x87
  229. #define RK806_DATA_REG12 0x88
  230. #define RK806_DATA_REG13 0x89
  231. #define RK806_DATA_REG14 0x8a
  232. #define RK806_DATA_REG15 0x8b
  233. #define RK806_TM_REG 0x8c
  234. #define RK806_OTP_EN_REG 0x8d
  235. #define RK806_FUNC_OTP_EN_REG 0x8e
  236. #define RK806_TEST_REG1 0x8f
  237. #define RK806_TEST_REG2 0x90
  238. #define RK806_TEST_REG3 0x91
  239. #define RK806_TEST_REG4 0x92
  240. #define RK806_TEST_REG5 0x93
  241. #define RK806_BUCK_VSEL_OTP_REG0 0x94
  242. #define RK806_BUCK_VSEL_OTP_REG1 0x95
  243. #define RK806_BUCK_VSEL_OTP_REG2 0x96
  244. #define RK806_BUCK_VSEL_OTP_REG3 0x97
  245. #define RK806_BUCK_VSEL_OTP_REG4 0x98
  246. #define RK806_BUCK_VSEL_OTP_REG5 0x99
  247. #define RK806_BUCK_VSEL_OTP_REG6 0x9a
  248. #define RK806_BUCK_VSEL_OTP_REG7 0x9b
  249. #define RK806_BUCK_VSEL_OTP_REG8 0x9c
  250. #define RK806_BUCK_VSEL_OTP_REG9 0x9d
  251. #define RK806_NLDO1_VSEL_OTP_REG0 0x9e
  252. #define RK806_NLDO1_VSEL_OTP_REG1 0x9f
  253. #define RK806_NLDO1_VSEL_OTP_REG2 0xa0
  254. #define RK806_NLDO1_VSEL_OTP_REG3 0xa1
  255. #define RK806_NLDO1_VSEL_OTP_REG4 0xa2
  256. #define RK806_PLDO_VSEL_OTP_REG0 0xa3
  257. #define RK806_PLDO_VSEL_OTP_REG1 0xa4
  258. #define RK806_PLDO_VSEL_OTP_REG2 0xa5
  259. #define RK806_PLDO_VSEL_OTP_REG3 0xa6
  260. #define RK806_PLDO_VSEL_OTP_REG4 0xa7
  261. #define RK806_PLDO_VSEL_OTP_REG5 0xa8
  262. #define RK806_BUCK_EN_OTP_REG1 0xa9
  263. #define RK806_NLDO_EN_OTP_REG1 0xaa
  264. #define RK806_PLDO_EN_OTP_REG1 0xab
  265. #define RK806_BUCK_FB_RES_OTP_REG1 0xac
  266. #define RK806_OTP_RESEV_REG0 0xad
  267. #define RK806_OTP_RESEV_REG1 0xae
  268. #define RK806_OTP_RESEV_REG2 0xaf
  269. #define RK806_OTP_RESEV_REG3 0xb0
  270. #define RK806_OTP_RESEV_REG4 0xb1
  271. #define RK806_BUCK_SEQ_REG0 0xb2
  272. #define RK806_BUCK_SEQ_REG1 0xb3
  273. #define RK806_BUCK_SEQ_REG2 0xb4
  274. #define RK806_BUCK_SEQ_REG3 0xb5
  275. #define RK806_BUCK_SEQ_REG4 0xb6
  276. #define RK806_BUCK_SEQ_REG5 0xb7
  277. #define RK806_BUCK_SEQ_REG6 0xb8
  278. #define RK806_BUCK_SEQ_REG7 0xb9
  279. #define RK806_BUCK_SEQ_REG8 0xba
  280. #define RK806_BUCK_SEQ_REG9 0xbb
  281. #define RK806_BUCK_SEQ_REG10 0xbc
  282. #define RK806_BUCK_SEQ_REG11 0xbd
  283. #define RK806_BUCK_SEQ_REG12 0xbe
  284. #define RK806_BUCK_SEQ_REG13 0xbf
  285. #define RK806_BUCK_SEQ_REG14 0xc0
  286. #define RK806_BUCK_SEQ_REG15 0xc1
  287. #define RK806_BUCK_SEQ_REG16 0xc2
  288. #define RK806_BUCK_SEQ_REG17 0xc3
  289. #define RK806_HK_TRIM_REG1 0xc4
  290. #define RK806_HK_TRIM_REG2 0xc5
  291. #define RK806_BUCK_REF_TRIM_REG1 0xc6
  292. #define RK806_BUCK_REF_TRIM_REG2 0xc7
  293. #define RK806_BUCK_REF_TRIM_REG3 0xc8
  294. #define RK806_BUCK_REF_TRIM_REG4 0xc9
  295. #define RK806_BUCK_REF_TRIM_REG5 0xca
  296. #define RK806_BUCK_OSC_TRIM_REG1 0xcb
  297. #define RK806_BUCK_OSC_TRIM_REG2 0xcc
  298. #define RK806_BUCK_OSC_TRIM_REG3 0xcd
  299. #define RK806_BUCK_OSC_TRIM_REG4 0xce
  300. #define RK806_BUCK_OSC_TRIM_REG5 0xcf
  301. #define RK806_BUCK_TRIM_ZCDIOS_REG1 0xd0
  302. #define RK806_BUCK_TRIM_ZCDIOS_REG2 0xd1
  303. #define RK806_NLDO_TRIM_REG1 0xd2
  304. #define RK806_NLDO_TRIM_REG2 0xd3
  305. #define RK806_NLDO_TRIM_REG3 0xd4
  306. #define RK806_PLDO_TRIM_REG1 0xd5
  307. #define RK806_PLDO_TRIM_REG2 0xd6
  308. #define RK806_PLDO_TRIM_REG3 0xd7
  309. #define RK806_TRIM_ICOMP_REG1 0xd8
  310. #define RK806_TRIM_ICOMP_REG2 0xd9
  311. #define RK806_EFUSE_CONTROL_REGH 0xda
  312. #define RK806_FUSE_PROG_REG 0xdb
  313. #define RK806_MAIN_FSM_STS_REG 0xdd
  314. #define RK806_FSM_REG 0xde
  315. #define RK806_TOP_RESEV_OFFR 0xec
  316. #define RK806_TOP_RESEV_POR 0xed
  317. #define RK806_BUCK_VRSN_REG1 0xee
  318. #define RK806_BUCK_VRSN_REG2 0xef
  319. #define RK806_NLDO_RLOAD_SEL_REG1 0xf0
  320. #define RK806_PLDO_RLOAD_SEL_REG1 0xf1
  321. #define RK806_PLDO_RLOAD_SEL_REG2 0xf2
  322. #define RK806_BUCK_CMIN_MX_REG1 0xf3
  323. #define RK806_BUCK_CMIN_MX_REG2 0xf4
  324. #define RK806_BUCK_FREQ_SET_REG1 0xf5
  325. #define RK806_BUCK_FREQ_SET_REG2 0xf6
  326. #define RK806_BUCK_RS_MEABS_REG1 0xf7
  327. #define RK806_BUCK_RS_MEABS_REG2 0xf8
  328. #define RK806_BUCK_RS_ZDLEB_REG1 0xf9
  329. #define RK806_BUCK_RS_ZDLEB_REG2 0xfa
  330. #define RK806_BUCK_RSERVE_REG1 0xfb
  331. #define RK806_BUCK_RSERVE_REG2 0xfc
  332. #define RK806_BUCK_RSERVE_REG3 0xfd
  333. #define RK806_BUCK_RSERVE_REG4 0xfe
  334. #define RK806_BUCK_RSERVE_REG5 0xff
  335. #define RK806_WDT_ACT RT_BIT(4)
  336. #define RK806_WDT_ACT_SEND_IRQ 0
  337. #define RK806_WDT_ACT_RESTART 1
  338. #define RK806_WDT_EN RT_BIT(3)
  339. #define RK806_WDT_SET RT_GENMASK(2, 0)
  340. /* INT_STS Register field definitions */
  341. #define RK806_INT_STS_PWRON_FALL RT_BIT(0)
  342. #define RK806_INT_STS_PWRON_RISE RT_BIT(1)
  343. #define RK806_INT_STS_PWRON RT_BIT(2)
  344. #define RK806_INT_STS_PWRON_LP RT_BIT(3)
  345. #define RK806_INT_STS_HOTDIE RT_BIT(4)
  346. #define RK806_INT_STS_VDC_RISE RT_BIT(5)
  347. #define RK806_INT_STS_VDC_FALL RT_BIT(6)
  348. #define RK806_INT_STS_VB_LO RT_BIT(7)
  349. #define RK806_INT_STS_REV0 RT_BIT(0)
  350. #define RK806_INT_STS_REV1 RT_BIT(1)
  351. #define RK806_INT_STS_REV2 RT_BIT(2)
  352. #define RK806_INT_STS_CRC_ERROR RT_BIT(3)
  353. #define RK806_INT_STS_SLP3_GPIO RT_BIT(4)
  354. #define RK806_INT_STS_SLP2_GPIO RT_BIT(5)
  355. #define RK806_INT_STS_SLP1_GPIO RT_BIT(6)
  356. #define RK806_INT_STS_WDT RT_BIT(7)
  357. #define RK806_INT_POL_MSK RT_BIT(1)
  358. #define RK806_INT_POL_H RT_BIT(1)
  359. #define RK806_INT_POL_L 0
  360. #define RK806_SLAVE_RESTART_FUN_MSK RT_BIT(1)
  361. #define RK806_SLAVE_RESTART_FUN_EN RT_BIT(1)
  362. #define RK806_SLAVE_RESTART_FUN_OFF 0
  363. #define RK806_SYS_ENB2_2M_MSK RT_BIT(1)
  364. #define RK806_SYS_ENB2_2M_EN RT_BIT(1)
  365. #define RK806_SYS_ENB2_2M_OFF 0
  366. #define RK806_CMD_READ 0
  367. #define RK806_CMD_WRITE RT_BIT(7)
  368. #define RK806_CMD_CRC_EN RT_BIT(6)
  369. #define RK806_CMD_CRC_DIS 0
  370. #define RK806_CMD_LEN_MSK 0x0f
  371. #define RK806_REG_H 0x00
  372. /* RK806 INT_STS0 registers */
  373. #define RK806_IRQ_PWRON_FALL 0
  374. #define RK806_IRQ_PWRON_RISE 1
  375. #define RK806_IRQ_PWRON 2
  376. #define RK806_IRQ_PWRON_LP 3
  377. #define RK806_IRQ_HOTDIE 4
  378. #define RK806_IRQ_VDC_RISE 5
  379. #define RK806_IRQ_VDC_FALL 6
  380. #define RK806_IRQ_VB_LO 7
  381. /* RK806 INT_STS0 registers */
  382. #define RK806_IRQ_REV0 8
  383. #define RK806_IRQ_REV1 9
  384. #define RK806_IRQ_REV2 10
  385. #define RK806_IRQ_CRC_ERROR 11
  386. #define RK806_IRQ_SLP3_GPIO 12
  387. #define RK806_IRQ_SLP2_GPIO 13
  388. #define RK806_IRQ_SLP1_GPIO 14
  389. #define RK806_IRQ_WDT 15
  390. #define RK808_SECONDS_REG 0x00
  391. #define RK808_MINUTES_REG 0x01
  392. #define RK808_HOURS_REG 0x02
  393. #define RK808_DAYS_REG 0x03
  394. #define RK808_MONTHS_REG 0x04
  395. #define RK808_YEARS_REG 0x05
  396. #define RK808_WEEKS_REG 0x06
  397. #define RK808_ALARM_SECONDS_REG 0x08
  398. #define RK808_ALARM_MINUTES_REG 0x09
  399. #define RK808_ALARM_HOURS_REG 0x0a
  400. #define RK808_ALARM_DAYS_REG 0x0b
  401. #define RK808_ALARM_MONTHS_REG 0x0c
  402. #define RK808_ALARM_YEARS_REG 0x0d
  403. #define RK808_RTC_CTRL_REG 0x10
  404. #define RK808_RTC_STATUS_REG 0x11
  405. #define RK808_RTC_INT_REG 0x12
  406. #define RK808_RTC_COMP_LSB_REG 0x13
  407. #define RK808_RTC_COMP_MSB_REG 0x14
  408. #define RK808_ID_MSB 0x17
  409. #define RK808_ID_LSB 0x18
  410. #define RK808_CLK32OUT_REG 0x20
  411. #define RK808_VB_MON_REG 0x21
  412. #define RK808_THERMAL_REG 0x22
  413. #define RK808_DCDC_EN_REG 0x23
  414. #define RK808_LDO_EN_REG 0x24
  415. #define RK808_SLEEP_SET_OFF_REG1 0x25
  416. #define RK808_SLEEP_SET_OFF_REG2 0x26
  417. #define RK808_DCDC_UV_STS_REG 0x27
  418. #define RK808_DCDC_UV_ACT_REG 0x28
  419. #define RK808_LDO_UV_STS_REG 0x29
  420. #define RK808_LDO_UV_ACT_REG 0x2a
  421. #define RK808_DCDC_PG_REG 0x2b
  422. #define RK808_LDO_PG_REG 0x2c
  423. #define RK808_VOUT_MON_TDB_REG 0x2d
  424. #define RK808_BUCK1_CONFIG_REG 0x2e
  425. #define RK808_BUCK1_ON_VSEL_REG 0x2f
  426. #define RK808_BUCK1_SLP_VSEL_REG 0x30
  427. #define RK808_BUCK1_DVS_VSEL_REG 0x31
  428. #define RK808_BUCK2_CONFIG_REG 0x32
  429. #define RK808_BUCK2_ON_VSEL_REG 0x33
  430. #define RK808_BUCK2_SLP_VSEL_REG 0x34
  431. #define RK808_BUCK2_DVS_VSEL_REG 0x35
  432. #define RK808_BUCK3_CONFIG_REG 0x36
  433. #define RK808_BUCK4_CONFIG_REG 0x37
  434. #define RK808_BUCK4_ON_VSEL_REG 0x38
  435. #define RK808_BUCK4_SLP_VSEL_REG 0x39
  436. #define RK808_BOOST_CONFIG_REG 0x3a
  437. #define RK808_LDO1_ON_VSEL_REG 0x3b
  438. #define RK808_LDO1_SLP_VSEL_REG 0x3c
  439. #define RK808_LDO2_ON_VSEL_REG 0x3d
  440. #define RK808_LDO2_SLP_VSEL_REG 0x3e
  441. #define RK808_LDO3_ON_VSEL_REG 0x3f
  442. #define RK808_LDO3_SLP_VSEL_REG 0x40
  443. #define RK808_LDO4_ON_VSEL_REG 0x41
  444. #define RK808_LDO4_SLP_VSEL_REG 0x42
  445. #define RK808_LDO5_ON_VSEL_REG 0x43
  446. #define RK808_LDO5_SLP_VSEL_REG 0x44
  447. #define RK808_LDO6_ON_VSEL_REG 0x45
  448. #define RK808_LDO6_SLP_VSEL_REG 0x46
  449. #define RK808_LDO7_ON_VSEL_REG 0x47
  450. #define RK808_LDO7_SLP_VSEL_REG 0x48
  451. #define RK808_LDO8_ON_VSEL_REG 0x49
  452. #define RK808_LDO8_SLP_VSEL_REG 0x4a
  453. #define RK808_DEVCTRL_REG 0x4b
  454. #define RK808_INT_STS_REG1 0x4c
  455. #define RK808_INT_STS_MSK_REG1 0x4d
  456. #define RK808_INT_STS_REG2 0x4e
  457. #define RK808_INT_STS_MSK_REG2 0x4f
  458. #define RK808_IO_POL_REG 0x50
  459. /* RK808 IRQ Definitions */
  460. #define RK808_IRQ_VOUT_LO 0
  461. #define RK808_IRQ_VB_LO 1
  462. #define RK808_IRQ_PWRON 2
  463. #define RK808_IRQ_PWRON_LP 3
  464. #define RK808_IRQ_HOTDIE 4
  465. #define RK808_IRQ_RTC_ALARM 5
  466. #define RK808_IRQ_RTC_PERIOD 6
  467. #define RK808_IRQ_PLUG_IN_INT 7
  468. #define RK808_IRQ_PLUG_OUT_INT 8
  469. #define RK808_NUM_IRQ 9
  470. #define RK808_IRQ_VOUT_LO_MSK RT_BIT(0)
  471. #define RK808_IRQ_VB_LO_MSK RT_BIT(1)
  472. #define RK808_IRQ_PWRON_MSK RT_BIT(2)
  473. #define RK808_IRQ_PWRON_LP_MSK RT_BIT(3)
  474. #define RK808_IRQ_HOTDIE_MSK RT_BIT(4)
  475. #define RK808_IRQ_RTC_ALARM_MSK RT_BIT(5)
  476. #define RK808_IRQ_RTC_PERIOD_MSK RT_BIT(6)
  477. #define RK808_IRQ_PLUG_IN_INT_MSK RT_BIT(0)
  478. #define RK808_IRQ_PLUG_OUT_INT_MSK RT_BIT(1)
  479. #define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1)
  480. #define RK817_SECONDS_REG 0x00
  481. #define RK817_MINUTES_REG 0x01
  482. #define RK817_HOURS_REG 0x02
  483. #define RK817_DAYS_REG 0x03
  484. #define RK817_MONTHS_REG 0x04
  485. #define RK817_YEARS_REG 0x05
  486. #define RK817_WEEKS_REG 0x06
  487. #define RK817_ALARM_SECONDS_REG 0x07
  488. #define RK817_ALARM_MINUTES_REG 0x08
  489. #define RK817_ALARM_HOURS_REG 0x09
  490. #define RK817_ALARM_DAYS_REG 0x0a
  491. #define RK817_ALARM_MONTHS_REG 0x0b
  492. #define RK817_ALARM_YEARS_REG 0x0c
  493. #define RK817_RTC_CTRL_REG 0xd
  494. #define RK817_RTC_STATUS_REG 0xe
  495. #define RK817_RTC_INT_REG 0xf
  496. #define RK817_RTC_COMP_LSB_REG 0x10
  497. #define RK817_RTC_COMP_MSB_REG 0x11
  498. /* RK817 Codec Registers */
  499. #define RK817_CODEC_DTOP_VUCTL 0x12
  500. #define RK817_CODEC_DTOP_VUCTIME 0x13
  501. #define RK817_CODEC_DTOP_LPT_SRST 0x14
  502. #define RK817_CODEC_DTOP_DIGEN_CLKE 0x15
  503. #define RK817_CODEC_AREF_RTCFG0 0x16
  504. #define RK817_CODEC_AREF_RTCFG1 0x17
  505. #define RK817_CODEC_AADC_CFG0 0x18
  506. #define RK817_CODEC_AADC_CFG1 0x19
  507. #define RK817_CODEC_DADC_VOLL 0x1a
  508. #define RK817_CODEC_DADC_VOLR 0x1b
  509. #define RK817_CODEC_DADC_SR_ACL0 0x1e
  510. #define RK817_CODEC_DADC_ALC1 0x1f
  511. #define RK817_CODEC_DADC_ALC2 0x20
  512. #define RK817_CODEC_DADC_NG 0x21
  513. #define RK817_CODEC_DADC_HPF 0x22
  514. #define RK817_CODEC_DADC_RVOLL 0x23
  515. #define RK817_CODEC_DADC_RVOLR 0x24
  516. #define RK817_CODEC_AMIC_CFG0 0x27
  517. #define RK817_CODEC_AMIC_CFG1 0x28
  518. #define RK817_CODEC_DMIC_PGA_GAIN 0x29
  519. #define RK817_CODEC_DMIC_LMT1 0x2a
  520. #define RK817_CODEC_DMIC_LMT2 0x2b
  521. #define RK817_CODEC_DMIC_NG1 0x2c
  522. #define RK817_CODEC_DMIC_NG2 0x2d
  523. #define RK817_CODEC_ADAC_CFG0 0x2e
  524. #define RK817_CODEC_ADAC_CFG1 0x2f
  525. #define RK817_CODEC_DDAC_POPD_DACST 0x30
  526. #define RK817_CODEC_DDAC_VOLL 0x31
  527. #define RK817_CODEC_DDAC_VOLR 0x32
  528. #define RK817_CODEC_DDAC_SR_LMT0 0x35
  529. #define RK817_CODEC_DDAC_LMT1 0x36
  530. #define RK817_CODEC_DDAC_LMT2 0x37
  531. #define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38
  532. #define RK817_CODEC_DDAC_RVOLL 0x39
  533. #define RK817_CODEC_DDAC_RVOLR 0x3a
  534. #define RK817_CODEC_AHP_ANTI0 0x3b
  535. #define RK817_CODEC_AHP_ANTI1 0x3c
  536. #define RK817_CODEC_AHP_CFG0 0x3d
  537. #define RK817_CODEC_AHP_CFG1 0x3e
  538. #define RK817_CODEC_AHP_CP 0x3f
  539. #define RK817_CODEC_ACLASSD_CFG1 0x40
  540. #define RK817_CODEC_ACLASSD_CFG2 0x41
  541. #define RK817_CODEC_APLL_CFG0 0x42
  542. #define RK817_CODEC_APLL_CFG1 0x43
  543. #define RK817_CODEC_APLL_CFG2 0x44
  544. #define RK817_CODEC_APLL_CFG3 0x45
  545. #define RK817_CODEC_APLL_CFG4 0x46
  546. #define RK817_CODEC_APLL_CFG5 0x47
  547. #define RK817_CODEC_DI2S_CKM 0x48
  548. #define RK817_CODEC_DI2S_RSD 0x49
  549. #define RK817_CODEC_DI2S_RXCR1 0x4a
  550. #define RK817_CODEC_DI2S_RXCR2 0x4b
  551. #define RK817_CODEC_DI2S_RXCMD_TSD 0x4c
  552. #define RK817_CODEC_DI2S_TXCR1 0x4d
  553. #define RK817_CODEC_DI2S_TXCR2 0x4e
  554. #define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f
  555. #define RK817_POWER_EN_REG(i) (0xb1 + (i))
  556. #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i))
  557. #define RK817_POWER_CONFIG (0xb9)
  558. #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3)
  559. #define RK817_BUCK1_ON_VSEL_REG 0xbb
  560. #define RK817_BUCK1_SLP_VSEL_REG 0xbc
  561. #define RK817_BUCK2_CONFIG_REG 0xbd
  562. #define RK817_BUCK2_ON_VSEL_REG 0xbe
  563. #define RK817_BUCK2_SLP_VSEL_REG 0xbf
  564. #define RK817_BUCK3_CONFIG_REG 0xc0
  565. #define RK817_BUCK3_ON_VSEL_REG 0xc1
  566. #define RK817_BUCK3_SLP_VSEL_REG 0xc2
  567. #define RK817_BUCK4_CONFIG_REG 0xc3
  568. #define RK817_BUCK4_ON_VSEL_REG 0xc4
  569. #define RK817_BUCK4_SLP_VSEL_REG 0xc5
  570. #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2)
  571. #define RK817_BOOST_OTG_CFG (0xde)
  572. #define RK817_HOTDIE_TEMP_MSK (0x3 << 4)
  573. #define RK817_HOTDIE_85 (0x0 << 4)
  574. #define RK817_HOTDIE_95 (0x1 << 4)
  575. #define RK817_HOTDIE_105 (0x2 << 4)
  576. #define RK817_HOTDIE_115 (0x3 << 4)
  577. #define RK817_TSD_TEMP_MSK RT_BIT(6)
  578. #define RK817_TSD_140 0
  579. #define RK817_TSD_160 RT_BIT(6)
  580. #define RK817_INT_POL_MSK RT_BIT(1)
  581. #define RK817_INT_POL_H RT_BIT(1)
  582. #define RK817_INT_POL_L 0
  583. enum rk817_reg_id
  584. {
  585. RK817_ID_DCDC1 = 0,
  586. RK817_ID_DCDC2,
  587. RK817_ID_DCDC3,
  588. RK817_ID_DCDC4,
  589. RK817_ID_LDO1,
  590. RK817_ID_LDO2,
  591. RK817_ID_LDO3,
  592. RK817_ID_LDO4,
  593. RK817_ID_LDO5,
  594. RK817_ID_LDO6,
  595. RK817_ID_LDO7,
  596. RK817_ID_LDO8,
  597. RK817_ID_LDO9,
  598. RK817_ID_BOOST,
  599. RK817_ID_BOOST_OTG_SW,
  600. RK817_NUM_REGULATORS
  601. };
  602. #define RK817_SYS_CFG(i) ((i) + 0xf1)
  603. #define RK817_CLK32KOUT2_EN RT_BIT(7)
  604. #define RK817_SLPPIN_FUNC_MSK (0x3 << 3)
  605. #define SLPPIN_NULL_FUN (0x0 << 3)
  606. #define SLPPIN_SLP_FUN (0x1 << 3)
  607. #define SLPPIN_DN_FUN (0x2 << 3)
  608. #define SLPPIN_RST_FUN (0x3 << 3)
  609. #define RK817_RST_FUNC_MSK (0x3 << 6)
  610. #define RK817_RST_FUNC_SFT (6)
  611. #define RK817_RST_FUNC_CNT (3)
  612. #define RK817_RST_FUNC_DEV (0) /* reset the dev */
  613. #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */
  614. /* INTERRUPT REGISTER */
  615. #define RK817_INT_STS_REG0 0xf8
  616. #define RK817_INT_STS_MSK_REG0 0xf9
  617. #define RK817_INT_STS_REG1 0xfa
  618. #define RK817_INT_STS_MSK_REG1 0xfb
  619. #define RK817_INT_STS_REG2 0xfc
  620. #define RK817_INT_STS_MSK_REG2 0xfd
  621. #define RK817_GPIO_INT_CFG 0xfe
  622. /* IRQ Definitions */
  623. #define RK817_IRQ_PWRON_FALL 0
  624. #define RK817_IRQ_PWRON_RISE 1
  625. #define RK817_IRQ_PWRON 2
  626. #define RK817_IRQ_PWMON_LP 3
  627. #define RK817_IRQ_HOTDIE 4
  628. #define RK817_IRQ_RTC_ALARM 5
  629. #define RK817_IRQ_RTC_PERIOD 6
  630. #define RK817_IRQ_VB_LO 7
  631. #define RK817_IRQ_PLUG_IN 8
  632. #define RK817_IRQ_PLUG_OUT 9
  633. #define RK817_IRQ_CHRG_TERM 10
  634. #define RK817_IRQ_CHRG_TIME 11
  635. #define RK817_IRQ_CHRG_TS 12
  636. #define RK817_IRQ_USB_OV 13
  637. #define RK817_IRQ_CHRG_IN_CLMP 14
  638. #define RK817_IRQ_BAT_DIS_ILIM 15
  639. #define RK817_IRQ_GATE_GPIO 16
  640. #define RK817_IRQ_TS_GPIO 17
  641. #define RK817_IRQ_CODEC_PD 18
  642. #define RK817_IRQ_CODEC_PO 19
  643. #define RK817_IRQ_CLASSD_MUTE_DONE 20
  644. #define RK817_IRQ_CLASSD_OCP 21
  645. #define RK817_IRQ_BAT_OVP 22
  646. #define RK817_IRQ_CHRG_BAT_HI 23
  647. #define RK818_DCDC1 0
  648. #define RK818_LDO1 4
  649. #define RK818_NUM_REGULATORS 17
  650. enum rk818_reg
  651. {
  652. RK818_ID_DCDC1,
  653. RK818_ID_DCDC2,
  654. RK818_ID_DCDC3,
  655. RK818_ID_DCDC4,
  656. RK818_ID_BOOST,
  657. RK818_ID_LDO1,
  658. RK818_ID_LDO2,
  659. RK818_ID_LDO3,
  660. RK818_ID_LDO4,
  661. RK818_ID_LDO5,
  662. RK818_ID_LDO6,
  663. RK818_ID_LDO7,
  664. RK818_ID_LDO8,
  665. RK818_ID_LDO9,
  666. RK818_ID_SWITCH,
  667. RK818_ID_HDMI_SWITCH,
  668. RK818_ID_OTG_SWITCH,
  669. };
  670. #define RK818_DCDC_EN_REG 0x23
  671. #define RK818_LDO_EN_REG 0x24
  672. #define RK818_SLEEP_SET_OFF_REG1 0x25
  673. #define RK818_SLEEP_SET_OFF_REG2 0x26
  674. #define RK818_DCDC_UV_STS_REG 0x27
  675. #define RK818_DCDC_UV_ACT_REG 0x28
  676. #define RK818_LDO_UV_STS_REG 0x29
  677. #define RK818_LDO_UV_ACT_REG 0x2a
  678. #define RK818_DCDC_PG_REG 0x2b
  679. #define RK818_LDO_PG_REG 0x2c
  680. #define RK818_VOUT_MON_TDB_REG 0x2d
  681. #define RK818_BUCK1_CONFIG_REG 0x2e
  682. #define RK818_BUCK1_ON_VSEL_REG 0x2f
  683. #define RK818_BUCK1_SLP_VSEL_REG 0x30
  684. #define RK818_BUCK2_CONFIG_REG 0x32
  685. #define RK818_BUCK2_ON_VSEL_REG 0x33
  686. #define RK818_BUCK2_SLP_VSEL_REG 0x34
  687. #define RK818_BUCK3_CONFIG_REG 0x36
  688. #define RK818_BUCK4_CONFIG_REG 0x37
  689. #define RK818_BUCK4_ON_VSEL_REG 0x38
  690. #define RK818_BUCK4_SLP_VSEL_REG 0x39
  691. #define RK818_BOOST_CONFIG_REG 0x3a
  692. #define RK818_LDO1_ON_VSEL_REG 0x3b
  693. #define RK818_LDO1_SLP_VSEL_REG 0x3c
  694. #define RK818_LDO2_ON_VSEL_REG 0x3d
  695. #define RK818_LDO2_SLP_VSEL_REG 0x3e
  696. #define RK818_LDO3_ON_VSEL_REG 0x3f
  697. #define RK818_LDO3_SLP_VSEL_REG 0x40
  698. #define RK818_LDO4_ON_VSEL_REG 0x41
  699. #define RK818_LDO4_SLP_VSEL_REG 0x42
  700. #define RK818_LDO5_ON_VSEL_REG 0x43
  701. #define RK818_LDO5_SLP_VSEL_REG 0x44
  702. #define RK818_LDO6_ON_VSEL_REG 0x45
  703. #define RK818_LDO6_SLP_VSEL_REG 0x46
  704. #define RK818_LDO7_ON_VSEL_REG 0x47
  705. #define RK818_LDO7_SLP_VSEL_REG 0x48
  706. #define RK818_LDO8_ON_VSEL_REG 0x49
  707. #define RK818_LDO8_SLP_VSEL_REG 0x4a
  708. #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
  709. #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
  710. #define RK818_DEVCTRL_REG 0x4b
  711. #define RK818_INT_STS_REG1 0X4c
  712. #define RK818_INT_STS_MSK_REG1 0x4d
  713. #define RK818_INT_STS_REG2 0x4e
  714. #define RK818_INT_STS_MSK_REG2 0x4f
  715. #define RK818_IO_POL_REG 0x50
  716. #define RK818_H5V_EN_REG 0x52
  717. #define RK818_SLEEP_SET_OFF_REG3 0x53
  718. #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
  719. #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
  720. #define RK818_BOOST_CTRL_REG 0x56
  721. #define RK818_DCDC_ILMAX 0x90
  722. #define RK818_USB_CTRL_REG 0xa1
  723. #define RK818_H5V_EN RT_BIT(0)
  724. #define RK818_REF_RDY_CTRL RT_BIT(1)
  725. #define RK818_USB_ILIM_SEL_MASK 0xf
  726. #define RK818_USB_ILMIN_2000MA 0x7
  727. #define RK818_USB_CHG_SD_VSEL_MASK 0x70
  728. /* RK818 IRQ Definitions */
  729. #define RK818_IRQ_VOUT_LO 0
  730. #define RK818_IRQ_VB_LO 1
  731. #define RK818_IRQ_PWRON 2
  732. #define RK818_IRQ_PWRON_LP 3
  733. #define RK818_IRQ_HOTDIE 4
  734. #define RK818_IRQ_RTC_ALARM 5
  735. #define RK818_IRQ_RTC_PERIOD 6
  736. #define RK818_IRQ_USB_OV 7
  737. #define RK818_IRQ_PLUG_IN 8
  738. #define RK818_IRQ_PLUG_OUT 9
  739. #define RK818_IRQ_CHG_OK 10
  740. #define RK818_IRQ_CHG_TE 11
  741. #define RK818_IRQ_CHG_TS1 12
  742. #define RK818_IRQ_TS2 13
  743. #define RK818_IRQ_CHG_CVTLIM 14
  744. #define RK818_IRQ_DISCHG_ILIM 15
  745. #define RK818_IRQ_VOUT_LO_MSK RT_BIT(0)
  746. #define RK818_IRQ_VB_LO_MSK RT_BIT(1)
  747. #define RK818_IRQ_PWRON_MSK RT_BIT(2)
  748. #define RK818_IRQ_PWRON_LP_MSK RT_BIT(3)
  749. #define RK818_IRQ_HOTDIE_MSK RT_BIT(4)
  750. #define RK818_IRQ_RTC_ALARM_MSK RT_BIT(5)
  751. #define RK818_IRQ_RTC_PERIOD_MSK RT_BIT(6)
  752. #define RK818_IRQ_USB_OV_MSK RT_BIT(7)
  753. #define RK818_IRQ_PLUG_IN_MSK RT_BIT(0)
  754. #define RK818_IRQ_PLUG_OUT_MSK RT_BIT(1)
  755. #define RK818_IRQ_CHG_OK_MSK RT_BIT(2)
  756. #define RK818_IRQ_CHG_TE_MSK RT_BIT(3)
  757. #define RK818_IRQ_CHG_TS1_MSK RT_BIT(4)
  758. #define RK818_IRQ_TS2_MSK RT_BIT(5)
  759. #define RK818_IRQ_CHG_CVTLIM_MSK RT_BIT(6)
  760. #define RK818_IRQ_DISCHG_ILIM_MSK RT_BIT(7)
  761. #define RK818_NUM_IRQ 16
  762. #define BUCK_ILMIN_MASK (7 << 0)
  763. #define BOOST_ILMIN_MASK (7 << 0)
  764. #define BUCK1_RATE_MASK (3 << 3)
  765. #define BUCK2_RATE_MASK (3 << 3)
  766. #define MASK_ALL 0xff
  767. #define BUCK_UV_ACT_MASK 0x0f
  768. #define BUCK_UV_ACT_DISABLE 0
  769. #define SWITCH2_EN RT_BIT(6)
  770. #define SWITCH1_EN RT_BIT(5)
  771. #define DEV_OFF_RST RT_BIT(3)
  772. #define DEV_RST RT_BIT(2)
  773. #define DEV_OFF RT_BIT(0)
  774. #define RTC_STOP RT_BIT(0)
  775. #define VB_LO_ACT RT_BIT(4)
  776. #define VB_LO_SEL_3500MV (7 << 0)
  777. #define VOUT_LO_INT RT_BIT(0)
  778. #define CLK32KOUT2_EN RT_BIT(0)
  779. #define TEMP115C 0x0c
  780. #define TEMP_HOTDIE_MSK 0x0c
  781. #define SLP_SD_MSK (0x3 << 2)
  782. #define SHUTDOWN_FUN (0x2 << 2)
  783. #define SLEEP_FUN (0x1 << 2)
  784. #define RK8XX_ID_MSK 0xfff0
  785. #define PWM_MODE_MSK RT_BIT(7)
  786. #define FPWM_MODE RT_BIT(7)
  787. #define AUTO_PWM_MODE 0
  788. #define BUCK_ILMIN_50MA 0
  789. #define BUCK_ILMIN_100MA 1
  790. #define BUCK_ILMIN_150MA 2
  791. #define BUCK_ILMIN_200MA 3
  792. #define BUCK_ILMIN_250MA 4
  793. #define BUCK_ILMIN_300MA 5
  794. #define BUCK_ILMIN_350MA 6
  795. #define BUCK_ILMIN_400MA 7
  796. #define BOOST_ILMIN_75MA 0
  797. #define BOOST_ILMIN_100MA 1
  798. #define BOOST_ILMIN_125MA 2
  799. #define BOOST_ILMIN_150MA 3
  800. #define BOOST_ILMIN_175MA 4
  801. #define BOOST_ILMIN_200MA 5
  802. #define BOOST_ILMIN_225MA 6
  803. #define BOOST_ILMIN_250MA 7
  804. enum
  805. {
  806. RK805_ID = 0x8050,
  807. RK806_ID = 0x8060,
  808. RK808_ID = 0x0000,
  809. RK809_ID = 0x8090,
  810. RK817_ID = 0x8170,
  811. RK818_ID = 0x8180,
  812. };
  813. struct rk8xx
  814. {
  815. int variant;
  816. int irq;
  817. struct rt_device *dev;
  818. rt_uint32_t (*read)(struct rk8xx *, rt_uint16_t reg);
  819. rt_err_t (*write)(struct rk8xx *, rt_uint16_t reg, rt_uint8_t data);
  820. rt_err_t (*update_bits)(struct rk8xx *, rt_uint16_t reg, rt_uint8_t mask,
  821. rt_uint8_t data);
  822. };
  823. #define rk8xx_to_i2c_client(rk8xx) rt_container_of((rk8xx)->dev, struct rt_i2c_client, parent)
  824. #define rk8xx_to_spi_device(rk8xx) rt_container_of((rk8xx)->dev, struct rt_spi_device, parent)
  825. rt_inline rt_uint32_t rk8xx_read(struct rk8xx *rk8xx, rt_uint16_t reg)
  826. {
  827. return rk8xx->read(rk8xx, reg);
  828. }
  829. rt_inline rt_err_t rk8xx_write(struct rk8xx *rk8xx, rt_uint16_t reg, rt_uint8_t data)
  830. {
  831. return rk8xx->write(rk8xx, reg, data);
  832. }
  833. rt_inline rt_err_t rk8xx_update_bits(struct rk8xx *rk8xx, rt_uint16_t reg,
  834. rt_uint8_t mask, rt_uint8_t data)
  835. {
  836. return rk8xx->update_bits(rk8xx, reg, mask, data);
  837. }
  838. rt_err_t rk8xx_probe(struct rk8xx *rk8xx);
  839. rt_err_t rk8xx_shutdown(struct rk8xx *rk8xx);
  840. #endif /* __RK8XX_H__ */