drv_rtc.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-05-16 shelton first version
  9. * 2023-04-08 shelton add support f423
  10. * 2023-10-18 shelton add support f402/f405
  11. * 2024-04-12 shelton add support a403a and a423
  12. */
  13. #include <rtthread.h>
  14. #include <rtdevice.h>
  15. #include <sys/time.h>
  16. #include "drv_common.h"
  17. #ifdef BSP_USING_RTC
  18. //#define DRV_DEBUG
  19. #define LOG_TAG "drv.rtc"
  20. #include <drv_log.h>
  21. #define BKUP_REG_DATA 0xA5A5
  22. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  23. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  24. #define Alarm_IRQn RTCAlarm_IRQn
  25. #define Alarm_IRQHandler RTCAlarm_IRQHandler
  26. #elif defined (SOC_SERIES_AT32F421) || defined (SOC_SERIES_AT32F425)
  27. #define Alarm_IRQn RTC_IRQn
  28. #define Alarm_IRQHandler RTC_IRQHandler
  29. #else
  30. #define Alarm_IRQn ERTCAlarm_IRQn
  31. #define Alarm_IRQHandler ERTCAlarm_IRQHandler
  32. #endif
  33. struct rtc_device_object
  34. {
  35. rt_rtc_dev_t rtc_dev;
  36. #ifdef RT_USING_ALARM
  37. struct rt_rtc_wkalarm wkalarm;
  38. #endif
  39. };
  40. static struct rtc_device_object rtc_device;
  41. static time_t get_rtc_timestamp(void)
  42. {
  43. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  44. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  45. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  46. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  47. defined (SOC_SERIES_AT32A423)
  48. struct tm tm_new;
  49. ertc_time_type ertc_time_struct;
  50. ertc_calendar_get(&ertc_time_struct);
  51. tm_new.tm_sec = ertc_time_struct.sec;
  52. tm_new.tm_min = ertc_time_struct.min;
  53. tm_new.tm_hour = ertc_time_struct.hour;
  54. tm_new.tm_mday = ertc_time_struct.day;
  55. tm_new.tm_mon = ertc_time_struct.month - 1;
  56. tm_new.tm_year = ertc_time_struct.year + 100;
  57. LOG_D("get rtc time.");
  58. return timegm(&tm_new);
  59. #else
  60. return rtc_counter_get();
  61. #endif
  62. }
  63. static rt_err_t set_rtc_time_stamp(time_t time_stamp)
  64. {
  65. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  66. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  67. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  68. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  69. defined (SOC_SERIES_AT32A423)
  70. struct tm now;
  71. gmtime_r(&time_stamp, &now);
  72. if (now.tm_year < 100)
  73. {
  74. return -RT_ERROR;
  75. }
  76. /* set time */
  77. if(ertc_time_set(now.tm_hour, now.tm_min, now.tm_sec, ERTC_AM) != SUCCESS)
  78. {
  79. return -RT_ERROR;
  80. }
  81. /* set date */
  82. if(ertc_date_set(now.tm_year - 100, now.tm_mon + 1, now.tm_mday, now.tm_wday + 1) != SUCCESS)
  83. {
  84. return -RT_ERROR;
  85. }
  86. LOG_D("set rtc time.");
  87. /* indicator for the ertc configuration */
  88. ertc_bpr_data_write(ERTC_DT1, BKUP_REG_DATA);
  89. #else
  90. /* set the rtc counter value */
  91. rtc_counter_set(time_stamp);
  92. /* wait until last write operation on rtc registers has finished */
  93. rtc_wait_config_finish();
  94. LOG_D("set rtc time.");
  95. bpr_data_write(BPR_DATA1, BKUP_REG_DATA);
  96. #endif
  97. return RT_EOK;
  98. }
  99. static rt_err_t rt_rtc_config(void)
  100. {
  101. /* allow access to pattery powered domain */
  102. pwc_battery_powered_domain_access(TRUE);
  103. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  104. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  105. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  106. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  107. defined (SOC_SERIES_AT32A423)
  108. /* select rtc clock source */
  109. #ifdef BSP_RTC_USING_LICK
  110. crm_ertc_clock_select(CRM_ERTC_CLOCK_LICK);
  111. #else
  112. crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
  113. #endif /* BSP_RTC_USING_LICK */
  114. /* enable rtc */
  115. crm_ertc_clock_enable(TRUE);
  116. /* wait for ertc registers update */
  117. ertc_wait_update();
  118. if (ertc_bpr_data_read(ERTC_DT1)!= BKUP_REG_DATA)
  119. {
  120. LOG_I("RTC hasn't been configured, please use <date> command to config.");
  121. /* configure the ertc divider */
  122. ertc_divider_set(0x7F, 0xFF);
  123. /* configure the ertc hour mode */
  124. ertc_hour_mode_set(ERTC_HOUR_MODE_24);
  125. }
  126. #else
  127. #ifdef BSP_RTC_USING_LICK
  128. crm_rtc_clock_select(CRM_RTC_CLOCK_LICK);
  129. #else
  130. crm_rtc_clock_select(CRM_RTC_CLOCK_LEXT);
  131. #endif /* BSP_RTC_USING_LICK */
  132. /* enable rtc */
  133. crm_rtc_clock_enable(TRUE);
  134. /* wait for rtc registers update finish */
  135. rtc_wait_update_finish();
  136. /* wait until last write operation on rtc registers has finished */
  137. rtc_wait_config_finish();
  138. if (bpr_data_read(BPR_DATA1) != BKUP_REG_DATA)
  139. {
  140. LOG_I("RTC hasn't been configured, please use <date> command to config.");
  141. /* set rtc divider: set rtc period to 1sec */
  142. rtc_divider_set(32767);
  143. /* wait until last write operation on rtc registers has finished */
  144. rtc_wait_config_finish();
  145. }
  146. #endif
  147. return RT_EOK;
  148. }
  149. static rt_err_t _rtc_init(void)
  150. {
  151. crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
  152. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  153. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  154. crm_periph_clock_enable(CRM_BPR_PERIPH_CLOCK, TRUE);
  155. #endif
  156. #ifdef BSP_RTC_USING_LICK
  157. crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
  158. while(crm_flag_get(CRM_LICK_STABLE_FLAG) == RESET);
  159. #else
  160. pwc_battery_powered_domain_access(TRUE);
  161. crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
  162. while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
  163. #endif /* BSP_RTC_USING_LICK */
  164. if (rt_rtc_config() != RT_EOK)
  165. {
  166. LOG_E("rtc init failed.");
  167. return -RT_ERROR;
  168. }
  169. return RT_EOK;
  170. }
  171. static rt_err_t _rtc_get_secs(time_t *args)
  172. {
  173. *(rt_uint32_t *)args = get_rtc_timestamp();
  174. LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
  175. return RT_EOK;
  176. }
  177. static rt_err_t _rtc_set_secs(time_t *args)
  178. {
  179. rt_err_t result = RT_EOK;
  180. if (set_rtc_time_stamp(*(rt_uint32_t *)args))
  181. {
  182. result = -RT_ERROR;
  183. }
  184. LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
  185. return result;
  186. }
  187. #ifdef RT_USING_ALARM
  188. static rt_err_t rtc_alarm_time_set(struct rtc_device_object* p_dev)
  189. {
  190. exint_init_type exint_init_struct;
  191. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  192. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  193. struct tm tm_new;
  194. time_t sec_count;
  195. #endif
  196. /* config the exint line of the rtc alarm */
  197. exint_init_struct.line_select = EXINT_LINE_17;
  198. exint_init_struct.line_enable = TRUE;
  199. exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
  200. exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
  201. exint_init(&exint_init_struct);
  202. if (p_dev->wkalarm.enable)
  203. {
  204. nvic_irq_enable(Alarm_IRQn, 0, 0);
  205. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  206. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  207. /* clear alarm flag */
  208. rtc_flag_clear(RTC_TA_FLAG);
  209. /* wait for the register write to complete */
  210. rtc_wait_config_finish();
  211. /* enable alarm interrupt */
  212. rtc_interrupt_enable(RTC_TA_INT, TRUE);
  213. /* wait for the register write to complete */
  214. rtc_wait_config_finish();
  215. tm_new.tm_sec = p_dev->wkalarm.tm_sec;
  216. tm_new.tm_min = p_dev->wkalarm.tm_min;
  217. tm_new.tm_hour = p_dev->wkalarm.tm_hour;
  218. tm_new.tm_mday = p_dev->wkalarm.tm_mday;
  219. tm_new.tm_mon = p_dev->wkalarm.tm_mon;
  220. tm_new.tm_year = p_dev->wkalarm.tm_year;
  221. sec_count = timegm(&tm_new);
  222. rtc_alarm_set(sec_count);
  223. /* wait for the register write to complete */
  224. rtc_wait_config_finish();
  225. #else
  226. ertc_alarm_enable(ERTC_ALA, FALSE);
  227. ertc_flag_clear(ERTC_ALAF_FLAG);
  228. ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK);
  229. ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
  230. ertc_alarm_set(ERTC_ALA, p_dev->wkalarm.tm_mday, p_dev->wkalarm.tm_hour, \
  231. p_dev->wkalarm.tm_min, p_dev->wkalarm.tm_sec, ERTC_24H);
  232. ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
  233. ertc_alarm_enable(ERTC_ALA, TRUE);
  234. ertc_flag_clear(ERTC_ALAF_FLAG);
  235. #endif
  236. }
  237. return RT_EOK;
  238. }
  239. void Alarm_IRQHandler(void)
  240. {
  241. rt_interrupt_enter();
  242. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  243. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  244. if(rtc_flag_get(RTC_TA_FLAG) != RESET)
  245. {
  246. /* clear exint line flag */
  247. exint_flag_clear(EXINT_LINE_17);
  248. /* wait for the register write to complete */
  249. rtc_wait_config_finish();
  250. /* clear alarm flag */
  251. rtc_flag_clear(RTC_TA_FLAG);
  252. /* wait for the register write to complete */
  253. rtc_wait_config_finish();
  254. rt_alarm_update(&rtc_device.rtc_dev.parent, 1);
  255. }
  256. #else
  257. if(ertc_flag_get(ERTC_ALAF_FLAG) != RESET)
  258. {
  259. /* clear alarm flag */
  260. ertc_flag_clear(ERTC_ALAF_FLAG);
  261. /* clear exint flag */
  262. exint_flag_clear(EXINT_LINE_17);
  263. rt_alarm_update(&rtc_device.rtc_dev.parent, 1);
  264. }
  265. #endif
  266. rt_interrupt_leave();
  267. }
  268. #endif
  269. static rt_err_t _rtc_get_alarm(struct rt_rtc_wkalarm *alarm)
  270. {
  271. #ifdef RT_USING_ALARM
  272. *alarm = rtc_device.wkalarm;
  273. LOG_D("GET_ALARM %d:%d:%d",rtc_device.wkalarm.tm_hour,
  274. rtc_device.wkalarm.tm_min,rtc_device.wkalarm.tm_sec);
  275. return RT_EOK;
  276. #else
  277. return -RT_ERROR;
  278. #endif
  279. }
  280. static rt_err_t _rtc_set_alarm(struct rt_rtc_wkalarm *alarm)
  281. {
  282. #ifdef RT_USING_ALARM
  283. LOG_D("RT_DEVICE_CTRL_RTC_SET_ALARM");
  284. if (alarm != RT_NULL)
  285. {
  286. rtc_device.wkalarm.enable = alarm->enable;
  287. rtc_device.wkalarm.tm_year = alarm->tm_year;
  288. rtc_device.wkalarm.tm_mon = alarm->tm_mon;
  289. rtc_device.wkalarm.tm_mday = alarm->tm_mday;
  290. rtc_device.wkalarm.tm_hour = alarm->tm_hour;
  291. rtc_device.wkalarm.tm_min = alarm->tm_min;
  292. rtc_device.wkalarm.tm_sec = alarm->tm_sec;
  293. rtc_alarm_time_set(&rtc_device);
  294. }
  295. else
  296. {
  297. LOG_E("RT_DEVICE_CTRL_RTC_SET_ALARM error!!");
  298. return -RT_ERROR;
  299. }
  300. LOG_D("SET_ALARM %d:%d:%d",alarm->tm_hour,
  301. alarm->tm_min, alarm->tm_sec);
  302. return RT_EOK;
  303. #else
  304. return -RT_ERROR;
  305. #endif
  306. }
  307. static rt_err_t _rtc_get_timeval(struct timeval *tv)
  308. {
  309. tv->tv_sec = get_rtc_timestamp();
  310. return RT_EOK;
  311. }
  312. static const struct rt_rtc_ops _rtc_ops =
  313. {
  314. _rtc_init,
  315. _rtc_get_secs,
  316. _rtc_set_secs,
  317. _rtc_get_alarm,
  318. _rtc_set_alarm,
  319. _rtc_get_timeval,
  320. RT_NULL,
  321. };
  322. int rt_hw_rtc_init(void)
  323. {
  324. rt_err_t result;
  325. rtc_device.rtc_dev.ops = &_rtc_ops;
  326. result = rt_hw_rtc_register(&rtc_device.rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
  327. if (result != RT_EOK)
  328. {
  329. LOG_E("rtc register err code: %d", result);
  330. return result;
  331. }
  332. LOG_D("rtc init success");
  333. return RT_EOK;
  334. }
  335. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  336. #endif /* BSP_USING_RTC */