os.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
  1. #include <os.h>
  2. #include <rtthread.h>
  3. #include <rthw.h>
  4. #ifdef RT_USING_SMART
  5. #include <mmu.h>
  6. #include <lwp_arch.h>
  7. #else
  8. #define PV_OFFSET 0
  9. #endif
  10. #include <cache.h>
  11. #include <hal_atomic.h>
  12. #include <hal_interrupt.h>
  13. #include <ktimer.h>
  14. #include <typedef.h>
  15. #define TIMER_FREQ (24000000)
  16. typedef unsigned long cycles_t;
  17. #ifndef CSR_TIME
  18. #define CSR_TIME 0xc01
  19. #endif
  20. #ifdef __ASSEMBLY__
  21. #define __ASM_STR(x) x
  22. #else
  23. #define __ASM_STR(x) #x
  24. #endif
  25. #define csr_read(csr) \
  26. ({ \
  27. register unsigned long __v; \
  28. __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
  29. : "=r" (__v) : \
  30. : "memory"); \
  31. __v; \
  32. })
  33. static inline cycles_t get_cycles(void)
  34. {
  35. return csr_read(CSR_TIME);
  36. }
  37. static inline uint64_t get_cycles64(void)
  38. {
  39. return get_cycles();
  40. }
  41. static inline uint32_t arch_timer_get_cntfrq(void)
  42. {
  43. uint32_t val = TIMER_FREQ;
  44. return val;
  45. }
  46. static inline uint64_t arch_counter_get_cntpct(void)
  47. {
  48. uint64_t cval;
  49. cval = get_cycles64();
  50. return cval;
  51. }
  52. rt_weak int msleep(unsigned int msecs)
  53. {
  54. rt_thread_mdelay(msecs);
  55. return 0;
  56. }
  57. void rt_hw_us_delay(rt_uint32_t us)
  58. {
  59. uint64_t start, target;
  60. uint64_t frequency;
  61. frequency = arch_timer_get_cntfrq();
  62. start = arch_counter_get_cntpct();
  63. target = frequency / 1000000ULL * us;
  64. while (arch_counter_get_cntpct() - start <= target) ;
  65. }
  66. rt_weak int usleep(unsigned int usecs)
  67. {
  68. int tickDiv = 1000 * (1000 / CONFIG_HZ);
  69. int ticks = usecs / tickDiv;
  70. int msecs = usecs % tickDiv;
  71. if (ticks)
  72. {
  73. rt_thread_delay(ticks);
  74. }
  75. if (msecs)
  76. {
  77. rt_hw_us_delay(usecs);
  78. }
  79. return 0;
  80. }
  81. unsigned long awos_arch_virt_to_phys(unsigned long virtaddr)
  82. {
  83. return virtaddr - PV_OFFSET;
  84. }
  85. unsigned long awos_arch_phys_to_virt(unsigned long physaddr)
  86. {
  87. return physaddr + PV_OFFSET;
  88. }
  89. #include <interrupt.h>
  90. void enable_irq(unsigned int irq)
  91. {
  92. rt_hw_interrupt_umask(irq);
  93. }
  94. void disable_irq(unsigned int irq)
  95. {
  96. rt_hw_interrupt_mask(irq);
  97. }
  98. const void *free_irq(unsigned int irq, void *dev_id)
  99. {
  100. const void *ret = RT_NULL;
  101. return ret;
  102. }
  103. int request_threaded_irq(unsigned int irq, irq_handler_t handler,
  104. irq_handler_t thread_fn, unsigned long irqflags,
  105. const char *devname, void *dev_id)
  106. {
  107. rt_hw_interrupt_install(irq, (rt_isr_handler_t)handler, dev_id, devname);
  108. return 0;
  109. }
  110. void awos_arch_mems_flush_icache_region(unsigned long start, unsigned long len)
  111. {
  112. rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
  113. }
  114. void awos_arch_mems_clean_dcache_region(unsigned long start, unsigned long len)
  115. {
  116. rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)start, len);
  117. }
  118. void awos_arch_mems_clean_flush_dcache_region(unsigned long start, unsigned long len)
  119. {
  120. rt_hw_cpu_dcache_clean_and_invalidate((void *)start, len);
  121. }
  122. void awos_arch_mems_flush_dcache_region(unsigned long start, unsigned long len)
  123. {
  124. rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
  125. }
  126. void awos_arch_clean_flush_cache(void)
  127. {
  128. rt_hw_cpu_dcache_clean_all();
  129. rt_hw_cpu_icache_invalidate_all();
  130. }
  131. void awos_arch_clean_flush_cache_region(unsigned long start, unsigned long len)
  132. {
  133. rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
  134. rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE, (void *)start, len);
  135. }
  136. void awos_arch_flush_cache(void)
  137. {
  138. rt_hw_cpu_dcache_invalidate_all();
  139. rt_hw_cpu_icache_invalidate_all();
  140. }
  141. void awos_arch_clean_dcache(void)
  142. {
  143. rt_hw_cpu_dcache_clean_all();
  144. }
  145. void awos_arch_clean_flush_dcache(void)
  146. {
  147. rt_hw_cpu_dcache_clean_all();
  148. rt_hw_cpu_dcache_invalidate_all();
  149. }
  150. void awos_arch_flush_dcache(void)
  151. {
  152. rt_hw_cpu_dcache_invalidate_all();
  153. }
  154. void awos_arch_flush_icache_all(void)
  155. {
  156. rt_hw_cpu_icache_invalidate_all();
  157. }
  158. rt_weak int32_t hal_spi_gpio_cfg_count(const char *secname)
  159. {
  160. rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
  161. return 0;
  162. }
  163. int32_t esCFG_GetGPIOSecKeyCount(char *GPIOSecName)
  164. {
  165. int id;
  166. if (!rt_strcmp(GPIOSecName, "pwm1") || !rt_strcmp(GPIOSecName, "pwm2") || !rt_strcmp(GPIOSecName, "pwm7"))
  167. {
  168. return 1;
  169. }
  170. else if (!rt_strcmp(GPIOSecName, "sdc0") || !rt_strcmp(GPIOSecName, "sdc1"))
  171. {
  172. return 6;
  173. }
  174. else if (!rt_strcmp(GPIOSecName, "spi0"))
  175. {
  176. return hal_spi_gpio_cfg_count(GPIOSecName);
  177. }
  178. else if (sscanf(GPIOSecName, "twi%d", &id) == 1)
  179. {
  180. return 2;
  181. }
  182. return 0;
  183. }
  184. rt_weak int hal_spi_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id)
  185. {
  186. rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
  187. return -1;
  188. }
  189. rt_weak int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id)
  190. {
  191. rt_kprintf("FUNCTION:%s not implemented.\n", __FUNCTION__);
  192. return -1;
  193. }
  194. #define CFG_GPIO_PORT(p) ((p) - 'A' + 1)
  195. int32_t esCFG_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum)
  196. {
  197. user_gpio_set_t *gpio_cfg = (user_gpio_set_t *) pGPIOCfg;
  198. int i;
  199. int id;
  200. if (!rt_strcmp(GPIOSecName, "pwm1"))
  201. {
  202. rt_strncpy(gpio_cfg->gpio_name, "PB6", 4);
  203. gpio_cfg->data = 0;
  204. gpio_cfg->drv_level = 3;
  205. gpio_cfg->mul_sel = 5; // PWM
  206. gpio_cfg->port = CFG_GPIO_PORT('B'); // PORT-G
  207. gpio_cfg->port_num = 6; // PG13
  208. gpio_cfg->pull = 0; // pull disable
  209. }
  210. else if (!rt_strcmp(GPIOSecName, "pwm2"))
  211. {
  212. rt_strncpy(gpio_cfg->gpio_name, "PG13", 5);
  213. gpio_cfg->data = 0;
  214. gpio_cfg->drv_level = 3;
  215. gpio_cfg->mul_sel = 5; // PWM
  216. gpio_cfg->port = CFG_GPIO_PORT('G'); // PORT-G
  217. gpio_cfg->port_num = 13; // PG13
  218. gpio_cfg->pull = 0; // pull disable
  219. }
  220. else if (!rt_strcmp(GPIOSecName, "pwm7"))
  221. {
  222. rt_strncpy(gpio_cfg->gpio_name, "PD22", 5);
  223. gpio_cfg->data = 0;
  224. gpio_cfg->drv_level = 3;
  225. gpio_cfg->mul_sel = 5; // PWM
  226. gpio_cfg->port = CFG_GPIO_PORT('D'); // PORT-D
  227. gpio_cfg->port_num = 22; // PD22
  228. gpio_cfg->pull = 0; // pull disable
  229. }
  230. else if (!rt_strcmp(GPIOSecName, "sdc0"))
  231. {
  232. /*
  233. [sdc0]
  234. ;sdc0_used = 1
  235. ;bus-width = 4
  236. sdc0_d1 = port:PF00<2><1><1><default>
  237. sdc0_d0 = port:PF01<2><1><1><default>
  238. sdc0_clk = port:PF02<2><1><1><default>
  239. sdc0_cmd = port:PF03<2><1><1><default>
  240. sdc0_d3 = port:PF04<2><1><1><default>
  241. sdc0_d2 = port:PF05<2><1><1><default>
  242. */
  243. for (i = 0; i < GPIONum; i++)
  244. {
  245. strcpy(gpio_cfg->gpio_name, GPIOSecName);
  246. gpio_cfg->port = CFG_GPIO_PORT('F');
  247. gpio_cfg->port_num = i;
  248. gpio_cfg->mul_sel = 2;
  249. gpio_cfg->pull = 1;
  250. gpio_cfg->drv_level = 1;
  251. gpio_cfg->data = 0;
  252. gpio_cfg++;
  253. }
  254. }
  255. else if (!rt_strcmp(GPIOSecName, "sdc1"))
  256. {
  257. /*
  258. [sdc1]
  259. ;sdc1_used = 1
  260. ;bus-width= 4
  261. sdc1_clk = port:PG00<2><1><1><default>
  262. sdc1_cmd = port:PG01<2><1><1><default>
  263. sdc1_d0 = port:PG02<2><1><1><default>
  264. sdc1_d1 = port:PG03<2><1><1><default>
  265. sdc1_d2 = port:PG04<2><1><1><default>
  266. sdc1_d3 = port:PG05<2><1><1><default>
  267. */
  268. for (i = 0; i < GPIONum; i++)
  269. {
  270. strcpy(gpio_cfg->gpio_name, GPIOSecName);
  271. gpio_cfg->port = CFG_GPIO_PORT('G');
  272. gpio_cfg->port_num = i;
  273. gpio_cfg->mul_sel = 2;
  274. gpio_cfg->pull = 1;
  275. gpio_cfg->drv_level = 1;
  276. gpio_cfg->data = 0;
  277. gpio_cfg++;
  278. }
  279. }
  280. else if (sscanf(GPIOSecName, "spi%d", &id) == 1)
  281. {
  282. return hal_spi_gpio_cfg_load(gpio_cfg, GPIONum, id);
  283. }
  284. else if (sscanf(GPIOSecName, "twi%d", &id) == 1)
  285. {
  286. extern int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id);
  287. return hal_i2c_gpio_cfg_load(gpio_cfg, GPIONum, id);
  288. }
  289. return 0;
  290. }
  291. int32_t esCFG_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count)
  292. {
  293. if (!rt_strcmp("target", SecName))
  294. {
  295. /*
  296. [target]
  297. boot_clock = 1008
  298. storage_type = 1
  299. */
  300. if (!rt_strcmp("storage_type", KeyName))
  301. {
  302. if (Count == 1)
  303. {
  304. *Value = 1;
  305. return 0;
  306. }
  307. }
  308. else if (!rt_strcmp("boot_clock", KeyName))
  309. {
  310. if (Count == 1)
  311. {
  312. *Value = 1008;
  313. return 0;
  314. }
  315. }
  316. }
  317. else if (!rt_strcmp("card_product", SecName))
  318. {
  319. /*
  320. [card_product]
  321. card_product_used = 1
  322. card_product_storage = 3
  323. */
  324. if (!rt_strcmp("card_product_used", KeyName))
  325. {
  326. if (Count == 1)
  327. {
  328. *Value = 1;
  329. return 0;
  330. }
  331. } else if (!rt_strcmp("card_product_storage", KeyName))
  332. {
  333. if (Count == 1)
  334. {
  335. *Value = 3;
  336. return 0;
  337. }
  338. }
  339. }
  340. else if (!rt_strcmp("sdcard_global", SecName))
  341. {
  342. /*
  343. [sdcard_global]
  344. used_card_no = 0x01
  345. ;used_card_no = 0x01, when use card0
  346. ;used_card_no = 0x02, when use card1
  347. ;used_card_no = 0x03, when use card0 & card1
  348. internal_card = 0x00
  349. ;internal_card = 0x00, 无内置卡内置卡
  350. ;internal_card = 0x01, card0 做内置卡
  351. ;internal_card = 0x02, card1 做内置卡
  352. */
  353. if (!rt_strcmp("internal_card", KeyName))
  354. {
  355. *Value = 0x01;
  356. return 0;
  357. } else if (!rt_strcmp("used_card_no", KeyName))
  358. {
  359. *Value = 0x03;
  360. return 0;
  361. }
  362. }
  363. return -1;
  364. }
  365. int do_gettimeofday(struct timespec64 *ts)
  366. {
  367. if (ts)
  368. {
  369. ts->tv_sec = rt_tick_get() / RT_TICK_PER_SECOND;
  370. ts->tv_nsec = (rt_tick_get() % RT_TICK_PER_SECOND) * (1000000000 / RT_TICK_PER_SECOND);
  371. }
  372. return 0;
  373. }
  374. int eLIBs_printf(const char *fmt, ...)
  375. {
  376. va_list args;
  377. rt_size_t length;
  378. static char rt_log_buf[RT_CONSOLEBUF_SIZE];
  379. va_start(args, fmt);
  380. length = rt_vsnprintf(rt_log_buf, sizeof(rt_log_buf) - 1, fmt, args);
  381. if (length > RT_CONSOLEBUF_SIZE - 1)
  382. length = RT_CONSOLEBUF_SIZE - 1;
  383. va_end(args);
  384. rt_kputs(rt_log_buf);
  385. }