drv_dac.c 5.4 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-04 stevetong459 first version
  9. * 2022-07-15 Aligagago add apm32F4 serie MCU support
  10. * 2022-12-26 luobeihai add apm32F0 serie MCU support
  11. */
  12. #include <board.h>
  13. #if defined(BSP_USING_DAC1)
  14. #define DBG_TAG "drv.dac"
  15. #define DBG_LVL DBG_LOG
  16. #include <rtdbg.h>
  17. struct apm32_dac
  18. {
  19. const char *name;
  20. DAC_T *dac;
  21. DAC_Config_T dac_conf;
  22. struct rt_dac_device dac_dev;
  23. };
  24. static struct apm32_dac dac_config[] =
  25. {
  26. #if defined (BSP_USING_DAC1)
  27. {
  28. #if defined (SOC_SERIES_APM32F0)
  29. "dac1",
  30. DAC,
  31. {
  32. DAC_TRIGGER_SOFTWARE,
  33. DAC_OUTPUTBUFF_DISABLE,
  34. DAC_WAVE_GENERATION_NONE,
  35. DAC_TRIANGLEAMPLITUDE_4095,
  36. },
  37. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32F4)
  38. "dac1",
  39. DAC,
  40. {
  41. DAC_TRIGGER_SOFT,
  42. DAC_OUTPUT_BUFFER_DISABLE,
  43. DAC_WAVE_GENERATION_NONE,
  44. DAC_TRIANGLE_AMPLITUDE_4095,
  45. },
  46. #endif
  47. }
  48. #endif
  49. };
  50. /**
  51. * @brief This function will enable dac.
  52. *
  53. * @param device is a pointer to dac device.
  54. *
  55. * @param channel is the dac channel.
  56. *
  57. * @return RT_EOK indicates successful enable dac, other value indicates failed.
  58. */
  59. static rt_err_t apm32_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
  60. {
  61. GPIO_Config_T GPIO_ConfigStruct;
  62. struct apm32_dac *cfg = (struct apm32_dac *)device->parent.user_data;
  63. #if defined (SOC_SERIES_APM32F1)
  64. RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA);
  65. GPIO_ConfigStruct.mode = GPIO_MODE_ANALOG;
  66. #elif defined (SOC_SERIES_APM32F4)
  67. RCM_EnableAHB1PeriphClock(RCM_AHB1_PERIPH_GPIOA);
  68. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  69. #elif defined (SOC_SERIES_APM32F0)
  70. RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOA);
  71. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  72. #endif
  73. if (channel == 1)
  74. {
  75. GPIO_ConfigStruct.pin = GPIO_PIN_4;
  76. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  77. DAC_Config(DAC_CHANNEL_1, &cfg->dac_conf);
  78. DAC_Enable(DAC_CHANNEL_1);
  79. }
  80. else if (channel == 2)
  81. {
  82. GPIO_ConfigStruct.pin = GPIO_PIN_5;
  83. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  84. DAC_Config(DAC_CHANNEL_2, &cfg->dac_conf);
  85. DAC_Enable(DAC_CHANNEL_2);
  86. }
  87. else
  88. {
  89. LOG_E("dac channel must be 1 or 2.");
  90. return -RT_ERROR;
  91. }
  92. return RT_EOK;
  93. }
  94. /**
  95. * @brief This function will disable dac.
  96. *
  97. * @param device is a pointer to dac device.
  98. *
  99. * @param channel is the dac channel.
  100. *
  101. * @return RT_EOK indicates successful disable dac, other value indicates failed.
  102. */
  103. static rt_err_t apm32_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
  104. {
  105. if (channel == 1)
  106. {
  107. DAC_Disable(DAC_CHANNEL_1);
  108. }
  109. else if (channel == 2)
  110. {
  111. DAC_Disable(DAC_CHANNEL_2);
  112. }
  113. else
  114. {
  115. LOG_E("dac channel must be 1 or 2.");
  116. return -RT_ERROR;
  117. }
  118. return RT_EOK;
  119. }
  120. /**
  121. * @brief This function will set the vaule of dac.
  122. *
  123. * @param device is a pointer to dac device.
  124. *
  125. * @param channel is the dac channel.
  126. *
  127. * @param value is a pointer to dac value to be convert.
  128. *
  129. * @return RT_EOK indicates successful set dac value, other value indicates failed.
  130. */
  131. static rt_err_t apm32_dac_set_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
  132. {
  133. #if defined (SOC_SERIES_APM32F0)
  134. if (channel == 1)
  135. {
  136. DAC_ConfigChannel1Data(DAC_ALIGN_12B_R, *value);
  137. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  138. }
  139. else if (channel == 2)
  140. {
  141. DAC_ConfigChannel2Data(DAC_ALIGN_12B_R, *value);
  142. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  143. }
  144. else
  145. {
  146. LOG_E("dac channel must be 1 or 2.");
  147. return -RT_ERROR;
  148. }
  149. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32F4)
  150. if (channel == 1)
  151. {
  152. DAC_ConfigChannel1Data(DAC_ALIGN_12BIT_R, *value);
  153. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  154. }
  155. else if (channel == 2)
  156. {
  157. DAC_ConfigChannel2Data(DAC_ALIGN_12BIT_R, *value);
  158. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  159. }
  160. else
  161. {
  162. LOG_E("dac channel must be 1 or 2.");
  163. return -RT_ERROR;
  164. }
  165. #endif
  166. return RT_EOK;
  167. }
  168. static const struct rt_dac_ops apm32_dac_ops =
  169. {
  170. .disabled = apm32_dac_disabled,
  171. .enabled = apm32_dac_enabled,
  172. .convert = apm32_dac_set_value,
  173. };
  174. /**
  175. * @brief DAC initialization function.
  176. *
  177. * @return RT_EOK indicates successful initialization, other value indicates failed;
  178. */
  179. static int rt_hw_dac_init(void)
  180. {
  181. rt_err_t result = RT_EOK;
  182. rt_size_t obj_num = sizeof(dac_config) / sizeof(struct apm32_dac);
  183. rt_uint32_t i = 0;
  184. RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_DAC);
  185. for (i = 0; i < obj_num; i++)
  186. {
  187. /* register dac device */
  188. if (rt_hw_dac_register(&dac_config[i].dac_dev, dac_config[i].name, &apm32_dac_ops, dac_config) == RT_EOK)
  189. {
  190. LOG_D("%s init success", dac_config[i].name);
  191. }
  192. else
  193. {
  194. LOG_E("%s init failed", dac_config[i].name);
  195. result = -RT_ERROR;
  196. }
  197. }
  198. return result;
  199. }
  200. INIT_DEVICE_EXPORT(rt_hw_dac_init);
  201. #endif /* BSP_USING_DACX */