drv_i2c.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Email: opensource_embedded@phytium.com.cn
  7. *
  8. * Change Logs:
  9. * Date Author Notes
  10. * 2023-10-23 zhangyan first version
  11. *
  12. */
  13. #include "rtconfig.h"
  14. #include <rtdevice.h>
  15. #include <string.h>
  16. #define LOG_TAG "i2c_drv"
  17. #include "drv_log.h"
  18. #include "drv_i2c.h"
  19. #include "fi2c.h"
  20. #include "fi2c_hw.h"
  21. #include "fio_mux.h"
  22. #include "fmio_hw.h"
  23. #include "fmio.h"
  24. #include "drivers/dev_i2c.h"
  25. #include "fparameters.h"
  26. #ifdef RT_USING_SMART
  27. #include <ioremap.h>
  28. #endif
  29. /*Please define the length of the mem_addr of the device*/
  30. #ifndef FI2C_DEVICE_MEMADDR_LEN
  31. #define FI2C_DEVICE_MEMADDR_LEN 2
  32. #endif
  33. #define FI2C_DEFAULT_ID 0
  34. #define I2C_USE_MIO
  35. #if defined(I2C_USE_MIO)
  36. static FMioCtrl mio_handle;
  37. #endif
  38. struct phytium_i2c_bus
  39. {
  40. struct rt_i2c_bus_device device;
  41. FI2c i2c_handle;
  42. struct rt_i2c_msg *msg;
  43. const char *name;
  44. };
  45. #if defined(I2C_USE_CONTROLLER)
  46. static rt_err_t i2c_config(struct phytium_i2c_bus *i2c_bus)
  47. {
  48. RT_ASSERT(i2c_bus);
  49. FI2cConfig input_cfg;
  50. const FI2cConfig *config_p = NULL;
  51. FI2c *instance_p = &i2c_bus->i2c_handle;
  52. FError ret = FI2C_SUCCESS;
  53. /* Lookup default configs by instance id */
  54. config_p = FI2cLookupConfig(instance_p->config.instance_id);
  55. input_cfg = *config_p;
  56. #ifdef RT_USING_SMART
  57. input_cfg.base_addr = (uintptr)rt_ioremap((void *)input_cfg.base_addr, 0x1000);
  58. #endif
  59. input_cfg.speed_rate = FI2C_SPEED_STANDARD_RATE;
  60. input_cfg.work_mode = FI2C_MASTER;
  61. FI2cDeInitialize(&i2c_bus->i2c_handle);
  62. /* Initialization */
  63. ret = FI2cCfgInitialize(instance_p, &input_cfg);
  64. if (ret != FI2C_SUCCESS)
  65. {
  66. LOG_E("Init master I2c failed, ret: 0x%x", ret);
  67. return -RT_ERROR;
  68. }
  69. return RT_EOK;
  70. }
  71. #endif
  72. #if defined(I2C_USE_MIO)
  73. static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus)
  74. {
  75. RT_ASSERT(i2c_bus);
  76. FI2cConfig input_cfg;
  77. const FI2cConfig *config_p = NULL;
  78. FI2c *instance_p = &i2c_bus->i2c_handle;
  79. FError ret = FI2C_SUCCESS;
  80. mio_handle.config = *FMioLookupConfig(instance_p->config.instance_id);
  81. #ifdef RT_USING_SMART
  82. mio_handle.config.func_base_addr = (uintptr)rt_ioremap((void *)mio_handle.config.func_base_addr, 0x1200);
  83. mio_handle.config.mio_base_addr = (uintptr)rt_ioremap((void *)mio_handle.config.mio_base_addr, 0x200);
  84. #endif
  85. ret = FMioFuncInit(&mio_handle, FMIO_FUNC_SET_I2C);
  86. if (ret != FT_SUCCESS)
  87. {
  88. LOG_E("MIO initialize error.");
  89. return -RT_ERROR;
  90. }
  91. FIOPadSetMioMux(instance_p->config.instance_id);
  92. config_p = FI2cLookupConfig(FI2C_DEFAULT_ID);
  93. if (NULL == config_p)
  94. {
  95. LOG_E("Config of mio instance %d non found.", instance_p->config.instance_id);
  96. return -RT_ERROR;
  97. }
  98. input_cfg = *config_p;
  99. input_cfg.instance_id = instance_p->config.instance_id;
  100. input_cfg.base_addr = FMioFuncGetAddress(&mio_handle, FMIO_FUNC_SET_I2C);
  101. input_cfg.irq_num = FMioFuncGetIrqNum(&mio_handle, FMIO_FUNC_SET_I2C);
  102. input_cfg.ref_clk_hz = FMIO_CLK_FREQ_HZ;
  103. input_cfg.speed_rate = FI2C_SPEED_STANDARD_RATE;
  104. ret = FI2cCfgInitialize(&i2c_bus->i2c_handle, &input_cfg);
  105. if (FI2C_SUCCESS != ret)
  106. {
  107. LOG_E("Init mio master failed, ret: 0x%x", ret);
  108. return -RT_ERROR;
  109. }
  110. mio_handle.is_ready = 0;
  111. rt_memset(&mio_handle, 0, sizeof(mio_handle));
  112. return RT_EOK;
  113. }
  114. #endif
  115. static rt_err_t phytium_i2c_set_speed(struct phytium_i2c_bus *i2c_bus, rt_uint32_t speed)
  116. {
  117. RT_ASSERT(i2c_bus);
  118. u32 ret;
  119. uintptr base_addr = i2c_bus->i2c_handle.config.base_addr;
  120. ret = FI2cSetSpeed(base_addr, speed);
  121. if (ret != FI2C_SUCCESS)
  122. {
  123. LOG_E("Set i2c speed failed!\n");
  124. return -RT_ERROR;
  125. }
  126. return RT_EOK;
  127. }
  128. static rt_err_t i2c_bus_control(struct rt_i2c_bus_device *device, int cmd, void *args)
  129. {
  130. RT_ASSERT(device);
  131. struct phytium_i2c_bus *i2c_bus;
  132. i2c_bus = (struct phytium_i2c_bus *)(device);
  133. FI2cConfig *config_p;
  134. switch (cmd)
  135. {
  136. case RT_I2C_DEV_CTRL_CLK:
  137. phytium_i2c_set_speed(i2c_bus, *(rt_uint32_t *)args);
  138. break;
  139. case RT_I2C_DEV_CTRL_10BIT:
  140. config_p = &i2c_bus->i2c_handle.config;
  141. config_p->use_7bit_addr = FALSE;
  142. FI2cCfgInitialize(&i2c_bus->i2c_handle, config_p);
  143. break;
  144. default:
  145. return -RT_EIO;
  146. }
  147. return RT_EOK;
  148. }
  149. static rt_ssize_t i2c_master_xfer(struct rt_i2c_bus_device *device, struct rt_i2c_msg msgs[], rt_uint32_t num)
  150. {
  151. RT_ASSERT(device);
  152. u32 ret;
  153. struct rt_i2c_msg *pmsg;
  154. rt_ssize_t i;
  155. struct phytium_i2c_bus *i2c_bus;
  156. i2c_bus = (struct phytium_i2c_bus *)(device);
  157. uintptr mem_addr = 0;
  158. for (i = 0; i < num; i++)
  159. {
  160. pmsg = &msgs[i];
  161. for (u32 j = 0; j <FI2C_DEVICE_MEMADDR_LEN; j++)
  162. {
  163. mem_addr |= msgs[i].buf[j] << (8 * (FI2C_DEVICE_MEMADDR_LEN - 1 - j));
  164. }
  165. i2c_bus->i2c_handle.config.slave_addr = pmsg->addr;
  166. if (pmsg->flags & RT_I2C_RD)
  167. {
  168. rt_thread_delay(100);
  169. ret = FI2cMasterReadPoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[0], pmsg->len - FI2C_DEVICE_MEMADDR_LEN);
  170. if (ret != FI2C_SUCCESS)
  171. {
  172. LOG_E("I2C master read failed!\n");
  173. return -RT_ERROR;
  174. }
  175. }
  176. else
  177. {
  178. rt_thread_delay(100);
  179. ret = FI2cMasterWritePoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[FI2C_DEVICE_MEMADDR_LEN], pmsg->len - FI2C_DEVICE_MEMADDR_LEN);
  180. if (ret != FI2C_SUCCESS)
  181. {
  182. LOG_E("I2C master write failed!\n");
  183. return -RT_ERROR;
  184. }
  185. }
  186. }
  187. return i;
  188. }
  189. static const struct rt_i2c_bus_device_ops _i2c_ops =
  190. {
  191. .master_xfer = i2c_master_xfer,
  192. .slave_xfer = NULL,
  193. .i2c_bus_control = i2c_bus_control
  194. };
  195. #if defined(I2C_USE_CONTROLLER)
  196. static int i2c_controller_init(struct phytium_i2c_bus *i2c_controller_bus)
  197. {
  198. rt_err_t ret = RT_EOK;
  199. ret = i2c_config(i2c_controller_bus);
  200. if (ret != RT_EOK)
  201. {
  202. LOG_E("I2C config failed.\n");
  203. return -RT_ERROR;
  204. }
  205. i2c_controller_bus->device.ops = &_i2c_ops;
  206. ret = rt_i2c_bus_device_register(&i2c_controller_bus->device, i2c_controller_bus->name);
  207. RT_ASSERT(RT_EOK == ret);
  208. LOG_D("I2C bus reg success.\n");
  209. return ret;
  210. }
  211. #endif
  212. #if defined(I2C_USE_MIO)
  213. static int i2c_mio_init(struct phytium_i2c_bus *i2c_mio_bus)
  214. {
  215. rt_err_t ret = RT_EOK;
  216. ret = i2c_mio_config(i2c_mio_bus);
  217. if (ret != RT_EOK)
  218. {
  219. LOG_E("I2C mio config failed.\n");
  220. return -RT_ERROR;
  221. }
  222. i2c_mio_bus->device.ops = &_i2c_ops;
  223. ret = rt_i2c_bus_device_register(&i2c_mio_bus->device, i2c_mio_bus->name);
  224. RT_ASSERT(RT_EOK == ret);
  225. LOG_D("I2C mio bus reg success.\n");
  226. return ret;
  227. }
  228. #endif
  229. #if defined(RT_USING_I2C0)
  230. static struct phytium_i2c_bus i2c_controller0_bus;
  231. #endif
  232. #if defined(RT_USING_I2C1)
  233. static struct phytium_i2c_bus i2c_controller1_bus;
  234. #endif
  235. #if defined(RT_USING_I2C2)
  236. static struct phytium_i2c_bus i2c_controller2_bus;
  237. #endif
  238. #if defined(RT_USING_MIO0)
  239. static struct phytium_i2c_bus i2c_mio0_bus;
  240. #endif
  241. #if defined(RT_USING_MIO1)
  242. static struct phytium_i2c_bus i2c_mio1_bus;
  243. #endif
  244. #if defined(RT_USING_MIO2)
  245. static struct phytium_i2c_bus i2c_mio2_bus;
  246. #endif
  247. #if defined(RT_USING_MIO3)
  248. static struct phytium_i2c_bus i2c_mio3_bus;
  249. #endif
  250. #if defined(RT_USING_MIO4)
  251. static struct phytium_i2c_bus i2c_mio4_bus;
  252. #endif
  253. #if defined(RT_USING_MIO5)
  254. static struct phytium_i2c_bus i2c_mio5_bus;
  255. #endif
  256. #if defined(RT_USING_MIO6)
  257. static struct phytium_i2c_bus i2c_mio6_bus;
  258. #endif
  259. #if defined(RT_USING_MIO7)
  260. static struct phytium_i2c_bus i2c_mio7_bus;
  261. #endif
  262. #if defined(RT_USING_MIO8)
  263. static struct phytium_i2c_bus i2c_mio8_bus;
  264. #endif
  265. #if defined(RT_USING_MIO9)
  266. static struct phytium_i2c_bus i2c_mio9_bus;
  267. #endif
  268. #if defined(RT_USING_MIO10)
  269. static struct phytium_i2c_bus i2c_mio10_bus;
  270. #endif
  271. #if defined(RT_USING_MIO11)
  272. static struct phytium_i2c_bus i2c_mio11_bus;
  273. #endif
  274. #if defined(RT_USING_MIO12)
  275. static struct phytium_i2c_bus i2c_mio12_bus;
  276. #endif
  277. #if defined(RT_USING_MIO13)
  278. static struct phytium_i2c_bus i2c_mio13_bus;
  279. #endif
  280. #if defined(RT_USING_MIO14)
  281. static struct phytium_i2c_bus i2c_mio14_bus;
  282. #endif
  283. #if defined(RT_USING_MIO15)
  284. static struct phytium_i2c_bus i2c_mio15_bus;
  285. #endif
  286. int rt_hw_i2c_init(void)
  287. {
  288. #if defined(RT_USING_I2C0)
  289. i2c_controller0_bus.name = "I2C0";
  290. i2c_controller0_bus.i2c_handle.config.instance_id = FI2C0_ID;
  291. i2c_controller_init(&i2c_controller0_bus);
  292. #endif
  293. #if defined(RT_USING_I2C1)
  294. i2c_controller1_bus.name = "I2C1";
  295. i2c_controller1_bus.i2c_handle.config.instance_id = FI2C1_ID;
  296. i2c_controller_init(&i2c_controller1_bus);
  297. #endif
  298. #if defined(RT_USING_I2C2)
  299. i2c_controller2_bus.name = "I2C2";
  300. i2c_controller2_bus.i2c_handle.config.instance_id = FI2C2_ID;
  301. i2c_controller_init(&i2c_controller2_bus);
  302. #endif
  303. #if defined(RT_USING_MIO0)
  304. i2c_mio0_bus.name = "MIO0";
  305. i2c_mio0_bus.i2c_handle.config.instance_id = FMIO0_ID;
  306. i2c_mio_init(&i2c_mio0_bus);
  307. #endif
  308. #if defined(RT_USING_MIO1)
  309. i2c_mio1_bus.name = "MIO1";
  310. i2c_mio1_bus.i2c_handle.config.instance_id = FMIO1_ID;
  311. i2c_mio_init(&i2c_mio1_bus);
  312. #endif
  313. #if defined(RT_USING_MIO2)
  314. i2c_mio2_bus.name = "MIO2";
  315. i2c_mio2_bus.i2c_handle.config.instance_id = FMIO2_ID;
  316. i2c_mio_init(&i2c_mio2_bus);
  317. #endif
  318. #if defined(RT_USING_MIO3)
  319. i2c_mio3_bus.name = "MIO3";
  320. i2c_mio3_bus.i2c_handle.config.instance_id = FMIO3_ID;
  321. i2c_mio_init(&i2c_mio3_bus);
  322. #endif
  323. #if defined(RT_USING_MIO4)
  324. i2c_mio4_bus.name = "MIO4";
  325. i2c_mio4_bus.i2c_handle.config.instance_id = FMIO4_ID;
  326. i2c_mio_init(&i2c_mio4_bus);
  327. #endif
  328. #if defined(RT_USING_MIO5)
  329. i2c_mio5_bus.name = "MIO5";
  330. i2c_mio5_bus.i2c_handle.config.instance_id = FMIO5_ID;
  331. i2c_mio_init(&i2c_mio5_bus);
  332. #endif
  333. #if defined(RT_USING_MIO6)
  334. i2c_mio6_bus.name = "MIO6";
  335. i2c_mio6_bus.i2c_handle.config.instance_id = FMIO6_ID;
  336. i2c_mio_init(&i2c_mio6_bus);
  337. #endif
  338. #if defined(RT_USING_MIO7)
  339. i2c_mio7_bus.name = "MIO2";
  340. i2c_mio7_bus.i2c_handle.config.instance_id = FMIO7_ID;
  341. i2c_mio_init(&i2c_mio7_bus);
  342. #endif
  343. #if defined(RT_USING_MIO8)
  344. i2c_mio8_bus.name = "MIO8";
  345. i2c_mio8_bus.i2c_handle.config.instance_id = FMIO8_ID;
  346. i2c_mio_init(&i2c_mio8_bus);
  347. #endif
  348. #if defined(RT_USING_MIO9)
  349. i2c_mio9_bus.name = "MIO9";
  350. i2c_mio9_bus.i2c_handle.config.instance_id = FMIO9_ID;
  351. i2c_mio_init(&i2c_mio9_bus);
  352. #endif
  353. #if defined(RT_USING_MIO10)
  354. i2c_mio10_bus.name = "MIO10";
  355. i2c_mio10_bus.i2c_handle.config.instance_id = FMIO10_ID;
  356. i2c_mio_init(&i2c_mio10_bus);
  357. #endif
  358. #if defined(RT_USING_MIO11)
  359. i2c_mio11_bus.name = "MIO11";
  360. i2c_mio11_bus.i2c_handle.config.instance_id = FMIO11_ID;
  361. i2c_mio_init(&i2c_mio11_bus);
  362. #endif
  363. #if defined(RT_USING_MIO12)
  364. i2c_mio12_bus.name = "MIO12";
  365. i2c_mio12_bus.i2c_handle.config.instance_id = FMIO12_ID;
  366. i2c_mio_init(&i2c_mio12_bus);
  367. #endif
  368. #if defined(RT_USING_MIO13)
  369. i2c_mio13_bus.name = "MIO13";
  370. i2c_mio13_bus.i2c_handle.config.instance_id = FMIO13_ID;
  371. i2c_mio_init(&i2c_mio13_bus);
  372. #endif
  373. #if defined(RT_USING_MIO14)
  374. i2c_mio14_bus.name = "MIO14";
  375. i2c_mio14_bus.i2c_handle.config.instance_id = FMIO14_ID;
  376. i2c_mio_init(&i2c_mio14_bus);
  377. #endif
  378. #if defined(RT_USING_MIO15)
  379. i2c_mio15_bus.name = "MIO15";
  380. i2c_mio15_bus.i2c_handle.config.instance_id = FMIO15_ID;
  381. i2c_mio_init(&i2c_mio15_bus);
  382. #endif
  383. return 0;
  384. }
  385. INIT_DEVICE_EXPORT(rt_hw_i2c_init);