add ep_enable param to check if ep is enable when transfer

port/ch32/usb_dc_usbfs.c

@@ -29,6 +29,7 @@ struct ch32_usbfs_ep_state {
     uint16_t ep_mps;    /* Endpoint max packet size */
     uint8_t ep_type;    /* Endpoint type */
     uint8_t ep_stalled; /* Endpoint stall flag */
+    uint8_t ep_enable;  /* Endpoint enable */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -58,8 +59,6 @@ __WEAK void usb_dc_low_level_deinit(void)
 
 int usb_dc_init(void)
 {
-    memset(&g_ch32_usbfs_udc, 0, sizeof(struct ch32_usbfs_udc));
-
     usb_dc_low_level_init();
 
     USBFS_DEVICE->BASE_CTRL = 0x00;
@@ -107,10 +106,12 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
         g_ch32_usbfs_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_ch32_usbfs_udc.out_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_ch32_usbfs_udc.out_ep[ep_idx].ep_enable = true;
         USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_NAK | USBFS_UEP_AUTO_TOG);
     } else {
         g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_ch32_usbfs_udc.in_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_ch32_usbfs_udc.in_ep[ep_idx].ep_enable = true;
         USB_SET_TX_CTRL(ep_idx, USBFS_UEP_T_RES_NAK | USBFS_UEP_AUTO_TOG);
     }
     return 0;
@@ -172,10 +173,13 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
     if (!data && data_len) {
         return -1;
     }
+    if (!g_ch32_usbfs_udc.in_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     if ((uint32_t)data & 0x03) {
         printf("data do not align4\r\n");
-        return -2;
+        return -3;
     }
 
     g_ch32_usbfs_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
@@ -216,10 +220,12 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
-
+    if (!g_ch32_usbfs_udc.out_ep[ep_idx].ep_enable) {
+        return -2;
+    }
     if ((uint32_t)data & 0x03) {
         printf("data do not align4\r\n");
-        return -2;
+        return -3;
     }
 
     g_ch32_usbfs_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data;
@@ -374,6 +380,7 @@ void USBD_IRQHandler(void)
         ep0_tx_data_toggle = true;
         ep0_rx_data_toggle = true;
 
+        memset(&g_ch32_usbfs_udc, 0, sizeof(struct ch32_usbfs_udc));
         usbd_event_reset_handler();
         USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup);
         USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK);

port/ch32/usb_dc_usbhs.c

@@ -28,6 +28,7 @@ struct ch32_usbhs_ep_state {
     uint16_t ep_mps;    /* Endpoint max packet size */
     uint8_t ep_type;    /* Endpoint type */
     uint8_t ep_stalled; /* Endpoint stall flag */
+    uint8_t ep_enable;  /* Endpoint enable */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -58,8 +59,6 @@ __WEAK void usb_dc_low_level_deinit(void)
 
 int usb_dc_init(void)
 {
-    memset(&g_ch32_usbhs_udc, 0, sizeof(struct ch32_usbhs_udc));
-
     usb_dc_low_level_init();
 
     USBHS_DEVICE->HOST_CTRL = 0x00;
@@ -171,10 +170,12 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
     if (!data && data_len) {
         return -1;
     }
-
-    if ((uint32_t)data & 0x03) {
+    if (!g_ch32_usbhs_udc.in_ep[ep_idx].ep_enable) {
         return -2;
     }
+    if ((uint32_t)data & 0x03) {
+        return -3;
+    }
 
     g_ch32_usbhs_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
     g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len = data_len;
@@ -214,10 +215,12 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
-
-    if ((uint32_t)data & 0x03) {
+    if (!g_ch32_usbhs_udc.out_ep[ep_idx].ep_enable) {
         return -2;
     }
+    if ((uint32_t)data & 0x03) {
+        return -3;
+    }
 
     g_ch32_usbhs_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data;
     g_ch32_usbhs_udc.out_ep[ep_idx].xfer_len = data_len;
@@ -361,6 +364,7 @@ void USBD_IRQHandler(void)
             epx_tx_data_toggle[ep_idx - 1] = false;
         }
 
+        memset(&g_ch32_usbhs_udc, 0, sizeof(struct ch32_usbhs_udc));
         usbd_event_reset_handler();
         USBHS_DEVICE->UEP0_DMA = (uint32_t)&g_ch32_usbhs_udc.setup;
         USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK;

port/dwc2/usb_dc_dwc2.c

@@ -140,6 +140,7 @@ struct dwc2_ep_state {
     uint16_t ep_mps;    /* Endpoint max packet size */
     uint8_t ep_type;    /* Endpoint type */
     uint8_t ep_stalled; /* Endpoint stall flag */
+    uint8_t ep_enable;  /* Endpoint enable */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -679,6 +680,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
         g_dwc2_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_dwc2_udc.out_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_dwc2_udc.out_ep[ep_idx].ep_enable = true;
 
         USB_OTG_DEV->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & (uint32_t)(1UL << (16 + ep_idx));
 
@@ -709,6 +711,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     } else {
         g_dwc2_udc.in_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_dwc2_udc.in_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_dwc2_udc.in_ep[ep_idx].ep_enable = true;
 
         USB_OTG_DEV->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << ep_idx);
 
@@ -786,24 +789,26 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
     if (!data && data_len) {
         return -1;
     }
+    if (!g_dwc2_udc.in_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 #ifdef CONFIG_USB_DWC2_DMA_ENABLE
     if ((uint32_t)data & 0x03) {
-        return -2;
+        return -3;
     }
 #endif
 #ifdef CONFIG_USB_DCACHE_ENABLE
     if ((data && (((uint32_t)data) & 0x1f))) {
-        return -2;
+        return -4;
     }
 #if defined(STM32F7) || defined(STM32H7)
-    if (data && (((uint32_t)data) & 0x24000000) != 0x24000000))
-        {
-            return -2;
-        }
+    if ((((uint32_t)data) & 0x24000000) != 0x24000000) {
+        return -5;
+    }
 #endif
 #endif
     if (USB_OTG_INEP(ep_idx)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) {
-        return -3;
+        return -6;
     }
 
     g_dwc2_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
@@ -855,24 +860,26 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
-#ifdef CONFIG_USB_DWC2_DMA_ENABLE
-    if ((uint32_t)data & 0x03) {
+    if (!g_dwc2_udc.out_ep[ep_idx].ep_enable) {
         return -2;
     }
+#ifdef CONFIG_USB_DWC2_DMA_ENABLE
+    if (((uint32_t)data) & 0x03) {
+        return -3;
+    }
 #endif
 #ifdef CONFIG_USB_DCACHE_ENABLE
-    if ((data && (((uint32_t)data) & 0x1f))) {
-        return -2;
+    if (((uint32_t)data) & 0x1f) {
+        return -4;
     }
 #if defined(STM32F7) || defined(STM32H7)
-    if (data && (((uint32_t)data) & 0x24000000) != 0x24000000))
-        {
-            return -2;
-        }
+    if ((((uint32_t)data) & 0x24000000) != 0x24000000) {
+        return -5;
+    }
 #endif
 #endif
     if (USB_OTG_OUTEP(ep_idx)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) {
-        return -3;
+        return -6;
     }
 
     g_dwc2_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data;
@@ -1052,6 +1059,7 @@ void USBD_IRQHandler(void)
 
             USB_OTG_DEV->DIEPMSK = USB_OTG_DIEPMSK_XFRCM;
 
+            memset(&g_dwc2_udc, 0, sizeof(struct dwc2_udc));
             usbd_event_reset_handler();
             /* Start reading setup */
             dwc2_ep0_start_read_setup((uint8_t *)&g_dwc2_udc.setup);

port/fsdev/usb_dc_fsdev.c

@@ -29,8 +29,9 @@ struct fsdev_ep_state {
     uint16_t ep_mps;         /* Endpoint max packet size */
     uint8_t ep_type;         /* Endpoint type */
     uint8_t ep_stalled;      /* Endpoint stall flag */
-    uint16_t ep_pma_buf_len; /** Previously allocated buffer size */
-    uint16_t ep_pma_addr;    /** ep pmd allocated addr */
+    uint8_t ep_enable;       /* Endpoint enable */
+    uint16_t ep_pma_buf_len; /* Previously allocated buffer size */
+    uint16_t ep_pma_addr;    /* ep pmd allocated addr */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -55,10 +56,6 @@ __WEAK void usb_dc_low_level_deinit(void)
 
 int usb_dc_init(void)
 {
-    memset(&g_fsdev_udc, 0, sizeof(struct fsdev_udc));
-
-    g_fsdev_udc.pma_offset = USB_BTABLE_SIZE;
-
     usb_dc_low_level_init();
 
     /* Init Device */
@@ -153,6 +150,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
         g_fsdev_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_fsdev_udc.out_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_fsdev_udc.out_ep[ep_idx].ep_enable = true;
         if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) {
             if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > USB_RAM_SIZE) {
                 USB_LOG_ERR("Ep pma %d overflow\r\n", ep_cfg->ep_addr);
@@ -170,6 +168,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     } else {
         g_fsdev_udc.in_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_fsdev_udc.in_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_fsdev_udc.in_ep[ep_idx].ep_enable = true;
         if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) {
             if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > USB_RAM_SIZE) {
                 USB_LOG_ERR("Ep pma %d overflow\r\n", ep_cfg->ep_addr);
@@ -259,6 +258,10 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
         return -1;
     }
 
+    if (!g_fsdev_udc.in_ep[ep_idx].ep_enable) {
+        return -2;
+    }
+
     g_fsdev_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
     g_fsdev_udc.in_ep[ep_idx].xfer_len = data_len;
     g_fsdev_udc.in_ep[ep_idx].actual_xfer_len = 0;
@@ -279,6 +282,9 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
+    if (!g_fsdev_udc.out_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     g_fsdev_udc.out_ep[ep_idx].xfer_buf = data;
     g_fsdev_udc.out_ep[ep_idx].xfer_len = data_len;

port/hpm/usb_dc_hpm.c

@@ -28,6 +28,7 @@ struct hpm_ep_state {
     uint16_t ep_mps;    /* Endpoint max packet size */
     uint8_t ep_type;    /* Endpoint type */
     uint8_t ep_stalled; /* Endpoint stall flag */
+    uint8_t ep_enable;  /* Endpoint enable */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -59,10 +60,9 @@ __WEAK void usb_dc_low_level_deinit(void)
 
 int usb_dc_init(void)
 {
-    memset(&g_hpm_udc, 0, sizeof(struct hpm_udc));
-
     usb_dc_low_level_init();
 
+    memset(&g_hpm_udc, 0, sizeof(struct hpm_udc));
     g_hpm_udc.handle = &usb_device_handle[0];
     g_hpm_udc.handle->regs = (USB_Type *)HPM_USB0_BASE;
     g_hpm_udc.handle->dcd_data = &_dcd_data;
@@ -99,9 +99,11 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
         g_hpm_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_hpm_udc.out_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_hpm_udc.out_ep[ep_idx].ep_enable = true;
     } else {
         g_hpm_udc.in_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_hpm_udc.in_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_hpm_udc.in_ep[ep_idx].ep_enable = true;
     }
 
     tmp_ep_cfg.xfer = ep_cfg->ep_type;
@@ -146,6 +148,9 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
     if (!data && data_len) {
         return -1;
     }
+    if (!g_hpm_udc.in_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     g_hpm_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
     g_hpm_udc.in_ep[ep_idx].xfer_len = data_len;
@@ -170,6 +175,9 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
+    if (!g_hpm_udc.out_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     g_hpm_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data;
     g_hpm_udc.out_ep[ep_idx].xfer_len = data_len;
@@ -199,6 +207,8 @@ void USBD_IRQHandler(void)
 
     if (int_status & intr_reset) {
         speed = usb_device_get_port_speed(handle);
+        memset(g_hpm_udc.in_ep, 0, sizeof(struct hpm_ep_state) * USB_NUM_BIDIR_ENDPOINTS);
+        memset(g_hpm_udc.out_ep, 0, sizeof(struct hpm_ep_state) * USB_NUM_BIDIR_ENDPOINTS);
         usbd_event_reset_handler();
         usb_device_bus_reset(handle, 64);
     }

port/musb/usb_dc_musb.c

@@ -108,6 +108,7 @@ struct musb_ep_state {
     uint16_t ep_mps;    /* Endpoint max packet size */
     uint8_t ep_type;    /* Endpoint type */
     uint8_t ep_stalled; /* Endpoint stall flag */
+    uint8_t ep_enable;  /* Endpoint enable */
     uint8_t *xfer_buf;
     uint32_t xfer_len;
     uint32_t actual_xfer_len;
@@ -225,14 +226,6 @@ __WEAK void usb_dc_low_level_deinit(void)
 
 int usb_dc_init(void)
 {
-    memset(&g_musb_udc, 0, sizeof(struct musb_udc));
-
-    g_musb_udc.out_ep[0].ep_mps = USB_CTRL_EP_MPS;
-    g_musb_udc.out_ep[0].ep_type = 0x00;
-    g_musb_udc.in_ep[0].ep_mps = USB_CTRL_EP_MPS;
-    g_musb_udc.in_ep[0].ep_type = 0x00;
-    g_musb_udc.fifo_size_offset = USB_CTRL_EP_MPS;
-
     usb_dc_low_level_init();
 
 #ifdef CONFIG_USB_HS
@@ -280,6 +273,12 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     uint16_t ui32Register = 0;
 
     if (ep_idx == 0) {
+        g_musb_udc.out_ep[0].ep_mps = USB_CTRL_EP_MPS;
+        g_musb_udc.out_ep[0].ep_type = 0x00;
+        g_musb_udc.out_ep[0].ep_enable = true;
+        g_musb_udc.in_ep[0].ep_mps = USB_CTRL_EP_MPS;
+        g_musb_udc.in_ep[0].ep_type = 0x00;
+        g_musb_udc.in_ep[0].ep_enable = true;
         return 0;
     }
 
@@ -294,6 +293,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
         g_musb_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_musb_udc.out_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_musb_udc.out_ep[ep_idx].ep_enable = true;
 
         HWREGH(USB_BASE + MUSB_IND_RXMAP_OFFSET) = ep_cfg->ep_mps;
 
@@ -344,6 +344,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
     } else {
         g_musb_udc.in_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
         g_musb_udc.in_ep[ep_idx].ep_type = ep_cfg->ep_type;
+        g_musb_udc.in_ep[ep_idx].ep_enable = true;
 
         HWREGH(USB_BASE + MUSB_TXIE_OFFSET) |= (1 << ep_idx);
 
@@ -472,6 +473,9 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len
     if (!data && data_len) {
         return -1;
     }
+    if (!g_musb_udc.in_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     old_ep_idx = musb_get_active_ep();
     musb_set_active_ep(ep_idx);
@@ -526,6 +530,9 @@ int usbd_ep_start_read(const uint8_t ep, uint8_t *data, uint32_t data_len)
     if (!data && data_len) {
         return -1;
     }
+    if (!g_musb_udc.out_ep[ep_idx].ep_enable) {
+        return -2;
+    }
 
     old_ep_idx = musb_get_active_ep();
     musb_set_active_ep(ep_idx);
@@ -644,6 +651,8 @@ void USBD_IRQHandler(void)
 
     /* Receive a reset signal from the USB bus */
     if (is & USB_IS_RESET) {
+        memset(&g_musb_udc, 0, sizeof(struct musb_udc));
+        g_musb_udc.fifo_size_offset = USB_CTRL_EP_MPS;
         usbd_event_reset_handler();
         HWREGH(USB_BASE + MUSB_TXIE_OFFSET) = USB_TXIE_EP0;
         HWREGH(USB_BASE + MUSB_RXIE_OFFSET) = 0;
@@ -656,7 +665,6 @@ void USBD_IRQHandler(void)
             HWREGH(USB_BASE + MUSB_RXFIFOADD_OFFSET) = 0;
         }
         usb_ep0_state = USB_EP0_STATE_SETUP;
-        g_musb_udc.fifo_size_offset = USB_CTRL_EP_MPS;
     }
 
     if (is & USB_IS_SOF) {