pika_hal_utils.c 10 KB

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  1. #include "pika_hal_utils.h"
  2. /* error handler */
  3. PIKA_WEAK void pika_hal_utils_error_handler(int err,
  4. const char* file,
  5. int line,
  6. const char* func) {
  7. pika_platform_printf("Error code %d: %s()\r\n", err, func);
  8. pika_platform_printf("AT: %s:%d\r\n", file, line);
  9. }
  10. #define pika_hal_utils_raise_error(err) \
  11. pika_hal_utils_error_handler(err, __FILE__, __LINE__, __func__)
  12. /* common utils */
  13. int pika_hal_utils_enable(pika_dev* dev) {
  14. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_ENABLE);
  15. if (ret < 0) {
  16. pika_hal_utils_raise_error(ret);
  17. }
  18. return ret;
  19. }
  20. int pika_hal_utils_disable(pika_dev* dev) {
  21. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_DISABLE);
  22. if (ret < 0) {
  23. pika_hal_utils_raise_error(ret);
  24. }
  25. return ret;
  26. }
  27. /* GPIO utils */
  28. int pika_hal_utils_GPIO_config(pika_dev* dev, pika_hal_GPIO_config* cfg) {
  29. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  30. if (ret < 0) {
  31. pika_hal_utils_raise_error(ret);
  32. }
  33. return ret;
  34. }
  35. int pika_hal_utils_GPIO_set_mode(pika_dev* dev,
  36. PIKA_HAL_GPIO_DIR dir,
  37. PIKA_HAL_GPIO_PULL pull) {
  38. pika_hal_GPIO_config cfg = {0};
  39. cfg.dir = dir;
  40. cfg.pull = pull;
  41. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, &cfg);
  42. if (ret < 0) {
  43. pika_hal_utils_raise_error(ret);
  44. }
  45. return ret;
  46. }
  47. int pika_hal_utils_GPIO_set_dir(pika_dev* dev, PIKA_HAL_GPIO_DIR dir) {
  48. pika_hal_GPIO_config cfg = {0};
  49. cfg.dir = dir;
  50. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, &cfg);
  51. if (ret < 0) {
  52. pika_hal_utils_raise_error(ret);
  53. }
  54. return ret;
  55. }
  56. int pika_hal_utils_GPIO_set_pull(pika_dev* dev, PIKA_HAL_GPIO_PULL pull) {
  57. pika_hal_GPIO_config cfg = {0};
  58. cfg.pull = pull;
  59. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, &cfg);
  60. if (ret < 0) {
  61. pika_hal_utils_raise_error(ret);
  62. }
  63. return ret;
  64. }
  65. int pika_hal_utils_GPIO_write(pika_dev* dev, uint32_t val) {
  66. int ret = pika_hal_write(dev, &val, sizeof(uint32_t));
  67. if (ret < 0) {
  68. pika_hal_utils_raise_error(ret);
  69. }
  70. return 0;
  71. }
  72. uint32_t pika_hal_utils_GPIO_read(pika_dev* dev) {
  73. uint32_t val = 0;
  74. int ret = pika_hal_read(dev, &val, sizeof(uint32_t));
  75. if (ret < 0) {
  76. pika_hal_utils_raise_error(ret);
  77. return 0;
  78. }
  79. return val;
  80. }
  81. /* UART utils */
  82. int pika_hal_utils_UART_config(pika_dev* dev, pika_hal_UART_config* cfg) {
  83. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  84. if (ret < 0) {
  85. pika_hal_utils_raise_error(ret);
  86. }
  87. return ret;
  88. }
  89. /* IIC utils */
  90. int pika_hal_utils_IIC_config(pika_dev* dev, pika_hal_IIC_config* cfg) {
  91. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  92. if (ret < 0) {
  93. pika_hal_utils_raise_error(ret);
  94. }
  95. return ret;
  96. }
  97. /* IIC mem read/write utils */
  98. int pika_hal_utils_IIC_mem_read(pika_dev* dev,
  99. uint32_t mem_addr,
  100. uint32_t mem_addr_size,
  101. uint8_t* data,
  102. uint32_t size) {
  103. pika_hal_IIC_config* iic_config = (pika_hal_IIC_config*)dev->ioctl_config;
  104. iic_config->mem_addr = mem_addr;
  105. iic_config->mem_addr_size = mem_addr_size;
  106. iic_config->mem_addr_ena = PIKA_HAL_IIC_MEM_ADDR_ENA_ENABLE;
  107. if (pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, dev->ioctl_config) < 0) {
  108. return -1;
  109. }
  110. return pika_hal_read(dev, data, size);
  111. }
  112. /* IIC mem read/write utils */
  113. int pika_hal_utils_IIC_mem_write(pika_dev* dev,
  114. uint32_t mem_addr,
  115. uint32_t mem_addr_size,
  116. uint8_t* data,
  117. uint32_t size) {
  118. pika_hal_IIC_config* iic_config = (pika_hal_IIC_config*)dev->ioctl_config;
  119. iic_config->mem_addr = mem_addr;
  120. iic_config->mem_addr_size = mem_addr_size;
  121. iic_config->mem_addr_ena = PIKA_HAL_IIC_MEM_ADDR_ENA_ENABLE;
  122. if (pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, dev->ioctl_config) < 0) {
  123. return -1;
  124. }
  125. return pika_hal_write(dev, data, size);
  126. }
  127. int pika_hal_utils_IIC_read(pika_dev* dev, uint8_t* data, uint32_t size) {
  128. pika_hal_IIC_config* iic_config = (pika_hal_IIC_config*)dev->ioctl_config;
  129. iic_config->mem_addr_ena = PIKA_HAL_IIC_MEM_ADDR_ENA_DISABLE;
  130. if (pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, dev->ioctl_config) < 0) {
  131. return -1;
  132. }
  133. return pika_hal_read(dev, data, size);
  134. }
  135. int pika_hal_utils_IIC_write(pika_dev* dev, uint8_t* data, uint32_t size) {
  136. pika_hal_IIC_config* iic_config = (pika_hal_IIC_config*)dev->ioctl_config;
  137. iic_config->mem_addr_ena = PIKA_HAL_IIC_MEM_ADDR_ENA_DISABLE;
  138. if (pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, dev->ioctl_config) < 0) {
  139. return -1;
  140. }
  141. return pika_hal_write(dev, data, size);
  142. }
  143. int pika_hal_utils_IIC_set_slave_addr(pika_dev* dev, uint32_t slave_addr) {
  144. pika_hal_IIC_config* iic_config = (pika_hal_IIC_config*)dev->ioctl_config;
  145. iic_config->slave_addr = slave_addr;
  146. return pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, dev->ioctl_config);
  147. }
  148. /* SPI utils */
  149. int pika_hal_utils_SPI_config(pika_dev* dev, pika_hal_SPI_config* cfg) {
  150. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  151. if (ret < 0) {
  152. pika_hal_utils_raise_error(ret);
  153. }
  154. return ret;
  155. }
  156. int pika_hal_utils_SPI_transfer(pika_dev* dev,
  157. uint8_t* txbuff,
  158. uint8_t* rxbuff,
  159. uint32_t size) {
  160. // Modify parameter check logic: allow unidirectional transfer
  161. if (dev == NULL || (txbuff == NULL && rxbuff == NULL)) {
  162. return -1; // Parameter check failed
  163. }
  164. pika_hal_SPI_config* cfg = (pika_hal_SPI_config*)dev->ioctl_config;
  165. uint32_t transferred = 0; // Amount of data transferred
  166. uint32_t remaining = size; // Amount of data remaining
  167. uint32_t chunkSize; // Amount of data for the current batch transfer
  168. while (remaining > 0) {
  169. chunkSize = remaining > PIKA_HAL_SPI_RX_BUFFER_SIZE
  170. ? PIKA_HAL_SPI_RX_BUFFER_SIZE
  171. : remaining;
  172. // Call SPI_write to transfer data only if txbuff is not NULL
  173. if (txbuff != NULL) {
  174. pika_hal_write(dev, &txbuff[transferred], chunkSize);
  175. }
  176. // Call hal_read instead of directly retrieving data from
  177. // transfer_rx_buffer only if rxbuff is not NULL
  178. if (rxbuff != NULL) {
  179. if (txbuff == NULL) {
  180. // Perform data reception only
  181. pika_hal_read(dev, &rxbuff[transferred], chunkSize);
  182. } else {
  183. // Handle both data sending and receiving, assuming hal_write
  184. // already includes reading logic
  185. for (uint32_t i = 0; i < chunkSize; i++) {
  186. rxbuff[transferred + i] =
  187. cfg->tranfer_rx_buffer[i % PIKA_HAL_SPI_RX_BUFFER_SIZE];
  188. }
  189. }
  190. }
  191. transferred += chunkSize; // Update the amount of data transferred
  192. remaining -= chunkSize; // Update the amount of data remaining
  193. }
  194. return 0; // Successfully completed the transfer
  195. }
  196. /* ADC utils */
  197. int pika_hal_utils_ADC_config(pika_dev* dev, pika_hal_ADC_config* cfg) {
  198. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  199. if (ret < 0) {
  200. pika_hal_utils_raise_error(ret);
  201. }
  202. return ret;
  203. }
  204. uint32_t pika_hal_utils_ADC_read(pika_dev* dev) {
  205. uint32_t val = 0;
  206. int ret = pika_hal_read(dev, &val, sizeof(uint32_t));
  207. if (ret < 0) {
  208. pika_hal_utils_raise_error(ret);
  209. return 0;
  210. }
  211. return val;
  212. }
  213. /* DAC utils */
  214. int pika_hal_utils_DAC_config(pika_dev* dev, pika_hal_DAC_config* cfg) {
  215. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  216. if (ret < 0) {
  217. pika_hal_utils_raise_error(ret);
  218. }
  219. return ret;
  220. }
  221. int pika_hal_utils_DAC_write(pika_dev* dev, uint32_t val) {
  222. int ret = pika_hal_write(dev, &val, sizeof(uint32_t));
  223. if (ret < 0) {
  224. pika_hal_utils_raise_error(ret);
  225. }
  226. return ret;
  227. }
  228. /* PWM utils */
  229. int pika_hal_utils_PWM_config(pika_dev* dev, pika_hal_PWM_config* cfg) {
  230. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  231. if (ret < 0) {
  232. pika_hal_utils_raise_error(ret);
  233. }
  234. return ret;
  235. }
  236. int pika_hal_utils_PWM_set_period(pika_dev* dev,
  237. PIKA_HAL_PWM_PERIOD period_ns) {
  238. pika_hal_PWM_config cfg = {0};
  239. cfg.period = period_ns;
  240. /* keep duty unchanged because duty has no unused field */
  241. cfg.duty = ((pika_hal_PWM_config*)dev->ioctl_config)->duty;
  242. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, &cfg);
  243. if (ret < 0) {
  244. pika_hal_utils_raise_error(ret);
  245. }
  246. return ret;
  247. }
  248. int pika_hal_utils_PWM_set_duty(pika_dev* dev, PIKA_HAL_PWM_DUTY duty_ns) {
  249. pika_hal_PWM_config cfg = {0};
  250. cfg.duty = duty_ns;
  251. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, &cfg);
  252. if (ret < 0) {
  253. pika_hal_utils_raise_error(ret);
  254. }
  255. return ret;
  256. }
  257. /* SOFT_SPI utils */
  258. int pika_hal_utils_SOFT_SPI_config(pika_dev* dev,
  259. pika_hal_SOFT_SPI_config* cfg) {
  260. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  261. if (ret < 0) {
  262. pika_hal_utils_raise_error(ret);
  263. }
  264. return ret;
  265. }
  266. /* SOFT_IIC utils */
  267. int pika_hal_utils_SOFT_IIC_config(pika_dev* dev,
  268. pika_hal_SOFT_IIC_config* cfg) {
  269. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  270. if (ret < 0) {
  271. pika_hal_utils_raise_error(ret);
  272. }
  273. return ret;
  274. }
  275. /* WIFI utils */
  276. int pika_hal_utils_WIFI_config(pika_dev* dev, pika_hal_WIFI_config* cfg) {
  277. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  278. if (ret < 0) {
  279. pika_hal_utils_raise_error(ret);
  280. }
  281. return ret;
  282. }
  283. /* SG utils */
  284. int pika_hal_utils_SG_config(pika_dev* dev, pika_hal_SG_config* cfg) {
  285. int ret = pika_hal_ioctl(dev, PIKA_HAL_IOCTL_CONFIG, cfg);
  286. if (ret < 0) {
  287. pika_hal_utils_raise_error(ret);
  288. }
  289. return ret;
  290. }
  291. pika_float pika_hal_utils_SG_read(pika_dev* dev) {
  292. pika_float val = 0;
  293. int ret = pika_hal_read(dev, &val, sizeof(pika_float));
  294. if (ret < 0) {
  295. pika_hal_utils_raise_error(ret);
  296. return -1;
  297. }
  298. return val;
  299. }