CMSIS-Core (Cortex-A): L2C_310_TypeDef Struct Reference

| CMSIS-Core (Cortex-A) Version 1.2.0 CMSIS-Core support for Cortex-A processor-based devices

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L2C_310_TypeDef Struct Reference
L2C-310 Cache Controller Functions

Union type to access the L2C_310 Cache Controller.

## Data Fields

__IM uint32_t | CACHE_ID
| Offset: 0x0000 (R/ ) Cache ID Register. More...
__IM uint32_t | CACHE_TYPE
| Offset: 0x0004 (R/ ) Cache Type Register. More...
__IOM uint32_t | CONTROL
| Offset: 0x0100 (R/W) Control Register. More...
__IOM uint32_t | AUX_CNT
| Offset: 0x0104 (R/W) Auxiliary Control. More...
__IOM uint32_t | EVENT_CONTROL
| Offset: 0x0200 (R/W) Event Counter Control. More...
__IOM uint32_t | EVENT_COUNTER1_CONF
| Offset: 0x0204 (R/W) Event Counter 1 Configuration. More...
__IOM uint32_t | EVENT_COUNTER0_CONF
| Offset: 0x0208 (R/W) Event Counter 1 Configuration. More...
__IOM uint32_t | INTERRUPT_MASK
| Offset: 0x0214 (R/W) Interrupt Mask. More...
__IM uint32_t | MASKED_INT_STATUS
| Offset: 0x0218 (R/ ) Masked Interrupt Status. More...
__IM uint32_t | RAW_INT_STATUS
| Offset: 0x021c (R/ ) Raw Interrupt Status. More...
__OM uint32_t | INTERRUPT_CLEAR
| Offset: 0x0220 ( /W) Interrupt Clear. More...
__IOM uint32_t | CACHE_SYNC
| Offset: 0x0730 (R/W) Cache Sync. More...
__IOM uint32_t | INV_LINE_PA
| Offset: 0x0770 (R/W) Invalidate Line By PA. More...
__IOM uint32_t | INV_WAY
| Offset: 0x077c (R/W) Invalidate by Way. More...
__IOM uint32_t | CLEAN_LINE_PA
| Offset: 0x07b0 (R/W) Clean Line by PA. More...
__IOM uint32_t | CLEAN_LINE_INDEX_WAY
| Offset: 0x07b8 (R/W) Clean Line by Index/Way. More...
__IOM uint32_t | CLEAN_WAY
| Offset: 0x07bc (R/W) Clean by Way. More...
__IOM uint32_t | CLEAN_INV_LINE_PA
| Offset: 0x07f0 (R/W) Clean and Invalidate Line by PA. More...
__IOM uint32_t | CLEAN_INV_LINE_INDEX_WAY
| Offset: 0x07f8 (R/W) Clean and Invalidate Line by Index/Way. More...
__IOM uint32_t | CLEAN_INV_WAY
| Offset: 0x07fc (R/W) Clean and Invalidate by Way. More...
__IOM uint32_t | DATA_LOCK_0_WAY
| Offset: 0x0900 (R/W) Data Lockdown 0 by Way. More...
__IOM uint32_t | INST_LOCK_0_WAY
| Offset: 0x0904 (R/W) Instruction Lockdown 0 by Way. More...
__IOM uint32_t | DATA_LOCK_1_WAY
| Offset: 0x0908 (R/W) Data Lockdown 1 by Way. More...
__IOM uint32_t | INST_LOCK_1_WAY
| Offset: 0x090c (R/W) Instruction Lockdown 1 by Way. More...
__IOM uint32_t | DATA_LOCK_2_WAY
| Offset: 0x0910 (R/W) Data Lockdown 2 by Way. More...
__IOM uint32_t | INST_LOCK_2_WAY
| Offset: 0x0914 (R/W) Instruction Lockdown 2 by Way. More...
__IOM uint32_t | DATA_LOCK_3_WAY
| Offset: 0x0918 (R/W) Data Lockdown 3 by Way. More...
__IOM uint32_t | INST_LOCK_3_WAY
| Offset: 0x091c (R/W) Instruction Lockdown 3 by Way. More...
__IOM uint32_t | DATA_LOCK_4_WAY
| Offset: 0x0920 (R/W) Data Lockdown 4 by Way. More...
__IOM uint32_t | INST_LOCK_4_WAY
| Offset: 0x0924 (R/W) Instruction Lockdown 4 by Way. More...
__IOM uint32_t | DATA_LOCK_5_WAY
| Offset: 0x0928 (R/W) Data Lockdown 5 by Way. More...
__IOM uint32_t | INST_LOCK_5_WAY
| Offset: 0x092c (R/W) Instruction Lockdown 5 by Way. More...
__IOM uint32_t | DATA_LOCK_6_WAY
| Offset: 0x0930 (R/W) Data Lockdown 5 by Way. More...
__IOM uint32_t | INST_LOCK_6_WAY
| Offset: 0x0934 (R/W) Instruction Lockdown 5 by Way. More...
__IOM uint32_t | DATA_LOCK_7_WAY
| Offset: 0x0938 (R/W) Data Lockdown 6 by Way. More...
__IOM uint32_t | INST_LOCK_7_WAY
| Offset: 0x093c (R/W) Instruction Lockdown 6 by Way. More...
__IOM uint32_t | LOCK_LINE_EN
| Offset: 0x0950 (R/W) Lockdown by Line Enable. More...
__IOM uint32_t | UNLOCK_ALL_BY_WAY
| Offset: 0x0954 (R/W) Unlock All Lines by Way. More...
__IOM uint32_t | ADDRESS_FILTER_START
| Offset: 0x0c00 (R/W) Address Filtering Start. More...
__IOM uint32_t | ADDRESS_FILTER_END
| Offset: 0x0c04 (R/W) Address Filtering End. More...
__IOM uint32_t | DEBUG_CONTROL
| Offset: 0x0f40 (R/W) Debug Control Register. More...

## Field Documentation

L2C_310_TypeDef::ADDRESS_FILTER_END

__IOM uint32_t L2C_310_TypeDef::ADDRESS_FILTER_START

__IOM uint32_t L2C_310_TypeDef::AUX_CNT

__IM uint32_t L2C_310_TypeDef::CACHE_ID

__IOM uint32_t L2C_310_TypeDef::CACHE_SYNC

__IM uint32_t L2C_310_TypeDef::CACHE_TYPE

__IOM uint32_t L2C_310_TypeDef::CLEAN_INV_LINE_INDEX_WAY

__IOM uint32_t L2C_310_TypeDef::CLEAN_INV_LINE_PA

__IOM uint32_t L2C_310_TypeDef::CLEAN_INV_WAY

__IOM uint32_t L2C_310_TypeDef::CLEAN_LINE_INDEX_WAY

__IOM uint32_t L2C_310_TypeDef::CLEAN_LINE_PA

__IOM uint32_t L2C_310_TypeDef::CLEAN_WAY

__IOM uint32_t L2C_310_TypeDef::CONTROL

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_0_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_1_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_2_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_3_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_4_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_5_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_6_WAY

__IOM uint32_t L2C_310_TypeDef::DATA_LOCK_7_WAY

__IOM uint32_t L2C_310_TypeDef::DEBUG_CONTROL

__IOM uint32_t L2C_310_TypeDef::EVENT_CONTROL

__IOM uint32_t L2C_310_TypeDef::EVENT_COUNTER0_CONF

__IOM uint32_t L2C_310_TypeDef::EVENT_COUNTER1_CONF

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_0_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_1_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_2_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_3_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_4_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_5_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_6_WAY

__IOM uint32_t L2C_310_TypeDef::INST_LOCK_7_WAY

__OM uint32_t L2C_310_TypeDef::INTERRUPT_CLEAR

__IOM uint32_t L2C_310_TypeDef::INTERRUPT_MASK

__IOM uint32_t L2C_310_TypeDef::INV_LINE_PA

__IOM uint32_t L2C_310_TypeDef::INV_WAY

__IOM uint32_t L2C_310_TypeDef::LOCK_LINE_EN

__IM uint32_t L2C_310_TypeDef::MASKED_INT_STATUS

__IM uint32_t L2C_310_TypeDef::RAW_INT_STATUS

__IOM uint32_t L2C_310_TypeDef::UNLOCK_ALL_BY_WAY