CMSIS-Core (Cortex-A): Monitor Vector Base Address Register (MVBAR)

| CMSIS-Core (Cortex-A) Version 1.2.0 CMSIS-Core support for Cortex-A processor-based devices

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Monitor Vector Base Address Register (MVBAR)
Core Register Access

The MVBAR holds the exception base address for all exceptions that are taken to Monitor mode. More...

## Functions

__STATIC_FORCEINLINE uint32_t | __get_MVBAR (void)
| Get MVBAR. More...
__STATIC_FORCEINLINE void | __set_MVBAR (uint32_t mvbar)
| Set MVBAR. More...

## Description

Bits | Name | Function
--- | --- | ---
[31:5] | MVBA | Bits[31:5] of the base address of the exception vectors for exceptions that are taken to Monitor mode.
[4:0] | - | Reserved.

Consider using __get_MVBAR and __set_MVBAR for accessing this register.

## Function Documentation

__STATIC_INLINE uint32_t __get_MVBAR | ( | void |  | ) |

This function returns the value of the Monitor Vector Base Address Register.

Returns
  Monitor Vector Base Address Register

This function returns the value of the Monitor Vector Base Address Register (MVBAR).

__STATIC_INLINE void __set_MVBAR | ( | uint32_t | mvbar | ) |

This function assigns the given value to the Monitor Vector Base Address Register.

Parameters

  [in] | mvbar | Monitor Vector Base Address Register value to set

This function assigns the given value to the Monitor Vector Base Address Register (MVBAR).