CMSIS-DAP: Update LPC-Link2 examples

- migrate from LPC-Link-II (LPC4320) to LPC-Link2 (LPC4370)
- use latest packs
- remove LPC-Link-II.inf

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/_LPC4320_SPIFI/RTE_Components.h

@@ -1,32 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'CMSIS_DAP' 
- * Target:  'LPC4320 SPIFI' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "LPC43xx.h"
-
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-#define RTE_DEVICE_STARTUP_LPC43XX      /* Device Startup for NXP43XX */
-#define RTE_Drivers_USART0              /* Driver USART0 */
-        #define RTE_Drivers_USART1              /* Driver USART1 */
-        #define RTE_Drivers_USART2              /* Driver USART2 */
-        #define RTE_Drivers_USART3              /* Driver USART3 */
-#define RTE_Drivers_USBD0               /* Driver USBD0 */
-#define RTE_USB_Core                    /* USB Core */
-          #define RTE_USB_Core_Release            /* USB Core Release Version */
-#define RTE_USB_Device_0                /* USB Device 0 */
-#define RTE_USB_Device_HID_0            /* USB Device HID instance 0 */
-
-#endif /* RTE_COMPONENTS_H */

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/LPC-Link-II.inf

@@ -1,54 +0,0 @@
-[Version]
-Signature = "$Windows NT$"
-Class     = USBDevice
-ClassGUID = {88BAE032-5A81-49f0-BC3D-A4FF138216D6}
-Provider  = %ManufacturerName%
-DriverVer = 04/13/2016, 1.0.0.0
-CatalogFile.nt      = LPC-Link-II_x86.cat
-CatalogFile.ntx86   = LPC-Link-II_x86.cat
-CatalogFile.ntamd64 = LPC-Link-II_amd64.cat
-
-; ========== Manufacturer/Models sections ===========
-
-[Manufacturer]
-%ManufacturerName% = Devices, NTx86, NTamd64
-
-[Devices.NTx86]
-%DeviceName% = USB_Install, USB\VID_c251&PID_f00a
-
-[Devices.NTamd64]
-%DeviceName% = USB_Install, USB\VID_c251&PID_f00a
-
-; ========== Class definition ===========
-
-[ClassInstall32]
-AddReg = ClassInstall_AddReg
-
-[ClassInstall_AddReg]
-HKR,,,,%ClassName%
-HKR,,NoInstallClass,,1
-HKR,,IconPath,0x10000,"%%SystemRoot%%\System32\setupapi.dll,-20"
-HKR,,LowerLogoVersion,,5.2
-
-; =================== Installation ===================
-
-[USB_Install]
-Include = winusb.inf
-Needs   = WINUSB.NT
-
-[USB_Install.Services]
-Include = winusb.inf
-Needs   = WINUSB.NT.Services
-
-[USB_Install.HW]
-AddReg  = Dev_AddReg
-
-[Dev_AddReg]
-HKR,,DeviceInterfaceGUIDs,0x10000,"{CDB3B5AD-293B-4663-AA36-1AAE46463776}"
-
-; =================== Strings ===================
-
-[Strings]
-ClassName        = "Universal Serial Bus devices"
-ManufacturerName = "KEIL - Tools By ARM"
-DeviceName       = "LPC-Link-II CMSIS-DAP" 

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/_LPC4320_SPIFI/RTE_Components.h

@@ -1,32 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'CMSIS_DAP' 
- * Target:  'LPC4320 SPIFI' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "LPC43xx.h"
-
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-#define RTE_DEVICE_STARTUP_LPC43XX      /* Device Startup for NXP43XX */
-#define RTE_Drivers_USART0              /* Driver USART0 */
-        #define RTE_Drivers_USART1              /* Driver USART1 */
-        #define RTE_Drivers_USART2              /* Driver USART2 */
-        #define RTE_Drivers_USART3              /* Driver USART3 */
-#define RTE_Drivers_USBD0               /* Driver USBD0 */
-#define RTE_USB_Core                    /* USB Core */
-          #define RTE_USB_Core_Release            /* USB Core Release Version */
-#define RTE_USB_Device_0                /* USB Device 0 */
-#define RTE_USB_Device_CustomClass_0    /* USB Device Custom Class instance 0 */
-
-#endif /* RTE_COMPONENTS_H */

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/Abstract.txt → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/Abstract.txt

@@ -1,4 +1,4 @@
-CMSIS-DAP V1 USB HID Firmware for NXP LPC-Link-II board.
+CMSIS-DAP V1 USB HID Firmware for NXP LPC-Link2 board.
 
 CMSIS-DAP with V1 configuration uses USB HID interface to host PC and is 
 therefore compatible with previous versions of CMSIS-DAP.

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/CMSIS_DAP.uvoptx → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/CMSIS_DAP.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -22,7 +22,7 @@
   </DaveTm>
 
   <Target>
-    <TargetName>LPC4320 SPIFI</TargetName>
+    <TargetName>LPC-Link2</TargetName>
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
@@ -120,18 +120,18 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
-          <Name>-UV0001BDE -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC180000000 -TP21 -TDS802F -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD10000000 -FC4000 -FN1 -FF0LPC18xx43xx_S25FL032 -FS014000000 -FL0400000</Name>
+          <Name>-UV0001BDE -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC180000000 -TP21 -TDS802F -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15  -FC1000 -FD10000000</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\MDK-Middleware\7.5.0-rc\USB\USB.scvd</Filename>
-        <Type>Keil.MDK-Middleware.7.5.0-rc</Type>
+        <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.7.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.2.0</Type>
+        <Filename>C:\Keil_v5\ARM\PACK\Keil\MDK-Middleware\7.12.0\USB\USB.scvd</Filename>
+        <Type>Keil.MDK-Middleware.7.12.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>
@@ -178,6 +178,7 @@
       <pMultCmdsp></pMultCmdsp>
       <DebugDescription>
         <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
         <EnableLog>0</EnableLog>
         <Protocol>1</Protocol>
         <DbgClock>10000000</DbgClock>

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/CMSIS_DAP.uvprojx → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/CMSIS_DAP.uvprojx

@@ -7,23 +7,23 @@
 
   <Targets>
     <Target>
-      <TargetName>LPC4320 SPIFI</TargetName>
+      <TargetName>LPC-Link2</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>LPC4320:Cortex-M4</Device>
+          <Device>LPC4370:Cortex-M4</Device>
           <Vendor>NXP</Vendor>
-          <PackID>Keil.LPC4300_DFP.2.8.0</PackID>
+          <PackID>Keil.LPC4300_DFP.2.9.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x10000000,0x18000) IRAM2(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x10000000,0x20000) IRAM2(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC1000)</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:LPC4320$Device\Include\LPC43xx.h</RegisterFile>
+          <RegisterFile>$$Device:LPC4370$Device\Include\LPC43xx.h</RegisterFile>
           <MemoryEnv></MemoryEnv>
           <Cmp></Cmp>
           <Asm></Asm>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:LPC4320$SVD\LPC43xx.svd</SFDFile>
+          <SFDFile>$$Device:LPC4370$SVD\LPC43xx.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -52,7 +52,7 @@
           <OutputName>CMSIS_DAP</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
+          <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
           <BrowseInformation>1</BrowseInformation>
           <ListingPath>.\Listings\</ListingPath>
@@ -80,9 +80,9 @@
             <nStopB2X>0</nStopB2X>
           </BeforeMake>
           <AfterMake>
-            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
+            <UserProg1Name>fromelf.exe --bin -o  "$L@L.bin" "#L"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -138,7 +138,7 @@
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -176,14 +176,16 @@
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M4"</AdsCpuType>
             <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
+            <mOS>1</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
             <hadIROM>0</hadIROM>
             <hadIRAM>1</hadIRAM>
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
-            <RvdsVP>1</RvdsVP>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>1</StupSel>
@@ -192,7 +194,7 @@
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
             <RoSelD>0</RoSelD>
-            <RwSelD>3</RwSelD>
+            <RwSelD>4</RwSelD>
             <CodeSel>0</CodeSel>
             <OptFeed>0</OptFeed>
             <NoZi1>0</NoZi1>
@@ -209,7 +211,7 @@
             <Ra2Chk>0</Ra2Chk>
             <Ra3Chk>0</Ra3Chk>
             <Im1Chk>1</Im1Chk>
-            <Im2Chk>0</Im2Chk>
+            <Im2Chk>1</Im2Chk>
             <OnChipMemories>
               <Ocm1>
                 <Type>0</Type>
@@ -244,7 +246,7 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x10000000</StartAddress>
-                <Size>0x18000</Size>
+                <Size>0x20000</Size>
               </IRAM>
               <IROM>
                 <Type>0</Type>
@@ -299,7 +301,7 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x10000000</StartAddress>
-                <Size>0x18000</Size>
+                <Size>0x20000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -320,13 +322,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -349,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -457,6 +460,7 @@
                     <uThumb>2</uThumb>
                     <uSurpInc>2</uSurpInc>
                     <uC99>2</uC99>
+                    <uGnu>2</uGnu>
                     <useXO>2</useXO>
                     <v6Lang>0</v6Lang>
                     <v6LangP>0</v6LangP>
@@ -498,81 +502,81 @@
       <api Capiversion="2.01" Cclass="CMSIS Driver" Cgroup="USART" exclusive="0">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.3.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
       <api Capiversion="2.01" Cclass="CMSIS Driver" Cgroup="USB Device" exclusive="0">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.3.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
       <api Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" exclusive="1">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="CORE" Cvariant="Release" Cvendor="Keil" Cversion="6.12.0" condition="USB Core">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="CORE" Cvariant="Release" Cvendor="Keil" Cversion="6.14.4" condition="USB Core">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.1-dev21-emWin"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.12.0" condition="USB Core and Device Driver" maxInstances="4">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.14.4" condition="USB Core and Device Instance and Device Driver" maxInstances="4">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.1-dev21-emWin"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="HID" Cvendor="Keil" Cversion="6.12.0" condition="USB Device" maxInstances="4">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="HID" Cvendor="Keil" Cversion="6.14.4" condition="USB Core and Device Instance and Device Driver" maxInstances="4">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.1-dev21-emWin"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USART" Cvendor="Keil" Cversion="2.12" condition="LPC4300 CMSIS SCU GPDMA">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USART" Cvendor="Keil" Cversion="2.14" condition="LPC4300 CMSIS SCU GPDMA">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USB Device" Csub="USB0" Cvendor="Keil" Cversion="2.11" condition="LPC4300 CMSIS SCU">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USB Device" Csub="USB0" Cvendor="Keil" Cversion="2.12" condition="LPC4300 CMSIS SCU">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="GPDMA" Cvendor="Keil" Cversion="1.5" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Cclass="Device" Cgroup="GPDMA" Cvendor="Keil" Cversion="1.6" condition="LPC4300 CMSIS">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="SCU" Cvendor="Keil" Cversion="1.1" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI">
+          <targetInfo name="LPC-Link2">
             <c>
               <Define>USE_SPIFI=1</Define>
             </c>
@@ -586,61 +590,70 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.2.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
       <file attr="config" category="header" name="RTE_Driver\Config\RTE_Device.h" version="2.2.1">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\RTE_Device.h</instance>
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\RTE_Device.h</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
       <file attr="config" category="source" condition="CM4 ARM Compiler" name="Device\Source\ARM\startup_LPC43xx.s" version="1.0.0">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\startup_LPC43xx.s</instance>
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\startup_LPC43xx.s</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" condition="CM4" name="Device\Source\system_LPC43xx.c" version="1.0.2">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\system_LPC43xx.c</instance>
+      <file attr="config" category="source" condition="CM4" name="Device\Source\system_LPC43xx.c" version="1.0.3">
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\system_LPC43xx.c</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" name="USB\Config\USBD_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="USB\Config\USBD_Config.c" version="5.2.0">
         <instance index="0">RTE\USB\USBD_Config_0.c</instance>
-        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.12.0" condition="USB Core and Device Driver" maxInstances="4"/>
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4"/>
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" name="USB\Config\USBD_Config_HID.h" version="5.0.1">
+      <file attr="config" category="header" name="USB\Config\USBD_Config_HID.h" version="5.0.2">
         <instance index="0">RTE\USB\USBD_Config_HID_0.h</instance>
-        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="HID" Cvendor="Keil" Cversion="6.12.0" condition="USB Device" maxInstances="4"/>
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="HID" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4"/>
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
     </files>
   </RTE>
 
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>CMSIS_DAP</LayName>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
 </Project>

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/DAP_config.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/DAP_config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2021 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,11 +17,11 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        1. December 2017
+ * $Date:        21. May 2021
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        DAP_config.h CMSIS-DAP Configuration File for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        DAP_config.h CMSIS-DAP Configuration File for LPC-Link2
  *
  *---------------------------------------------------------------------------*/
 
@@ -250,7 +250,7 @@ of the same I/O port. The following SWDIO I/O Pin functions are provided:
 
 // Configure DAP I/O pins ------------------------------
 
-//   LPC-Link-II HW uses buffers for debug port pins. Therefore it is not
+//   LPC-Link2 HW uses buffers for debug port pins. Therefore it is not
 //   possible to disable outputs SWCLK/TCK, TDI and they are left active.
 //   Only SWDIO/TMS output can be disabled but it is also left active.
 //   nRESET is configured for open drain mode.
@@ -409,7 +409,8 @@ __STATIC_FORCEINLINE uint32_t PIN_nTRST_IN   (void) {
            - 1: release JTAG TRST Test Reset.
 */
 __STATIC_FORCEINLINE void     PIN_nTRST_OUT  (uint32_t bit) {
-  ;             // Not available
+  (void) bit;
+  // Not available
 }
 
 // nRESET Pin I/O------------------------------------------
@@ -458,7 +459,7 @@ It is recommended to provide the following LEDs for status indication:
            - 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit.
 */
 __STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {
-  LPC_GPIO_PORT->B[32*LED_CONNECTED_PORT + LED_CONNECTED_BIT] = bit;
+  LPC_GPIO_PORT->B[32*LED_CONNECTED_PORT + LED_CONNECTED_BIT] = bit & 0xFF;
 }
 
 /** Debug Unit: Set status Target Running LED.
@@ -467,7 +468,8 @@ __STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {
            - 0: Target Running LED OFF: program execution in target stopped.
 */
 __STATIC_INLINE void LED_RUNNING_OUT (uint32_t bit) {
-  ;             // Not available
+  (void) bit;
+  // Not available
 }
 
 ///@}

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/DebugConfig/LPC4320_SPIFI_LPC4320_Cortex-M4.dbgconf → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/DebugConfig/LPC-Link2_LPC4370_Cortex-M4.dbgconf

@@ -40,4 +40,4 @@ RoutingTPIU = 0x00000000;
 
 // </h>
 
-// <<< end of configuration section >>>
+// <<< end of configuration section >>>

CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/Objects/CMSIS_DAP.hex

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CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/CMSIS/RTX_Config.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.2.0
+ * $Revision:   V5.5.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -28,14 +28,21 @@
 #ifndef RTX_CONFIG_H_
 #define RTX_CONFIG_H_
  
+#ifdef   _RTE_
+#include "RTE_Components.h"
+#ifdef    RTE_RTX_CONFIG_H
+#include  RTE_RTX_CONFIG_H
+#endif
+#endif
+ 
 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
  
 // <h>System Configuration
 // =======================
  
-//     <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
-//     <i> Defines the combined global dynamic memory size.
-//     <i> Default: 4096
+//   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
+//   <i> Defines the combined global dynamic memory size.
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -62,64 +69,6 @@
  
 //   </e>
  
-//   <h>Event Recording
- 
-//     <q>Memory Management
-//     <i> Enables Memory Management events recording.
-#ifndef OS_EVR_MEMORY
-#define OS_EVR_MEMORY               1
-#endif
- 
-//     <q>Kernel
-//     <i> Enables Kernel events recording.
-#ifndef OS_EVR_KERNEL
-#define OS_EVR_KERNEL               1
-#endif
- 
-//     <q>Thread
-//     <i> Enables Thread events recording.
-#ifndef OS_EVR_THREAD
-#define OS_EVR_THREAD               1
-#endif
- 
-//     <q>Timer
-//     <i> Enables Timer events recording.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
-#endif
- 
-//     <q>Event Flags
-//     <i> Enables Event Flags events recording.
-#ifndef OS_EVR_EVFLAGS
-#define OS_EVR_EVFLAGS              1
-#endif
- 
-//     <q>Mutex
-//     <i> Enables Mutex events recording.
-#ifndef OS_EVR_MUTEX
-#define OS_EVR_MUTEX                1
-#endif
- 
-//     <q>Semaphore
-//     <i> Enables Semaphore events recording.
-#ifndef OS_EVR_SEMAPHORE
-#define OS_EVR_SEMAPHORE            1
-#endif
- 
-//     <q>Memory Pool
-//     <i> Enables Memory Pool events recording.
-#ifndef OS_EVR_MEMPOOL
-#define OS_EVR_MEMPOOL              1
-#endif
- 
-//     <q>Message Queue
-//     <i> Enables Message Queue events recording.
-#ifndef OS_EVR_MSGQUEUE
-#define OS_EVR_MSGQUEUE             1
-#endif
- 
-//   </h>
- 
 //   <o>ISR FIFO Queue 
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
@@ -130,6 +79,12 @@
 #define OS_ISR_FIFO_QUEUE           16
 #endif
  
+//   <q>Object Memory usage counters
+//   <i> Enables object memory usage counters (requires RTX source variant).
+#ifndef OS_OBJ_MEM_USAGE
+#define OS_OBJ_MEM_USAGE            0
+#endif
+ 
 // </h>
  
 // <h>Thread Configuration
@@ -167,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 200
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               768
+#define OS_STACK_SIZE               1024
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 200
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -188,14 +143,14 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enable stack overrun checks at thread switch.
+//   <i> Enables stack overrun check at thread switch.
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
 #endif
  
 //   <q>Stack usage watermark
-//   <i> Initialize thread stack with watermark pattern for analyzing stack usage.
+//   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
 #define OS_STACK_WATERMARK          0
@@ -243,7 +198,7 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 200
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
 #define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
@@ -382,10 +337,240 @@
  
 // </h>
  
+// <h>Event Recorder Configuration
+// ===============================
+ 
+//   <e>Global Initialization
+//   <i> Initialize Event Recorder during 'osKernelInitialize'.
+#ifndef OS_EVR_INIT
+#define OS_EVR_INIT                 0
+#endif
+ 
+//     <q>Start recording
+//     <i> Start event recording after initialization.
+#ifndef OS_EVR_START
+#define OS_EVR_START                1
+#endif
+ 
+//     <h>Global Event Filter Setup
+//     <i> Initial recording level applied to all components.
+//       <o.0>Error events
+//       <o.1>API function call events
+//       <o.2>Operation events
+//       <o.3>Detailed operation events
+//     </h>
+#ifndef OS_EVR_LEVEL
+#define OS_EVR_LEVEL                0x00U
+#endif
+ 
+//     <h>RTOS Event Filter Setup
+//     <i> Recording levels for RTX components.
+//     <i> Only applicable if events for the respective component are generated.
+ 
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
+#endif
+ 
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
+#endif
+ 
+//       <h>Thread
+//       <i> Recording level for Thread events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
+#endif
+ 
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
+#endif
+ 
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Timer
+//       <i> Recording level for Timer events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
+#endif
+ 
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
+#endif
+ 
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+#endif
+ 
+//     </h>
+ 
+//   </e>
+ 
+//   <h>RTOS Event Generation
+//   <i> Enables event generation for RTX components (requires RTX source variant).
+ 
+//     <q>Memory Management
+//     <i> Enables Memory Management event generation.
+#ifndef OS_EVR_MEMORY
+#define OS_EVR_MEMORY               1
+#endif
+ 
+//     <q>Kernel
+//     <i> Enables Kernel event generation.
+#ifndef OS_EVR_KERNEL
+#define OS_EVR_KERNEL               1
+#endif
+ 
+//     <q>Thread
+//     <i> Enables Thread event generation.
+#ifndef OS_EVR_THREAD
+#define OS_EVR_THREAD               1
+#endif
+ 
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
+#endif
+ 
+//     <q>Event Flags
+//     <i> Enables Event Flags event generation.
+#ifndef OS_EVR_EVFLAGS
+#define OS_EVR_EVFLAGS              1
+#endif
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
+//     <q>Mutex
+//     <i> Enables Mutex event generation.
+#ifndef OS_EVR_MUTEX
+#define OS_EVR_MUTEX                1
+#endif
+ 
+//     <q>Semaphore
+//     <i> Enables Semaphore event generation.
+#ifndef OS_EVR_SEMAPHORE
+#define OS_EVR_SEMAPHORE            1
+#endif
+ 
+//     <q>Memory Pool
+//     <i> Enables Memory Pool event generation.
+#ifndef OS_EVR_MEMPOOL
+#define OS_EVR_MEMPOOL              1
+#endif
+ 
+//     <q>Message Queue
+//     <i> Enables Message Queue event generation.
+#ifndef OS_EVR_MSGQUEUE
+#define OS_EVR_MSGQUEUE             1
+#endif
+ 
+//   </h>
+ 
+// </h>
+ 
 // Number of Threads which use standard C/C++ library libspace
 // (when thread specific memory allocation is not used).
 #if (OS_THREAD_OBJ_MEM == 0)
+#ifndef OS_THREAD_LIBSPACE_NUM
 #define OS_THREAD_LIBSPACE_NUM      4
+#endif
 #else
 #define OS_THREAD_LIBSPACE_NUM      OS_THREAD_NUM
 #endif

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/Device/LPC4320_Cortex-M4/RTE_Device.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/Device/LPC4370_Cortex-M4/RTE_Device.h

@@ -1,21 +1,20 @@
-/* -----------------------------------------------------------------------------
- * Copyright (c) 2013-2016 ARM Ltd.
+/* -------------------------------------------------------------------------- 
+ * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All 
+ * rights reserved.
  *
- * This software is provided 'as-is', without any express or implied warranty.
- * In no event will the authors be held liable for any damages arising from
- * the use of this software. Permission is granted to anyone to use this
- * software for any purpose, including commercial applications, and to alter
- * it and redistribute it freely, subject to the following restrictions:
+ * SPDX-License-Identifier: Apache-2.0
  *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software. If you use this software in
- *    a product, an acknowledgment in the product documentation would be
- *    appreciated but is not required.
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
  *
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
+ * www.apache.org/licenses/LICENSE-2.0
  *
- * 3. This notice may not be removed or altered from any source distribution.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  *
  * $Date:        25. April 2016
  * $Revision:    V2.2.1

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/Device/LPC4320_Cortex-M4/startup_LPC43xx.s → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/Device/LPC4370_Cortex-M4/startup_LPC43xx.s

@@ -27,7 +27,7 @@
 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Stack_Size      EQU     0x00000200
+Stack_Size      EQU     0x00000400
 
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 Stack_Mem       SPACE   Stack_Size

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/Device/LPC4320_Cortex-M4/system_LPC43xx.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/Device/LPC4370_Cortex-M4/system_LPC43xx.c

@@ -17,8 +17,8 @@
  *
  * 3. This notice may not be removed or altered from any source distribution.
  *
- * $Date:        11. October 2017
- * $Revision:    V1.0.2
+ * $Date:        10. September 2018
+ * $Revision:    V1.0.3
  *
  * Project:      NXP LPC43xx System initialization
  * -------------------------------------------------------------------------- */
@@ -169,6 +169,24 @@
 #define PLL1_FBSEL  0           /* 0: FCCO is used as PLL feedback            */
                                 /* 1: FCLKOUT is used as PLL feedback         */
 
+/*----------------------------------------------------------------------------
+ * Configure Flash Accelerator
+ *----------------------------------------------------------------------------
+ * Flash acces time:
+ * |  CPU clock   | FLASHTIM |
+ * | up to  21MHz |    0     |
+ * | up to  43MHz |    1     |
+ * | up to  64MHz |    2     |
+ * | up to  86MHz |    3     |
+ * | up to 107MHz |    4     |
+ * | up to 129MHz |    5     |
+ * | up to 150MHz |    6     |
+ * | up to 172MHz |    7     |
+ * | up to 193MHz |    8     |
+ * | up to 204MHz |    9     |
+ *----------------------------------------------------------------------------*/
+#define FLASHCFG_FLASHTIM   9
+
 
 /*----------------------------------------------------------------------------
  * Configure PLL0USB
@@ -303,6 +321,11 @@ void SetClock (void) {
   uint32_t x, i;
   uint32_t selp, seli;
 
+
+  /* Set flash accelerator configuration for bank A and B to reset value      */
+  LPC_CREG->FLASHCFGA |= (0xF << 12);
+  LPC_CREG->FLASHCFGB |= (0xF << 12);
+
   /* Set flash wait states to maximum                                         */
   LPC_EMC->STATICWAITRD0  = 0x1F;
 
@@ -376,6 +399,10 @@ void SetClock (void) {
   LPC_CGU->BASE_M4_CLK = (0x01        << 11) |  /* Autoblock En               */
                          (CPU_CLK_SEL << 24) ;  /* Set clock source           */
 
+  /* Set flash accelerator configuration for internal flash bank A and B      */
+  LPC_CREG->FLASHCFGA = (LPC_CREG->FLASHCFGA & (~0x0000F000)) | (FLASHCFG_FLASHTIM << 12);
+  LPC_CREG->FLASHCFGB = (LPC_CREG->FLASHCFGB & (~0x0000F000)) | (FLASHCFG_FLASHTIM << 12);
+
 /*----------------------------------------------------------------------------
   PLL0USB Setup
  *----------------------------------------------------------------------------*/

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/USB/USBD_Config_0.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/USB/USBD_Config_0.c

@@ -1,10 +1,10 @@
 /*------------------------------------------------------------------------------
  * MDK Middleware - Component ::USB:Device
- * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved.
+ * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved.
  *------------------------------------------------------------------------------
  * Name:    USBD_Config_0.c
  * Purpose: USB Device Configuration
- * Rev.:    V5.1.0
+ * Rev.:    V5.2.0
  *------------------------------------------------------------------------------
  * Use the following configuration settings in the Device Class configuration
  * files to assign a Device Class to this USB Device 0.
@@ -75,7 +75,7 @@
 
 //     <s.126>Product String
 //     <i>String Descriptor describing Product.
-#define USBD0_STR_DESC_PROD             L"LPC-Link-II CMSIS-DAP"
+#define USBD0_STR_DESC_PROD             L"LPC-Link2 CMSIS-DAP"
 
 //     <e.0>Serial Number String
 //     <i>Enable Serial Number String.
@@ -107,6 +107,10 @@
 //     </e>
 //   </h>
 
+//   <o>Control Transfer Buffer Size <64-65536:64>
+//   <i>Specifies size of buffer used for Control Transfers.
+//   <i>It should be at least as big as maximum packet size for Endpoint 0.
+#define USBD0_EP0_BUF_SIZE              128
 
 //   <h>OS Resources Settings
 //   <i>These settings are used to optimize usage of OS resources.
@@ -173,6 +177,18 @@
 #ifdef  RTE_USB_Device_CDC_3
 #include "USBD_Config_CDC_3.h"
 #endif
+#ifdef  RTE_USB_Device_CDC_4
+#include "USBD_Config_CDC_4.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_5
+#include "USBD_Config_CDC_5.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_6
+#include "USBD_Config_CDC_6.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_7
+#include "USBD_Config_CDC_7.h"
+#endif
 
 #ifdef  RTE_USB_Device_ADC_0
 #include "USBD_Config_ADC_0.h"

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/RTE/USB/USBD_Config_HID_0.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/RTE/USB/USBD_Config_HID_0.h

@@ -1,10 +1,10 @@
 /*------------------------------------------------------------------------------
  * MDK Middleware - Component ::USB:Device
- * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved.
+ * Copyright (c) 2004-2020 Arm Limited (or its affiliates). All rights reserved.
  *------------------------------------------------------------------------------
  * Name:    USBD_Config_HID_0.h
  * Purpose: USB Device Human Interface Device class (HID) Configuration
- * Rev.:    V5.0.1
+ * Rev.:    V5.0.2
  *----------------------------------------------------------------------------*/
 
 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
@@ -25,7 +25,7 @@
 #define USBD_HID0_EP_INT_IN                       1
 
 //       <h>Endpoint Settings
-//         <i>Parameters are used to create USB Descriptors, HID Device Descriptor
+//         <i>Parameters are used to create Endpoint Descriptors
 //         <i>and for memory allocation in the USB component.
 //
 //         <h>Full/Low-speed (High-speed disabled)
@@ -36,8 +36,7 @@
 #define USBD_HID0_EP_INT_IN_WMAXPACKETSIZE        64
 
 //           <o.0..7>Endpoint polling Interval (in ms) <1-255>
-//           <i>Specifies the frequency of requests initiated by USB Host for
-//           <i>function USBD_HIDn_GetReport.
+//           <i>Specifies the frequency of requests initiated by USB Host for getting data.
 #define USBD_HID0_EP_INT_IN_BINTERVAL             1
 
 //         </h>
@@ -54,8 +53,7 @@
 #define USBD_HID0_EP_INT_IN_HS_WMAXPACKETSIZE     64
 
 //           <o.0..4>Endpoint polling Interval (in 125 us intervals)
-//           <i>Specifies the frequency of requests initiated by USB Host for
-//           <i>function USBD_HIDn_GetReport.
+//           <i>Specifies the frequency of requests initiated by USB Host for getting data.
 //             <1=>    1 <2=>    2 <3=>     4 <4=>     8
 //             <5=>   16 <6=>   32 <7=>    64 <8=>   128
 //             <9=>  256 <10=> 512 <11=> 1024 <12=> 2048
@@ -87,8 +85,7 @@
 #define USBD_HID0_EP_INT_OUT_WMAXPACKETSIZE       64
 
 //           <o.0..7>Endpoint polling Interval (in ms) <1-255>
-//           <i>Specifies the frequency of requests initiated by USB Host for
-//           <i>function USBD_HIDn_GetReport.
+//           <i>Specifies the frequency of requests sent by USB Host for setting data.
 #define USBD_HID0_EP_INT_OUT_BINTERVAL            1
 
 //         </h>
@@ -105,8 +102,7 @@
 #define USBD_HID0_EP_INT_OUT_HS_WMAXPACKETSIZE    64
 
 //           <o.0..4>Endpoint polling Interval (in 125 us intervals)
-//           <i>Specifies the frequency of requests initiated by USB Host for
-//           <i>function USBD_HIDn_GetReport.
+//           <i>Specifies the frequency of requests sent by USB Host for setting data.
 //             <1=>    1 <2=>    2 <3=>     4 <4=>     8
 //             <5=>   16 <6=>   32 <7=>    64 <8=>   128
 //             <9=>  256 <10=> 512 <11=> 1024 <12=> 2048
@@ -123,7 +119,7 @@
 //   <i>and for memory allocation in the USB component.
 //
 //     <s.126>HID Interface String
-#define USBD_HID0_STR_DESC                        L"LPC-Link-II CMSIS-DAP"
+#define USBD_HID0_STR_DESC                        L"LPC-Link2 CMSIS-DAP"
 
 //     <o.0..4>Number of Input Reports <1-32>
 //     <i>Configures max 'rid' value for USBD_HID0_GetReport and USBD_HID_GetReportTrigger

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/main.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2021 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,11 +17,11 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        1. December 2017
+ * $Date:        21. May 2021
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        main.c CMSIS-DAP Main module for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        main.c CMSIS-DAP Main module for LPC-Link2
  *
  *---------------------------------------------------------------------------*/
 
@@ -52,7 +52,7 @@ __NO_RETURN void app_main (void *argument) {
   DAP_ThreadId = osThreadNew(DAP_Thread, NULL, NULL);
 
   osDelay(osWaitForever);
-  for (;;) {};
+  for (;;) {}
 }
 
 int main (void) {
@@ -64,5 +64,5 @@ int main (void) {
     osKernelStart();                    // Start thread execution
   }
 
-  for (;;) {};
+  for (;;) {}
 }

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V1/osObjects.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V1/osObjects.h

@@ -20,8 +20,8 @@
  * $Date:        1. December 2017
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link2
  *
  *---------------------------------------------------------------------------*/
 

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/Abstract.txt → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/Abstract.txt

@@ -1,4 +1,4 @@
-CMSIS-DAP V2 USB WinUSB Firmware for NXP LPC-Link-II board.
+CMSIS-DAP V2 USB WinUSB Firmware for NXP LPC-Link2 board.
 
 CMSIS-DAP with default V2 configuration uses WinUSB interface to host PC and is therefore faster. 
-Optionally support for streaming SWO trace is provided via an additional USB endpoint.
+Optionally support for streaming SWO trace is provided via an additional USB endpoint.

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/CMSIS_DAP.uvoptx → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/CMSIS_DAP.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -22,7 +22,7 @@
   </DaveTm>
 
   <Target>
-    <TargetName>LPC4320 SPIFI</TargetName>
+    <TargetName>LPC-Link2</TargetName>
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
@@ -120,18 +120,18 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
-          <Name>-UV0001BDE -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC180000000 -TP21 -TDS802F -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD10000000 -FC4000 -FN1 -FF0LPC18xx43xx_S25FL032 -FS014000000 -FL0400000</Name>
+          <Name>-UV0001BDE -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC180000000 -TP21 -TDS802F -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15  -FC1000 -FD10000000</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\MDK-Middleware\7.5.0-rc\USB\USB.scvd</Filename>
-        <Type>Keil.MDK-Middleware.7.5.0-rc</Type>
+        <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.7.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.2.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.2.0</Type>
+        <Filename>C:\Keil_v5\ARM\PACK\Keil\MDK-Middleware\7.12.0\USB\USB.scvd</Filename>
+        <Type>Keil.MDK-Middleware.7.12.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>
@@ -178,6 +178,7 @@
       <pMultCmdsp></pMultCmdsp>
       <DebugDescription>
         <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
         <EnableLog>0</EnableLog>
         <Protocol>1</Protocol>
         <DbgClock>10000000</DbgClock>

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/CMSIS_DAP.uvprojx → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/CMSIS_DAP.uvprojx

@@ -7,23 +7,23 @@
 
   <Targets>
     <Target>
-      <TargetName>LPC4320 SPIFI</TargetName>
+      <TargetName>LPC-Link2</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>LPC4320:Cortex-M4</Device>
+          <Device>LPC4370:Cortex-M4</Device>
           <Vendor>NXP</Vendor>
-          <PackID>Keil.LPC4300_DFP.2.8.0</PackID>
+          <PackID>Keil.LPC4300_DFP.2.9.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x10000000,0x18000) IRAM2(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x10000000,0x20000) IRAM2(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC1000)</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:LPC4320$Device\Include\LPC43xx.h</RegisterFile>
+          <RegisterFile>$$Device:LPC4370$Device\Include\LPC43xx.h</RegisterFile>
           <MemoryEnv></MemoryEnv>
           <Cmp></Cmp>
           <Asm></Asm>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:LPC4320$SVD\LPC43xx.svd</SFDFile>
+          <SFDFile>$$Device:LPC4370$SVD\LPC43xx.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -52,7 +52,7 @@
           <OutputName>CMSIS_DAP</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
+          <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
           <BrowseInformation>1</BrowseInformation>
           <ListingPath>.\Listings\</ListingPath>
@@ -80,9 +80,9 @@
             <nStopB2X>0</nStopB2X>
           </BeforeMake>
           <AfterMake>
-            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
+            <UserProg1Name>fromelf.exe --bin -o  "$L@L.bin" "#L"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -138,7 +138,7 @@
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -176,14 +176,16 @@
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M4"</AdsCpuType>
             <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
+            <mOS>1</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
             <hadIROM>0</hadIROM>
             <hadIRAM>1</hadIRAM>
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
-            <RvdsVP>1</RvdsVP>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>1</StupSel>
@@ -192,7 +194,7 @@
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
             <RoSelD>0</RoSelD>
-            <RwSelD>3</RwSelD>
+            <RwSelD>4</RwSelD>
             <CodeSel>0</CodeSel>
             <OptFeed>0</OptFeed>
             <NoZi1>0</NoZi1>
@@ -209,7 +211,7 @@
             <Ra2Chk>0</Ra2Chk>
             <Ra3Chk>0</Ra3Chk>
             <Im1Chk>1</Im1Chk>
-            <Im2Chk>0</Im2Chk>
+            <Im2Chk>1</Im2Chk>
             <OnChipMemories>
               <Ocm1>
                 <Type>0</Type>
@@ -244,7 +246,7 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x10000000</StartAddress>
-                <Size>0x18000</Size>
+                <Size>0x20000</Size>
               </IRAM>
               <IROM>
                 <Type>0</Type>
@@ -299,7 +301,7 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x10000000</StartAddress>
-                <Size>0x18000</Size>
+                <Size>0x20000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -320,13 +322,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -349,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -457,6 +460,7 @@
                     <uThumb>2</uThumb>
                     <uSurpInc>2</uSurpInc>
                     <uC99>2</uC99>
+                    <uGnu>2</uGnu>
                     <useXO>2</useXO>
                     <v6Lang>0</v6Lang>
                     <v6LangP>0</v6LangP>
@@ -498,81 +502,81 @@
       <api Capiversion="2.01" Cclass="CMSIS Driver" Cgroup="USART" exclusive="0">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.3.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
       <api Capiversion="2.01" Cclass="CMSIS Driver" Cgroup="USB Device" exclusive="0">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.3.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
       <api Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" exclusive="1">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="CORE" Cvariant="Release" Cvendor="Keil" Cversion="6.12.0" condition="USB Core">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="CORE" Cvariant="Release" Cvendor="Keil" Cversion="6.14.1" condition="USB Core">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.12.0" condition="USB Core and Device Driver" maxInstances="4">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="Custom Class" Cvendor="Keil" Cversion="6.12.0" condition="USB Device" maxInstances="4">
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+      <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="Custom Class" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4">
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USART" Cvendor="Keil" Cversion="2.12" condition="LPC4300 CMSIS SCU GPDMA">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USART" Cvendor="Keil" Cversion="2.14" condition="LPC4300 CMSIS SCU GPDMA">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USB Device" Csub="USB0" Cvendor="Keil" Cversion="2.11" condition="LPC4300 CMSIS SCU">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Capiversion="2.1" Cclass="CMSIS Driver" Cgroup="USB Device" Csub="USB0" Cvendor="Keil" Cversion="2.12" condition="LPC4300 CMSIS SCU">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="GPDMA" Cvendor="Keil" Cversion="1.5" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+      <component Cclass="Device" Cgroup="GPDMA" Cvendor="Keil" Cversion="1.6" condition="LPC4300 CMSIS">
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="SCU" Cvendor="Keil" Cversion="1.1" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS">
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI">
+          <targetInfo name="LPC-Link2">
             <c>
               <Define>USE_SPIFI=1</Define>
             </c>
@@ -586,61 +590,70 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.2.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.2" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.2.3" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
       <file attr="config" category="header" name="RTE_Driver\Config\RTE_Device.h" version="2.2.1">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\RTE_Device.h</instance>
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\RTE_Device.h</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
       <file attr="config" category="source" condition="CM4 ARM Compiler" name="Device\Source\ARM\startup_LPC43xx.s" version="1.0.0">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\startup_LPC43xx.s</instance>
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\startup_LPC43xx.s</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" condition="CM4" name="Device\Source\system_LPC43xx.c" version="1.0.2">
-        <instance index="0">RTE\Device\LPC4320_Cortex-M4\system_LPC43xx.c</instance>
+      <file attr="config" category="source" condition="CM4" name="Device\Source\system_LPC43xx.c" version="1.0.3">
+        <instance index="0">RTE\Device\LPC4370_Cortex-M4\system_LPC43xx.c</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="LPC4300 CMSIS"/>
-        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.8.0"/>
+        <package name="LPC4300_DFP" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="2.9.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" name="USB\Config\USBD_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="USB\Config\USBD_Config.c" version="5.2.0">
         <instance index="0">RTE\USB\USBD_Config_0.c</instance>
-        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.12.0" condition="USB Core and Device Driver" maxInstances="4"/>
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4"/>
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
-      <file attr="config" category="source" name="USB\Config\USBD_Config_CustomClass.h" version="5.2.0">
+      <file attr="config" category="header" name="USB\Config\USBD_Config_CustomClass.h" version="5.2.0">
         <instance index="0">RTE\USB\USBD_Config_CustomClass_0.h</instance>
-        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="Custom Class" Cvendor="Keil" Cversion="6.12.0" condition="USB Device" maxInstances="4"/>
-        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.5.0-rc"/>
+        <component Cbundle="MDK-Pro" Cclass="USB" Cgroup="Device" Csub="Custom Class" Cvendor="Keil" Cversion="6.14.1" condition="USB Core and Device Instance and Device Driver" maxInstances="4"/>
+        <package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.12.0"/>
         <targetInfos>
-          <targetInfo name="LPC4320 SPIFI"/>
+          <targetInfo name="LPC-Link2"/>
         </targetInfos>
       </file>
     </files>
   </RTE>
 
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>CMSIS_DAP</LayName>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
 </Project>

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/DAP_config.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/DAP_config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2021 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,11 +17,11 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        1. December 2017
+ * $Date:        21. May 2021
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        DAP_config.h CMSIS-DAP Configuration File for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        DAP_config.h CMSIS-DAP Configuration File for LPC-Link2
  *
  *---------------------------------------------------------------------------*/
 
@@ -250,7 +250,7 @@ of the same I/O port. The following SWDIO I/O Pin functions are provided:
 
 // Configure DAP I/O pins ------------------------------
 
-//   LPC-Link-II HW uses buffers for debug port pins. Therefore it is not
+//   LPC-Link2 HW uses buffers for debug port pins. Therefore it is not
 //   possible to disable outputs SWCLK/TCK, TDI and they are left active.
 //   Only SWDIO/TMS output can be disabled but it is also left active.
 //   nRESET is configured for open drain mode.
@@ -409,7 +409,8 @@ __STATIC_FORCEINLINE uint32_t PIN_nTRST_IN   (void) {
            - 1: release JTAG TRST Test Reset.
 */
 __STATIC_FORCEINLINE void     PIN_nTRST_OUT  (uint32_t bit) {
-  ;             // Not available
+  (void) bit;
+  // Not available
 }
 
 // nRESET Pin I/O------------------------------------------
@@ -458,7 +459,7 @@ It is recommended to provide the following LEDs for status indication:
            - 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit.
 */
 __STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {
-  LPC_GPIO_PORT->B[32*LED_CONNECTED_PORT + LED_CONNECTED_BIT] = bit;
+  LPC_GPIO_PORT->B[32*LED_CONNECTED_PORT + LED_CONNECTED_BIT] = bit & 0xFF;
 }
 
 /** Debug Unit: Set status Target Running LED.
@@ -467,7 +468,8 @@ __STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {
            - 0: Target Running LED OFF: program execution in target stopped.
 */
 __STATIC_INLINE void LED_RUNNING_OUT (uint32_t bit) {
-  ;             // Not available
+  (void) bit;
+  // Not available
 }
 
 ///@}

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/DebugConfig/LPC4320_SPIFI_LPC4320_Cortex-M4.dbgconf → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/DebugConfig/LPC-Link2_LPC4370_Cortex-M4.dbgconf

@@ -40,4 +40,4 @@ RoutingTPIU = 0x00000000;
 
 // </h>
 
-// <<< end of configuration section >>>
+// <<< end of configuration section >>>

CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/Objects/CMSIS_DAP.hex

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CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/CMSIS/RTX_Config.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.2.0
+ * $Revision:   V5.5.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -28,14 +28,21 @@
 #ifndef RTX_CONFIG_H_
 #define RTX_CONFIG_H_
  
+#ifdef   _RTE_
+#include "RTE_Components.h"
+#ifdef    RTE_RTX_CONFIG_H
+#include  RTE_RTX_CONFIG_H
+#endif
+#endif
+ 
 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
  
 // <h>System Configuration
 // =======================
  
-//     <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
-//     <i> Defines the combined global dynamic memory size.
-//     <i> Default: 4096
+//   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
+//   <i> Defines the combined global dynamic memory size.
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -62,64 +69,6 @@
  
 //   </e>
  
-//   <h>Event Recording
- 
-//     <q>Memory Management
-//     <i> Enables Memory Management events recording.
-#ifndef OS_EVR_MEMORY
-#define OS_EVR_MEMORY               1
-#endif
- 
-//     <q>Kernel
-//     <i> Enables Kernel events recording.
-#ifndef OS_EVR_KERNEL
-#define OS_EVR_KERNEL               1
-#endif
- 
-//     <q>Thread
-//     <i> Enables Thread events recording.
-#ifndef OS_EVR_THREAD
-#define OS_EVR_THREAD               1
-#endif
- 
-//     <q>Timer
-//     <i> Enables Timer events recording.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
-#endif
- 
-//     <q>Event Flags
-//     <i> Enables Event Flags events recording.
-#ifndef OS_EVR_EVFLAGS
-#define OS_EVR_EVFLAGS              1
-#endif
- 
-//     <q>Mutex
-//     <i> Enables Mutex events recording.
-#ifndef OS_EVR_MUTEX
-#define OS_EVR_MUTEX                1
-#endif
- 
-//     <q>Semaphore
-//     <i> Enables Semaphore events recording.
-#ifndef OS_EVR_SEMAPHORE
-#define OS_EVR_SEMAPHORE            1
-#endif
- 
-//     <q>Memory Pool
-//     <i> Enables Memory Pool events recording.
-#ifndef OS_EVR_MEMPOOL
-#define OS_EVR_MEMPOOL              1
-#endif
- 
-//     <q>Message Queue
-//     <i> Enables Message Queue events recording.
-#ifndef OS_EVR_MSGQUEUE
-#define OS_EVR_MSGQUEUE             1
-#endif
- 
-//   </h>
- 
 //   <o>ISR FIFO Queue 
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
@@ -130,6 +79,12 @@
 #define OS_ISR_FIFO_QUEUE           32
 #endif
  
+//   <q>Object Memory usage counters
+//   <i> Enables object memory usage counters (requires RTX source variant).
+#ifndef OS_OBJ_MEM_USAGE
+#define OS_OBJ_MEM_USAGE            0
+#endif
+ 
 // </h>
  
 // <h>Thread Configuration
@@ -167,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 200
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               768
+#define OS_STACK_SIZE               1024
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 200
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -188,14 +143,14 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enable stack overrun checks at thread switch.
+//   <i> Enables stack overrun check at thread switch.
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
 #endif
  
 //   <q>Stack usage watermark
-//   <i> Initialize thread stack with watermark pattern for analyzing stack usage.
+//   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
 #define OS_STACK_WATERMARK          0
@@ -243,7 +198,7 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 200
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
 #define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
@@ -382,10 +337,240 @@
  
 // </h>
  
+// <h>Event Recorder Configuration
+// ===============================
+ 
+//   <e>Global Initialization
+//   <i> Initialize Event Recorder during 'osKernelInitialize'.
+#ifndef OS_EVR_INIT
+#define OS_EVR_INIT                 0
+#endif
+ 
+//     <q>Start recording
+//     <i> Start event recording after initialization.
+#ifndef OS_EVR_START
+#define OS_EVR_START                1
+#endif
+ 
+//     <h>Global Event Filter Setup
+//     <i> Initial recording level applied to all components.
+//       <o.0>Error events
+//       <o.1>API function call events
+//       <o.2>Operation events
+//       <o.3>Detailed operation events
+//     </h>
+#ifndef OS_EVR_LEVEL
+#define OS_EVR_LEVEL                0x00U
+#endif
+ 
+//     <h>RTOS Event Filter Setup
+//     <i> Recording levels for RTX components.
+//     <i> Only applicable if events for the respective component are generated.
+ 
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
+#endif
+ 
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
+#endif
+ 
+//       <h>Thread
+//       <i> Recording level for Thread events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
+#endif
+ 
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
+#endif
+ 
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Timer
+//       <i> Recording level for Timer events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
+#endif
+ 
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
+#endif
+ 
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+#endif
+ 
+//     </h>
+ 
+//   </e>
+ 
+//   <h>RTOS Event Generation
+//   <i> Enables event generation for RTX components (requires RTX source variant).
+ 
+//     <q>Memory Management
+//     <i> Enables Memory Management event generation.
+#ifndef OS_EVR_MEMORY
+#define OS_EVR_MEMORY               1
+#endif
+ 
+//     <q>Kernel
+//     <i> Enables Kernel event generation.
+#ifndef OS_EVR_KERNEL
+#define OS_EVR_KERNEL               1
+#endif
+ 
+//     <q>Thread
+//     <i> Enables Thread event generation.
+#ifndef OS_EVR_THREAD
+#define OS_EVR_THREAD               1
+#endif
+ 
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
+#endif
+ 
+//     <q>Event Flags
+//     <i> Enables Event Flags event generation.
+#ifndef OS_EVR_EVFLAGS
+#define OS_EVR_EVFLAGS              1
+#endif
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
+//     <q>Mutex
+//     <i> Enables Mutex event generation.
+#ifndef OS_EVR_MUTEX
+#define OS_EVR_MUTEX                1
+#endif
+ 
+//     <q>Semaphore
+//     <i> Enables Semaphore event generation.
+#ifndef OS_EVR_SEMAPHORE
+#define OS_EVR_SEMAPHORE            1
+#endif
+ 
+//     <q>Memory Pool
+//     <i> Enables Memory Pool event generation.
+#ifndef OS_EVR_MEMPOOL
+#define OS_EVR_MEMPOOL              1
+#endif
+ 
+//     <q>Message Queue
+//     <i> Enables Message Queue event generation.
+#ifndef OS_EVR_MSGQUEUE
+#define OS_EVR_MSGQUEUE             1
+#endif
+ 
+//   </h>
+ 
+// </h>
+ 
 // Number of Threads which use standard C/C++ library libspace
 // (when thread specific memory allocation is not used).
 #if (OS_THREAD_OBJ_MEM == 0)
+#ifndef OS_THREAD_LIBSPACE_NUM
 #define OS_THREAD_LIBSPACE_NUM      4
+#endif
 #else
 #define OS_THREAD_LIBSPACE_NUM      OS_THREAD_NUM
 #endif

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/Device/LPC4320_Cortex-M4/RTE_Device.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/Device/LPC4370_Cortex-M4/RTE_Device.h

@@ -1,21 +1,20 @@
-/* -----------------------------------------------------------------------------
- * Copyright (c) 2013-2016 ARM Ltd.
+/* -------------------------------------------------------------------------- 
+ * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All 
+ * rights reserved.
  *
- * This software is provided 'as-is', without any express or implied warranty.
- * In no event will the authors be held liable for any damages arising from
- * the use of this software. Permission is granted to anyone to use this
- * software for any purpose, including commercial applications, and to alter
- * it and redistribute it freely, subject to the following restrictions:
+ * SPDX-License-Identifier: Apache-2.0
  *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software. If you use this software in
- *    a product, an acknowledgment in the product documentation would be
- *    appreciated but is not required.
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
  *
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
+ * www.apache.org/licenses/LICENSE-2.0
  *
- * 3. This notice may not be removed or altered from any source distribution.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  *
  * $Date:        25. April 2016
  * $Revision:    V2.2.1

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/Device/LPC4320_Cortex-M4/startup_LPC43xx.s → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/Device/LPC4370_Cortex-M4/startup_LPC43xx.s

@@ -27,7 +27,7 @@
 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Stack_Size      EQU     0x00000200
+Stack_Size      EQU     0x00000400
 
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 Stack_Mem       SPACE   Stack_Size

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/Device/LPC4320_Cortex-M4/system_LPC43xx.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/Device/LPC4370_Cortex-M4/system_LPC43xx.c

@@ -17,8 +17,8 @@
  *
  * 3. This notice may not be removed or altered from any source distribution.
  *
- * $Date:        11. October 2017
- * $Revision:    V1.0.2
+ * $Date:        10. September 2018
+ * $Revision:    V1.0.3
  *
  * Project:      NXP LPC43xx System initialization
  * -------------------------------------------------------------------------- */
@@ -169,6 +169,24 @@
 #define PLL1_FBSEL  0           /* 0: FCCO is used as PLL feedback            */
                                 /* 1: FCLKOUT is used as PLL feedback         */
 
+/*----------------------------------------------------------------------------
+ * Configure Flash Accelerator
+ *----------------------------------------------------------------------------
+ * Flash acces time:
+ * |  CPU clock   | FLASHTIM |
+ * | up to  21MHz |    0     |
+ * | up to  43MHz |    1     |
+ * | up to  64MHz |    2     |
+ * | up to  86MHz |    3     |
+ * | up to 107MHz |    4     |
+ * | up to 129MHz |    5     |
+ * | up to 150MHz |    6     |
+ * | up to 172MHz |    7     |
+ * | up to 193MHz |    8     |
+ * | up to 204MHz |    9     |
+ *----------------------------------------------------------------------------*/
+#define FLASHCFG_FLASHTIM   9
+
 
 /*----------------------------------------------------------------------------
  * Configure PLL0USB
@@ -303,6 +321,11 @@ void SetClock (void) {
   uint32_t x, i;
   uint32_t selp, seli;
 
+
+  /* Set flash accelerator configuration for bank A and B to reset value      */
+  LPC_CREG->FLASHCFGA |= (0xF << 12);
+  LPC_CREG->FLASHCFGB |= (0xF << 12);
+
   /* Set flash wait states to maximum                                         */
   LPC_EMC->STATICWAITRD0  = 0x1F;
 
@@ -376,6 +399,10 @@ void SetClock (void) {
   LPC_CGU->BASE_M4_CLK = (0x01        << 11) |  /* Autoblock En               */
                          (CPU_CLK_SEL << 24) ;  /* Set clock source           */
 
+  /* Set flash accelerator configuration for internal flash bank A and B      */
+  LPC_CREG->FLASHCFGA = (LPC_CREG->FLASHCFGA & (~0x0000F000)) | (FLASHCFG_FLASHTIM << 12);
+  LPC_CREG->FLASHCFGB = (LPC_CREG->FLASHCFGB & (~0x0000F000)) | (FLASHCFG_FLASHTIM << 12);
+
 /*----------------------------------------------------------------------------
   PLL0USB Setup
  *----------------------------------------------------------------------------*/

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/USB/USBD_Config_0.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/USB/USBD_Config_0.c

@@ -1,10 +1,10 @@
 /*------------------------------------------------------------------------------
  * MDK Middleware - Component ::USB:Device
- * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved.
+ * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved.
  *------------------------------------------------------------------------------
  * Name:    USBD_Config_0.c
  * Purpose: USB Device Configuration
- * Rev.:    V5.1.0
+ * Rev.:    V5.2.0
  *------------------------------------------------------------------------------
  * Use the following configuration settings in the Device Class configuration
  * files to assign a Device Class to this USB Device 0.
@@ -75,7 +75,7 @@
 
 //     <s.126>Product String
 //     <i>String Descriptor describing Product.
-#define USBD0_STR_DESC_PROD             L"LPC-Link-II"
+#define USBD0_STR_DESC_PROD             L"LPC-Link2"
 
 //     <e.0>Serial Number String
 //     <i>Enable Serial Number String.
@@ -107,11 +107,15 @@
 //     </e>
 //   </h>
 
+//   <o>Control Transfer Buffer Size <64-65536:64>
+//   <i>Specifies size of buffer used for Control Transfers.
+//   <i>It should be at least as big as maximum packet size for Endpoint 0.
+#define USBD0_EP0_BUF_SIZE              128
 
 //   <h>OS Resources Settings
 //   <i>These settings are used to optimize usage of OS resources.
 //     <o>Core Thread Stack Size <64-65536>
-#define USBD0_CORE_THREAD_STACK_SIZE    768
+#define USBD0_CORE_THREAD_STACK_SIZE    1024
 
 //        Core Thread Priority
 #define USBD0_CORE_THREAD_PRIORITY      osPriorityAboveNormal
@@ -173,6 +177,18 @@
 #ifdef  RTE_USB_Device_CDC_3
 #include "USBD_Config_CDC_3.h"
 #endif
+#ifdef  RTE_USB_Device_CDC_4
+#include "USBD_Config_CDC_4.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_5
+#include "USBD_Config_CDC_5.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_6
+#include "USBD_Config_CDC_6.h"
+#endif
+#ifdef  RTE_USB_Device_CDC_7
+#include "USBD_Config_CDC_7.h"
+#endif
 
 #ifdef  RTE_USB_Device_ADC_0
 #include "USBD_Config_ADC_0.h"

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/RTE/USB/USBD_Config_CustomClass_0.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/RTE/USB/USBD_Config_CustomClass_0.h

@@ -817,7 +817,7 @@
 #define USBD_CUSTOM_CLASS0_IF0_STR_EN                              1
 
 //         <s.126>Interface String
-#define USBD_CUSTOM_CLASS0_IF0_STR                                 L"LPC-Link-II CMSIS-DAP"
+#define USBD_CUSTOM_CLASS0_IF0_STR                                 L"LPC-Link2 CMSIS-DAP"
 
 //       </e>
 //     </h>

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/main.c → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2021 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,11 +17,11 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        1. December 2017
+ * $Date:        21. May 2021
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        main.c CMSIS-DAP Main module for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        main.c CMSIS-DAP Main module for LPC-Link2
  *
  *---------------------------------------------------------------------------*/
 
@@ -55,7 +55,7 @@ __NO_RETURN void app_main (void *argument) {
   SWO_ThreadId = osThreadNew(SWO_Thread, NULL, &SWO_ThreadAttr);
 
   osDelay(osWaitForever);
-  for (;;) {};
+  for (;;) {}
 }
 
 int main (void) {
@@ -67,5 +67,5 @@ int main (void) {
     osKernelStart();                    // Start thread execution
   }
 
-  for (;;) {};
+  for (;;) {}
 }

CMSIS/DAP/Firmware/Examples/LPC-Link-II/V2/osObjects.h → CMSIS/DAP/Firmware/Examples/LPC-Link2/V2/osObjects.h

@@ -20,8 +20,8 @@
  * $Date:        1. December 2017
  * $Revision:    V2.0.0
  *
- * Project:      CMSIS-DAP Examples LPC-Link-II
- * Title:        osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II
+ * Project:      CMSIS-DAP Examples LPC-Link2
+ * Title:        osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link2
  *
  *---------------------------------------------------------------------------*/