RTX5: updated support for ARMv8-M (including GCC)

ARM.CMSIS.pdsc

@@ -966,6 +966,25 @@ The ARMv8MML processor is brand new.
       <require Tcompiler="GCC"/>
     </condition>
 
+    <condition id="ARMv8MBL_LE_GCC">
+      <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
+      <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <condition id="ARMv8MML_LE_GCC">
+      <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
+      <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <condition id="ARMv8MML_FP_LE_GCC">
+      <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
+      <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
+      <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
     <!-- IAR compiler -->
     <condition id="CM0_LE_IAR">
       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
@@ -1545,9 +1564,13 @@ The ARMv8MML processor is brand new.
 
         <!-- RTX libraries (CPU and Compiler dependent) -->
         <!-- ARMCC -->
-        <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"  src="CMSIS/RTOS2/RTX/Source"/>
-        <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"  src="CMSIS/RTOS2/RTX/Source"/>
-        <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
+        <!-- GCC -->
+        <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
       </files>
     </component>
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
@@ -1575,9 +1598,13 @@ The ARMv8MML processor is brand new.
 
         <!-- RTX libraries (CPU and Compiler dependent) -->
         <!-- ARMCC -->
-        <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
-        <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
-        <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
+        <!-- GCC -->
+        <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
       </files>
     </component>
 

CMSIS/RTOS2/RTX/Library/GCC/MDK/RTX_CM.uvoptx

@@ -435,6 +435,864 @@
     </TargetOption>
   </Target>
 
+  <Target>
+    <TargetName>ARMv8MBL_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MBL_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBL_NS_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MBL_NS_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MML_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MML_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MML_NS_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MML_NS_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MML_SP_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MML_SP_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MML_SP_NS_LE</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\ARMv8MML_SP_NS_LE\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL040000 -FS00 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <Lin2Executable></Lin2Executable>
+      <Lin2ConfigFile></Lin2ConfigFile>
+      <bLin2Auto>0</bLin2Auto>
+    </TargetOption>
+  </Target>
+
   <Group>
     <GroupName>Core</GroupName>
     <tvExp>1</tvExp>
@@ -629,6 +1487,30 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>16</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\Source\GCC\irq_armv8mbl.s</PathWithFileName>
+      <FilenameWithoutPath>irq_armv8mbl.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>17</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\Source\GCC\irq_armv8mml.s</PathWithFileName>
+      <FilenameWithoutPath>irq_armv8mml.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>

CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s

@@ -96,6 +96,15 @@ SVC_ContextSwitch
                 STR      R2,[R3]                ; os_Info.thread.run: curr = next
 
 SVC_ContextRestore
+                IF       __DOMAIN_NS = 1
+                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
+                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context
+                PUSH     {R2,R3}                ; Save registers
+                BL       TZ_LoadContext_S       ; Load secure context
+                POP      {R2,R3}                ; Restore registers
+                ENDIF
+
+SVC_ContextRestore1
                 MOV      R1,R2
                 ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address
                 LDRB     R0,[R1]                ; Load stack frame information
@@ -104,11 +113,18 @@ SVC_ContextRestore
                 ORRS     R0,R1
                 MOV      LR,R0                  ; Set EXC_RETURN
 
-                IF       __DOMAIN_NS = 0
+                IF       __DOMAIN_NS = 1
+                LSLS     R0,R0,#25              ; Check domain of interrupted thread
+                BPL      SVC_ContextRestore2    ; Branch if non-secure
+                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
+                MSR      PSP,R0                 ; Set PSP
+                BX       LR                     ; Exit from handler
+                ELSE
                 LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base
                 MSR      PSPLIM,R0              ; Set PSPLIM
                 ENDIF
 
+SVC_ContextRestore2
                 LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
                 ADDS     R0,R0,#16              ; Adjust address
                 LDMIA    R0!,{R4-R7}            ; Restore R8..R11
@@ -120,14 +136,6 @@ SVC_ContextRestore
                 SUBS     R0,R0,#32              ; Adjust address
                 LDMIA    R0!,{R4-R7}            ; Restore R4..R7
 
-                IF       __DOMAIN_NS = 1
-                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
-                CBZ      R0,SVC_Exit            ; Branch if there is no secure context
-                PUSH     {R4,LR}                ; Save EXC_RETURN
-                BL       TZ_LoadContext_S       ; Load secure context
-                POP      {R4,PC}                ; Exit from handler
-                ENDIF
-
 SVC_Exit
                 BX       LR                     ; Exit from handler
 
@@ -158,7 +166,7 @@ PendSV_Handler  PROC
                 IMPORT   os_PendSV_Handler
 
                 PUSH     {R0,LR}                ; Save EXC_RETURN
-                BL       os_PendSV_Handler
+                BL       os_PendSV_Handler      ; Call os_PendSV_Handler
                 POP      {R0,R1}                ; Restore EXC_RETURN
                 MOV      LR,R1                  ; Set EXC_RETURN
                 B        Sys_Context
@@ -231,6 +239,15 @@ Sys_ContextSwitch
                 STR      R2,[R3]                ; os_Info.run: curr = next
 
 Sys_ContextRestore
+                IF       __DOMAIN_NS = 1
+                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
+                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context
+                PUSH     {R2,R3}                ; Save registers
+                BL       TZ_LoadContext_S       ; Load secure context
+                POP      {R2,R3}                ; Restore registers
+                ENDIF
+
+Sys_ContextRestore1
                 MOV      R1,R2
                 ADDS     R1,R1,#TCB_SF_OFS      ; Adjust offset
                 LDRB     R0,[R1]                ; Load stack frame information
@@ -239,11 +256,18 @@ Sys_ContextRestore
                 ORRS     R0,R1
                 MOV      LR,R0                  ; Set EXC_RETURN
 
-                IF       __DOMAIN_NS = 0
+                IF       __DOMAIN_NS = 1
+                LSLS     R0,R0,#25              ; Check domain of interrupted thread
+                BPL      Sys_ContextRestore2    ; Branch if non-secure
+                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
+                MSR      PSP,R0                 ; Set PSP
+                BX       LR                     ; Exit from handler
+                ELSE
                 LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base
                 MSR      PSPLIM,R0              ; Set PSPLIM
                 ENDIF
 
+Sys_ContextRestore2
                 LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
                 ADDS     R0,R0,#16              ; Adjust address
                 LDMIA    R0!,{R4-R7}            ; Restore R8..R11
@@ -255,14 +279,6 @@ Sys_ContextRestore
                 SUBS     R0,R0,#32              ; Adjust address
                 LDMIA    R0!,{R4-R7}            ; Restore R4..R7
 
-                IF       __DOMAIN_NS = 1
-                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
-                CBZ      R0,Sys_ContextExit     ; Branch if there is no secure context
-                PUSH     {R4,LR}                ; Save EXC_RETURN
-                BL       TZ_LoadContext_S       ; Load secure context
-                POP      {R4,PC}                ; Exit from handler
-                ENDIF
-
 Sys_ContextExit
                 BX       LR                     ; Exit from handler
 

CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s

@@ -103,26 +103,34 @@ SVC_ContextSwitch
                 STR      R2,[R3]                ; os_Info.thread.run: curr = next
 
 SVC_ContextRestore
+                IF       __DOMAIN_NS = 1
+                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
+                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context
+                PUSH     {R2,R3}                ; Save registers
+                BL       TZ_LoadContext_S       ; Load secure context
+                POP      {R2,R3}                ; Restore registers
+                ENDIF
+
+SVC_ContextRestore1
                 LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base
                 LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information
                 MSR      PSPLIM,R0              ; Set PSPLIM
                 LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
                 ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN
 
+                IF       __DOMAIN_NS = 1
+                TST      LR,#0x40               ; Check domain of interrupted thread
+                BNE      SVC_ContextRestore2    ; Branch if secure
+                ENDIF
+
                 IF       __FPU_USED = 1
                 TST      LR,#0x10               ; Check if extended stack frame
                 VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31
                 ENDIF
                 LDMIA    R0!,{R4-R11}           ; Restore R4..R11
-                MSR      PSP,R0                 ; Set PSP
 
-                IF       __DOMAIN_NS = 1
-                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
-                CBZ      R0,SVC_Exit            ; Branch if there is no secure context
-                PUSH     {R4,LR}                ; Save EXC_RETURN
-                BL       TZ_LoadContext_S       ; Load secure context
-                POP      {R4,PC}                ; Exit from handler
-                ENDIF
+SVC_ContextRestore2
+                MSR      PSP,R0                 ; Set PSP
 
 SVC_Exit
                 BX       LR                     ; Exit from handler
@@ -153,7 +161,7 @@ PendSV_Handler  PROC
                 IMPORT   os_PendSV_Handler
 
                 PUSH     {R4,LR}                ; Save EXC_RETURN
-                BL       os_PendSV_Handler
+                BL       os_PendSV_Handler      ; Call os_PendSV_Handler
                 POP      {R4,LR}                ; Restore EXC_RETURN
                 B        Sys_Context
 
@@ -215,26 +223,34 @@ Sys_ContextSwitch
                 STR      R2,[R3]                ; os_Info.run: curr = next
 
 Sys_ContextRestore
+                IF       __DOMAIN_NS = 1
+                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
+                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context
+                PUSH     {R2,R3}                ; Save registers
+                BL       TZ_LoadContext_S       ; Load secure context
+                POP      {R2,R3}                ; Restore registers
+                ENDIF
+
+Sys_ContextRestore1
                 LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base
                 LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information
                 MSR      PSPLIM,R0              ; Set PSPLIM
                 LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP
                 ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN
 
+                IF       __DOMAIN_NS = 1
+                TST      LR,#0x40               ; Check domain of interrupted thread
+                BNE      Sys_ContextRestore2    ; Branch if secure
+                ENDIF
+
                 IF       __FPU_USED = 1
                 TST      LR,#0x10               ; Check if extended stack frame
                 VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31
                 ENDIF
                 LDMIA    R0!,{R4-R11}           ; Restore R4..R11
-                MSR      PSP,R0                 ; Set PSP
 
-                IF       __DOMAIN_NS = 1
-                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier
-                CBZ      R0,Sys_ContextExit     ; Branch if there is no secure context
-                PUSH     {R4,LR}                ; Save EXC_RETURN
-                BL       TZ_LoadContext_S       ; Load secure context
-                POP      {R4,PC}                ; Exit from handler
-                ENDIF
+Sys_ContextRestore2
+                MSR      PSP,R0                 ; Set PSP
 
 Sys_ContextExit
                 BX       LR                     ; Exit from handler

CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s

@@ -0,0 +1,295 @@
+;/*
+; * Copyright (c) 2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * http://www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; *
+; * -----------------------------------------------------------------------------
+; *
+; * Project:     CMSIS-RTOS RTX
+; * Title:       ARMv8M Baseline Exception handlers
+; *
+; * -----------------------------------------------------------------------------
+; */
+
+
+        .file    "irq_armv8mbl.s"
+        .syntax  unified
+
+        .ifndef  __DOMAIN_NS
+        .equ     __DOMAIN_NS, 0
+        .endif
+
+
+        .equ     I_T_RUN_OFS, 28        // osInfo.thread.run offset
+        .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset
+        .equ     TCB_SP_OFS,  56        // TCB.SP offset
+        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset
+        .equ     TCB_TZM_OFS, 60        // TCB.tz_memory offset
+
+        .section ".rodata"
+        .global  os_irq_cm              // Non weak library reference
+os_irq_cm:
+        .byte    0
+
+
+        .thumb
+        .section ".text"
+        .align   2
+
+
+        .thumb_func
+        .type    SVC_Handler, %function
+        .global  SVC_Handler
+        .fnstart
+        .cantunwind
+SVC_Handler:
+
+        MRS      R0,PSP                 // Get PSP
+        LDR      R1,[R0,#24]            // Load saved PC from stack
+        SUBS     R1,R1,#2               // Point to SVC instruction
+        LDRB     R1,[R1]                // Load SVC number
+        CBNZ     R1,SVC_User            // Branch if not SVC 0
+
+        PUSH     {R0,LR}                // Save PSP and EXC_RETURN
+        LDM      R0,{R0-R3}             // Load function parameters from stack
+        BLX      R7                     // Call service function
+        POP      {R1,R2}                // Restore PSP and EXC_RETURN
+        STR      R0,[R1]                // Store function return value
+        MOV      R0,R1                  // Save PSP
+        MOV      LR,R2                  // Set EXC_RETURN
+
+SVC_Context:
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDMIA    R3!,{R1,R2}            // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        BEQ      SVC_Exit               // Branch when threads are the same
+
+        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted
+
+SVC_ContextSave:
+        SUBS     R0,R0,#32              // Adjust PSP
+        STR      R0,[R1,#TCB_SP_OFS]    // Store SP
+        STMIA    R0!,{R4-R7}            // Save R4..R7
+        MOV      R4,R8
+        MOV      R5,R9
+        MOV      R6,R10
+        MOV      R7,R11
+        STMIA    R0!,{R4-R7}            // Save R8..R11
+
+        MOV      R0,LR                  // Get EXC_RETURN
+        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address
+        STRB     R0,[R1]                // Store stack frame information
+
+SVC_ContextSwitch:
+        SUBS     R3,R3,#8               // Adjust address
+        STR      R2,[R3]                // os_Info.thread.run: curr = next
+
+SVC_ContextRestore:
+        .if      __DOMAIN_NS == 1
+        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        CBZ      R0,SVC_ContextRestore1 // Branch if there is no secure context
+        PUSH     {R2,R3}                // Save registers
+        BL       TZ_LoadContext_S       // Load secure context
+        POP      {R2,R3}                // Restore registers
+        .endif
+
+SVC_ContextRestore1:
+        MOV      R1,R2
+        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address
+        LDRB     R0,[R1]                // Load stack frame information
+        MOVS     R1,#0xFF
+        MVNS     R1,R1                  // R1=0xFFFFFF00
+        ORRS     R0,R1
+        MOV      LR,R0                  // Set EXC_RETURN
+
+        .if      __DOMAIN_NS == 1
+        LSLS     R0,R0,#25              // Check domain of interrupted thread
+        BPL      SVC_ContextRestore2    // Branch if non-secure
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        MSR      PSP,R0                 // Set PSP
+        BX       LR                     // Exit from handler
+        .else
+        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base
+//      MSR      PSPLIM,R0              // Set PSPLIM
+        .endif
+
+SVC_ContextRestore2:
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ADDS     R0,R0,#16              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R8..R11
+        MOV      R8,R4
+        MOV      R9,R5
+        MOV      R10,R6
+        MOV      R11,R7
+        MSR      PSP,R0                 // Set PSP
+        SUBS     R0,R0,#32              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R4..R7
+
+SVC_Exit:
+        BX       LR                     // Exit from handler
+
+SVC_User:
+        PUSH     {R4,LR}                // Save registers
+        LDR      R2,=os_UserSVC_Table   // Load address of SVC table
+        LDR      R3,[R2]                // Load SVC maximum number
+        CMP      R1,R3                  // Check SVC number range
+        BHI      SVC_Done               // Branch if out of range
+
+        LSLS     R1,R1,#2
+        LDR      R4,[R2,R1]             // Load address of SVC function
+
+        LDM      R0,{R0-R3}             // Load function parameters from stack
+        BLX      R4                     // Call service function
+        MRS      R4,PSP                 // Get PSP
+        STR      R0,[R4]                // Store function return value
+
+SVC_Done:
+        POP      {R4,PC}                // Return from handler
+
+        .fnend
+        .size    SVC_Handler, .-SVC_Handler
+
+
+        .thumb_func
+        .type    PendSV_Handler, %function
+        .global  PendSV_Handler
+        .fnstart
+        .cantunwind
+PendSV_Handler:
+
+        PUSH     {R0,LR}                // Save EXC_RETURN
+        BL       os_PendSV_Handler      // Call os_PendSV_Handler
+        POP      {R0,R1}                // Restore EXC_RETURN
+        MOV      LR,R1                  // Set EXC_RETURN
+        B        Sys_Context
+
+        .fnend
+        .size    PendSV_Handler, .-PendSV_Handler
+
+
+        .thumb_func
+        .type    SysTick_Handler, %function
+        .global  SysTick_Handler
+        .fnstart
+        .cantunwind
+SysTick_Handler:
+
+        PUSH     {R0,LR}                // Save EXC_RETURN
+        BL       os_Tick_Handler        // Call os_Tick_Handler
+        POP      {R0,R1}                // Restore EXC_RETURN
+        MOV      LR,R1                  // Set EXC_RETURN
+        B        Sys_Context
+
+        .fnend
+        .size   SysTick_Handler, .-SysTick_Handler
+
+
+        .thumb_func
+        .type    Sys_Context, %function
+        .global  Sys_Context
+        .fnstart
+        .cantunwind
+Sys_Context:
+
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDM      R3!,{R1,R2}            // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        BEQ      Sys_ContextExit        // Branch when threads are the same
+
+Sys_ContextSave:
+        .if      __DOMAIN_NS == 1
+        MOV      R0,LR                  // Get EXC_RETURN
+        LSLS     R0,R0,#25              // Check domain of interrupted thread
+        BPL      Sys_ContextSave1       // Branch if non-secure
+        MOV      R0,LR                  // Get EXC_RETURN
+        PUSH     {R0,R1,R2,R3}          // Save registers
+        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        BL       TZ_StoreContext_S      // Store secure context
+        POP      {R0,R1,R2,R3}          // Restore registers
+        MOV      LR,R0                  // Set EXC_RETURN
+        MRS      R0,PSP                 // Get PSP
+        STR      R0,[R1,#TCB_SP_OFS]    // Store SP
+        B        Sys_ContextSave2
+        .endif
+
+Sys_ContextSave1:
+        MRS      R0,PSP                 // Get PSP
+        SUBS     R0,R0,#32              // Adjust address
+        STR      R0,[R1,#TCB_SP_OFS]    // Store SP
+        STMIA    R0!,{R4-R7}            // Save R4..R7
+        MOV      R4,R8
+        MOV      R5,R9
+        MOV      R6,R10
+        MOV      R7,R11
+        STMIA    R0!,{R4-R7}            // Save R8..R11
+
+Sys_ContextSave2:
+        MOV      R0,LR                  // Get EXC_RETURN
+        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address
+        STRB     R0,[R1]                // Store stack frame information
+
+Sys_ContextSwitch:
+        SUBS     R3,R3,#8               // Adjust address
+        STR      R2,[R3]                // os_Info.run: curr = next
+
+Sys_ContextRestore:
+        .if      __DOMAIN_NS == 1
+        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        CBZ      R0,Sys_ContextRestore1 // Branch if there is no secure context
+        PUSH     {R2,R3}                // Save registers
+        BL       TZ_LoadContext_S       // Load secure context
+        POP      {R2,R3}                // Restore registers
+        .endif
+
+Sys_ContextRestore1:
+        MOV      R1,R2
+        ADDS     R1,R1,#TCB_SF_OFS      // Adjust offset
+        LDRB     R0,[R1]                // Load stack frame information
+        MOVS     R1,#0xFF
+        MVNS     R1,R1                  // R1=0xFFFFFF00
+        ORRS     R0,R1
+        MOV      LR,R0                  // Set EXC_RETURN
+
+        .if      __DOMAIN_NS == 1
+        LSLS     R0,R0,#25              // Check domain of interrupted thread
+        BPL      Sys_ContextRestore2    // Branch if non-secure
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        MSR      PSP,R0                 // Set PSP
+        BX       LR                     // Exit from handler
+        .else
+        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base
+//      MSR      PSPLIM,R0              // Set PSPLIM
+        .endif
+
+Sys_ContextRestore2:
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ADDS     R0,R0,#16              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R8..R11
+        MOV      R8,R4
+        MOV      R9,R5
+        MOV      R10,R6
+        MOV      R11,R7
+        MSR      PSP,R0                 // Set PSP
+        SUBS     R0,R0,#32              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R4..R7
+
+Sys_ContextExit:
+        BX       LR                     // Exit from handler
+
+        .fnend
+        .size    Sys_Context, .-Sys_Context
+
+
+        .end

CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s

@@ -0,0 +1,274 @@
+/*
+ * Copyright (c) 2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       ARMv8M Mainline Exception handlers
+ *
+ * -----------------------------------------------------------------------------
+ */
+
+
+        .file    "irq_armv8mml.s"
+        .syntax  unified
+
+        .ifndef  __FPU_USED
+        .equ     __FPU_USED,  0
+        .endif
+
+        .ifndef  __DOMAIN_NS
+        .equ     __DOMAIN_NS, 0
+        .endif
+
+
+        .equ     I_T_RUN_OFS, 28        // osInfo.thread.run offset
+        .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset
+        .equ     TCB_SP_OFS,  56        // TCB.SP offset
+        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset
+        .equ     TCB_TZM_OFS, 60        // TCB.tz_memory offset
+
+        .section ".rodata"
+        .global  os_irq_cm              // Non weak library reference
+os_irq_cm:
+        .byte    0
+
+
+        .thumb
+        .section ".text"
+        .align   2
+
+
+        .thumb_func
+        .type    SVC_Handler, %function
+        .global  SVC_Handler
+        .fnstart
+        .cantunwind
+SVC_Handler:
+
+        MRS      R0,PSP                 // Get PSP
+        LDR      R1,[R0,#24]            // Load saved PC from stack
+        LDRB     R1,[R1,#-2]            // Load SVC number
+        CBNZ     R1,SVC_User            // Branch if not SVC 0
+
+        PUSH     {R0,LR}                // Save PSP and EXC_RETURN
+        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack
+        BLX      R12                    // Call service function
+        POP      {R12,LR}               // Restore PSP and EXC_RETURN
+        STR      R0,[R12]               // Store function return value
+
+SVC_Context:
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDM      R3,{R1,R2}             // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        IT       EQ
+        BXEQ     LR                     // Exit when threads are the same
+
+        .if      __FPU_USED == 1
+        CBNZ     R1,SVC_ContextSave     // Branch if running thread is not deleted
+        TST      LR,#0x10               // Check if extended stack frame
+        BNE      SVC_ContextSwitch
+        LDR      R1,=0xE000EF34         // FPCCR Address
+        LDR      R0,[R1]                // Load FPCCR
+        BIC      R0,#1                  // Clear LSPACT (Lazy state)
+        STR      R0,[R1]                // Store FPCCR
+        B        SVC_ContextSwitch
+        .else
+        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted
+        .endif
+
+SVC_ContextSave:
+        STMDB    R12!,{R4-R11}          // Save R4..R11
+        .if      __FPU_USED == 1
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
+        VSTMDBEQ R12!,{S16-S31}         //  Save VFP S16.S31
+        .endif
+
+        STR      R12,[R1,#TCB_SP_OFS]   // Store SP
+        STRB     LR, [R1,#TCB_SF_OFS]   // Store stack frame information
+
+SVC_ContextSwitch:
+        STR      R2,[R3]                // os_Info.thread.run: curr = next
+
+SVC_ContextRestore:
+        .if      __DOMAIN_NS == 1
+        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        CBZ      R0,SVC_ContextRestore1 // Branch if there is no secure context
+        PUSH     {R2,R3}                // Save registers
+        BL       TZ_LoadContext_S       // Load secure context
+        POP      {R2,R3}                // Restore registers
+        .endif
+
+SVC_ContextRestore1:
+        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base
+        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information
+//      MSR      PSPLIM,R0              // Set PSPLIM
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN
+
+        .if      __DOMAIN_NS == 1
+        TST      LR,#0x40               // Check domain of interrupted thread
+        BNE      SVC_ContextRestore2    // Branch if secure
+        .endif
+
+        .if      __FPU_USED == 1
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
+        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31
+        .endif
+        LDMIA    R0!,{R4-R11}           // Restore R4..R11
+
+SVC_ContextRestore2:
+        MSR      PSP,R0                 // Set PSP
+
+SVC_Exit:
+        BX       LR                     // Exit from handler
+
+SVC_User:
+        PUSH     {R4,LR}                // Save registers
+        LDR      R2,=os_UserSVC_Table   // Load address of SVC table
+        LDR      R3,[R2]                // Load SVC maximum number
+        CMP      R1,R3                  // Check SVC number range
+        BHI      SVC_Done               // Branch if out of range
+
+        LDR      R4,[R2,R1,LSL #2]      // Load address of SVC function
+
+        LDM      R0,{R0-R3}             // Load function parameters from stack
+        BLX      R4                     // Call service function
+        MRS      R4,PSP                 // Get PSP
+        STR      R0,[R4]                // Store function return value
+
+SVC_Done:
+        POP      {R4,PC}                // Return from handler
+
+        .fnend
+        .size    SVC_Handler, .-SVC_Handler
+
+
+        .thumb_func
+        .type    PendSV_Handler, %function
+        .global  PendSV_Handler
+        .fnstart
+        .cantunwind
+PendSV_Handler:
+
+        PUSH     {R4,LR}                // Save EXC_RETURN
+        BL       os_PendSV_Handler      // Call os_PendSV_Handler
+        POP      {R4,LR}                // Restore EXC_RETURN
+        B        Sys_Context
+
+        .fnend
+        .size    PendSV_Handler, .-PendSV_Handler
+
+
+        .thumb_func
+        .type    SysTick_Handler, %function
+        .global  SysTick_Handler
+        .fnstart
+        .cantunwind
+SysTick_Handler:
+
+        PUSH     {R4,LR}                // Save EXC_RETURN
+        BL       os_Tick_Handler        // Call os_Tick_Handler
+        POP      {R4,LR}                // Restore EXC_RETURN
+        B        Sys_Context
+
+        .fnend
+        .size   SysTick_Handler, .-SysTick_Handler
+
+
+        .thumb_func
+        .type    Sys_Context, %function
+        .global  Sys_Context
+        .fnstart
+        .cantunwind
+Sys_Context:
+
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDM      R3,{R1,R2}             // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        IT       EQ
+        BXEQ     LR                     // Exit when threads are the same
+
+Sys_ContextSave:
+        .if      __DOMAIN_NS == 1
+        TST      LR,#0x40               // Check domain of interrupted thread
+        BEQ      Sys_ContextSave1       // Branch if non-secure
+        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        PUSH     {R1,R2,R3,LR}          // Save registers and EXC_RETURN
+        BL       TZ_StoreContext_S      // Store secure context
+        POP      {R1,R2,R3,LR}          // Restore registers and EXC_RETURN
+        MRS      R0,PSP                 // Get PSP
+        B        Sys_ContextSave2
+        .endif
+
+Sys_ContextSave1:
+        MRS      R0,PSP                 // Get PSP
+        STMDB    R0!,{R4-R11}           // Save R4..R11
+        .if      __FPU_USED == 1
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
+        VSTMDBEQ R0!,{S16-S31}          //  Save VFP S16.S31
+        .endif
+
+Sys_ContextSave2:
+        STR      R0,[R1,#TCB_SP_OFS]    // Store SP
+        STRB     LR,[R1,#TCB_SF_OFS]    // Store stack frame information
+
+Sys_ContextSwitch:
+        STR      R2,[R3]                // os_Info.run: curr = next
+
+Sys_ContextRestore:
+        .if      __DOMAIN_NS == 1
+        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier
+        CBZ      R0,Sys_ContextRestore1 // Branch if there is no secure context
+        PUSH     {R2,R3}                // Save registers
+        BL       TZ_LoadContext_S       // Load secure context
+        POP      {R2,R3}                // Restore registers
+        .endif
+
+Sys_ContextRestore1:
+        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base
+        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information
+//      MSR      PSPLIM,R0              // Set PSPLIM
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN
+
+        .if      __DOMAIN_NS == 1
+        TST      LR,#0x40               // Check domain of interrupted thread
+        BNE      Sys_ContextRestore2    // Branch if secure
+        .endif
+
+        .if      __FPU_USED == 1
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
+        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31
+        .endif
+        LDMIA    R0!,{R4-R11}           // Restore R4..R11
+
+Sys_ContextRestore2:
+        MSR      PSP,R0                 // Set PSP
+
+Sys_ContextExit:
+        BX       LR                     // Exit from handler
+
+        .fnend
+        .size    Sys_Context, .-Sys_Context
+
+
+        .end

CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s

@@ -24,130 +24,131 @@
  */
 
 
-        .file   "irq_cm0.s"
-        .syntax unified
+        .file    "irq_cm0.s"
+        .syntax  unified
 
-        .equ    I_T_RUN_OFS, 28         // osInfo.thread.run offset
-        .equ    TCB_SP_OFS,  56         // TCB.SP offset
+        .equ     I_T_RUN_OFS, 28        // osInfo.thread.run offset
+        .equ     TCB_SP_OFS,  56        // TCB.SP offset
 
         .section ".rodata"
-        .global os_irq_cm               // Non weak library reference
+        .global  os_irq_cm              // Non weak library reference
 os_irq_cm:
-        .byte   0
+        .byte    0
+
 
         .thumb
         .section ".text"
-        .align  2
+        .align   2
 
 
         .thumb_func
-        .type   SVC_Handler, %function
-        .global SVC_Handler
+        .type    SVC_Handler, %function
+        .global  SVC_Handler
         .fnstart
         .cantunwind
 SVC_Handler:
 
-        MRS     R0,PSP                  // Get PSP
-        LDR     R1,[R0,#24]             // Load saved PC from stack
-        SUBS    R1,R1,#2                // Point to SVC instruction
-        LDRB    R1,[R1]                 // Load SVC number
-        CMP     R1,#0
-        BNE     SVC_User                // Branch if not SVC 0
-        
-        LDMIA   R0,{R0-R3}              // Load function parameters from stack
-        BLX     R7                      // Call service function
-        MRS     R3,PSP                  // Get PSP
-        STR     R0,[R3]                 // Store function return value
+        MRS      R0,PSP                 // Get PSP
+        LDR      R1,[R0,#24]            // Load saved PC from stack
+        SUBS     R1,R1,#2               // Point to SVC instruction
+        LDRB     R1,[R1]                // Load SVC number
+        CMP      R1,#0
+        BNE      SVC_User               // Branch if not SVC 0
+
+        LDMIA    R0,{R0-R3}             // Load function parameters from stack
+        BLX      R7                     // Call service function
+        MRS      R3,PSP                 // Get PSP
+        STR      R0,[R3]                // Store function return value
 
 SVC_Context:
-        LDR     R3,=os_Info+I_T_RUN_OFS // Load address of os_Info.run
-        LDMIA   R3!,{R1,R2}             // Load os_Info.thread.run: curr & next
-        CMP     R1,R2                   // Check if thread switch is required
-        BEQ     SVC_Exit                // Branch when threads are the same
-       
-        SUBS    R3,R3,#8
-        CMP     R1,#0
-        BEQ     SVC_ContextSwitch       // Branch if running thread is deleted
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDMIA    R3!,{R1,R2}            // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        BEQ      SVC_Exit               // Branch when threads are the same
+
+        SUBS     R3,R3,#8
+        CMP      R1,#0
+        BEQ      SVC_ContextSwitch      // Branch if running thread is deleted
 
 SVC_ContextSave:
-        MRS     R0,PSP                  // Get PSP
-        SUBS    R0,R0,#32               // Adjust address
-        STR     R0,[R1,#TCB_SP_OFS];    // Store SP
-        STMIA   R0!,{R4-R7}             // Save R4..R7
-        MOV     R4,R8
-        MOV     R5,R9
-        MOV     R6,R10
-        MOV     R7,R11
-        STMIA   R0!,{R4-R7}             // Save R8..R11
+        MRS      R0,PSP                 // Get PSP
+        SUBS     R0,R0,#32              // Adjust address
+        STR      R0,[R1,#TCB_SP_OFS];   // Store SP
+        STMIA    R0!,{R4-R7}            // Save R4..R7
+        MOV      R4,R8
+        MOV      R5,R9
+        MOV      R6,R10
+        MOV      R7,R11
+        STMIA    R0!,{R4-R7}            // Save R8..R11
 
 SVC_ContextSwitch:
-        STR     R2,[R3]                 // os_Info.thread.run: curr = next
+        STR      R2,[R3]                // os_Info.thread.run: curr = next
 
 SVC_ContextRestore:
-        LDR     R0,[R2,#TCB_SP_OFS]     // Load SP
-        ADDS    R0,R0,#16               // Adjust address
-        LDMIA   R0!,{R4-R7}             // Restore R8..R11
-        MOV     R8,R4
-        MOV     R9,R5
-        MOV     R10,R6
-        MOV     R11,R7
-        MSR     PSP,R0                  // Set PSP
-        SUBS    R0,R0,#32               // Adjust address
-        LDMIA   R0!,{R4-R7}             // Restore R4..R7
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ADDS     R0,R0,#16              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R8..R11
+        MOV      R8,R4
+        MOV      R9,R5
+        MOV      R10,R6
+        MOV      R11,R7
+        MSR      PSP,R0                 // Set PSP
+        SUBS     R0,R0,#32              // Adjust address
+        LDMIA    R0!,{R4-R7}            // Restore R4..R7
 
 SVC_Exit:
-        MOVS    R0,#~0xFFFFFFFD         // Set EXC_RETURN value
-        MVNS    R0,R0
-        BX      R0                      // Exit from handler
+        MOVS     R0,#~0xFFFFFFFD        // Set EXC_RETURN value
+        MVNS     R0,R0
+        BX       R0                     // Exit from handler
 
 SVC_User:
-        PUSH    {R4,LR}                 // Save registers
-        LDR     R2,=os_UserSVC_Table    // Load address of SVC table
-        LDR     R3,[R2]                 // Load SVC maximum number
-        CMP     R1,R3                   // Check SVC number range
-        BHI     SVC_Done                // Branch if out of range
-        
-        LSLS    R1,R1,#2
-        LDR     R4,[R2,R1]              // Load address of SVC function
-        
-        LDMIA   R0,{R0-R3}              // Load function parameters from stack
-        BLX     R4                      // Call service function
-        MRS     R4,PSP                  // Get PSP
-        STMIA   R4!,{R0-R3}             // Store function return values
+        PUSH     {R4,LR}                // Save registers
+        LDR      R2,=os_UserSVC_Table   // Load address of SVC table
+        LDR      R3,[R2]                // Load SVC maximum number
+        CMP      R1,R3                  // Check SVC number range
+        BHI      SVC_Done               // Branch if out of range
+
+        LSLS     R1,R1,#2
+        LDR      R4,[R2,R1]             // Load address of SVC function
+
+        LDMIA    R0,{R0-R3}             // Load function parameters from stack
+        BLX      R4                     // Call service function
+        MRS      R4,PSP                 // Get PSP
+        STMIA    R4!,{R0-R3}            // Store function return values
 
 SVC_Done:
-        POP     {R4,PC}                 // Return from handler
+        POP      {R4,PC}                // Return from handler
 
         .fnend
-        .size   SVC_Handler, .-SVC_Handler
+        .size    SVC_Handler, .-SVC_Handler
 
 
         .thumb_func
-        .type   PendSV_Handler, %function
-        .global PendSV_Handler
+        .type    PendSV_Handler, %function
+        .global  PendSV_Handler
         .fnstart
         .cantunwind
 PendSV_Handler:
 
-        BL      os_PendSV_Handler
-        B       SVC_Context
+        BL       os_PendSV_Handler
+        B        SVC_Context
 
         .fnend
-        .size   PendSV_Handler, .-PendSV_Handler
+        .size    PendSV_Handler, .-PendSV_Handler
 
 
         .thumb_func
-        .type   SysTick_Handler, %function
-        .global SysTick_Handler
+        .type    SysTick_Handler, %function
+        .global  SysTick_Handler
         .fnstart
         .cantunwind
 SysTick_Handler:
 
-        BL      os_Tick_Handler
-        B       SVC_Context
+        BL       os_Tick_Handler
+        B        SVC_Context
 
         .fnend
-        .size   SysTick_Handler, .-SysTick_Handler
+        .size    SysTick_Handler, .-SysTick_Handler
 
 
         .end

CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s

@@ -24,112 +24,113 @@
  */
 
 
-        .file   "irq_cm3.s"
-        .syntax unified
+        .file    "irq_cm3.s"
+        .syntax  unified
 
-        .equ    I_T_RUN_OFS, 28         // osInfo.thread.run offset
-        .equ    TCB_SP_OFS,  56         // TCB.SP offset
+        .equ     I_T_RUN_OFS, 28        // osInfo.thread.run offset
+        .equ     TCB_SP_OFS,  56        // TCB.SP offset
 
         .section ".rodata"
-        .global os_irq_cm               // Non weak library reference
+        .global  os_irq_cm              // Non weak library reference
 os_irq_cm:
-        .byte   0
+        .byte    0
+
 
         .thumb
         .section ".text"
-        .align  2
+        .align   2
 
 
         .thumb_func
-        .type   SVC_Handler, %function
-        .global SVC_Handler
+        .type    SVC_Handler, %function
+        .global  SVC_Handler
         .fnstart
         .cantunwind
 SVC_Handler:
 
-        MRS     R0,PSP                  // Get PSP
-        LDR     R1,[R0,#24]             // Load saved PC from stack
-        LDRB    R1,[R1,#-2]             // Load SVC number
-        CBNZ    R1,SVC_User             // Branch if not SVC 0
+        MRS      R0,PSP                 // Get PSP
+        LDR      R1,[R0,#24]            // Load saved PC from stack
+        LDRB     R1,[R1,#-2]            // Load SVC number
+        CBNZ     R1,SVC_User            // Branch if not SVC 0
 
-        LDM     R0,{R0-R3,R12}          // Load function parameters and address from stack
-        BLX     R12                     // Call service function
-        MRS     R12,PSP                 // Get PSP
-        STR     R0,[R12]                // Store function return value
+        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack
+        BLX      R12                    // Call service function
+        MRS      R12,PSP                // Get PSP
+        STR      R0,[R12]               // Store function return value
 
 SVC_Context:
-        LDR     R3,=os_Info+I_T_RUN_OFS // Load address of os_Info.run
-        LDM     R3,{R1,R2}              // Load os_Info.thread.run: curr & next
-        CMP     R1,R2                   // Check if thread switch is required
-        BEQ     SVC_Exit                // Branch when threads are the same
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDM      R3,{R1,R2}             // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        BEQ      SVC_Exit               // Branch when threads are the same
 
-        CBZ     R1,SVC_ContextSwitch    // Branch if running thread is deleted
+        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted
 
 SVC_ContextSave:
-        STMDB   R12!,{R4-R11}           // Save R4..R11
-        STR     R12,[R1,#TCB_SP_OFS]    // Store SP
+        STMDB    R12!,{R4-R11}          // Save R4..R11
+        STR      R12,[R1,#TCB_SP_OFS]   // Store SP
 
 SVC_ContextSwitch:
-        STR     R2,[R3]                 // os_Info.thread.run: curr = next
+        STR      R2,[R3]                // os_Info.thread.run: curr = next
 
 SVC_ContextRestore:
-        LDR     R12,[R2,#TCB_SP_OFS]    // Load SP
-        LDMIA   R12!,{R4-R11}           // Restore R4..R11
-        MSR     PSP,R12                 // Set PSP
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        LDMIA    R0!,{R4-R11}           // Restore R4..R11
+        MSR      PSP,R0                 // Set PSP
 
 SVC_Exit:
-        MVN     LR,#~0xFFFFFFFD         // Set EXC_RETURN value
-        BX      LR                      // Exit from handler
+        MVN      LR,#~0xFFFFFFFD        // Set EXC_RETURN value
+        BX       LR                     // Exit from handler
 
 SVC_User:
-        PUSH    {R4,LR}                 // Save registers
-        LDR     R2,=os_UserSVC_Table    // Load address of SVC table
-        LDR     R3,[R2]                 // Load SVC maximum number
-        CMP     R1,R3                   // Check SVC number range
-        BHI     SVC_Done                // Branch if out of range
-   
-        LDR     R4,[R2,R1,LSL #2]       // Load address of SVC function
-   
-        LDM     R0,{R0-R3}              // Load function parameters from stack
-        BLX     R4                      // Call service function
-        MRS     R12,PSP                 // Get PSP
-        STM     R12,{R0-R3}             // Store function return values
+        PUSH     {R4,LR}                // Save registers
+        LDR      R2,=os_UserSVC_Table   // Load address of SVC table
+        LDR      R3,[R2]                // Load SVC maximum number
+        CMP      R1,R3                  // Check SVC number range
+        BHI      SVC_Done               // Branch if out of range
+
+        LDR      R4,[R2,R1,LSL #2]      // Load address of SVC function
+
+        LDM      R0,{R0-R3}             // Load function parameters from stack
+        BLX      R4                     // Call service function
+        MRS      R4,PSP                 // Get PSP
+        STR      R0,[R4]                // Store function return value
 
 SVC_Done:
-        POP     {R4,PC}                 // Return from handler
+        POP      {R4,PC}                // Return from handler
 
         .fnend
-        .size   SVC_Handler, .-SVC_Handler
+        .size    SVC_Handler, .-SVC_Handler
 
 
         .thumb_func
-        .type   PendSV_Handler, %function
-        .global PendSV_Handler
+        .type    PendSV_Handler, %function
+        .global  PendSV_Handler
         .fnstart
         .cantunwind
 PendSV_Handler:
 
-        BL      os_PendSV_Handler
-        MRS     R12,PSP
-        B       SVC_Context
+        BL       os_PendSV_Handler
+        MRS      R12,PSP
+        B        SVC_Context
 
         .fnend
-        .size   PendSV_Handler, .-PendSV_Handler
+        .size    PendSV_Handler, .-PendSV_Handler
 
 
         .thumb_func
-        .type   SysTick_Handler, %function
-        .global SysTick_Handler
+        .type    SysTick_Handler, %function
+        .global  SysTick_Handler
         .fnstart
         .cantunwind
 SysTick_Handler:
 
-        BL      os_Tick_Handler
-        MRS     R12,PSP
-        B       SVC_Context
+        BL       os_Tick_Handler
+        MRS      R12,PSP
+        B        SVC_Context
 
         .fnend
-        .size   SysTick_Handler, .-SysTick_Handler
+        .size    SysTick_Handler, .-SysTick_Handler
 
 
         .end

CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s

@@ -24,137 +24,137 @@
  */
 
 
-        .file   "irq_cm4f.s"
-        .syntax unified
+        .file    "irq_cm4f.s"
+        .syntax  unified
 
-        .equ    I_T_RUN_OFS, 28         // osInfo.thread.run offset
-        .equ    TCB_SP_OFS,  56         // TCB.SP offset
-        .equ    TCB_SF_OFS,  34         // TCB.stack_frame offset
+        .equ     I_T_RUN_OFS, 28        // osInfo.thread.run offset
+        .equ     TCB_SP_OFS,  56        // TCB.SP offset
+        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset
 
         .section ".rodata"
-        .global os_irq_cm               // Non weak library reference
+        .global  os_irq_cm              // Non weak library reference
 os_irq_cm:
-        .byte   0
+        .byte    0
+
 
         .thumb
         .section ".text"
-        .align  2
+        .align   2
 
 
         .thumb_func
-        .type   SVC_Handler, %function
-        .global SVC_Handler
+        .type    SVC_Handler, %function
+        .global  SVC_Handler
         .fnstart
         .cantunwind
 SVC_Handler:
 
-        MRS     R0,PSP                  // Get PSP
-        LDR     R1,[R0,#24]             // Load saved PC from stack
-        LDRB    R1,[R1,#-2]             // Load SVC number
-        CBNZ    R1,SVC_User             // Branch if not SVC 0
-    
-        PUSH    {R0,LR}                 // Save PSP and EXC_RETURN
-        LDM     R0,{R0-R3,R12}          // Load function parameters and address from stack
-        BLX     R12                     // Call service function
-        POP     {R12,LR}                // Restore PSP and EXC_RETURN
-        STR     R0,[R12]                // Store function return value
+        MRS      R0,PSP                 // Get PSP
+        LDR      R1,[R0,#24]            // Load saved PC from stack
+        LDRB     R1,[R1,#-2]            // Load SVC number
+        CBNZ     R1,SVC_User            // Branch if not SVC 0
+
+        PUSH     {R0,LR}                // Save PSP and EXC_RETURN
+        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack
+        BLX      R12                    // Call service function
+        POP      {R12,LR}               // Restore PSP and EXC_RETURN
+        STR      R0,[R12]               // Store function return value
 
 SVC_Context:
-        LDR     R3,=os_Info+I_T_RUN_OFS // Load address of os_Info.run
-        LDM     R3,{R1,R2}              // Load os_Info.thread.run: curr & next
-        CMP     R1,R2                   // Check if thread switch is required
-        BEQ     SVC_Exit                // Branch when threads are the same
-        
-        CBNZ    R1,SVC_ContextSave      // Branch if running thread is not deleted
-        
-        TST     LR,#0x10                // Check if extended stack frame
-        BNE     SVC_ContextSwitch
-        LDR     R1,=0xE000EF34          // FPCCR Address
-        LDR     R0,[R1]                 // Load FPCCR
-        BIC     R0,#1                   // Clear LSPACT (Lazy state)
-        STR     R0,[R1]                 // Store FPCCR
-        B       SVC_ContextSwitch
+        LDR      R3,=os_Info+I_T_RUN_OFS// Load address of os_Info.run
+        LDM      R3,{R1,R2}             // Load os_Info.thread.run: curr & next
+        CMP      R1,R2                  // Check if thread switch is required
+        IT       EQ
+        BXEQ     LR                     // Exit when threads are the same
+
+        CBNZ     R1,SVC_ContextSave     // Branch if running thread is not deleted
+        TST      LR,#0x10               // Check if extended stack frame
+        BNE      SVC_ContextSwitch
+        LDR      R1,=0xE000EF34         // FPCCR Address
+        LDR      R0,[R1]                // Load FPCCR
+        BIC      R0,#1                  // Clear LSPACT (Lazy state)
+        STR      R0,[R1]                // Store FPCCR
+        B        SVC_ContextSwitch
 
 SVC_ContextSave:
-        TST     LR,#0x10                // Check if extended stack frame
-        ITTE    EQ
+        STMDB    R12!,{R4-R11}          // Save R4..R11
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
         VSTMDBEQ R12!,{S16-S31}         //  Save VFP S16.S31
-        MOVEQ   R0,#1                   //  Extended stack frame identifier
-        MOVNE   R0,#0                   //  Basic stack frame identifier
-        STMDB   R12!,{R4-R11}           // Save R4..R11
-        STR     R12,[R1,#TCB_SP_OFS]    // Store SP
-        STRB    R0, [R1,#TCB_SF_OFS]    // Store stack frame information
+
+        STR      R12,[R1,#TCB_SP_OFS]   // Store SP
+        STRB     LR, [R1,#TCB_SF_OFS]   // Store stack frame information
 
 SVC_ContextSwitch:
-        STR     R2,[R3]                 // os_Info.thread.run: curr = next
+        STR      R2,[R3]                // os_Info.thread.run: curr = next
 
 SVC_ContextRestore:
-        LDR     R12,[R2,#TCB_SP_OFS]    // Load SP
-        LDRB    R0, [R2,#TCB_SF_OFS]    // Load stack frame information
-        LDMIA   R12!,{R4-R11}           // Restore R4..R11
-        CMP     R0,#1                   // Check if extended stack frame
-        ITTE    EQ
-        VLDMIAEQ R12!,{S16-S31}         //  Restore VFP S16..S31
-        MVNEQ   LR,#~0xFFFFFFED         //  Set EXC_RETURN value
-        MVNNE   LR,#~0xFFFFFFFD
-        MSR     PSP,R12                 // Set PSP
+        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information
+        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP
+        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN
+
+        TST      LR,#0x10               // Check if extended stack frame
+        IT       EQ
+        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31
+        LDMIA    R0!,{R4-R11}           // Restore R4..R11
+        MSR      PSP,R0                 // Set PSP
 
 SVC_Exit:
-        BX      LR                      // Exit from handler
+        BX       LR                     // Exit from handler
 
 SVC_User:
-        PUSH    {R4,LR}                 // Save registers
-        LDR     R2,=os_UserSVC_Table    // Load address of SVC table
-        LDR     R3,[R2]                 // Load SVC maximum number
-        CMP     R1,R3                   // Check SVC number range
-        BHI     SVC_Done                // Branch if out of range
-   
-        LDR     R4,[R2,R1,LSL #2]       // Load address of SVC function
-   
-        LDM     R0,{R0-R3}              // Load function parameters from stack
-        BLX     R4                      // Call service function
-        MRS     R12,PSP                 // Get PSP
-        STM     R12,{R0-R3}             // Store function return values
+        PUSH     {R4,LR}                // Save registers
+        LDR      R2,=os_UserSVC_Table   // Load address of SVC table
+        LDR      R3,[R2]                // Load SVC maximum number
+        CMP      R1,R3                  // Check SVC number range
+        BHI      SVC_Done               // Branch if out of range
+
+        LDR      R4,[R2,R1,LSL #2]      // Load address of SVC function
+
+        LDM      R0,{R0-R3}             // Load function parameters from stack
+        BLX      R4                     // Call service function
+        MRS      R4,PSP                 // Get PSP
+        STR      R0,[R4]                // Store function return value
 
 SVC_Done:
         POP     {R4,PC}                 // Return from handler
 
         .fnend
-        .size   SVC_Handler, .-SVC_Handler
+        .size    SVC_Handler, .-SVC_Handler
 
 
         .thumb_func
-        .type   PendSV_Handler, %function
-        .global PendSV_Handler
+        .type    PendSV_Handler, %function
+        .global  PendSV_Handler
         .fnstart
         .cantunwind
 PendSV_Handler:
 
-        PUSH    {R4,LR}                 // Save EXC_RETURN
-        BL      os_PendSV_Handler
-        POP     {R4,LR}                 // Restore EXC_RETURN
-        MRS     R12,PSP
-        B       SVC_Context
+        PUSH     {R4,LR}                // Save EXC_RETURN
+        BL       os_PendSV_Handler
+        POP      {R4,LR}                // Restore EXC_RETURN
+        MRS      R12,PSP
+        B        SVC_Context
 
         .fnend
-        .size   PendSV_Handler, .-PendSV_Handler
+        .size    PendSV_Handler, .-PendSV_Handler
 
 
         .thumb_func
-        .type   SysTick_Handler, %function
-        .global SysTick_Handler
+        .type    SysTick_Handler, %function
+        .global  SysTick_Handler
         .fnstart
         .cantunwind
 SysTick_Handler:
 
-        PUSH    {R4,LR}                 // Save EXC_RETURN
-        BL      os_Tick_Handler
-        POP     {R4,LR}                 // Restore EXC_RETURN
-        MRS     R12,PSP
-        B       SVC_Context
+        PUSH     {R4,LR}                // Save EXC_RETURN
+        BL       os_Tick_Handler
+        POP      {R4,LR}                // Restore EXC_RETURN
+        MRS      R12,PSP
+        B        SVC_Context
 
         .fnend
-        .size   SysTick_Handler, .-SysTick_Handler
+        .size    SysTick_Handler, .-SysTick_Handler
 
 
         .end

CMSIS/RTOS2/RTX/Source/core_cm.h

@@ -361,6 +361,7 @@ __STATIC_INLINE uint8_t os_exc_wr8 (uint8_t *mem, uint8_t val) {
   register uint8_t  ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrexb %[ret],[%[mem]]\n\t"
     "strexb %[res],%[val],[%[mem]]\n\t"
@@ -386,6 +387,7 @@ __STATIC_INLINE uint32_t os_exc_set32 (uint32_t *mem, uint32_t bits) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[val],[%[mem]]\n\t"
 #if (__ARM_ARCH_8M_BASE__ == 1U)
@@ -422,6 +424,7 @@ __STATIC_INLINE uint32_t os_exc_clr32 (uint32_t *mem, uint32_t bits) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[ret],[%[mem]]\n\t"
 #if (__ARM_ARCH_8M_BASE__ == 1U)
@@ -458,6 +461,7 @@ __STATIC_INLINE uint32_t os_exc_chk32_all (uint32_t *mem, uint32_t bits) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[ret],[%[mem]]\n\t"
 #if (__ARM_ARCH_8M_BASE__ == 1U)
@@ -502,6 +506,7 @@ __STATIC_INLINE uint32_t os_exc_chk32_any (uint32_t *mem, uint32_t bits) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[ret],[%[mem]]\n\t"
     "tst   %[ret],%[bits]\n\t"
@@ -539,6 +544,7 @@ __STATIC_INLINE uint32_t os_exc_inc32 (uint32_t *mem) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[ret],[%[mem]]\n\t"
     "adds  %[val],%[ret],#1\n\t"
@@ -565,6 +571,7 @@ __STATIC_INLINE uint16_t os_exc_inc16_lt (uint16_t *mem, uint16_t max) {
   register uint16_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrexh %[ret],[%[mem]]\n\t"
     "cmp    %[max],%[ret]\n\t"
@@ -597,6 +604,7 @@ __STATIC_INLINE uint16_t os_exc_inc16_lim (uint16_t *mem, uint16_t lim) {
   register uint16_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrexh %[ret],[%[mem]]\n\t"
     "adds   %[val],%[ret],#1\n\t"
@@ -627,6 +635,7 @@ __STATIC_INLINE uint32_t os_exc_dec32_nz (uint32_t *mem) {
   register uint32_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrex %[ret],[%[mem]]\n\t"
     "cbnz  %[ret],update%=\n\t"
@@ -656,6 +665,7 @@ __STATIC_INLINE uint16_t os_exc_dec16_nz (uint16_t *mem) {
   register uint16_t ret;
 
   __ASM volatile (
+  ".syntax unified\n\t"
   "loop%=:\n\t"
     "ldrexh %[ret],[%[mem]]\n\t"
     "cbnz   %[ret],update%=\n\t"

CMSIS/RTOS2/RTX/Source/rtx_kernel.c

@@ -465,7 +465,7 @@ osStatus_t osKernelStart (void) {
     case 0x00U:                                 // Privileged Thread mode & MSP
 #if ( (__ARM_ARCH_8M_MAIN__ == 1U) || \
      ((__ARM_ARCH_8M_BASE__ == 1U) && (__DOMAIN_NS == 0U)))
-      __set_PSPLIM((uint32_t)stack);
+//    __set_PSPLIM((uint32_t)stack);
 #endif
       __set_PSP((uint32_t)(stack + 8));         // Initial PSP
       __set_CONTROL(0x02U);                     // Set Privileged Thread mode & PSP

CMSIS/RTOS2/RTX/Source/rtx_mempool.c

@@ -94,6 +94,7 @@ void *os_MemoryPoolAlloc (os_mp_info_t *mp_info) {
     register uint32_t val, res;
 
     __ASM volatile (
+    ".syntax unified\n\t"
     "loop1%=:\n\t"
       "ldrex %[block],[%[mp_info],%[_block_free]]\n\t"
       "cbnz  %[block],update%=\n\t"
@@ -156,6 +157,7 @@ osStatus_t os_MemoryPoolFree (os_mp_info_t *mp_info, void *block) {
     register uint32_t val1, val2, res;
 
     __ASM volatile (
+    ".syntax unified\n\t"
     "loop1%=:\n\t"
       "ldr   %[val1],[%[mp_info],%[_block_free]]\n\t"
       "str   %[val1],[%[block]]\n\t"