RTX5: update examples (using latest components)

CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -26,7 +26,7 @@
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
-      <CLKADS>12000000</CLKADS>
+      <CLKADS>50000000</CLKADS>
       <OPTTT>
         <gFlags>1</gFlags>
         <BeepAtEnd>1</BeepAtEnd>
@@ -162,13 +162,13 @@
         </Ww>
       </WatchWindow1>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.7.0</Type>
+        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.3\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.3</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.2\EventRecorder.scvd</Filename>
-        <Type>Keil.ARM_Compiler.1.6.2</Type>
+        <Filename>D:\GitHub\ARM-software\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.8.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>

CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulation</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6130001::V6.13.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.7.0</PackID>
+          <PackID>ARM.CMSIS.5.8.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -82,7 +82,7 @@
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>$K/ARM/BIN/ElfDwT.exe !L BASEADDRESS(0x1A000000)</UserProg1Name>
+            <UserProg1Name></UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -134,11 +134,11 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>4097</DriverSelection>
+            <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3></Flash3>
+          <Flash3>"" ()</Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -185,6 +185,7 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -366,8 +367,8 @@
             <noStLib>0</noStLib>
             <RepFail>1</RepFail>
             <useFile>0</useFile>
-            <TextAddressRange>0x1A000000</TextAddressRange>
-            <DataAddressRange>0x10000000</DataAddressRange>
+            <TextAddressRange></TextAddressRange>
+            <DataAddressRange></DataAddressRange>
             <pXoBase></pXoBase>
             <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
@@ -423,49 +424,49 @@
     </apis>
     <components>
       <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="EVR" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with EVR">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
     </components>
     <files>
-      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.1">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.2">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
@@ -473,31 +474,31 @@
       <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.3">
         <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.1">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/CMSIS/RTX_Config.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.0
+ * $Revision:   V5.1.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -40,7 +40,7 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
   (void)object_id;
 
   switch (code) {
-    case osRtxErrorStackUnderflow:
+    case osRtxErrorStackOverflow:
       // Stack overflow detected for thread (thread_id=object_id)
       break;
     case osRtxErrorISRQueueOverflow:

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.1
+ * $Revision:   V5.5.2
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -42,7 +42,7 @@
  
 //   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
 //   <i> Defines the combined global dynamic memory size.
-//   <i> Default: 4096
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -69,7 +69,7 @@
  
 //   </e>
  
-//   <o>ISR FIFO Queue 
+//   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
 //     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
@@ -122,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 256
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               256
+#define OS_STACK_SIZE               512
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -143,7 +143,7 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enables stack overrun check at thread switch.
+//   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
@@ -156,8 +156,8 @@
 #define OS_STACK_WATERMARK          0
 #endif
  
-//   <o>Processor mode for Thread execution 
-//     <0=> Unprivileged mode 
+//   <o>Processor mode for Thread execution
+//     <0=> Unprivileged mode
 //     <1=> Privileged mode
 //   <i> Default: Privileged mode
 #ifndef OS_PRIVILEGE_MODE
@@ -198,9 +198,9 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
-#define OS_TIMER_THREAD_STACK_SIZE  256
+#define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
  
 //   <o>Timer Thread TrustZone Module Identifier
@@ -367,125 +367,125 @@
 //     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <h>Memory Management
+//       <e.7>Memory Management
 //       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMORY_LEVEL 
-#define OS_EVR_MEMORY_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_MEMORY_LEVEL
+#define OS_EVR_MEMORY_LEVEL         0x81U
 #endif
  
-//       <h>Kernel
+//       <e.7>Kernel
 //       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_KERNEL_LEVEL 
-#define OS_EVR_KERNEL_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_KERNEL_LEVEL
+#define OS_EVR_KERNEL_LEVEL         0x81U
 #endif
  
-//       <h>Thread
+//       <e.7>Thread
 //       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THREAD_LEVEL 
-#define OS_EVR_THREAD_LEVEL         0x05U
+//       </e>
+#ifndef OS_EVR_THREAD_LEVEL
+#define OS_EVR_THREAD_LEVEL         0x85U
 #endif
  
-//       <h>Generic Wait
+//       <e.7>Generic Wait
 //       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_WAIT_LEVEL 
-#define OS_EVR_WAIT_LEVEL           0x01U
+//       </e>
+#ifndef OS_EVR_WAIT_LEVEL
+#define OS_EVR_WAIT_LEVEL           0x81U
 #endif
  
-//       <h>Thread Flags
+//       <e.7>Thread Flags
 //       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THFLAGS_LEVEL 
-#define OS_EVR_THFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_THFLAGS_LEVEL
+#define OS_EVR_THFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Event Flags
+//       <e.7>Event Flags
 //       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_EVFLAGS_LEVEL 
-#define OS_EVR_EVFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_EVFLAGS_LEVEL
+#define OS_EVR_EVFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Timer
+//       <e.7>Timer
 //       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_TIMER_LEVEL 
-#define OS_EVR_TIMER_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_TIMER_LEVEL
+#define OS_EVR_TIMER_LEVEL          0x81U
 #endif
  
-//       <h>Mutex
+//       <e.7>Mutex
 //       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MUTEX_LEVEL 
-#define OS_EVR_MUTEX_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_MUTEX_LEVEL
+#define OS_EVR_MUTEX_LEVEL          0x81U
 #endif
  
-//       <h>Semaphore
+//       <e.7>Semaphore
 //       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_SEMAPHORE_LEVEL 
-#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+//       </e>
+#ifndef OS_EVR_SEMAPHORE_LEVEL
+#define OS_EVR_SEMAPHORE_LEVEL      0x81U
 #endif
  
-//       <h>Memory Pool
+//       <e.7>Memory Pool
 //       <i> Recording level for Memory Pool events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMPOOL_LEVEL 
-#define OS_EVR_MEMPOOL_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_MEMPOOL_LEVEL
+#define OS_EVR_MEMPOOL_LEVEL        0x81U
 #endif
  
-//       <h>Message Queue
+//       <e.7>Message Queue
 //       <i> Recording level for Message Queue events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MSGQUEUE_LEVEL 
-#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+//       </e>
+#ifndef OS_EVR_MSGQUEUE_LEVEL
+#define OS_EVR_MSGQUEUE_LEVEL       0x81U
 #endif
  
 //     </h>

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Compiler/EventRecorderConf.h

@@ -26,7 +26,7 @@
 #define EVENT_TIMESTAMP_SOURCE  2
 
 //   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
-//   <i>Defines default time stamp clock frequency (0 when not used)
+//   <i>Defines initial time stamp clock frequency (0 when not used)
 #define EVENT_TIMESTAMP_FREQ    25000000U
 
 // </h>

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -23,6 +23,15 @@
 #define __RAM_BASE      0x20000000
 #define __RAM_SIZE      0x00020000
 
+/*--------------------- Event Recorder Configuration -------------------------
+; <h> Event Recorder Configuration
+;   <o> Event Recorder RAM Size (in Bytes) <0x0-0xFFFFFFFF:16>
+;   <i> Memory requirement = 256 + (16 x Number_of_Records)
+;   <i> (defined by EVENT_RECORD_COUNT in EventRecorderConf.h)
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_EVR_SIZE  0x00000800
+
 /*--------------------- Stack / Heap Configuration ---------------------------
 ; <h> Stack / Heap Configuration
 ;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
@@ -32,45 +41,26 @@
 #define __STACK_SIZE    0x00000400
 #define __HEAP_SIZE     0x00000C00
 
-/*--------------------- EventRecorder Configuration --------------------------*/
-; <e> EventRecorder Configuration
-#define __EVT_ENABLE    1
-
-;   <o> Number of Records
-;     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-;     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-;     <65536=>65536
-#define __EVT_RECORDS   64
-
-; </e>
-
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  Stack, Heap and Event Recorder boundary definitions
  *----------------------------------------------------------------------------*/
 #define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-
+#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after previous section, 8 byte aligned */
+#define __RAM_EVR_BASE (AlignExpr(+0, 4))           /* starts after previous section, 4 byte aligned */
 
 /*----------------------------------------------------------------------------
   Scatter File Definitions definition
  *----------------------------------------------------------------------------*/
-#ifdef __EVT_ENABLE
-#define __EVBUF_SIZE   (256 + __EVT_RECORDS*16)
-#define __EVBUF_BASE   (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-#else
-#define __EVBUF_SIZE    0
-#endif
-
 #define __RO_BASE       __ROM_BASE
 #define __RO_SIZE       __ROM_SIZE
 
 #define __RW_BASE       __RAM_BASE
-#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __EVBUF_SIZE)
+#define __RW_SIZE      (__RAM_SIZE - __RAM_EVR_SIZE - __HEAP_SIZE - __STACK_SIZE)
 
 
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
@@ -85,8 +75,8 @@ LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
    .ANY (+RW +ZI)
   }
 
-#ifdef __EVT_ENABLE
-  RW_EVTBUF __EVBUF_BASE UNINIT __EVBUF_SIZE {      ; Uninitialized region for Event Buffer
+#if __RAM_EVR_SIZE > 0
+  RW_EVR __RAM_EVR_BASE UNINIT __RAM_EVR_SIZE {     ; Event Recorder RAM region
     EventRecorder.o (+ZI)
   }
 #endif

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/_Simulation/RTE_Components.h

@@ -1,31 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'Blinky' 
- * Target:  'Simulation' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-/*  ARM::CMSIS:RTOS2:Keil RTX5:Source:5.5.2 */
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-        #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
-/*  Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0 */
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-/*  Keil.ARM Compiler::Compiler:I/O:STDOUT:EVR:1.2.0 */
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-
-#endif /* RTE_COMPONENTS_H */

CMSIS/RTOS2/RTX/Examples/MemPool/MemPool.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -140,13 +140,13 @@
       </TargetDriverDllRegistry>
       <Breakpoint/>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.7.0</Type>
+        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.3\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.3</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.2\EventRecorder.scvd</Filename>
-        <Type>Keil.ARM_Compiler.1.6.2</Type>
+        <Filename>D:\GitHub\ARM-software\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.8.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>

CMSIS/RTOS2/RTX/Examples/MemPool/MemPool.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulator</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6130001::V6.13.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.7.0</PackID>
+          <PackID>ARM.CMSIS.5.8.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -185,6 +185,7 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -366,8 +367,8 @@
             <noStLib>0</noStLib>
             <RepFail>1</RepFail>
             <useFile>0</useFile>
-            <TextAddressRange>0x00000000</TextAddressRange>
-            <DataAddressRange>0x20000000</DataAddressRange>
+            <TextAddressRange></TextAddressRange>
+            <DataAddressRange></DataAddressRange>
             <pXoBase></pXoBase>
             <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
@@ -428,8 +429,8 @@
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -454,18 +455,18 @@
       </component>
     </components>
     <files>
-      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.1">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.2">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -473,31 +474,31 @@
       <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.3">
         <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.1">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/CMSIS/RTX_Config.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.0
+ * $Revision:   V5.1.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -40,7 +40,7 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
   (void)object_id;
 
   switch (code) {
-    case osRtxErrorStackUnderflow:
+    case osRtxErrorStackOverflow:
       // Stack overflow detected for thread (thread_id=object_id)
       break;
     case osRtxErrorISRQueueOverflow:

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.1
+ * $Revision:   V5.5.2
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -42,7 +42,7 @@
  
 //   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
 //   <i> Defines the combined global dynamic memory size.
-//   <i> Default: 4096
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -69,7 +69,7 @@
  
 //   </e>
  
-//   <o>ISR FIFO Queue 
+//   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
 //     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
@@ -122,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 256
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               256
+#define OS_STACK_SIZE               512
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -143,7 +143,7 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enables stack overrun check at thread switch.
+//   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
@@ -156,8 +156,8 @@
 #define OS_STACK_WATERMARK          0
 #endif
  
-//   <o>Processor mode for Thread execution 
-//     <0=> Unprivileged mode 
+//   <o>Processor mode for Thread execution
+//     <0=> Unprivileged mode
 //     <1=> Privileged mode
 //   <i> Default: Privileged mode
 #ifndef OS_PRIVILEGE_MODE
@@ -198,9 +198,9 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
-#define OS_TIMER_THREAD_STACK_SIZE  256
+#define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
  
 //   <o>Timer Thread TrustZone Module Identifier
@@ -367,125 +367,125 @@
 //     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <h>Memory Management
+//       <e.7>Memory Management
 //       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMORY_LEVEL 
-#define OS_EVR_MEMORY_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_MEMORY_LEVEL
+#define OS_EVR_MEMORY_LEVEL         0x81U
 #endif
  
-//       <h>Kernel
+//       <e.7>Kernel
 //       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_KERNEL_LEVEL 
-#define OS_EVR_KERNEL_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_KERNEL_LEVEL
+#define OS_EVR_KERNEL_LEVEL         0x81U
 #endif
  
-//       <h>Thread
+//       <e.7>Thread
 //       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THREAD_LEVEL 
-#define OS_EVR_THREAD_LEVEL         0x05U
+//       </e>
+#ifndef OS_EVR_THREAD_LEVEL
+#define OS_EVR_THREAD_LEVEL         0x85U
 #endif
  
-//       <h>Generic Wait
+//       <e.7>Generic Wait
 //       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_WAIT_LEVEL 
-#define OS_EVR_WAIT_LEVEL           0x01U
+//       </e>
+#ifndef OS_EVR_WAIT_LEVEL
+#define OS_EVR_WAIT_LEVEL           0x81U
 #endif
  
-//       <h>Thread Flags
+//       <e.7>Thread Flags
 //       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THFLAGS_LEVEL 
-#define OS_EVR_THFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_THFLAGS_LEVEL
+#define OS_EVR_THFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Event Flags
+//       <e.7>Event Flags
 //       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_EVFLAGS_LEVEL 
-#define OS_EVR_EVFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_EVFLAGS_LEVEL
+#define OS_EVR_EVFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Timer
+//       <e.7>Timer
 //       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_TIMER_LEVEL 
-#define OS_EVR_TIMER_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_TIMER_LEVEL
+#define OS_EVR_TIMER_LEVEL          0x81U
 #endif
  
-//       <h>Mutex
+//       <e.7>Mutex
 //       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MUTEX_LEVEL 
-#define OS_EVR_MUTEX_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_MUTEX_LEVEL
+#define OS_EVR_MUTEX_LEVEL          0x81U
 #endif
  
-//       <h>Semaphore
+//       <e.7>Semaphore
 //       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_SEMAPHORE_LEVEL 
-#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+//       </e>
+#ifndef OS_EVR_SEMAPHORE_LEVEL
+#define OS_EVR_SEMAPHORE_LEVEL      0x81U
 #endif
  
-//       <h>Memory Pool
+//       <e.7>Memory Pool
 //       <i> Recording level for Memory Pool events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMPOOL_LEVEL 
-#define OS_EVR_MEMPOOL_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_MEMPOOL_LEVEL
+#define OS_EVR_MEMPOOL_LEVEL        0x81U
 #endif
  
-//       <h>Message Queue
+//       <e.7>Message Queue
 //       <i> Recording level for Message Queue events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MSGQUEUE_LEVEL 
-#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+//       </e>
+#ifndef OS_EVR_MSGQUEUE_LEVEL
+#define OS_EVR_MSGQUEUE_LEVEL       0x81U
 #endif
  
 //     </h>

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Compiler/EventRecorderConf.h

@@ -26,7 +26,7 @@
 #define EVENT_TIMESTAMP_SOURCE  2
 
 //   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
-//   <i>Defines default time stamp clock frequency (0 when not used)
+//   <i>Defines initial time stamp clock frequency (0 when not used)
 #define EVENT_TIMESTAMP_FREQ    0U
 
 // </h>

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -12,7 +12,7 @@
 ; </h>
  *----------------------------------------------------------------------------*/
 #define __ROM_BASE      0x00000000
-#define __ROM_SIZE      0x00080000
+#define __ROM_SIZE      0x00040000
 
 /*--------------------- Embedded RAM Configuration ---------------------------
 ; <h> RAM Configuration
@@ -21,7 +21,16 @@
 ; </h>
  *----------------------------------------------------------------------------*/
 #define __RAM_BASE      0x20000000
-#define __RAM_SIZE      0x00040000
+#define __RAM_SIZE      0x00020000
+
+/*--------------------- Event Recorder Configuration -------------------------
+; <h> Event Recorder Configuration
+;   <o> Event Recorder RAM Size (in Bytes) <0x0-0xFFFFFFFF:16>
+;   <i> Memory requirement = 256 + (16 x Number_of_Records)
+;   <i> (defined by EVENT_RECORD_COUNT in EventRecorderConf.h)
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_EVR_SIZE  0x00000800
 
 /*--------------------- Stack / Heap Configuration ---------------------------
 ; <h> Stack / Heap Configuration
@@ -29,48 +38,29 @@
 ;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
  *----------------------------------------------------------------------------*/
-#define __STACK_SIZE    0x00000200
+#define __STACK_SIZE    0x00000400
 #define __HEAP_SIZE     0x00000C00
 
-/*--------------------- EventRecorder Configuration --------------------------*/
-; <e> EventRecorder Configuration
-#define __EVT_ENABLE    1
-
-;   <o> Number of Records
-;     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-;     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-;     <65536=>65536
-#define __EVT_RECORDS   64
-
-; </e>
-
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  Stack, Heap and Event Recorder boundary definitions
  *----------------------------------------------------------------------------*/
 #define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-
+#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after previous section, 8 byte aligned */
+#define __RAM_EVR_BASE (AlignExpr(+0, 4))           /* starts after previous section, 4 byte aligned */
 
 /*----------------------------------------------------------------------------
   Scatter File Definitions definition
  *----------------------------------------------------------------------------*/
-#ifdef __EVT_ENABLE
-#define __EVBUF_SIZE   (256 + __EVT_RECORDS*16)
-#define __EVBUF_BASE   (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-#else
-#define __EVBUF_SIZE    0
-#endif
-
 #define __RO_BASE       __ROM_BASE
 #define __RO_SIZE       __ROM_SIZE
 
 #define __RW_BASE       __RAM_BASE
-#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __EVBUF_SIZE)
+#define __RW_SIZE      (__RAM_SIZE - __RAM_EVR_SIZE - __HEAP_SIZE - __STACK_SIZE)
 
 
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
@@ -85,8 +75,8 @@ LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
    .ANY (+RW +ZI)
   }
 
-#ifdef __EVT_ENABLE
-  RW_EVTBUF __EVBUF_BASE UNINIT __EVBUF_SIZE {      ; Uninitialized region for Event Buffer
+#if __RAM_EVR_SIZE > 0
+  RW_EVR __RAM_EVR_BASE UNINIT __RAM_EVR_SIZE {     ; Event Recorder RAM region
     EventRecorder.o (+ZI)
   }
 #endif

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/_Simulator/RTE_Components.h

@@ -1,31 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'MemPool' 
- * Target:  'Simulator' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-/*  ARM::CMSIS:RTOS2:Keil RTX5:Source:5.5.2 */
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-        #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
-/*  Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0 */
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-/*  Keil.ARM Compiler::Compiler:I/O:STDOUT:EVR:1.2.0 */
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-
-#endif /* RTE_COMPONENTS_H */

CMSIS/RTOS2/RTX/Examples/Migration/Blinky.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -26,7 +26,7 @@
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
-      <CLKADS>12000000</CLKADS>
+      <CLKADS>50000000</CLKADS>
       <OPTTT>
         <gFlags>1</gFlags>
         <BeepAtEnd>1</BeepAtEnd>
@@ -162,13 +162,13 @@
         </Ww>
       </WatchWindow1>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.7.0</Type>
+        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.3\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.3</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.2\EventRecorder.scvd</Filename>
-        <Type>Keil.ARM_Compiler.1.6.2</Type>
+        <Filename>D:\GitHub\ARM-software\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.8.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>

CMSIS/RTOS2/RTX/Examples/Migration/Blinky.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulation</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6130001::V6.13.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.7.0</PackID>
+          <PackID>ARM.CMSIS.5.8.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -82,7 +82,7 @@
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>$K/ARM/BIN/ElfDwT.exe !L BASEADDRESS(0x1A000000)</UserProg1Name>
+            <UserProg1Name></UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -185,6 +185,7 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -366,8 +367,8 @@
             <noStLib>0</noStLib>
             <RepFail>1</RepFail>
             <useFile>0</useFile>
-            <TextAddressRange>0x1A000000</TextAddressRange>
-            <DataAddressRange>0x10000000</DataAddressRange>
+            <TextAddressRange></TextAddressRange>
+            <DataAddressRange></DataAddressRange>
             <pXoBase></pXoBase>
             <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
@@ -429,55 +430,55 @@
     </apis>
     <components>
       <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="1.0.0" Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cvendor="ARM" Cversion="5.5.2" condition="RTOS RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+      <component Capiversion="1.0.0" Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cvendor="ARM" Cversion="5.5.3" condition="RTOS RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="EVR" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with EVR">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
     </components>
     <files>
-      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.1">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.2">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
@@ -485,31 +486,31 @@
       <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.3">
         <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.1">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/Migration/RTE/CMSIS/RTX_Config.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.0
+ * $Revision:   V5.1.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -40,7 +40,7 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
   (void)object_id;
 
   switch (code) {
-    case osRtxErrorStackUnderflow:
+    case osRtxErrorStackOverflow:
       // Stack overflow detected for thread (thread_id=object_id)
       break;
     case osRtxErrorISRQueueOverflow:

CMSIS/RTOS2/RTX/Examples/Migration/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.1
+ * $Revision:   V5.5.2
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -42,7 +42,7 @@
  
 //   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
 //   <i> Defines the combined global dynamic memory size.
-//   <i> Default: 4096
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -69,7 +69,7 @@
  
 //   </e>
  
-//   <o>ISR FIFO Queue 
+//   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
 //     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
@@ -122,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 256
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               256
+#define OS_STACK_SIZE               512
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -143,7 +143,7 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enables stack overrun check at thread switch.
+//   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
@@ -156,8 +156,8 @@
 #define OS_STACK_WATERMARK          0
 #endif
  
-//   <o>Processor mode for Thread execution 
-//     <0=> Unprivileged mode 
+//   <o>Processor mode for Thread execution
+//     <0=> Unprivileged mode
 //     <1=> Privileged mode
 //   <i> Default: Privileged mode
 #ifndef OS_PRIVILEGE_MODE
@@ -198,9 +198,9 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
-#define OS_TIMER_THREAD_STACK_SIZE  256
+#define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
  
 //   <o>Timer Thread TrustZone Module Identifier
@@ -367,125 +367,125 @@
 //     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <h>Memory Management
+//       <e.7>Memory Management
 //       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMORY_LEVEL 
-#define OS_EVR_MEMORY_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_MEMORY_LEVEL
+#define OS_EVR_MEMORY_LEVEL         0x81U
 #endif
  
-//       <h>Kernel
+//       <e.7>Kernel
 //       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_KERNEL_LEVEL 
-#define OS_EVR_KERNEL_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_KERNEL_LEVEL
+#define OS_EVR_KERNEL_LEVEL         0x81U
 #endif
  
-//       <h>Thread
+//       <e.7>Thread
 //       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THREAD_LEVEL 
-#define OS_EVR_THREAD_LEVEL         0x05U
+//       </e>
+#ifndef OS_EVR_THREAD_LEVEL
+#define OS_EVR_THREAD_LEVEL         0x85U
 #endif
  
-//       <h>Generic Wait
+//       <e.7>Generic Wait
 //       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_WAIT_LEVEL 
-#define OS_EVR_WAIT_LEVEL           0x01U
+//       </e>
+#ifndef OS_EVR_WAIT_LEVEL
+#define OS_EVR_WAIT_LEVEL           0x81U
 #endif
  
-//       <h>Thread Flags
+//       <e.7>Thread Flags
 //       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THFLAGS_LEVEL 
-#define OS_EVR_THFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_THFLAGS_LEVEL
+#define OS_EVR_THFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Event Flags
+//       <e.7>Event Flags
 //       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_EVFLAGS_LEVEL 
-#define OS_EVR_EVFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_EVFLAGS_LEVEL
+#define OS_EVR_EVFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Timer
+//       <e.7>Timer
 //       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_TIMER_LEVEL 
-#define OS_EVR_TIMER_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_TIMER_LEVEL
+#define OS_EVR_TIMER_LEVEL          0x81U
 #endif
  
-//       <h>Mutex
+//       <e.7>Mutex
 //       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MUTEX_LEVEL 
-#define OS_EVR_MUTEX_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_MUTEX_LEVEL
+#define OS_EVR_MUTEX_LEVEL          0x81U
 #endif
  
-//       <h>Semaphore
+//       <e.7>Semaphore
 //       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_SEMAPHORE_LEVEL 
-#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+//       </e>
+#ifndef OS_EVR_SEMAPHORE_LEVEL
+#define OS_EVR_SEMAPHORE_LEVEL      0x81U
 #endif
  
-//       <h>Memory Pool
+//       <e.7>Memory Pool
 //       <i> Recording level for Memory Pool events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMPOOL_LEVEL 
-#define OS_EVR_MEMPOOL_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_MEMPOOL_LEVEL
+#define OS_EVR_MEMPOOL_LEVEL        0x81U
 #endif
  
-//       <h>Message Queue
+//       <e.7>Message Queue
 //       <i> Recording level for Message Queue events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MSGQUEUE_LEVEL 
-#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+//       </e>
+#ifndef OS_EVR_MSGQUEUE_LEVEL
+#define OS_EVR_MSGQUEUE_LEVEL       0x81U
 #endif
  
 //     </h>

CMSIS/RTOS2/RTX/Examples/Migration/RTE/Compiler/EventRecorderConf.h

@@ -26,7 +26,7 @@
 #define EVENT_TIMESTAMP_SOURCE  2
 
 //   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
-//   <i>Defines default time stamp clock frequency (0 when not used)
+//   <i>Defines initial time stamp clock frequency (0 when not used)
 #define EVENT_TIMESTAMP_FREQ    25000000U
 
 // </h>

CMSIS/RTOS2/RTX/Examples/Migration/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -23,6 +23,15 @@
 #define __RAM_BASE      0x20000000
 #define __RAM_SIZE      0x00020000
 
+/*--------------------- Event Recorder Configuration -------------------------
+; <h> Event Recorder Configuration
+;   <o> Event Recorder RAM Size (in Bytes) <0x0-0xFFFFFFFF:16>
+;   <i> Memory requirement = 256 + (16 x Number_of_Records)
+;   <i> (defined by EVENT_RECORD_COUNT in EventRecorderConf.h)
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_EVR_SIZE  0x00000800
+
 /*--------------------- Stack / Heap Configuration ---------------------------
 ; <h> Stack / Heap Configuration
 ;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
@@ -32,45 +41,26 @@
 #define __STACK_SIZE    0x00000400
 #define __HEAP_SIZE     0x00000C00
 
-/*--------------------- EventRecorder Configuration --------------------------*/
-; <e> EventRecorder Configuration
-#define __EVT_ENABLE    1
-
-;   <o> Number of Records
-;     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-;     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-;     <65536=>65536
-#define __EVT_RECORDS   64
-
-; </e>
-
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  Stack, Heap and Event Recorder boundary definitions
  *----------------------------------------------------------------------------*/
 #define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-
+#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after previous section, 8 byte aligned */
+#define __RAM_EVR_BASE (AlignExpr(+0, 4))           /* starts after previous section, 4 byte aligned */
 
 /*----------------------------------------------------------------------------
   Scatter File Definitions definition
  *----------------------------------------------------------------------------*/
-#ifdef __EVT_ENABLE
-#define __EVBUF_SIZE   (256 + __EVT_RECORDS*16)
-#define __EVBUF_BASE   (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-#else
-#define __EVBUF_SIZE    0
-#endif
-
 #define __RO_BASE       __ROM_BASE
 #define __RO_SIZE       __ROM_SIZE
 
 #define __RW_BASE       __RAM_BASE
-#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __EVBUF_SIZE)
+#define __RW_SIZE      (__RAM_SIZE - __RAM_EVR_SIZE - __HEAP_SIZE - __STACK_SIZE)
 
 
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
@@ -85,8 +75,8 @@ LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
    .ANY (+RW +ZI)
   }
 
-#ifdef __EVT_ENABLE
-  RW_EVTBUF __EVBUF_BASE UNINIT __EVBUF_SIZE {      ; Uninitialized region for Event Buffer
+#if __RAM_EVR_SIZE > 0
+  RW_EVR __RAM_EVR_BASE UNINIT __RAM_EVR_SIZE {     ; Event Recorder RAM region
     EventRecorder.o (+ZI)
   }
 #endif

CMSIS/RTOS2/RTX/Examples/Migration/RTE/_Simulation/RTE_Components.h

@@ -1,33 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'Blinky' 
- * Target:  'Simulation' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-/*  ARM::CMSIS:RTOS2:Keil RTX5:Library:5.5.2 */
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-/*  ARM::CMSIS:RTOS:Keil RTX5:5.5.2 */
-#define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
-        #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
-/*  Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0 */
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-/*  Keil.ARM Compiler::Compiler:I/O:STDOUT:EVR:1.2.0 */
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-
-#endif /* RTE_COMPONENTS_H */

CMSIS/RTOS2/RTX/Examples/MsgQueue/MsqQueue.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -150,13 +150,13 @@
       </TargetDriverDllRegistry>
       <Breakpoint/>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.7.0</Type>
+        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.3\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.3</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\ARM\PACK\Keil\ARM_Compiler\1.6.2\EventRecorder.scvd</Filename>
-        <Type>Keil.ARM_Compiler.1.6.2</Type>
+        <Filename>D:\GitHub\ARM-software\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.8.0</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>

CMSIS/RTOS2/RTX/Examples/MsgQueue/MsqQueue.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulator</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6130001::V6.13.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.7.0</PackID>
+          <PackID>ARM.CMSIS.5.8.0</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -185,6 +185,7 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -366,8 +367,8 @@
             <noStLib>0</noStLib>
             <RepFail>1</RepFail>
             <useFile>0</useFile>
-            <TextAddressRange>0x00000000</TextAddressRange>
-            <DataAddressRange>0x20000000</DataAddressRange>
+            <TextAddressRange></TextAddressRange>
+            <DataAddressRange></DataAddressRange>
             <pXoBase></pXoBase>
             <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
@@ -428,8 +429,8 @@
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -454,18 +455,18 @@
       </component>
     </components>
     <files>
-      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
+      <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.1">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.1">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.2">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.2" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.3" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -473,31 +474,31 @@
       <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.2"/>
+        <package name="ARM_Compiler" schemaVersion="1.6.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.3"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.3">
         <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.1">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="1"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/CMSIS/RTX_Config.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.0
+ * $Revision:   V5.1.1
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -40,7 +40,7 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
   (void)object_id;
 
   switch (code) {
-    case osRtxErrorStackUnderflow:
+    case osRtxErrorStackOverflow:
       // Stack overflow detected for thread (thread_id=object_id)
       break;
     case osRtxErrorISRQueueOverflow:

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.1
+ * $Revision:   V5.5.2
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -42,7 +42,7 @@
  
 //   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
 //   <i> Defines the combined global dynamic memory size.
-//   <i> Default: 4096
+//   <i> Default: 32768
 #ifndef OS_DYNAMIC_MEM_SIZE
 #define OS_DYNAMIC_MEM_SIZE         4096
 #endif
@@ -69,7 +69,7 @@
  
 //   </e>
  
-//   <o>ISR FIFO Queue 
+//   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
 //     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
@@ -122,16 +122,16 @@
  
 //   <o>Default Thread Stack size [bytes] <96-1073741824:8>
 //   <i> Defines stack size for threads with zero stack size specified.
-//   <i> Default: 256
+//   <i> Default: 3072
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               256
+#define OS_STACK_SIZE               512
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
 //   <i> Defines stack size for Idle thread.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_IDLE_THREAD_STACK_SIZE
-#define OS_IDLE_THREAD_STACK_SIZE   256
+#define OS_IDLE_THREAD_STACK_SIZE   512
 #endif
  
 //   <o>Idle Thread TrustZone Module Identifier
@@ -143,7 +143,7 @@
 #endif
  
 //   <q>Stack overrun checking
-//   <i> Enables stack overrun check at thread switch.
+//   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
 #define OS_STACK_CHECK              1
@@ -156,8 +156,8 @@
 #define OS_STACK_WATERMARK          0
 #endif
  
-//   <o>Processor mode for Thread execution 
-//     <0=> Unprivileged mode 
+//   <o>Processor mode for Thread execution
+//     <0=> Unprivileged mode
 //     <1=> Privileged mode
 //   <i> Default: Privileged mode
 #ifndef OS_PRIVILEGE_MODE
@@ -198,9 +198,9 @@
 //   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
 //   <i> Defines stack size for Timer thread.
 //   <i> May be set to 0 when timers are not used.
-//   <i> Default: 256
+//   <i> Default: 512
 #ifndef OS_TIMER_THREAD_STACK_SIZE
-#define OS_TIMER_THREAD_STACK_SIZE  256
+#define OS_TIMER_THREAD_STACK_SIZE  512
 #endif
  
 //   <o>Timer Thread TrustZone Module Identifier
@@ -367,125 +367,125 @@
 //     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <h>Memory Management
+//       <e.7>Memory Management
 //       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMORY_LEVEL 
-#define OS_EVR_MEMORY_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_MEMORY_LEVEL
+#define OS_EVR_MEMORY_LEVEL         0x81U
 #endif
  
-//       <h>Kernel
+//       <e.7>Kernel
 //       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_KERNEL_LEVEL 
-#define OS_EVR_KERNEL_LEVEL         0x01U
+//       </e>
+#ifndef OS_EVR_KERNEL_LEVEL
+#define OS_EVR_KERNEL_LEVEL         0x81U
 #endif
  
-//       <h>Thread
+//       <e.7>Thread
 //       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THREAD_LEVEL 
-#define OS_EVR_THREAD_LEVEL         0x05U
+//       </e>
+#ifndef OS_EVR_THREAD_LEVEL
+#define OS_EVR_THREAD_LEVEL         0x85U
 #endif
  
-//       <h>Generic Wait
+//       <e.7>Generic Wait
 //       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_WAIT_LEVEL 
-#define OS_EVR_WAIT_LEVEL           0x01U
+//       </e>
+#ifndef OS_EVR_WAIT_LEVEL
+#define OS_EVR_WAIT_LEVEL           0x81U
 #endif
  
-//       <h>Thread Flags
+//       <e.7>Thread Flags
 //       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_THFLAGS_LEVEL 
-#define OS_EVR_THFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_THFLAGS_LEVEL
+#define OS_EVR_THFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Event Flags
+//       <e.7>Event Flags
 //       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_EVFLAGS_LEVEL 
-#define OS_EVR_EVFLAGS_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_EVFLAGS_LEVEL
+#define OS_EVR_EVFLAGS_LEVEL        0x81U
 #endif
  
-//       <h>Timer
+//       <e.7>Timer
 //       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_TIMER_LEVEL 
-#define OS_EVR_TIMER_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_TIMER_LEVEL
+#define OS_EVR_TIMER_LEVEL          0x81U
 #endif
  
-//       <h>Mutex
+//       <e.7>Mutex
 //       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MUTEX_LEVEL 
-#define OS_EVR_MUTEX_LEVEL          0x01U
+//       </e>
+#ifndef OS_EVR_MUTEX_LEVEL
+#define OS_EVR_MUTEX_LEVEL          0x81U
 #endif
  
-//       <h>Semaphore
+//       <e.7>Semaphore
 //       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_SEMAPHORE_LEVEL 
-#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+//       </e>
+#ifndef OS_EVR_SEMAPHORE_LEVEL
+#define OS_EVR_SEMAPHORE_LEVEL      0x81U
 #endif
  
-//       <h>Memory Pool
+//       <e.7>Memory Pool
 //       <i> Recording level for Memory Pool events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MEMPOOL_LEVEL 
-#define OS_EVR_MEMPOOL_LEVEL        0x01U
+//       </e>
+#ifndef OS_EVR_MEMPOOL_LEVEL
+#define OS_EVR_MEMPOOL_LEVEL        0x81U
 #endif
  
-//       <h>Message Queue
+//       <e.7>Message Queue
 //       <i> Recording level for Message Queue events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </h>
-#ifndef OS_EVR_MSGQUEUE_LEVEL 
-#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+//       </e>
+#ifndef OS_EVR_MSGQUEUE_LEVEL
+#define OS_EVR_MSGQUEUE_LEVEL       0x81U
 #endif
  
 //     </h>

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Compiler/EventRecorderConf.h

@@ -26,7 +26,7 @@
 #define EVENT_TIMESTAMP_SOURCE  2
 
 //   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
-//   <i>Defines default time stamp clock frequency (0 when not used)
+//   <i>Defines initial time stamp clock frequency (0 when not used)
 #define EVENT_TIMESTAMP_FREQ    0U
 
 // </h>

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -12,7 +12,7 @@
 ; </h>
  *----------------------------------------------------------------------------*/
 #define __ROM_BASE      0x00000000
-#define __ROM_SIZE      0x00080000
+#define __ROM_SIZE      0x00040000
 
 /*--------------------- Embedded RAM Configuration ---------------------------
 ; <h> RAM Configuration
@@ -21,7 +21,16 @@
 ; </h>
  *----------------------------------------------------------------------------*/
 #define __RAM_BASE      0x20000000
-#define __RAM_SIZE      0x00040000
+#define __RAM_SIZE      0x00020000
+
+/*--------------------- Event Recorder Configuration -------------------------
+; <h> Event Recorder Configuration
+;   <o> Event Recorder RAM Size (in Bytes) <0x0-0xFFFFFFFF:16>
+;   <i> Memory requirement = 256 + (16 x Number_of_Records)
+;   <i> (defined by EVENT_RECORD_COUNT in EventRecorderConf.h)
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_EVR_SIZE  0x00000800
 
 /*--------------------- Stack / Heap Configuration ---------------------------
 ; <h> Stack / Heap Configuration
@@ -29,48 +38,29 @@
 ;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
  *----------------------------------------------------------------------------*/
-#define __STACK_SIZE    0x00000200
+#define __STACK_SIZE    0x00000400
 #define __HEAP_SIZE     0x00000C00
 
-/*--------------------- EventRecorder Configuration --------------------------*/
-; <e> EventRecorder Configuration
-#define __EVT_ENABLE    1
-
-;   <o> Number of Records
-;     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-;     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-;     <65536=>65536
-#define __EVT_RECORDS   64
-
-; </e>
-
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  Stack, Heap and Event Recorder boundary definitions
  *----------------------------------------------------------------------------*/
 #define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-
+#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after previous section, 8 byte aligned */
+#define __RAM_EVR_BASE (AlignExpr(+0, 4))           /* starts after previous section, 4 byte aligned */
 
 /*----------------------------------------------------------------------------
   Scatter File Definitions definition
  *----------------------------------------------------------------------------*/
-#ifdef __EVT_ENABLE
-#define __EVBUF_SIZE   (256 + __EVT_RECORDS*16)
-#define __EVBUF_BASE   (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
-#else
-#define __EVBUF_SIZE    0
-#endif
-
 #define __RO_BASE       __ROM_BASE
 #define __RO_SIZE       __ROM_SIZE
 
 #define __RW_BASE       __RAM_BASE
-#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __EVBUF_SIZE)
+#define __RW_SIZE      (__RAM_SIZE - __RAM_EVR_SIZE - __HEAP_SIZE - __STACK_SIZE)
 
 
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
@@ -85,8 +75,8 @@ LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
    .ANY (+RW +ZI)
   }
 
-#ifdef __EVT_ENABLE
-  RW_EVTBUF __EVBUF_BASE UNINIT __EVBUF_SIZE {      ; Uninitialized region for Event Buffer
+#if __RAM_EVR_SIZE > 0
+  RW_EVR __RAM_EVR_BASE UNINIT __RAM_EVR_SIZE {     ; Event Recorder RAM region
     EventRecorder.o (+ZI)
   }
 #endif

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/_Simulator/RTE_Components.h

@@ -1,31 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'MsqQueue' 
- * Target:  'Simulator' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-/*  ARM::CMSIS:RTOS2:Keil RTX5:Source:5.5.2 */
-#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
-        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-        #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
-/*  Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0 */
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-/*  Keil.ARM Compiler::Compiler:I/O:STDOUT:EVR:1.2.0 */
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-
-#endif /* RTE_COMPONENTS_H */