Overview description about the components clarified

CMSIS/DoxyGen/General/src/introduction.txt

@@ -11,23 +11,22 @@ The CMSIS is defined in close cooperation with various silicon and software vend
 interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the
 combination of software components from multiple middleware vendors.
 
-\section CM_Components Components
-
-| Component | Target processors | Description |
-|-----------|---------------------|-------------|
-|<a href="../../Core/html/index.html"><b>CMSIS-Core(M)</b></a>|   All Cortex-M and SecurCore processors | Standardized API for the Cortex-M processor core and peripherals. It also includes intrinsic functions for Cortex-M4/M7/M33/M35P SIMD instructions.|
-|<a href="../../Core_A/html/index.html"><b>CMSIS-Core(A)</b></a>| Cortex-A5/A7/A9 processors | API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals.|
-|<a href="../../Driver/html/index.html"><b>Driver</b></a>|        All Cortex-M and SecurCore processors | Generic peripheral driver interfaces for middleware, making it reusable across supported devices. The API is RTOS independent and connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.|
-|<a href="../../DSP/html/index.html"><b>DSP</b></a>|              All Cortex-M processors | DSP library collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P.|
-|<a href="../../NN/html/index.html"><b>NN</b></a>|                All Cortex-M processors | Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores.|
-|<a href="../../RTOS/html/index.html"><b>RTOS v1</b></a>|         Cortex-M0/M0+/M3/M4/M7 processors| Common API for real-time operating systems along with a reference implementation based on RTX. It provides a standardized programming interface that is portable to many RTOS and enables software components that can work across multiple RTOS systems.|
-|<a href="../../RTOS2/html/index.html"><b>RTOS v2</b></a>|        All Cortex-M and Cortex-A5/A7/A9 processors | Extends CMSIS-RTOS v1 with support for Armv8-M architecture, dynamic object creation, provisions for multi-core systems, and a binary compatible interface across ABI compliant compilers.|
-|<a href="../../Pack/html/index.html"><b>Pack</b></a>|            All Cortex-M, SecurCore, and Cortex-A5/A7/A9 processors | Describes with an XML-based package description (PDSC) file the user and device relevant parts of a file collection (called a software pack) that includes source, header and library files, documentation, Flash programming algorithms, source code templates, and example projects. Development tools and web infrastructures use the PDSC file to extract device parameters, software components, and evaluation board configurations.|
-|<a href="../../SVD/html/index.html"><b>SVD</b></a>|              All Cortex-M and SecurCore processors | Peripheral description of a device in an XML file that can be used to create peripheral awareness in debuggers or header files with register and interrupt definitions.|
-|<a href="../../DAP/html/index.html"><b>DAP</b></a>|              All Cortex processors | Standardized firmware for a debug unit that connects to the CoreSight Debug Access Port. It is well suited for integration on evaluation boards. |
-|<a href="../../Zone/html/index.html"><b>Zone</b></a>|            All Cortex processors | System resource definition and partitioning. Defines methods to describe system resources and to partition these resources into multiple projects and execution areas.|
-
-\note Refer to \ref CM_Pack_Content for more information on the content of the Software Pack.
+\section CM_Components CMSIS Components
+
+| CMSIS-... | Target Processors   | Description  |
+|:----------|:--------------------|:-------------|
+|<a href="../../Core/html/index.html"><b>Core(M)</b></a>|   All Cortex-M, SecurCore | Standardized API for the Cortex-M processor core and peripherals. Includes intrinsic functions for Cortex-M4/M7/M33/M35P SIMD instructions.|
+|<a href="../../Core_A/html/index.html"><b>Core(A)</b></a>| Cortex-A5/A7/A9 | Standardized API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals.|
+|<a href="../../Driver/html/index.html"><b>Driver</b></a>|  All Cortex-M, SecurCore | Generic peripheral driver interfaces for middleware. Connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.|
+|<a href="../../DSP/html/index.html"><b>DSP</b></a>|        All Cortex-M | DSP library collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P.|
+|<a href="../../NN/html/index.html"><b>NN</b></a>|          All Cortex-M | Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores.|
+|<a href="../../RTOS/html/index.html"><b>RTOS v1</b></a>|   Cortex-M0/M0+/M3/M4/M7 | Common API for real-time operating systems along with a reference implementation based on RTX. It enables software components that can work across multiple RTOS systems.|
+|<a href="../../RTOS2/html/index.html"><b>RTOS v2</b></a>|  All Cortex-M, Cortex-A5/A7/A9 | Extends CMSIS-RTOS v1 with Armv8-M support, dynamic object creation, provisions for multi-core systems, binary compatible interface. |
+|<a href="../../Pack/html/index.html"><b>Pack</b></a>|      All Cortex-M, SecurCore, Cortex-A5/A7/A9 | Describes a delivery mechanism for software components, device parameters, and evaluation board support. It simplifies software re-use and product life-cycle management (PLM). |
+|<a href="../../SVD/html/index.html"><b>SVD</b></a>|        All Cortex-M, SecurCore | Peripheral description of a device that can be used to create peripheral awareness in debuggers or CMSIS-Core header files.|
+|<a href="../../DAP/html/index.html"><b>DAP</b></a>|        All Cortex | Firmware for a debug unit that interfaces to the CoreSight Debug Access Port. |
+|<a href="../../Zone/html/index.html"><b>Zone</b></a>|      All Cortex | Defines methods to describe system resources and to partition these resources into multiple projects and execution areas. |
+
 
 \section Motivation Motivation
 
@@ -108,15 +107,15 @@ with C language standards, specifically warnings that may be generated by the va
 The CMSIS is provided free of charge by Arm under the <a href="LICENSE.txt">Apache 2.0 License</a>.
 
 
-\section CM_Pack_Content ARM::CMSIS Pack
+\section CM_Pack_Content CMSIS Software Pack
 
-The <b>ARM::CMSIS</b> Pack contains the following:
+The CMSIS software components are delivered in CMSIS-Pack format.  The <b>ARM::CMSIS</b> Pack contains the following:
 
 File/Directory    |Content
 :-----------------|:---------------------------------------------------------------------------------
 \b ARM.CMSIS.pdsc |Package description file in CMSIS-Pack format.
 \b LICENSE.txt    |CMSIS License Agreement (Apache 2.0)
-\b CMSIS          |\ref CM_Components "CMSIS components" (see below)
+\b CMSIS          |\ref CM_Components "CMSIS components" (see also table below)
 \b Device         |CMSIS reference implementations of Arm Cortex-M processor based devices
 
 CMSIS Directory
@@ -190,8 +189,8 @@ In addition, each CMSIS component has its own release history:
         - CMSIS-Zone 0.12.0 (preview)
           - Completely reworked
         - Devices
-          - Generalized C startup code for all Cortex-M familiy devices.
-          - Updated Cortex-A memory regions and system config files.
+          - Generalized C startup code for all Cortex-M family devices.
+          - Updated Cortex-A memory regions and system configuration files.
         - Utilities
           - SVDConv 3.3.26
           - PackChk 1.3.82 (unchanged)