CMSIS-DSP: Added arm_correlate_f16

Corrected PythonWrapper issues due to new f16 functions

CMSIS/DSP/Include/dsp/filtering_functions_f16.h

@@ -199,6 +199,21 @@ extern "C"
   const float16_t * pCoeffs,
         float16_t * pState);
 
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst);
+
 #endif /*defined(ARM_FLOAT16_SUPPORTED)*/
 #ifdef   __cplusplus
 }

CMSIS/DSP/PythonWrapper/setup.py

@@ -30,6 +30,7 @@ fastmath.remove(os.path.join(ROOT,"Source","FastMathFunctions","FastMathFunction
 
 filtering = glob.glob(os.path.join(ROOT,"Source","FilteringFunctions","*.c"))
 filtering.remove(os.path.join(ROOT,"Source","FilteringFunctions","FilteringFunctions.c"))
+filtering.remove(os.path.join(ROOT,"Source","FilteringFunctions","FilteringFunctionsF16.c"))
 
 matrix = glob.glob(os.path.join(ROOT,"Source","MatrixFunctions","*.c"))
 matrix.remove(os.path.join(ROOT,"Source","MatrixFunctions","MatrixFunctions.c"))
@@ -39,6 +40,7 @@ statistics.remove(os.path.join(ROOT,"Source","StatisticsFunctions","StatisticsFu
 
 complexf = glob.glob(os.path.join(ROOT,"Source","ComplexMathFunctions","*.c"))
 complexf.remove(os.path.join(ROOT,"Source","ComplexMathFunctions","ComplexMathFunctions.c"))
+complexf.remove(os.path.join(ROOT,"Source","ComplexMathFunctions","ComplexMathFunctionsF16.c"))
 
 basic = glob.glob(os.path.join(ROOT,"Source","BasicMathFunctions","*.c"))
 basic.remove(os.path.join(ROOT,"Source","BasicMathFunctions","BasicMathFunctions.c"))

CMSIS/DSP/Source/FilteringFunctions/CMakeLists.txt

@@ -132,6 +132,7 @@ target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f16.c)
 target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f16.c)
 target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f16.c)
 target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f16.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f16.c)
 endif()
 
 ### Includes

CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c

@@ -32,4 +32,4 @@
 #include "arm_biquad_cascade_df2T_init_f16.c"
 #include "arm_biquad_cascade_stereo_df2T_f16.c"
 #include "arm_biquad_cascade_stereo_df2T_init_f16.c"
-
+#include "arm_correlate_f16.c"

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c

@@ -28,6 +28,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
  */
@@ -485,4 +486,6 @@ void arm_biquad_cascade_df1_f16(
 /**
   @} end of BiquadCascadeDF1 group
  */
-#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#endif /*#if defined(ARM_FLOAT16_SUPPORTED)*/

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c

@@ -28,6 +28,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
  */
@@ -156,3 +157,4 @@ void arm_biquad_cascade_df1_mve_init_f16(arm_biquad_casd_df1_inst_f16 * S,
 /**
   @} end of BiquadCascadeDF1 group
  */
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c

@@ -28,6 +28,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
 */
@@ -490,3 +491,5 @@ LOW_OPTIMIZATION_EXIT
 /**
   @} end of BiquadCascadeDF2T group
  */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c

@@ -28,6 +28,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
  */
@@ -109,3 +110,5 @@ void arm_biquad_cascade_df2T_init_f16(
 /**
   @} end of BiquadCascadeDF2T group
  */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c

@@ -28,6 +28,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
 */
@@ -424,3 +425,5 @@ LOW_OPTIMIZATION_EXIT
 /**
   @} end of BiquadCascadeDF2T group
  */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c

@@ -28,6 +28,8 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
+
 /**
   @ingroup groupFilters
  */
@@ -84,3 +86,5 @@ void arm_biquad_cascade_stereo_df2T_init_f16(
 /**
   @} end of BiquadCascadeDF2T group
  */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c

@@ -0,0 +1,1159 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_f16.c
+ * Description:  Correlation of floating-point sequences
+ *
+ * $Date:        18. March 2020
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Corr Correlation
+
+  Correlation is a mathematical operation that is similar to convolution.
+  As with convolution, correlation uses two signals to produce a third signal.
+  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+  Correlation is commonly used to measure the similarity between two signals.
+  It has applications in pattern recognition, cryptanalysis, and searching.
+  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+  Fast versions of the Q15 and Q31 functions are also provided.
+
+  @par           Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
+                   The convolution of the two signals is denoted by
+  <pre>
+      c[n] = a[n] * b[n]
+  </pre>
+                   In correlation, one of the signals is flipped in time
+  <pre>
+       c[n] = a[n] * b[-n]
+  </pre>
+  @par
+                   and this is mathematically defined as
+                   \image html CorrelateEquation.gif
+  @par
+                   The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
+
+  @note
+                   The <code>pDst</code> should be initialized to all zeros before being used.
+
+  @par           Fixed-Point Behavior
+                   Correlation requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count)                            \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        yVec = vldrhq_f16(&pSrcY[-1]);                                                              \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    k = count % 0x8U;                                                                               \
+    /* use predication to finalize MAC sum */                                                       \
+    /* acc1 requires 1 additional sample  */                                                        \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                               \
+    mve_pred16_t p0 = vctp16q(k+1);                                                      \
+    xVec = vld1q(pSrcX); pSrcX += 8;                                                    \
+    yVec = vldrhq_f16(&pSrcY[-1]);                                                                  \
+    acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec,p0);                                                  \
+    /* acc0 requires exact number of sample  */                                                     \
+    /* disable extra lanes in final MAC computation  */                                             \
+    p0 = vctp16q(k);                                                                     \
+    yVec = vld1q(pSrcY); pSrcY += 8;                                                    \
+    acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec,p0);                                                  \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count)                                                \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   accVec, xVec, yVec;                                                                 \
+    uint16_t    k;                                                                                  \
+                                                                                                    \
+    accVec = vdupq_n_f16(0.0f);                                                                     \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        accVec = vfmaq(accVec, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* Loop with tail predication expected here  */                                                 \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        accVec = vfmaq_m(accVec, xVec, yVec, p0);                                                   \
+    }                                                                                               \
+                                                                                                    \
+  acc = vecAddAcrossF16Mve(accVec);                                                                 \
+}
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, count)              \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, acc2Vec, acc3Vec, xVec, yVec;                                     \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc2Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc3Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vldrhq_f16(&pSrcX[2]);                                                               \
+        acc2Vec = vfmaq_f16(acc2Vec, xVec, yVec);                                                   \
+        xVec = vldrhq_f16(&pSrcX[3]);                                                               \
+        acc3Vec = vfmaq_f16(acc3Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* loop + tail predication expected here  */                                                    \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                             \
+        xVec = vldrhq_f16(&pSrcX[2]);                                                               \
+        acc2Vec = vfmaq_m_f16(acc2Vec, xVec, yVec, p0);                                             \
+        xVec = vldrhq_f16(&pSrcX[3]);                                                               \
+        acc3Vec = vfmaq_m_f16(acc3Vec, xVec, yVec, p0);                                             \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                             \
+    }                                                                                               \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+    acc2 = vecAddAcrossF16Mve(acc2Vec);                                                             \
+    acc3 = vecAddAcrossF16Mve(acc3Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, count)                          \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* loop + tail predication expected here  */                                                    \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;;                                               \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                             \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                             \
+    }                                                                                               \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count)                            \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = (count-1) >> 3;                                                                             \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* use predication to finalize MAC sum */                                                       \
+    /* acc1 requires exact number of sample (count-1)  */                                           \
+    /* disable extra lanes in final MAC computation  */                                             \
+    k = (count-1) % 0x8U;                                                                           \
+    mve_pred16_t p0 = vctp16q(k);                                                        \
+    yVec = vld1q(pSrcY); pSrcY += 8;                                                    \
+    xVec = vldrhq_f16(&pSrcX[1]);                                                                   \
+    acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                                 \
+    /* acc0 requires 1 additional sample  (count) */                                                \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                               \
+    p0 = vctp16q(k+1);                                                                   \
+    xVec = vld1q(pSrcX); pSrcX += 8;                                                    \
+    acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                                 \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+
+
+void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst)
+{
+    float16_t *pIn1 = (float16_t *)pSrcA;                    /* inputA pointer               */
+    float16_t *pIn2 = (float16_t *)pSrcB + (srcBLen - 1U);   /* inputB pointer               */
+    float16_t *pX;
+    float16_t *pY;
+    float16_t *pA;
+    float16_t *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   inv = 2U;         /* Reverse order flag */
+    uint32_t  tot = 0U;         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = (float16_t *)pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = (float16_t *)pSrcA + (srcALen - 1U);
+        /*
+         * Initialisation of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -2;
+
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv / 2;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        float16_t acc0;
+        float16_t acc1;
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for second accumulator
+         * Y pointer is decrementing for second accumulator
+         */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        float16_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        float16_t acc0;
+        float16_t acc1;
+        float16_t acc2;
+        float16_t acc3;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        *pDst = acc2;
+        pDst += incr;
+        *pDst = acc3;
+        pDst += incr;
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        float16_t acc0;
+        float16_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        float16_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, srcBLen);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+
+        uint32_t  count = (i + 1);
+        float16_t acc0;
+        float16_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for second accumulator
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        float16_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+}
+
+#else
+void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst)
+{
+
+#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE)
+  
+  const float16_t *pIn1;                               /* InputA pointer */
+  const float16_t *pIn2;                               /* InputB pointer */
+        float16_t *pOut = pDst;                        /* Output pointer */
+  const float16_t *px;                                 /* Intermediate inputA pointer */
+  const float16_t *py;                                 /* Intermediate inputB pointer */
+  const float16_t *pSrc1;
+        float16_t sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+    float16_t acc0, acc1, acc2, acc3,c0;                    /* Accumulators */
+    float16_t x0, x1, x2, x3;                        /* temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we assume zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding has to be done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += *px++ * *py++;
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += *px++ * *py++;
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += *px++ * *py++;
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py++);
+        /* Read x[3] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[3] * y[0] */
+        acc3 += x3 * c0;
+
+        /* Read y[1] sample */
+        c0 = *(py++);
+        /* Read x[4] sample */
+        x0 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += x1 * c0;
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += x2 * c0;
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += x3 * c0;
+        /* acc3 +=  x[4] * y[1] */
+        acc3 += x0 * c0;
+
+        /* Read y[2] sample */
+        c0 = *(py++);
+        /* Read x[5] sample */
+        x1 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += x2 * c0;
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += x3 * c0;
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += x0 * c0;
+        /* acc3 +=  x[5] * y[2] */
+        acc3 += x1 * c0;
+
+        /* Read y[3] sample */
+        c0 = *(py++);
+        /* Read x[6] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[3] */
+        acc0 += x3 * c0;
+        /* acc1 +=  x[4] * y[3] */
+        acc1 += x0 * c0;
+        /* acc2 +=  x[5] * y[3] */
+        acc2 += x1 * c0;
+        /* acc3 +=  x[6] * y[3] */
+        acc3 += x2 * c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+        /* Read x[7] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[7] * y[4] */
+        acc3 += x3 * c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = acc0;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = acc1;
+      pOut += inc;
+
+      *pOut = acc2;
+      pOut += inc;
+
+      *pOut = acc3;
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+      /* Loop over srcBLen */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float16_t *pIn1 = pSrcA;                       /* inputA pointer */
+  const float16_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
+        float16_t sum;                                 /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we assume zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+
+  }
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if ((((i - j) < srcBLen) && (j < srcALen)))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = sum;
+    else
+      *pDst++ = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Corr group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c

@@ -25,6 +25,7 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
 /**
   @ingroup groupFilters
  */
@@ -850,3 +851,5 @@ void arm_fir_f16(
 /**
 * @} end of FIR group
 */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c

@@ -25,6 +25,8 @@
 
 #include "dsp/filtering_functions_f16.h"
 
+#if defined(ARM_FLOAT16_SUPPORTED)
+
 /**
   @ingroup groupFilters
  */
@@ -84,3 +86,5 @@ void arm_fir_init_f16(
 /**
   @} end of FIR group
  */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

CMSIS/DSP/Testing/CMakeLists.txt

@@ -330,6 +330,7 @@ set(TESTSRC16
   Source/Tests/ComplexTestsF16.cpp
   Source/Tests/FIRF16.cpp
   Source/Tests/BIQUADF16.cpp
+  Source/Tests/MISCF16.cpp
   Source/Tests/TransformCF16.cpp
   Source/Tests/TransformRF16.cpp
   )

CMSIS/DSP/Testing/Include/Tests/MISCF16.h

@@ -0,0 +1,26 @@
+#include "Test.h"
+#include "Pattern.h"
+
+#include "dsp/filtering_functions_f16.h"
+
+class MISCF16:public Client::Suite
+    {
+        public:
+            MISCF16(Testing::testID_t id);
+            virtual void setUp(Testing::testID_t,std::vector<Testing::param_t>& paramsArgs,Client::PatternMgr *mgr);
+            virtual void tearDown(Testing::testID_t,Client::PatternMgr *mgr);
+        private:
+            #include "MISCF16_decl.h"
+            
+            Client::Pattern<float16_t> inputA;
+            Client::Pattern<float16_t> inputB;
+
+            Client::LocalPattern<float16_t> output;
+
+            // Reference patterns are not loaded when we are in dump mode
+            Client::RefPattern<float16_t> ref;
+
+            int nba,nbb;
+
+           
+    };

CMSIS/DSP/Testing/PatternGeneration/Convolutions.py

@@ -84,6 +84,7 @@ def generatePatterns():
     PARAMDIR = os.path.join("Parameters","DSP","Filtering","MISC","MISC")
     
     configf32=Tools.Config(PATTERNDIR,PARAMDIR,"f32")
+    configf16=Tools.Config(PATTERNDIR,PARAMDIR,"f16")
     configq31=Tools.Config(PATTERNDIR,PARAMDIR,"q31")
     configq15=Tools.Config(PATTERNDIR,PARAMDIR,"q15")
     configq7=Tools.Config(PATTERNDIR,PARAMDIR,"q7")
@@ -91,6 +92,7 @@ def generatePatterns():
     
     
     writeTests(configf32,0)
+    writeTests(configf16,16)
     writeTests(configq31,31)
     writeTests(configq15,15)
     writeTests(configq7,7)

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/InputsA1_f16.txt

@@ -0,0 +1,258 @@
+H
+128
+// 0.340622
+0x3573
+// -0.227407
+0xb347
+// -0.515464
+0xb820
+// 0.892655
+0x3b24
+// -0.189715
+0xb212
+// 0.940616
+0x3b86
+// 0.672306
+0x3961
+// -0.448410
+0xb72d
+// -0.295140
+0xb4b9
+// -0.129777
+0xb027
+// 0.660682
+0x3949
+// -0.008834
+0xa086
+// -0.007387
+0x9f90
+// 0.286796
+0x3497
+// -0.372377
+0xb5f5
+// 0.621302
+0x38f8
+// -0.115995
+0xaf6c
+// 0.273750
+0x3461
+// 0.423841
+0x36c8
+// 0.601498
+0x38d0
+// -0.059867
+0xabaa
+// -0.414254
+0xb6a1
+// 0.241672
+0x33bc
+// -0.712147
+0xb9b2
+// 0.019938
+0x251b
+// -0.165622
+0xb14d
+// -0.118033
+0xaf8e
+// -0.320881
+0xb522
+// -0.115285
+0xaf61
+// -0.435167
+0xb6f6
+// -0.182534
+0xb1d7
+// -0.132633
+0xb03f
+// -0.190217
+0xb216
+// -0.007244
+0x9f6b
+// -0.039341
+0xa909
+// 0.029661
+0x2798
+// 0.033063
+0x283b
+// 0.067484
+0x2c52
+// -0.160952
+0xb127
+// 0.010318
+0x2148
+// -0.524174
+0xb832
+// 0.724197
+0x39cb
+// 0.059337
+0x2b98
+// 0.772674
+0x3a2e
+// 0.044204
+0x29a8
+// -0.263569
+0xb438
+// -0.160553
+0xb123
+// -0.050946
+0xaa85
+// 0.209983
+0x32b8
+// -0.078044
+0xacff
+// 0.602130
+0x38d1
+// 0.020729
+0x254e
+// -0.222715
+0xb320
+// -0.013897
+0xa31d
+// 0.325168
+0x3534
+// -0.253618
+0xb40f
+// -0.581592
+0xb8a7
+// -0.284873
+0xb48f
+// -0.118716
+0xaf99
+// 0.674454
+0x3965
+// 0.391677
+0x3644
+// 0.016408
+0x2433
+// 0.662811
+0x394d
+// -0.125955
+0xb008
+// 0.401873
+0x366e
+// -0.353277
+0xb5a7
+// 0.669982
+0x395c
+// -0.163018
+0xb137
+// -0.513958
+0xb81d
+// -0.068937
+0xac69
+// 0.604989
+0x38d7
+// 0.043179
+0x2987
+// -1.000000
+0xbc00
+// 0.354507
+0x35ac
+// 0.706231
+0x39a6
+// -0.216590
+0xb2ee
+// 0.135466
+0x3056
+// -0.587217
+0xb8b3
+// 0.213353
+0x32d4
+// -0.076433
+0xace4
+// -0.325923
+0xb537
+// -0.695890
+0xb991
+// -0.011890
+0xa216
+// -0.578996
+0xb8a2
+// -0.453816
+0xb743
+// -0.785133
+0xba48
+// 0.222415
+0x331e
+// 0.515223
+0x381f
+// -0.223109
+0xb324
+// 0.377762
+0x360b
+// 0.140552
+0x307f
+// -0.380609
+0xb617
+// -0.247305
+0xb3ea
+// -0.344871
+0xb585
+// 0.239562
+0x33aa
+// 0.332539
+0x3552
+// -0.298581
+0xb4c7
+// -0.297075
+0xb4c1
+// 0.308658
+0x34f0
+// -0.039180
+0xa904
+// -0.113483
+0xaf43
+// -0.803992
+0xba6f
+// -0.209725
+0xb2b6
+// -0.271465
+0xb458
+// 0.366596
+0x35de
+// -0.576058
+0xb89c
+// 0.142895
+0x3093
+// 0.552480
+0x386b
+// -0.213924
+0xb2d8
+// 0.306342
+0x34e7
+// 0.173666
+0x318f
+// -0.404682
+0xb67a
+// 0.033927
+0x2858
+// 0.183183
+0x31dd
+// -0.188659
+0xb209
+// 0.072121
+0x2c9e
+// 0.297977
+0x34c5
+// 0.295418
+0x34ba
+// -0.374343
+0xb5fd
+// 0.000437
+0xf2a
+// -0.270254
+0xb453
+// 0.396598
+0x3658
+// -0.088016
+0xada2
+// -0.210870
+0xb2bf
+// -0.152312
+0xb0e0
+// -0.156813
+0xb105
+// -0.263861
+0xb439
+// 0.405236
+0x367c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/InputsB1_f16.txt

@@ -0,0 +1,258 @@
+H
+128
+// -0.030993
+0xa7ef
+// -0.022748
+0xa5d3
+// -0.407469
+0xb685
+// -0.158555
+0xb113
+// 0.179325
+0x31bd
+// 0.000288
+0xcb6
+// -0.038564
+0xa8f0
+// 0.368489
+0x35e5
+// 0.188580
+0x3209
+// 0.425507
+0x36cf
+// 0.324898
+0x3533
+// -0.215978
+0xb2e9
+// 0.598857
+0x38ca
+// -0.182158
+0xb1d4
+// 0.563770
+0x3883
+// 0.175778
+0x31a0
+// 0.267701
+0x3449
+// 0.011384
+0x21d4
+// 0.184171
+0x31e5
+// 0.229899
+0x335b
+// -0.284547
+0xb48e
+// -0.103260
+0xae9c
+// -0.481268
+0xb7b3
+// -0.359327
+0xb5c0
+// -0.389570
+0xb63c
+// 0.450676
+0x3736
+// 0.438589
+0x3704
+// -0.247025
+0xb3e8
+// 0.001367
+0x159a
+// -0.123955
+0xafef
+// 0.171363
+0x317c
+// 0.018035
+0x249e
+// -0.111140
+0xaf1d
+// 0.596386
+0x38c5
+// -0.240819
+0xb3b5
+// 0.262110
+0x3432
+// -0.040359
+0xa92a
+// 0.118253
+0x2f91
+// 0.478952
+0x37aa
+// 0.292341
+0x34ad
+// -0.090998
+0xadd3
+// 1.000000
+0x3c00
+// 0.439994
+0x370a
+// 0.127792
+0x3017
+// 0.256514
+0x341b
+// -0.411546
+0xb696
+// -0.270579
+0xb454
+// -0.094844
+0xae12
+// -0.277385
+0xb470
+// 0.085816
+0x2d7e
+// -0.620058
+0xb8f6
+// 0.328524
+0x3542
+// 0.973036
+0x3bc9
+// -0.091538
+0xaddc
+// -0.077481
+0xacf5
+// -0.431215
+0xb6e6
+// 0.080087
+0x2d20
+// -0.249511
+0xb3fc
+// 0.092997
+0x2df4
+// -0.447848
+0xb72a
+// 0.074393
+0x2cc3
+// -0.318269
+0xb518
+// 0.284077
+0x348c
+// -0.214545
+0xb2de
+// -0.363599
+0xb5d1
+// 0.023178
+0x25ef
+// 0.223073
+0x3323
+// 0.001624
+0x16a7
+// -0.927924
+0xbb6c
+// -0.394556
+0xb650
+// 0.255266
+0x3416
+// 0.725100
+0x39cd
+// 0.030921
+0x27ea
+// -0.226455
+0xb33f
+// -0.672542
+0xb961
+// -0.039536
+0xa910
+// 0.037230
+0x28c4
+// -0.027362
+0xa701
+// 0.098771
+0x2e52
+// 0.334802
+0x355b
+// -0.120869
+0xafbc
+// -0.191666
+0xb222
+// -0.126414
+0xb00c
+// 0.144723
+0x30a2
+// -0.482907
+0xb7ba
+// -0.044891
+0xa9bf
+// -0.095741
+0xae21
+// -0.093989
+0xae04
+// -0.062294
+0xabf9
+// -0.419416
+0xb6b6
+// 0.278193
+0x3473
+// 0.170130
+0x3172
+// 0.267851
+0x3449
+// -0.018898
+0xa4d7
+// 0.647042
+0x392d
+// 0.140092
+0x307c
+// -0.188002
+0xb204
+// 0.162484
+0x3133
+// 0.005918
+0x1e0f
+// 0.218990
+0x3302
+// 0.092384
+0x2dea
+// 0.034310
+0x2864
+// 0.104541
+0x2eb1
+// -0.282541
+0xb485
+// -0.429526
+0xb6df
+// -0.337030
+0xb564
+// -0.217148
+0xb2f3
+// -0.746303
+0xb9f8
+// -0.068858
+0xac68
+// -0.182200
+0xb1d5
+// 0.061501
+0x2bdf
+// -0.060396
+0xabbb
+// 0.317688
+0x3515
+// 0.022026
+0x25a3
+// -0.043125
+0xa985
+// -0.274423
+0xb464
+// 0.630400
+0x390b
+// 0.170721
+0x3177
+// 0.256519
+0x341b
+// 0.297494
+0x34c3
+// -0.216101
+0xb2ea
+// -0.531103
+0xb840
+// 0.271934
+0x345a
+// 0.366601
+0x35de
+// -0.390298
+0xb63f
+// -0.068130
+0xac5c
+// 0.022945
+0x25e0
+// 0.199254
+0x3260

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference10_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// -0.093463
+0xadfb
+// 0.374052
+0x35fc
+// -0.199268
+0xb260
+// -0.187599
+0xb201
+// 0.326663
+0x353a
+// 0.029097
+0x2773
+// -0.314875
+0xb50a
+// 0.072973
+0x2cac
+// -0.023351
+0xa5fa
+// 0.005880
+0x1e05
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference11_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference12_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.029153
+0xa777

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference13_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.015517
+0xa3f2
+// -0.029153
+0xa777

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference14_f16.txt

@@ -0,0 +1,32 @@
+H
+15
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.290389
+0x34a5
+// 0.029367
+0x2785
+// -0.146199
+0xb0ae
+// -0.076166
+0xace0
+// -0.406623
+0xb682
+// -0.015517
+0xa3f2
+// -0.029153
+0xa777
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference15_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.774291
+0x3a32
+// -0.021886
+0xa59a
+// 0.159007
+0x3117
+// 0.290389
+0x34a5
+// 0.029367
+0x2785
+// -0.146199
+0xb0ae
+// -0.076166
+0xace0
+// -0.406623
+0xb682
+// -0.015517
+0xa3f2
+// -0.029153
+0xa777
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference16_f16.txt

@@ -0,0 +1,36 @@
+H
+17
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference17_f16.txt

@@ -0,0 +1,36 @@
+H
+17
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.044446
+0xa9b0
+// -0.010637
+0xa172
+// 0.020612
+0x2547
+// 0.009147
+0x20af

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference18_f16.txt

@@ -0,0 +1,36 @@
+H
+17
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.289462
+0xb4a2
+// 0.138267
+0x306d
+// 0.109624
+0x2f04
+// 0.020612
+0x2547
+// 0.009147
+0x20af

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference19_f16.txt

@@ -0,0 +1,36 @@
+H
+17
+// 0.000000
+0x0
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.538126
+0x384e
+// -0.161794
+0xb12d
+// -0.237469
+0xb399
+// 0.055648
+0x2b1f
+// -0.593716
+0xb8c0
+// -0.271290
+0xb457
+// 0.185063
+0x31ec
+// 0.109624
+0x2f04
+// 0.020612
+0x2547
+// 0.009147
+0x20af

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference1_f16.txt

@@ -0,0 +1,16 @@
+H
+7
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference20_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.992722
+0x3bf1
+// 0.118497
+0x2f95
+// -0.000901
+0x9362
+// 0.327981
+0x353f
+// -0.217451
+0xb2f5
+// -0.237469
+0xb399
+// 0.055648
+0x2b1f
+// -0.593716
+0xb8c0
+// -0.271290
+0xb457
+// 0.185063
+0x31ec
+// 0.109624
+0x2f04
+// 0.020612
+0x2547
+// 0.009147
+0x20af
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference21_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference22_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.044446
+0xa9b0
+// -0.010637
+0xa172
+// 0.020612
+0x2547
+// 0.012100
+0x2232
+// 0.004022
+0x1c1e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference23_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.289462
+0xb4a2
+// 0.138267
+0x306d
+// 0.109624
+0x2f04
+// 0.073492
+0x2cb4
+// 0.012100
+0x2232
+// 0.004022
+0x1c1e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference24_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.538126
+0x384e
+// -0.161794
+0xb12d
+// -0.237469
+0xb399
+// 0.007827
+0x2002
+// -0.588712
+0xb8b6
+// -0.271327
+0xb457
+// 0.161790
+0x312d
+// 0.130201
+0x302b
+// 0.073492
+0x2cb4
+// 0.012100
+0x2232
+// 0.004022
+0x1c1e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference25_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.992722
+0x3bf1
+// 0.118497
+0x2f95
+// -0.000901
+0x9362
+// 0.285817
+0x3493
+// -0.272672
+0xb45d
+// -0.261942
+0xb431
+// 0.007827
+0x2002
+// -0.588712
+0xb8b6
+// -0.271327
+0xb457
+// 0.161790
+0x312d
+// 0.130201
+0x302b
+// 0.073492
+0x2cb4
+// 0.012100
+0x2232
+// 0.004022
+0x1c1e
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference26_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference27_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.044446
+0xa9b0
+// -0.010637
+0xa172
+// 0.020612
+0x2547
+// 0.012100
+0x2232
+// -0.011007
+0xa1a3
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference28_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.289462
+0xb4a2
+// 0.138267
+0x306d
+// 0.109624
+0x2f04
+// 0.073492
+0x2cb4
+// -0.257108
+0xb41d
+// -0.011007
+0xa1a3
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference29_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.538126
+0x384e
+// -0.161794
+0xb12d
+// -0.237469
+0xb399
+// 0.007827
+0x2002
+// -0.345258
+0xb586
+// -0.296806
+0xb4c0
+// 0.161980
+0x312f
+// 0.248678
+0x33f5
+// -0.031263
+0xa800
+// -0.257108
+0xb41d
+// -0.011007
+0xa1a3
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference2_f16.txt

@@ -0,0 +1,16 @@
+H
+7
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.027666
+0xa715

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference30_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.992722
+0x3bf1
+// 0.118497
+0x2f95
+// -0.000901
+0x9362
+// 0.285817
+0x3493
+// -0.058018
+0xab6d
+// 0.019182
+0x24e9
+// 0.132418
+0x303d
+// -0.345258
+0xb586
+// -0.296806
+0xb4c0
+// 0.161980
+0x312f
+// 0.248678
+0x33f5
+// -0.031263
+0xa800
+// -0.257108
+0xb41d
+// -0.011007
+0xa1a3
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference31_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference32_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.044446
+0xa9b0
+// -0.010637
+0xa172
+// 0.020612
+0x2547
+// 0.012100
+0x2232
+// -0.011007
+0xa1a3
+// -0.020276
+0xa531
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference33_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.289462
+0xb4a2
+// 0.138267
+0x306d
+// 0.109624
+0x2f04
+// 0.073492
+0x2cb4
+// -0.257108
+0xb41d
+// -0.007408
+0x9f96
+// -0.020276
+0xa531
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference34_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.538126
+0x384e
+// -0.161794
+0xb12d
+// -0.237469
+0xb399
+// 0.007827
+0x2002
+// -0.345258
+0xb586
+// -0.300061
+0xb4cd
+// 0.162321
+0x3132
+// 0.248675
+0x33f5
+// -0.032847
+0xa834
+// -0.255707
+0xb417
+// -0.007408
+0x9f96
+// -0.020276
+0xa531
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference35_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// 0.000000
+0x0
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.992722
+0x3bf1
+// 0.118497
+0x2f95
+// -0.000901
+0x9362
+// 0.285817
+0x3493
+// -0.058018
+0xab6d
+// 0.016312
+0x242d
+// 0.128660
+0x301e
+// -0.346924
+0xb58d
+// -0.300061
+0xb4cd
+// 0.162321
+0x3132
+// 0.248675
+0x33f5
+// -0.032847
+0xa834
+// -0.255707
+0xb417
+// -0.007408
+0x9f96
+// -0.020276
+0xa531
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference36_f16.txt

@@ -0,0 +1,52 @@
+H
+25
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e
+// 0.000274
+0xc7c
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference37_f16.txt

@@ -0,0 +1,52 @@
+H
+25
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// -0.015517
+0xa3f2
+// -0.044446
+0xa9b0
+// -0.010637
+0xa172
+// 0.020612
+0x2547
+// 0.012100
+0x2232
+// -0.011007
+0xa1a3
+// -0.020276
+0xa531
+// 0.000442
+0xf3d
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference38_f16.txt

@@ -0,0 +1,52 @@
+H
+25
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.406623
+0xb682
+// -0.289462
+0xb4a2
+// 0.138267
+0x306d
+// 0.109624
+0x2f04
+// 0.073492
+0x2cb4
+// -0.257108
+0xb41d
+// -0.007408
+0x9f96
+// -0.017266
+0xa46c
+// 0.000442
+0xf3d
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference39_f16.txt

@@ -0,0 +1,52 @@
+H
+25
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// 0.159007
+0x3117
+// 0.538126
+0x384e
+// -0.161794
+0xb12d
+// -0.237469
+0xb399
+// 0.007827
+0x2002
+// -0.345258
+0xb586
+// -0.300061
+0xb4cd
+// 0.159599
+0x311b
+// 0.248960
+0x33f7
+// -0.032849
+0xa834
+// -0.257032
+0xb41d
+// -0.006236
+0x9e63
+// -0.017266
+0xa46c
+// 0.000442
+0xf3d
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference3_f16.txt

@@ -0,0 +1,16 @@
+H
+7
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// -0.004330
+0x9c6f
+// -0.027666
+0xa715

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference40_f16.txt

@@ -0,0 +1,52 @@
+H
+25
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.124053
+0x2ff0
+// 0.212141
+0x32ca
+// 0.992722
+0x3bf1
+// 0.118497
+0x2f95
+// -0.000901
+0x9362
+// 0.285817
+0x3493
+// -0.058018
+0xab6d
+// 0.016312
+0x242d
+// 0.126260
+0x300a
+// -0.350067
+0xb59a
+// -0.301454
+0xb4d3
+// 0.159599
+0x311b
+// 0.248960
+0x33f7
+// -0.032849
+0xa834
+// -0.257032
+0xb41d
+// -0.006236
+0x9e63
+// -0.017266
+0xa46c
+// 0.000442
+0xf3d
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference41_f16.txt

@@ -0,0 +1,10 @@
+H
+4
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference42_f16.txt

@@ -0,0 +1,12 @@
+H
+5
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.020306
+0xa533

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference43_f16.txt

@@ -0,0 +1,14 @@
+H
+6
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.189730
+0x3212
+// -0.363730
+0xb5d2

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference44_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.286868
+0x3497
+// -0.322682
+0xb52a
+// -0.247172
+0xb3e9
+// 0.294212
+0x34b5
+// -0.063662
+0xac13
+// -0.224368
+0xb32e
+// 0.328933
+0x3543

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference45_f16.txt

@@ -0,0 +1,30 @@
+H
+14
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.286868
+0x3497
+// -0.322682
+0xb52a
+// -0.247172
+0xb3e9
+// 0.294212
+0x34b5
+// 0.000573
+0x10b1
+// -0.122315
+0xafd4
+// 0.245631
+0x33dc
+// -0.124881
+0xaffe
+// 0.212357
+0x32cc
+// 0.290022
+0x34a4

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference46_f16.txt

@@ -0,0 +1,12 @@
+H
+5
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference47_f16.txt

@@ -0,0 +1,14 @@
+H
+6
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// 0.004316
+0x1c6b

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference48_f16.txt

@@ -0,0 +1,16 @@
+H
+7
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.359414
+0xb5c0
+// 0.077303
+0x2cf3

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference49_f16.txt

@@ -0,0 +1,26 @@
+H
+12
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.318366
+0xb518
+// -0.169869
+0xb170
+// 0.324293
+0x3530
+// -0.097682
+0xae40
+// -0.224422
+0xb32e
+// 0.336250
+0x3561
+// -0.069908
+0xac79

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference4_f16.txt

@@ -0,0 +1,32 @@
+H
+15
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.129360
+0xb024
+// -0.194916
+0xb23d
+// 0.326718
+0x353a
+// 0.063118
+0x2c0a
+// -0.344956
+0xb585
+// -0.004330
+0x9c6f
+// -0.027666
+0xa715
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference50_f16.txt

@@ -0,0 +1,32 @@
+H
+15
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.318366
+0xb518
+// -0.169869
+0xb170
+// 0.324293
+0x3530
+// -0.033448
+0xa848
+// -0.122370
+0xafd5
+// 0.252947
+0x340c
+// -0.194789
+0xb23c
+// 0.176581
+0x31a7
+// 0.209297
+0x32b3
+// -0.061638
+0xabe4

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference51_f16.txt

@@ -0,0 +1,14 @@
+H
+6
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference52_f16.txt

@@ -0,0 +1,16 @@
+H
+7
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.021397
+0xa57a

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference53_f16.txt

@@ -0,0 +1,18 @@
+H
+8
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.055906
+0x2b28
+// -0.383272
+0xb622

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference54_f16.txt

@@ -0,0 +1,28 @@
+H
+13
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.191266
+0xb21f
+// -0.058980
+0xab8d
+// -0.246822
+0xb3e6
+// -0.055746
+0xab23
+// 0.336520
+0x3562
+// -0.106182
+0xaecc
+// 0.346607
+0x358c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference55_f16.txt

@@ -0,0 +1,34 @@
+H
+16
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.191266
+0xb21f
+// -0.058980
+0xab8d
+// -0.182587
+0xb1d8
+// 0.046307
+0x29ed
+// 0.253218
+0x340d
+// -0.231063
+0xb365
+// 0.523187
+0x382f
+// 0.386679
+0x3630
+// 0.338601
+0x356b
+// 0.305605
+0x34e4

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference56_f16.txt

@@ -0,0 +1,20 @@
+H
+9
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference57_f16.txt

@@ -0,0 +1,22 @@
+H
+10
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.042234
+0xa968
+// -0.001396
+0x95b8
+// 0.019348
+0x24f4
+// 0.006714
+0x1ee0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference58_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.035069
+0x287d
+// -0.384668
+0xb628
+// -0.254596
+0xb413
+// 0.189427
+0x3210
+// 0.120261
+0x2fb2

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference59_f16.txt

@@ -0,0 +1,34 @@
+H
+16
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.501418
+0xb803
+// 0.027084
+0x26ef
+// 0.648440
+0x3930
+// -0.139604
+0xb078
+// 0.267624
+0x3448
+// 0.264945
+0x343d
+// -0.153852
+0xb0ec
+// -0.108756
+0xaef6

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference5_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// 0.110667
+0x2f15
+// 0.071053
+0x2c8c
+// -0.200002
+0xb266
+// 0.153319
+0x30e8
+// 0.185692
+0x31f1
+// -0.012738
+0xa286
+// 0.409829
+0x368f
+// -0.129360
+0xb024
+// -0.194916
+0xb23d
+// 0.326718
+0x353a
+// 0.063118
+0x2c0a
+// -0.344956
+0xb585
+// -0.004330
+0x9c6f
+// -0.027666
+0xa715
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference60_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.437183
+0xb6ff
+// 0.129137
+0x3022
+// 0.565137
+0x3885
+// -0.264485
+0xb43b
+// 0.444205
+0x371b
+// 0.651624
+0x3937
+// 0.311532
+0x34fc
+// 0.398359
+0x3660
+// -0.028028
+0xa72d
+// -0.271272
+0xb457
+// -0.095891
+0xae23

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference61_f16.txt

@@ -0,0 +1,22 @@
+H
+10
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference62_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.042234
+0xa968
+// -0.001396
+0x95b8
+// 0.019348
+0x24f4
+// 0.010736
+0x217f
+// 0.002952
+0x1a0c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference63_f16.txt

@@ -0,0 +1,26 @@
+H
+12
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.035069
+0x287d
+// -0.384668
+0xb628
+// -0.254596
+0xb413
+// 0.193449
+0x3231
+// 0.123213
+0x2fe3
+// 0.052880
+0x2ac5

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference64_f16.txt

@@ -0,0 +1,36 @@
+H
+17
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.501418
+0xb803
+// 0.031106
+0x27f7
+// 0.651392
+0x3936
+// -0.086724
+0xad8d
+// 0.288201
+0x349c
+// 0.241673
+0x33bc
+// -0.153889
+0xb0ed
+// -0.103751
+0xaea4
+// -0.047821
+0xaa1f

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference65_f16.txt

@@ -0,0 +1,42 @@
+H
+20
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.437183
+0xb6ff
+// 0.133159
+0x3043
+// 0.568089
+0x388b
+// -0.211605
+0xb2c5
+// 0.464782
+0x3770
+// 0.628351
+0x3907
+// 0.311495
+0x34fc
+// 0.403363
+0x3674
+// -0.075849
+0xacdb
+// -0.295745
+0xb4bb
+// -0.151111
+0xb0d6
+// -0.042164
+0xa966

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference66_f16.txt

@@ -0,0 +1,24 @@
+H
+11
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference67_f16.txt

@@ -0,0 +1,26 @@
+H
+12
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.042234
+0xa968
+// -0.001396
+0x95b8
+// 0.019348
+0x24f4
+// 0.010736
+0x217f
+// -0.017525
+0xa47c
+// -0.015029
+0xa3b2

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference68_f16.txt

@@ -0,0 +1,28 @@
+H
+13
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.035069
+0x287d
+// -0.384668
+0xb628
+// -0.254596
+0xb413
+// 0.193449
+0x3231
+// 0.102736
+0x2e93
+// 0.037851
+0x28d8
+// -0.269208
+0xb44f

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference69_f16.txt

@@ -0,0 +1,38 @@
+H
+18
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.501418
+0xb803
+// 0.031106
+0x27f7
+// 0.630915
+0x390c
+// -0.101754
+0xae83
+// 0.018994
+0x24dd
+// 0.136919
+0x3062
+// -0.035413
+0xa888
+// -0.103561
+0xaea1
+// -0.073300
+0xacb1
+// 0.243454
+0x33ca

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference6_f16.txt

@@ -0,0 +1,20 @@
+H
+9
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference70_f16.txt

@@ -0,0 +1,44 @@
+H
+21
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.437183
+0xb6ff
+// 0.133159
+0x3043
+// 0.547613
+0x3862
+// -0.226634
+0xb341
+// 0.195574
+0x3242
+// 0.523597
+0x3830
+// 0.429972
+0x36e1
+// 0.403553
+0x3675
+// -0.101328
+0xae7c
+// -0.052291
+0xaab1
+// -0.026520
+0xa6ca
+// 0.238960
+0x33a6
+// 0.214654
+0x32de

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference71_f16.txt

@@ -0,0 +1,26 @@
+H
+12
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e
+// 0.000274
+0xc7c

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference72_f16.txt

@@ -0,0 +1,28 @@
+H
+13
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.042234
+0xa968
+// -0.001396
+0x95b8
+// 0.019348
+0x24f4
+// 0.010736
+0x217f
+// -0.017525
+0xa47c
+// -0.014755
+0xa38e
+// 0.000201
+0xa96

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference73_f16.txt

@@ -0,0 +1,30 @@
+H
+14
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.035069
+0x287d
+// -0.384668
+0xb628
+// -0.254596
+0xb413
+// 0.193449
+0x3231
+// 0.102736
+0x2e93
+// 0.038125
+0x28e1
+// -0.269007
+0xb44e
+// 0.003599
+0x1b5f

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference74_f16.txt

@@ -0,0 +1,40 @@
+H
+19
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.501418
+0xb803
+// 0.031106
+0x27f7
+// 0.630915
+0x390c
+// -0.101480
+0xae7f
+// 0.019195
+0x24ea
+// 0.140518
+0x307f
+// -0.034012
+0xa85b
+// -0.105145
+0xaebb
+// -0.073303
+0xacb1
+// 0.243794
+0x33cd
+// -0.003255
+0x9aab

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference75_f16.txt

@@ -0,0 +1,46 @@
+H
+22
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.437183
+0xb6ff
+// 0.133159
+0x3043
+// 0.547613
+0x3862
+// -0.226361
+0xb33e
+// 0.195775
+0x3244
+// 0.527197
+0x3838
+// 0.431373
+0x36e7
+// 0.401969
+0x366e
+// -0.101331
+0xae7c
+// -0.051951
+0xaaa6
+// -0.029775
+0xa79f
+// 0.237295
+0x3398
+// 0.210896
+0x32c0
+// -0.002870
+0x99e1

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference76_f16.txt

@@ -0,0 +1,28 @@
+H
+13
+// -0.010557
+0xa168
+// 0.007048
+0x1f38
+// 0.015976
+0x2417
+// -0.027666
+0xa715
+// 0.005880
+0x1e05
+// -0.029153
+0xa777
+// -0.020837
+0xa556
+// 0.013898
+0x231e
+// 0.009147
+0x20af
+// 0.004022
+0x1c1e
+// -0.020477
+0xa53e
+// 0.000274
+0xc7c
+// 0.000229
+0xb80

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference77_f16.txt

@@ -0,0 +1,30 @@
+H
+14
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// 0.021149
+0x256a
+// -0.015940
+0xa415
+// -0.014426
+0xa363
+// -0.024837
+0xa65c
+// -0.042234
+0xa968
+// -0.001396
+0x95b8
+// 0.019348
+0x24f4
+// 0.010736
+0x217f
+// -0.017525
+0xa47c
+// -0.014755
+0xa38e
+// 0.000430
+0xf0b
+// 0.000168
+0x982

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference78_f16.txt

@@ -0,0 +1,32 @@
+H
+15
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.076721
+0x2ce9
+// 0.195610
+0x3242
+// -0.388567
+0xb638
+// 0.035069
+0x287d
+// -0.384668
+0xb628
+// -0.254596
+0xb413
+// 0.193449
+0x3231
+// 0.102736
+0x2e93
+// 0.038125
+0x28e1
+// -0.268778
+0xb44d
+// 0.003767
+0x1bb7
+// 0.003010
+0x1a2a

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference79_f16.txt

@@ -0,0 +1,42 @@
+H
+20
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.501418
+0xb803
+// 0.031106
+0x27f7
+// 0.630915
+0x390c
+// -0.101480
+0xae7f
+// 0.019423
+0x24f9
+// 0.140686
+0x3081
+// -0.031002
+0xa7f0
+// -0.103974
+0xaea8
+// -0.074627
+0xacc7
+// 0.243792
+0x33cd
+// -0.002970
+0x9a15
+// -0.002722
+0x9993

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference7_f16.txt

@@ -0,0 +1,20 @@
+H
+9
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.007748
+0x9fef
+// -0.005384
+0x9d83
+// 0.018774
+0x24ce
+// -0.004330
+0x9c6f
+// -0.023351
+0xa5fa
+// 0.005880
+0x1e05

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference80_f16.txt

@@ -0,0 +1,48 @@
+H
+23
+// -0.010557
+0xa168
+// -0.000700
+0x91bd
+// -0.117644
+0xaf87
+// 0.022714
+0x25d1
+// 0.292748
+0x34af
+// -0.347519
+0xb58f
+// -0.212103
+0xb2ca
+// -0.060376
+0xabba
+// -0.437183
+0xb6ff
+// 0.133159
+0x3043
+// 0.547613
+0x3862
+// -0.226361
+0xb33e
+// 0.196004
+0x3246
+// 0.527365
+0x3838
+// 0.434382
+0x36f3
+// 0.403140
+0x3673
+// -0.102655
+0xae92
+// -0.051953
+0xaaa6
+// -0.029490
+0xa78d
+// 0.234573
+0x3382
+// 0.209503
+0x32b4
+// -0.006013
+0x9e28
+// -0.002400
+0x98ea

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference8_f16.txt

@@ -0,0 +1,20 @@
+H
+9
+// 0.000000
+0x0
+// 0.000000
+0x0
+// -0.138793
+0xb071
+// 0.084913
+0x2d6f
+// 0.204652
+0x328d
+// -0.344956
+0xb585
+// 0.072973
+0x2cac
+// -0.023351
+0xa5fa
+// 0.005880
+0x1e05

CMSIS/DSP/Testing/Patterns/DSP/Filtering/MISC/MISCF16/Reference9_f16.txt

@@ -0,0 +1,32 @@
+H
+15
+// 0.125515
+0x3004
+// -0.096933
+0xae34
+// -0.181075
+0xb1cb
+// 0.409829
+0x368f
+// -0.199268
+0xb260
+// -0.187599
+0xb201
+// 0.326663
+0x353a
+// 0.029097
+0x2773
+// -0.314875
+0xb50a
+// 0.072973
+0x2cac
+// -0.023351
+0xa5fa
+// 0.005880
+0x1e05
+// 0.000000
+0x0
+// 0.000000
+0x0
+// 0.000000
+0x0

CMSIS/DSP/Testing/Source/Tests/BIQUADF16.cpp

@@ -2,7 +2,7 @@
 #include <stdio.h>
 #include "Error.h"
 
-#define SNR_THRESHOLD 32
+#define SNR_THRESHOLD 30
 
 /* 
 

CMSIS/DSP/Testing/Source/Tests/MISCF16.cpp

@@ -0,0 +1,712 @@
+#include "MISCF16.h"
+#include <stdio.h>
+#include "Error.h"
+#include "arm_vec_math.h"
+#include "Test.h"
+
+#define SNR_THRESHOLD 60
+/* 
+
+Reference patterns are generated with
+a double precision computation.
+
+*/
+#define REL_ERROR (1.0e-4)
+#define ABS_ERROR (1.0e-3)
+
+    void MISCF16::test_correlate_f16()
+    {
+        const float16_t *inpA=inputA.ptr(); 
+        const float16_t *inpB=inputB.ptr(); 
+        float16_t *outp=output.ptr();
+
+        arm_correlate_f16(inpA, inputA.nbSamples(),
+          inpB, inputB.nbSamples(),
+          outp);
+
+        ASSERT_SNR(ref,output,(float16_t)SNR_THRESHOLD);
+        ASSERT_CLOSE_ERROR(ref,output,ABS_ERROR,REL_ERROR);
+
+    }
+
+/*
+    void MISCF16::test_conv_f16()
+    {
+        const float16_t *inpA=inputA.ptr(); 
+        const float16_t *inpB=inputB.ptr(); 
+        float16_t *outp=output.ptr();
+
+        arm_conv_f16(inpA, inputA.nbSamples(),
+          inpB, inputB.nbSamples(),
+          outp);
+
+        ASSERT_SNR(ref,output,(float16_t)SNR_THRESHOLD);
+        ASSERT_CLOSE_ERROR(ref,output,ABS_ERROR,REL_ERROR);
+
+    }
+*/
+
+  
+    void MISCF16::setUp(Testing::testID_t id,std::vector<Testing::param_t>& paramsArgs,Client::PatternMgr *mgr)
+    {
+        (void)paramsArgs;
+        switch(id)
+        {
+
+            case MISCF16::TEST_CORRELATE_F16_1:
+            {
+                       this->nba = 4;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF1_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_2:
+            {
+                       this->nba = 4;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF2_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_3:
+            {
+                       this->nba = 4;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF3_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_4:
+            {
+                       this->nba = 4;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF4_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_5:
+            {
+                       this->nba = 4;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF5_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_6:
+            {
+                       this->nba = 5;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF6_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_7:
+            {
+                       this->nba = 5;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF7_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_8:
+            {
+                       this->nba = 5;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF8_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_9:
+            {
+                       this->nba = 5;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF9_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_10:
+            {
+                       this->nba = 5;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF10_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_11:
+            {
+                       this->nba = 6;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF11_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_12:
+            {
+                       this->nba = 6;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF12_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_13:
+            {
+                       this->nba = 6;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF13_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_14:
+            {
+                       this->nba = 6;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF14_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_15:
+            {
+                       this->nba = 6;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF15_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_16:
+            {
+                       this->nba = 9;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF16_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_17:
+            {
+                       this->nba = 9;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF17_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_18:
+            {
+                       this->nba = 9;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF18_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_19:
+            {
+                       this->nba = 9;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF19_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_20:
+            {
+                       this->nba = 9;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF20_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_21:
+            {
+                       this->nba = 10;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF21_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_22:
+            {
+                       this->nba = 10;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF22_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_23:
+            {
+                       this->nba = 10;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF23_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_24:
+            {
+                       this->nba = 10;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF24_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_25:
+            {
+                       this->nba = 10;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF25_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_26:
+            {
+                       this->nba = 11;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF26_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_27:
+            {
+                       this->nba = 11;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF27_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_28:
+            {
+                       this->nba = 11;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF28_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_29:
+            {
+                       this->nba = 11;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF29_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_30:
+            {
+                       this->nba = 11;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF30_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_31:
+            {
+                       this->nba = 12;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF31_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_32:
+            {
+                       this->nba = 12;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF32_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_33:
+            {
+                       this->nba = 12;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF33_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_34:
+            {
+                       this->nba = 12;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF34_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_35:
+            {
+                       this->nba = 12;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF35_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_36:
+            {
+                       this->nba = 13;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF36_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_37:
+            {
+                       this->nba = 13;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF37_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_38:
+            {
+                       this->nba = 13;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF38_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_39:
+            {
+                       this->nba = 13;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF39_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CORRELATE_F16_40:
+            {
+                       this->nba = 13;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF40_F16_ID,mgr);
+            }
+            break;
+
+#if 0
+            case MISCF16::TEST_CONV_F16_41:
+            {
+                       this->nba = 4;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF41_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_42:
+            {
+                       this->nba = 4;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF42_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_43:
+            {
+                       this->nba = 4;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF43_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_44:
+            {
+                       this->nba = 4;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF44_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_45:
+            {
+                       this->nba = 4;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF45_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_46:
+            {
+                       this->nba = 5;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF46_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_47:
+            {
+                       this->nba = 5;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF47_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_48:
+            {
+                       this->nba = 5;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF48_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_49:
+            {
+                       this->nba = 5;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF49_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_50:
+            {
+                       this->nba = 5;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF50_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_51:
+            {
+                       this->nba = 6;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF51_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_52:
+            {
+                       this->nba = 6;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF52_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_53:
+            {
+                       this->nba = 6;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF53_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_54:
+            {
+                       this->nba = 6;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF54_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_55:
+            {
+                       this->nba = 6;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF55_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_56:
+            {
+                       this->nba = 9;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF56_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_57:
+            {
+                       this->nba = 9;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF57_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_58:
+            {
+                       this->nba = 9;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF58_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_59:
+            {
+                       this->nba = 9;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF59_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_60:
+            {
+                       this->nba = 9;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF60_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_61:
+            {
+                       this->nba = 10;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF61_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_62:
+            {
+                       this->nba = 10;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF62_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_63:
+            {
+                       this->nba = 10;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF63_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_64:
+            {
+                       this->nba = 10;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF64_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_65:
+            {
+                       this->nba = 10;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF65_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_66:
+            {
+                       this->nba = 11;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF66_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_67:
+            {
+                       this->nba = 11;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF67_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_68:
+            {
+                       this->nba = 11;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF68_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_69:
+            {
+                       this->nba = 11;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF69_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_70:
+            {
+                       this->nba = 11;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF70_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_71:
+            {
+                       this->nba = 12;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF71_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_72:
+            {
+                       this->nba = 12;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF72_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_73:
+            {
+                       this->nba = 12;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF73_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_74:
+            {
+                       this->nba = 12;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF74_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_75:
+            {
+                       this->nba = 12;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF75_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_76:
+            {
+                       this->nba = 13;
+                       this->nbb = 1;
+                       ref.reload(MISCF16::REF76_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_77:
+            {
+                       this->nba = 13;
+                       this->nbb = 2;
+                       ref.reload(MISCF16::REF77_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_78:
+            {
+                       this->nba = 13;
+                       this->nbb = 3;
+                       ref.reload(MISCF16::REF78_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_79:
+            {
+                       this->nba = 13;
+                       this->nbb = 8;
+                       ref.reload(MISCF16::REF79_F16_ID,mgr);
+            }
+            break;
+
+            case MISCF16::TEST_CONV_F16_80:
+            {
+                       this->nba = 13;
+                       this->nbb = 11;
+                       ref.reload(MISCF16::REF80_F16_ID,mgr);
+            }
+            break;
+#endif
+
+        }
+
+       inputA.reload(MISCF16::INPUTA_F16_ID,mgr,nba);
+       inputB.reload(MISCF16::INPUTB_F16_ID,mgr,nbb);
+
+       output.create(ref.nbSamples(),MISCF16::OUT_F16_ID,mgr);
+        
+    }
+
+    void MISCF16::tearDown(Testing::testID_t id,Client::PatternMgr *mgr)
+    {
+      (void)id;
+      output.dump(mgr);
+      
+    }