CMSIS-DAP: Firmware implementation updated to latest V2.0.0/V1.2.0

CMSIS/DAP/Firmware/Config/DAP_config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        20. May 2015
- * $Revision:    V1.10
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Configuration
  * Title:        DAP_config.h CMSIS-DAP Configuration File (Template)
@@ -38,16 +38,22 @@ Provides definitions about the hardware and configuration of the Debug Unit.
 
 This information includes:
  - Definition of Cortex-M processor parameters used in CMSIS-DAP Debug Unit.
+ - Debug Unit Identification strings (Vendor, Product, Serial Number).
  - Debug Unit communication packet size.
- - Debug Access Port communication mode (JTAG or SWD).
+ - Debug Access Port supported modes and settings (JTAG/SWD and SWO).
  - Optional information about a connected Target Device (for Evaluation Boards).
 */
 
+#ifdef _RTE_
+#include "RTE_Components.h"
+#include CMSIS_device_header
+#else
 #include "device.h"                             // Debug Unit Cortex-M Processor Header File
+#endif
 
 /// Processor Clock of the Cortex-M MCU used in the Debug Unit.
 /// This value is used to calculate the SWD/JTAG clock speed.
-#define CPU_CLOCK               100000000U      ///< Specifies the CPU Clock in Hz
+#define CPU_CLOCK               100000000U      ///< Specifies the CPU Clock in Hz.
 
 /// Number of processor cycles for I/O Port write operations.
 /// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O
@@ -55,11 +61,11 @@ This information includes:
 /// require 2 processor cycles for a I/O Port Write operation.  If the Debug Unit uses
 /// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be 
 /// required.
-#define IO_PORT_WRITE_CYCLES    2U              ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0
+#define IO_PORT_WRITE_CYCLES    2U              ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0.
 
 /// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
-#define DAP_SWD                 1               ///< SWD Mode:  1 = available, 0 = not available
+#define DAP_SWD                 1               ///< SWD Mode:  1 = available, 0 = not available.
 
 /// Indicate that JTAG communication mode is available at the Debug Port.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
@@ -67,7 +73,7 @@ This information includes:
 
 /// Configure maximum number of JTAG devices on the scan chain connected to the Debug Access Port.
 /// This setting impacts the RAM requirements of the Debug Unit. Valid range is 1 .. 255.
-#define DAP_JTAG_DEV_CNT        8U              ///< Maximum number of JTAG devices on scan chain
+#define DAP_JTAG_DEV_CNT        8U              ///< Maximum number of JTAG devices on scan chain.
 
 /// Default communication mode on the Debug Access Port.
 /// Used for the command \ref DAP_Connect when Port Default mode is selected.
@@ -79,30 +85,36 @@ This information includes:
 #define DAP_DEFAULT_SWJ_CLOCK   1000000U        ///< Default SWD/JTAG clock frequency in Hz.
 
 /// Maximum Package Size for Command and Response data.
-/// This configuration settings is used to optimized the communication performance with the
-/// debugger and depends on the USB peripheral. Change setting to 1024 for High-Speed USB.
-#define DAP_PACKET_SIZE         64U             ///< USB: 64 = Full-Speed, 1024 = High-Speed.
+/// This configuration settings is used to optimize the communication performance with the
+/// debugger and depends on the USB peripheral. Typical vales are 64 for Full-speed USB HID or WinUSB,
+/// 1024 for High-speed USB HID and 512 for High-speed USB WinUSB.
+#define DAP_PACKET_SIZE         512U            ///< Specifies Packet Size in bytes.
 
 /// Maximum Package Buffers for Command and Response data.
-/// This configuration settings is used to optimized the communication performance with the
+/// This configuration settings is used to optimize the communication performance with the
 /// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the
-/// setting can be reduced (valid range is 1 .. 255). Change setting to 4 for High-Speed USB.
-#define DAP_PACKET_COUNT        64U             ///< Buffers: 64 = Full-Speed, 4 = High-Speed.
+/// setting can be reduced (valid range is 1 .. 255).
+#define DAP_PACKET_COUNT        8U              ///< Specifies number of packets buffered.
 
 /// Indicate that UART Serial Wire Output (SWO) trace is available.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
-#define SWO_UART                1               ///< SWO UART:  1 = available, 0 = not available
+#define SWO_UART                1               ///< SWO UART:  1 = available, 0 = not available.
 
-/// Maximum SWO UART Baudrate
-#define SWO_UART_MAX_BAUDRATE   10000000U       ///< SWO UART Maximum Baudrate in Hz
+/// Maximum SWO UART Baudrate.
+#define SWO_UART_MAX_BAUDRATE   10000000U       ///< SWO UART Maximum Baudrate in Hz.
 
 /// Indicate that Manchester Serial Wire Output (SWO) trace is available.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
-#define SWO_MANCHESTER          0               ///< SWO Manchester:  1 = available, 0 = not available
+#define SWO_MANCHESTER          0               ///< SWO Manchester:  1 = available, 0 = not available.
 
 /// SWO Trace Buffer Size.
-#define SWO_BUFFER_SIZE         4096U           ///< SWO Trace Buffer Size in bytes (must be 2^n)
+#define SWO_BUFFER_SIZE         4096U           ///< SWO Trace Buffer Size in bytes (must be 2^n).
+
+/// SWO Streaming Trace.
+#define SWO_STREAM              0               ///< SWO Streaming Trace: 1 = available, 0 = not available.
 
+/// Clock used for timestamps in the Debug Unit.
+#define TIMESTAMP_CLOCK         100000000U      ///< Timestamp clock in Hz (0 = timestamps not supported).
 
 /// Debug Unit is connected to fixed Target Device.
 /// The Debug Unit may be part of an evaluation board and always connected to a fixed
@@ -111,10 +123,37 @@ This information includes:
 #define TARGET_DEVICE_FIXED     0               ///< Target Device: 1 = known, 0 = unknown;
 
 #if TARGET_DEVICE_FIXED
-#define TARGET_DEVICE_VENDOR    "ARM"          ///< String indicating the Silicon Vendor
-#define TARGET_DEVICE_NAME      "Cortex-M4"    ///< String indicating the Target Device
+#define TARGET_DEVICE_VENDOR    "ARM"           ///< String indicating the Silicon Vendor
+#define TARGET_DEVICE_NAME      "Cortex-M4"     ///< String indicating the Target Device
 #endif
 
+/** Get Vendor ID string.
+\param str Pointer to buffer to store the string.
+\return String length.
+*/
+__STATIC_INLINE uint8_t DAP_GetVendorString (char *str) {
+  (void)str;
+  return (0U);
+}
+
+/** Get Product ID string.
+\param str Pointer to buffer to store the string.
+\return String length.
+*/
+__STATIC_INLINE uint8_t DAP_GetProductString (char *str) {
+  (void)str;
+  return (0U);
+}
+
+/** Get Serial Number string.
+\param str Pointer to buffer to store the string.
+\return String length.
+*/
+__STATIC_INLINE uint8_t DAP_GetSerNumString (char *str) {
+  (void)str;
+  return (0U);
+}
+
 ///@}
 
 
@@ -161,7 +200,7 @@ Configures the DAP Hardware I/O pins for JTAG mode:
  - TCK, TMS, TDI, nTRST, nRESET to output mode and set to high level.
  - TDO to input mode.
 */ 
-static __inline void PORT_JTAG_SETUP (void) {
+__STATIC_INLINE void PORT_JTAG_SETUP (void) {
   ;
 }
  
@@ -170,7 +209,7 @@ Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
  - SWCLK, SWDIO, nRESET to output mode and set to default high level.
  - TDI, nTRST to HighZ mode (pins are unused in SWD mode).
 */ 
-static __inline void PORT_SWD_SETUP (void) {
+__STATIC_INLINE void PORT_SWD_SETUP (void) {
   ;
 }
 
@@ -178,7 +217,7 @@ static __inline void PORT_SWD_SETUP (void) {
 Disables the DAP Hardware I/O pins which configures:
  - TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.
 */
-static __inline void PORT_OFF (void) {
+__STATIC_INLINE void PORT_OFF (void) {
   ;
 }
 
@@ -188,21 +227,21 @@ static __inline void PORT_OFF (void) {
 /** SWCLK/TCK I/O pin: Get Input.
 \return Current status of the SWCLK/TCK DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_SWCLK_TCK_IN  (void) {
+__STATIC_FORCEINLINE uint32_t PIN_SWCLK_TCK_IN  (void) {
   return (0U);
 }
 
 /** SWCLK/TCK I/O pin: Set Output to High.
 Set the SWCLK/TCK DAP hardware I/O pin to high level.
 */
-static __forceinline void     PIN_SWCLK_TCK_SET (void) {
+__STATIC_FORCEINLINE void     PIN_SWCLK_TCK_SET (void) {
   ;
 }
 
 /** SWCLK/TCK I/O pin: Set Output to Low.
 Set the SWCLK/TCK DAP hardware I/O pin to low level.
 */
-static __forceinline void     PIN_SWCLK_TCK_CLR (void) {
+__STATIC_FORCEINLINE void     PIN_SWCLK_TCK_CLR (void) {
   ;
 }
 
@@ -212,35 +251,35 @@ static __forceinline void     PIN_SWCLK_TCK_CLR (void) {
 /** SWDIO/TMS I/O pin: Get Input.
 \return Current status of the SWDIO/TMS DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_SWDIO_TMS_IN  (void) {
+__STATIC_FORCEINLINE uint32_t PIN_SWDIO_TMS_IN  (void) {
   return (0U);
 }
 
 /** SWDIO/TMS I/O pin: Set Output to High.
 Set the SWDIO/TMS DAP hardware I/O pin to high level.
 */
-static __forceinline void     PIN_SWDIO_TMS_SET (void) {
+__STATIC_FORCEINLINE void     PIN_SWDIO_TMS_SET (void) {
   ;
 }
 
 /** SWDIO/TMS I/O pin: Set Output to Low.
 Set the SWDIO/TMS DAP hardware I/O pin to low level.
 */
-static __forceinline void     PIN_SWDIO_TMS_CLR (void) {
+__STATIC_FORCEINLINE void     PIN_SWDIO_TMS_CLR (void) {
   ;
 }
 
 /** SWDIO I/O pin: Get Input (used in SWD mode only).
 \return Current status of the SWDIO DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_SWDIO_IN      (void) {
+__STATIC_FORCEINLINE uint32_t PIN_SWDIO_IN      (void) {
   return (0U);
 }
 
 /** SWDIO I/O pin: Set Output (used in SWD mode only).
 \param bit Output value for the SWDIO DAP hardware I/O pin.
 */
-static __forceinline void     PIN_SWDIO_OUT     (uint32_t bit) {
+__STATIC_FORCEINLINE void     PIN_SWDIO_OUT     (uint32_t bit) {
   ;
 }
 
@@ -248,7 +287,7 @@ static __forceinline void     PIN_SWDIO_OUT     (uint32_t bit) {
 Configure the SWDIO DAP hardware I/O pin to output mode. This function is
 called prior \ref PIN_SWDIO_OUT function calls.
 */
-static __forceinline void     PIN_SWDIO_OUT_ENABLE  (void) {
+__STATIC_FORCEINLINE void     PIN_SWDIO_OUT_ENABLE  (void) {
   ; 
 }
 
@@ -256,7 +295,7 @@ static __forceinline void     PIN_SWDIO_OUT_ENABLE  (void) {
 Configure the SWDIO DAP hardware I/O pin to input mode. This function is
 called prior \ref PIN_SWDIO_IN function calls.
 */
-static __forceinline void     PIN_SWDIO_OUT_DISABLE (void) {
+__STATIC_FORCEINLINE void     PIN_SWDIO_OUT_DISABLE (void) {
   ;
 }
 
@@ -266,14 +305,14 @@ static __forceinline void     PIN_SWDIO_OUT_DISABLE (void) {
 /** TDI I/O pin: Get Input.
 \return Current status of the TDI DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_TDI_IN  (void) {
- return (0U);
+__STATIC_FORCEINLINE uint32_t PIN_TDI_IN  (void) {
+  return (0U);
 }
 
 /** TDI I/O pin: Set Output.
 \param bit Output value for the TDI DAP hardware I/O pin.
 */
-static __forceinline void     PIN_TDI_OUT (uint32_t bit) {
+__STATIC_FORCEINLINE void     PIN_TDI_OUT (uint32_t bit) {
   ;
 }
 
@@ -283,7 +322,7 @@ static __forceinline void     PIN_TDI_OUT (uint32_t bit) {
 /** TDO I/O pin: Get Input.
 \return Current status of the TDO DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_TDO_IN  (void) {
+__STATIC_FORCEINLINE uint32_t PIN_TDO_IN  (void) {
   return (0U);
 }
 
@@ -293,7 +332,7 @@ static __forceinline uint32_t PIN_TDO_IN  (void) {
 /** nTRST I/O pin: Get Input.
 \return Current status of the nTRST DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_nTRST_IN   (void) {
+__STATIC_FORCEINLINE uint32_t PIN_nTRST_IN   (void) {
   return (0U);
 }
 
@@ -302,7 +341,7 @@ static __forceinline uint32_t PIN_nTRST_IN   (void) {
            - 0: issue a JTAG TRST Test Reset.
            - 1: release JTAG TRST Test Reset.
 */
-static __forceinline void     PIN_nTRST_OUT  (uint32_t bit) {
+__STATIC_FORCEINLINE void     PIN_nTRST_OUT  (uint32_t bit) {
   ; 
 }
 
@@ -311,7 +350,7 @@ static __forceinline void     PIN_nTRST_OUT  (uint32_t bit) {
 /** nRESET I/O pin: Get Input.
 \return Current status of the nRESET DAP hardware I/O pin.
 */
-static __forceinline uint32_t PIN_nRESET_IN  (void) {
+__STATIC_FORCEINLINE uint32_t PIN_nRESET_IN  (void) {
   return (0U);
 }
 
@@ -320,7 +359,7 @@ static __forceinline uint32_t PIN_nRESET_IN  (void) {
            - 0: issue a device hardware reset.
            - 1: release device hardware reset.
 */
-static __forceinline void     PIN_nRESET_OUT (uint32_t bit) {
+__STATIC_FORCEINLINE void     PIN_nRESET_OUT (uint32_t bit) {
   ;
 }
 
@@ -345,18 +384,28 @@ It is recommended to provide the following LEDs for status indication:
            - 1: Connect LED ON: debugger is connected to CMSIS-DAP Debug Unit.
            - 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit.
 */
-static __inline void LED_CONNECTED_OUT (uint32_t bit) {}
+__STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {}
 
 /** Debug Unit: Set status Target Running LED.
 \param bit status of the Target Running LED.
            - 1: Target Running LED ON: program execution in target started.
            - 0: Target Running LED OFF: program execution in target stopped.
 */
-static __inline void LED_RUNNING_OUT (uint32_t bit) {}
+__STATIC_INLINE void LED_RUNNING_OUT (uint32_t bit) {}
 
 ///@}
 
 
+//**************************************************************************************************
+
+/** Debug Unit: Get timestamp.
+\return Current timestamp value.
+*/
+__STATIC_INLINE uint32_t TIMESTAMP_GET (void) {
+  return (DWT->CYCCNT);
+}
+
+
 //**************************************************************************************************
 /** 
 \defgroup DAP_Config_Initialization_gr CMSIS-DAP Initialization
@@ -374,7 +423,7 @@ Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled an
  - for nTRST, nRESET a weak pull-up (if available) is enabled.
  - LED output pins are enabled and LEDs are turned off.
 */
-static __inline void DAP_SETUP (void) {
+__STATIC_INLINE void DAP_SETUP (void) {
   ;
 }
 
@@ -385,7 +434,7 @@ when a device needs a time-critical unlock sequence that enables the debug port.
 \return 0 = no device specific reset sequence is implemented.\n
         1 = a device specific reset sequence is implemented.
 */
-static __inline uint8_t RESET_TARGET (void) {
+__STATIC_INLINE uint8_t RESET_TARGET (void) {
   return (0U);             // change to '1' when a device reset sequence is implemented
 }
 

CMSIS/DAP/Firmware/Include/DAP.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        20. May 2015
- * $Revision:    V1.10
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Include
  * Title:        DAP.h Definitions
@@ -29,6 +29,13 @@
 #define __DAP_H__
 
 
+// DAP Firmware Version
+#ifdef  DAP_FW_V1
+#define DAP_FW_VER                      "1.2.0"
+#else
+#define DAP_FW_VER                      "2.0.0"
+#endif
+
 // DAP Command IDs
 #define ID_DAP_Info                     0x00U
 #define ID_DAP_HostStatus               0x01U
@@ -45,6 +52,7 @@
 #define ID_DAP_SWJ_Clock                0x11U
 #define ID_DAP_SWJ_Sequence             0x12U
 #define ID_DAP_SWD_Configure            0x13U
+#define ID_DAP_SWD_Sequence             0x1DU
 #define ID_DAP_JTAG_Sequence            0x14U
 #define ID_DAP_JTAG_Configure           0x15U
 #define ID_DAP_JTAG_IDCODE              0x16U
@@ -53,6 +61,7 @@
 #define ID_DAP_SWO_Baudrate             0x19U
 #define ID_DAP_SWO_Control              0x1AU
 #define ID_DAP_SWO_Status               0x1BU
+#define ID_DAP_SWO_ExtendedStatus       0x1EU
 #define ID_DAP_SWO_Data                 0x1CU
 
 #define ID_DAP_QueueCommands            0x7EU
@@ -106,6 +115,7 @@
 #define DAP_ID_DEVICE_VENDOR            5U
 #define DAP_ID_DEVICE_NAME              6U
 #define DAP_ID_CAPABILITIES             0xF0U
+#define DAP_ID_TIMESTAMP_CLOCK          0xF1U
 #define DAP_ID_SWO_BUFFER_SIZE          0xFDU
 #define DAP_ID_PACKET_COUNT             0xFEU
 #define DAP_ID_PACKET_SIZE              0xFFU
@@ -135,6 +145,7 @@
 #define DAP_TRANSFER_A3                 (1U<<3)
 #define DAP_TRANSFER_MATCH_VALUE        (1U<<4)
 #define DAP_TRANSFER_MATCH_MASK         (1U<<5)
+#define DAP_TRANSFER_TIMESTAMP          (1U<<7)
 
 // DAP Transfer Response
 #define DAP_TRANSFER_OK                 (1U<<0)
@@ -176,17 +187,25 @@
 #define JTAG_SEQUENCE_TMS               0x40U   // TMS value
 #define JTAG_SEQUENCE_TDO               0x80U   // TDO capture
 
+// SWD Sequence Info
+#define SWD_SEQUENCE_CLK                0x3FU   // SWCLK count
+#define SWD_SEQUENCE_DIN                0x80U   // SWDIO capture
+
 
 #include <stddef.h>
 #include <stdint.h>
+#include "cmsis_compiler.h"
 
 // DAP Data structure
 typedef struct {
   uint8_t     debug_port;                       // Debug Port
   uint8_t     fast_clock;                       // Fast Clock Flag
+  uint8_t     padding[2];
   uint32_t   clock_delay;                       // Clock Delay
+  uint32_t     timestamp;                       // Last captured Timestamp
   struct {                                      // Transfer Configuration
     uint8_t   idle_cycles;                      // Idle cycles after transfer
+    uint8_t    padding[3];
     uint16_t  retry_count;                      // Number of retries after WAIT response
     uint16_t  match_retry;                      // Number of retries if read value does not match
     uint32_t  match_mask;                       // Match Mask
@@ -216,7 +235,8 @@ extern volatile uint8_t    DAP_TransferAbort;   // Transfer Abort Flag
 
 // Functions
 extern void     SWJ_Sequence    (uint32_t count, const uint8_t *data);
-extern void     JTAG_Sequence   (uint32_t info,  const uint8_t *tdi, uint8_t *tdo);
+extern void     SWD_Sequence    (uint32_t info,  const uint8_t *swdo, uint8_t *swdi);
+extern void     JTAG_Sequence   (uint32_t info,  const uint8_t *tdi,  uint8_t *tdo);
 extern void     JTAG_IR         (uint32_t ir);
 extern uint32_t JTAG_ReadIDCode (void);
 extern void     JTAG_WriteAbort (uint32_t data);
@@ -225,12 +245,29 @@ extern uint8_t  SWD_Transfer    (uint32_t request, uint32_t *data);
 
 extern void     Delayms         (uint32_t delay);
 
-extern uint32_t SWO_Transport   (const uint8_t *request, uint8_t *response);
-extern uint32_t SWO_Mode        (const uint8_t *request, uint8_t *response);
-extern uint32_t SWO_Baudrate    (const uint8_t *request, uint8_t *response);
-extern uint32_t SWO_Control     (const uint8_t *request, uint8_t *response);
-extern uint32_t SWO_Status                              (uint8_t *response);
-extern uint32_t SWO_Data        (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Transport      (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Mode           (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Baudrate       (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Control        (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Status                                 (uint8_t *response);
+extern uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response);
+extern uint32_t SWO_Data           (const uint8_t *request, uint8_t *response);
+
+extern void     SWO_QueueTransfer    (uint8_t *buf, uint32_t num);
+extern void     SWO_AbortTransfer    (void);
+extern void     SWO_TransferComplete (void);
+
+extern uint32_t UART_SWO_Mode     (uint32_t enable);
+extern uint32_t UART_SWO_Baudrate (uint32_t baudrate);
+extern uint32_t UART_SWO_Control  (uint32_t active);
+extern void     UART_SWO_Capture  (uint8_t *buf, uint32_t num);
+extern uint32_t UART_SWO_GetCount (void);
+
+extern uint32_t Manchester_SWO_Mode     (uint32_t enable);
+extern uint32_t Manchester_SWO_Baudrate (uint32_t baudrate);
+extern uint32_t Manchester_SWO_Control  (uint32_t active);
+extern void     Manchester_SWO_Capture  (uint8_t *buf, uint32_t num);
+extern uint32_t Manchester_SWO_GetCount (void);
 
 extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response);
 extern uint32_t DAP_ProcessCommand       (const uint8_t *request, uint8_t *response);
@@ -242,7 +279,7 @@ extern void     DAP_Setup (void);
 #ifndef DELAY_SLOW_CYCLES
 #define DELAY_SLOW_CYCLES       3U      // Number of cycles for one iteration
 #endif
-static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {
+__STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) {
   uint32_t count;
 
   count = delay;
@@ -253,7 +290,7 @@ static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {
 #ifndef DELAY_FAST_CYCLES
 #define DELAY_FAST_CYCLES       0U      // Number of cycles: 0..3
 #endif
-static __forceinline void PIN_DELAY_FAST (void) {
+__STATIC_FORCEINLINE void PIN_DELAY_FAST (void) {
 #if (DELAY_FAST_CYCLES >= 1U)
   __nop();
 #endif

CMSIS/DAP/Firmware/Source/DAP_vendor.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        20. May 2015
- * $Revision:    V1.10
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Source
  * Title:        DAP_vendor.c CMSIS-DAP Vendor Commands
@@ -49,7 +49,7 @@ uint32_t DAP_ProcessVendorCommand(const uint8_t *request, uint8_t *response) {
   uint32_t num = (1U << 16) | 1U;
 
   *response++ = *request;        // copy Command ID
-  
+
   switch (*request++) {          // first byte in request is Command ID
     case ID_DAP_Vendor0:
 #if 0                            // example user command

CMSIS/DAP/Firmware/Source/JTAG_DP.c

@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        29. August 2017
- * $Revision:    V1.11
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Source
  * Title:        JTAG_DP.c CMSIS-DAP JTAG DP I/O
@@ -82,7 +82,9 @@ void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo) {
   uint32_t n, k;
 
   n = info & JTAG_SEQUENCE_TCK;
-  if (n == 0U) { n = 64U; }
+  if (n == 0U) {
+    n = 64U;
+  }
 
   if (info & JTAG_SEQUENCE_TMS) {
     PIN_TMS_SET();
@@ -111,7 +113,7 @@ void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo) {
 //   ir:     IR value
 //   return: none
 #define JTAG_IR_Function(speed) /**/                                            \
-void JTAG_IR_##speed (uint32_t ir) {                                            \
+static void JTAG_IR_##speed (uint32_t ir) {                                     \
   uint32_t n;                                                                   \
                                                                                 \
   PIN_TMS_SET();                                                                \
@@ -155,7 +157,7 @@ void JTAG_IR_##speed (uint32_t ir) {
 //   data:    DATA[31:0]
 //   return:  ACK[2:0]
 #define JTAG_TransferFunction(speed)        /**/                                \
-uint8_t JTAG_Transfer##speed (uint32_t request, uint32_t *data) {               \
+static uint8_t JTAG_Transfer##speed (uint32_t request, uint32_t *data) {        \
   uint32_t ack;                                                                 \
   uint32_t bit;                                                                 \
   uint32_t val;                                                                 \
@@ -234,6 +236,11 @@ exit:
   JTAG_CYCLE_TCK();                         /* Idle */                          \
   PIN_TDI_OUT(1U);                                                              \
                                                                                 \
+  /* Capture Timestamp */                                                       \
+  if (request & DAP_TRANSFER_TIMESTAMP) {                                       \
+    DAP_Data.timestamp = TIMESTAMP_GET();                                       \
+  }                                                                             \
+                                                                                \
   /* Idle cycles */                                                             \
   n = DAP_Data.transfer.idle_cycles;                                            \
   while (n--) {                                                                 \
@@ -246,13 +253,13 @@ exit:
 
 #undef  PIN_DELAY
 #define PIN_DELAY() PIN_DELAY_FAST()
-JTAG_IR_Function(Fast);
-JTAG_TransferFunction(Fast);
+JTAG_IR_Function(Fast)
+JTAG_TransferFunction(Fast)
 
 #undef  PIN_DELAY
 #define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay)
-JTAG_IR_Function(Slow);
-JTAG_TransferFunction(Slow);
+JTAG_IR_Function(Slow)
+JTAG_TransferFunction(Slow)
 
 
 // JTAG Read IDCODE register

CMSIS/DAP/Firmware/Source/SWO.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        20. May 2015
- * $Revision:    V1.10
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Source
  * Title:        SWO.c CMSIS-DAP SWO I/O
@@ -30,7 +30,15 @@
 #if (SWO_UART != 0)
 #include "Driver_USART.h"
 #endif
+#if (SWO_STREAM != 0)
+#include "cmsis_os2.h"
+#endif
 
+#if (SWO_STREAM != 0)
+#ifdef DAP_FW_V1
+#error "SWO Streaming Trace not supported in DAP V1!"
+#endif
+#endif
 
 #if (SWO_UART != 0)
 
@@ -44,7 +52,7 @@
 extern ARM_DRIVER_USART    USART_Driver_(USART_PORT);
 #define pUSART           (&USART_Driver_(USART_PORT))
 
-static uint8_t  USART_Ready;
+static uint8_t USART_Ready = 0U;
 
 #endif  /* (SWO_UART != 0) */
 
@@ -52,6 +60,11 @@ static uint8_t  USART_Ready;
 #if ((SWO_UART != 0) || (SWO_MANCHESTER != 0))
 
 
+#define SWO_STREAM_TIMEOUT      50U     /* Stream timeout in ms */
+
+#define USB_BLOCK_SIZE          512U    /* USB Block Size */
+#define TRACE_BLOCK_SIZE        64U     /* Trace Block Size (2^n: 32...512) */
+
 // Trace State
 static uint8_t  TraceTransport =  0U;       /* Trace Transport */
 static uint8_t  TraceMode      =  0U;       /* Trace Mode */
@@ -61,34 +74,71 @@ static uint8_t  TraceError_n   =  0U;       /* Active Trace Error bank */
 
 // Trace Buffer
 static uint8_t  TraceBuf[SWO_BUFFER_SIZE];  /* Trace Buffer (must be 2^n) */
-static volatile uint32_t TraceIn      = 0U; /* Incoming Trace Index */
-static volatile uint32_t TraceOut     = 0U; /* Outgoing Trace Index */
-static volatile uint32_t TracePending = 0U; /* Pending Trace Count */
+static volatile uint32_t TraceIndexI  = 0U; /* Incoming Trace Index */
+static volatile uint32_t TraceIndexO  = 0U; /* Outgoing Trace Index */
+static volatile uint8_t  TraceUpdate;       /* Trace Update Flag */
+static          uint32_t TraceBlockSize;    /* Current Trace Block Size */
+
+#if (TIMESTAMP_CLOCK != 0U) 
+// Trace Timestamp
+static volatile struct {
+  uint32_t index;
+  uint32_t tick;
+} TraceTimestamp;
+#endif
 
 // Trace Helper functions
 static void     ClearTrace     (void);
-static uint32_t GetTraceSpace  (void);
+static void     ResumeTrace    (void);
 static uint32_t GetTraceCount  (void);
 static uint8_t  GetTraceStatus (void);
 static void     SetTraceError  (uint8_t flag);
 
+#if (SWO_STREAM != 0)
+extern osThreadId_t      SWO_ThreadId;
+static volatile uint8_t  TransferBusy = 0U; /* Transfer Busy Flag */
+static          uint32_t TransferSize;      /* Current Transfer Size */
+#endif
+
 
 #if (SWO_UART != 0)
 
 // USART Driver Callback function
 //   event: event mask
 static void USART_Callback (uint32_t event) {
+  uint32_t index_i;
+  uint32_t index_o;
   uint32_t count;
+  uint32_t num;
 
   if (event &  ARM_USART_EVENT_RECEIVE_COMPLETE) {
-    TracePending = 0U;
-    TraceIn += pUSART->GetRxCount();
-    count = GetTraceSpace();
-    if (count != 0U) {
-      pUSART->Receive(&TraceBuf[TraceIn & (SWO_BUFFER_SIZE-1U)], count);
+#if (TIMESTAMP_CLOCK != 0U) 
+    TraceTimestamp.tick = TIMESTAMP_GET();
+#endif
+    index_o  = TraceIndexO;
+    index_i  = TraceIndexI;
+    index_i += TraceBlockSize;
+    TraceIndexI = index_i;
+#if (TIMESTAMP_CLOCK != 0U) 
+    TraceTimestamp.index = index_i;
+#endif
+    num   = TRACE_BLOCK_SIZE - (index_i & (TRACE_BLOCK_SIZE - 1U));
+    count = index_i - index_o;
+    if (count <= (SWO_BUFFER_SIZE - num)) {
+      index_i &= SWO_BUFFER_SIZE - 1U;
+      TraceBlockSize = num;
+      pUSART->Receive(&TraceBuf[index_i], num);
     } else {
       TraceStatus = DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED;
     }
+    TraceUpdate = 1U;
+#if (SWO_STREAM != 0)
+    if (TraceTransport == 2U) {
+      if (count >= (USB_BLOCK_SIZE - (index_o & (USB_BLOCK_SIZE - 1U)))) {
+        osThreadFlagsSet(SWO_ThreadId, 1U);
+      }
+    }
+#endif
   }
   if (event &  ARM_USART_EVENT_RX_OVERFLOW) {
     SetTraceError(DAP_SWO_BUFFER_OVERRUN);
@@ -103,20 +153,23 @@ static void USART_Callback (uint32_t event) {
 // Enable or disable UART SWO Mode
 //   enable: enable flag
 //   return: 1 - Success, 0 - Error
-__weak uint32_t UART_SWO_Mode (uint32_t enable) {
+__WEAK uint32_t UART_SWO_Mode (uint32_t enable) {
   int32_t status;
 
   USART_Ready = 0U;
 
-  if (enable) {
+  if (enable != 0U) {
     status = pUSART->Initialize(USART_Callback);
-    if (status != ARM_DRIVER_OK) { return (0U); }
+    if (status != ARM_DRIVER_OK) {
+      return (0U);
+    }
     status = pUSART->PowerControl(ARM_POWER_FULL);
     if (status != ARM_DRIVER_OK) {
       pUSART->Uninitialize();
       return (0U);
     }
   } else {
+    pUSART->Control(ARM_USART_CONTROL_RX, 0U);
     pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U);
     pUSART->PowerControl(ARM_POWER_OFF);
     pUSART->Uninitialize();
@@ -127,9 +180,10 @@ __weak uint32_t UART_SWO_Mode (uint32_t enable) {
 // Configure UART SWO Baudrate
 //   baudrate: requested baudrate
 //   return:   actual baudrate or 0 when not configured
-__weak uint32_t UART_SWO_Baudrate (uint32_t baudrate) {
+__WEAK uint32_t UART_SWO_Baudrate (uint32_t baudrate) {
   int32_t  status;
-  uint32_t count;
+  uint32_t index;
+  uint32_t num;
 
   if (baudrate > SWO_UART_MAX_BAUDRATE) {
     baudrate = SWO_UART_MAX_BAUDRATE;
@@ -138,8 +192,7 @@ __weak uint32_t UART_SWO_Baudrate (uint32_t baudrate) {
   if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) {
     pUSART->Control(ARM_USART_CONTROL_RX, 0U);
     if (pUSART->GetStatus().rx_busy) {
-      TracePending = 0U;
-      TraceIn += pUSART->GetRxCount();
+      TraceIndexI += pUSART->GetRxCount();
       pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U);
     }
   }
@@ -154,17 +207,17 @@ __weak uint32_t UART_SWO_Baudrate (uint32_t baudrate) {
     USART_Ready = 1U;
   } else {
     USART_Ready = 0U;
-    baudrate = 0U;
+    return (0U);
   }
 
-  if ((TraceStatus & DAP_SWO_CAPTURE_ACTIVE) && USART_Ready) {
-    pUSART->Control(ARM_USART_CONTROL_RX, 1U);
-    count = GetTraceSpace();
-    if (count != 0U) {
-      pUSART->Receive(&TraceBuf[TraceIn & (SWO_BUFFER_SIZE-1U)], count);
-    } else {
-      TraceStatus = DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED;
+  if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) {
+    if ((TraceStatus & DAP_SWO_CAPTURE_PAUSED) == 0U) {
+      index = TraceIndexI & (SWO_BUFFER_SIZE - 1U);
+      num = TRACE_BLOCK_SIZE - (index & (TRACE_BLOCK_SIZE - 1U));
+      TraceBlockSize = num;
+      pUSART->Receive(&TraceBuf[index], num);
     }
+    pUSART->Control(ARM_USART_CONTROL_RX, 1U);
   }
 
   return (baudrate);
@@ -173,20 +226,26 @@ __weak uint32_t UART_SWO_Baudrate (uint32_t baudrate) {
 // Control UART SWO Capture
 //   active: active flag
 //   return: 1 - Success, 0 - Error
-__weak uint32_t UART_SWO_Control (uint32_t active) {
+__WEAK uint32_t UART_SWO_Control (uint32_t active) {
   int32_t status;
 
   if (active) {
-    if (!USART_Ready) { return (0U); }
+    if (!USART_Ready) { 
+      return (0U);
+    }
+    TraceBlockSize = 1U;
+    status = pUSART->Receive(&TraceBuf[0], 1U);
+    if (status != ARM_DRIVER_OK) {
+      return (0U);
+    }
     status = pUSART->Control(ARM_USART_CONTROL_RX, 1U);
-    if (status != ARM_DRIVER_OK) { return (0U); }
-    status = pUSART->Receive(TraceBuf, SWO_BUFFER_SIZE);
-    if (status != ARM_DRIVER_OK) { return (0U); }
+    if (status != ARM_DRIVER_OK) {
+      return (0U);
+    }
   } else {
     pUSART->Control(ARM_USART_CONTROL_RX, 0U);
     if (pUSART->GetStatus().rx_busy) {
-      TracePending = 0U;
-      TraceIn += pUSART->GetRxCount();
+      TraceIndexI += pUSART->GetRxCount();
       pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U);
     }
   }
@@ -194,15 +253,24 @@ __weak uint32_t UART_SWO_Control (uint32_t active) {
 }
 
 // Start UART SWO Capture
-//   buf:   pointer to buffer for capturing
-//   count: number of bytes to capture
-__weak void UART_SWO_Capture (uint8_t *buf, uint32_t count) {
-  pUSART->Receive(buf, count);
+//   buf: pointer to buffer for capturing
+//   num: number of bytes to capture
+__WEAK void UART_SWO_Capture (uint8_t *buf, uint32_t num) {
+  TraceBlockSize = num;
+  pUSART->Receive(buf, num);
 }
 
-// Update UART SWO Trace Info
-__weak void UART_SWO_Update (void) {
-  TracePending = pUSART->GetRxCount();
+// Get UART SWO Pending Trace Count
+//   return: number of pending trace data bytes
+__WEAK uint32_t UART_SWO_GetCount (void) {
+  uint32_t count;
+
+  if (pUSART->GetStatus().rx_busy) {
+    count = pUSART->GetRxCount();
+  } else {
+    count = 0U;
+  }
+  return (count);
 }
 
 #endif  /* (SWO_UART != 0) */
@@ -213,32 +281,33 @@ __weak void UART_SWO_Update (void) {
 // Enable or disable Manchester SWO Mode
 //   enable: enable flag
 //   return: 1 - Success, 0 - Error
-__weak uint32_t Manchester_SWO_Mode (uint32_t enable) {
+__WEAK uint32_t Manchester_SWO_Mode (uint32_t enable) {
   return (0U);
 }
 
 // Configure Manchester SWO Baudrate
 //   baudrate: requested baudrate
 //   return:   actual baudrate or 0 when not configured
-__weak uint32_t Manchester_SWO_Baudrate (uint32_t baudrate) {
+__WEAK uint32_t Manchester_SWO_Baudrate (uint32_t baudrate) {
   return (0U);
 }
 
 // Control Manchester SWO Capture
 //   active: active flag
 //   return: 1 - Success, 0 - Error
-__weak uint32_t Manchester_SWO_Control (uint32_t active) {
+__WEAK uint32_t Manchester_SWO_Control (uint32_t active) {
   return (0U);
 }
 
 // Start Manchester SWO Capture
-//   buf:   pointer to buffer for capturing
-//   count: number of bytes to capture
-__weak void Manchester_SWO_Capture (uint8_t *buf, uint32_t count) {
+//   buf: pointer to buffer for capturing
+//   num: number of bytes to capture
+__WEAK void Manchester_SWO_Capture (uint8_t *buf, uint32_t num) {
 }
 
-// Update Manchester SWO Trace Info
-__weak void Manchester_SWO_Update (void) {
+// Get Manchester SWO Pending Trace Count
+//   return: number of pending trace data bytes
+__WEAK uint32_t Manchester_SWO_GetCount (void) {
 }
 
 #endif  /* (SWO_MANCHESTER != 0) */
@@ -246,29 +315,56 @@ __weak void Manchester_SWO_Update (void) {
 
 // Clear Trace Errors and Data
 static void ClearTrace (void) {
+
+#if (SWO_STREAM != 0)
+  if (TraceTransport == 2U) {
+    if (TransferBusy != 0U) {
+      SWO_AbortTransfer();
+      TransferBusy = 0U;
+    }
+  }
+#endif
+
   TraceError[0] = 0U;
   TraceError[1] = 0U;
   TraceError_n  = 0U;
-  TraceIn       = 0U;
-  TraceOut      = 0U;
-  TracePending  = 0U;
+  TraceIndexI   = 0U;
+  TraceIndexO   = 0U;
+
+#if (TIMESTAMP_CLOCK != 0U) 
+  TraceTimestamp.index = 0U;
+  TraceTimestamp.tick  = 0U;
+#endif
 }
 
-// Get Trace Space
-//   return: number of contiguous free bytes in trace buffer
-static uint32_t GetTraceSpace (void) {
-  uint32_t index;
-  uint32_t limit;
-  uint32_t count;
+// Resume Trace Capture
+static void ResumeTrace (void) {
+  uint32_t index_i;
+  uint32_t index_o;
 
-  index = TraceIn & (SWO_BUFFER_SIZE-1U);
-  limit = SWO_BUFFER_SIZE - index;
-  count = SWO_BUFFER_SIZE - (TraceIn - TraceOut);
-  if (count > limit) {
-    count = limit;
+  if (TraceStatus == (DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED)) {
+    index_i = TraceIndexI;
+    index_o = TraceIndexO;
+    if ((index_i - index_o) < SWO_BUFFER_SIZE) {
+      index_i &= SWO_BUFFER_SIZE - 1U;
+      switch (TraceMode) {
+#if (SWO_UART != 0)
+        case DAP_SWO_UART:
+          TraceStatus = DAP_SWO_CAPTURE_ACTIVE;
+          UART_SWO_Capture(&TraceBuf[index_i], 1U);
+          break;
+#endif
+#if (SWO_MANCHESTER != 0)
+        case DAP_SWO_MANCHESTER:
+          TraceStatus = DAP_SWO_CAPTURE_ACTIVE;
+          Manchester_SWO_Capture(&TraceBuf[index_i], 1U);
+          break;
+#endif
+        default:
+          break;
+      }
+    }
   }
-
-  return (count);
 }
 
 // Get Trace Count
@@ -277,12 +373,26 @@ static uint32_t GetTraceCount (void) {
   uint32_t count;
 
   if (TraceStatus == DAP_SWO_CAPTURE_ACTIVE) {
-    count = (TraceIn - TraceOut) + TracePending;
-    if (TracePending == 0U) {
-      count = TraceIn - TraceOut;
-    }
+    do {
+      TraceUpdate = 0U;
+      count = TraceIndexI - TraceIndexO;
+      switch (TraceMode) {
+#if (SWO_UART != 0)
+        case DAP_SWO_UART:
+          count += UART_SWO_GetCount();
+          break;
+#endif
+#if (SWO_MANCHESTER != 0)
+        case DAP_SWO_MANCHESTER:
+          count += Manchester_SWO_GetCount();
+          break;
+#endif
+        default:
+          break;
+      }
+    } while (TraceUpdate != 0U);
   } else {
-    count = TraceIn - TraceOut;
+    count = TraceIndexI - TraceIndexO;
   }
 
   return (count);
@@ -318,11 +428,14 @@ uint32_t SWO_Transport (const uint8_t *request, uint8_t *response) {
   uint8_t  transport;
   uint32_t result;
 
-  if (!(TraceStatus & DAP_SWO_CAPTURE_ACTIVE)) {
+  if ((TraceStatus & DAP_SWO_CAPTURE_ACTIVE) == 0U) {
     transport = *request;
     switch (transport) {
-      case 0:
-      case 1:
+      case 0U:
+      case 1U:
+#if (SWO_STREAM != 0)
+      case 2U:
+#endif
         TraceTransport = transport;
         result = 1U;
         break;
@@ -369,6 +482,7 @@ uint32_t SWO_Mode (const uint8_t *request, uint8_t *response) {
     default:
       break;
   }
+
   switch (mode) {
     case DAP_SWO_OFF:
       result = 1U;
@@ -392,8 +506,8 @@ uint32_t SWO_Mode (const uint8_t *request, uint8_t *response) {
   } else {
     TraceMode = DAP_SWO_OFF;
   }
+
   TraceStatus = 0U;
-  ClearTrace();
 
   if (result != 0U) {
     *response = DAP_OK;
@@ -413,10 +527,10 @@ uint32_t SWO_Mode (const uint8_t *request, uint8_t *response) {
 uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response) {
   uint32_t baudrate;
 
-  baudrate = (*(request+0) <<  0) |
-             (*(request+1) <<  8) |
-             (*(request+2) << 16) |
-             (*(request+3) << 24);
+  baudrate = (uint32_t)(*(request+0) <<  0) |
+             (uint32_t)(*(request+1) <<  8) |
+             (uint32_t)(*(request+2) << 16) |
+             (uint32_t)(*(request+3) << 24);
 
   switch (TraceMode) {
 #if (SWO_UART != 0)
@@ -479,6 +593,11 @@ uint32_t SWO_Control (const uint8_t *request, uint8_t *response) {
     }
     if (result != 0U) {
       TraceStatus = active;
+#if (SWO_STREAM != 0)
+      if (TraceTransport == 2U) {
+        osThreadFlagsSet(SWO_ThreadId, 1U);
+      }
+#endif
     }
   } else {
     result = 1U;
@@ -501,23 +620,6 @@ uint32_t SWO_Status (uint8_t *response) {
   uint8_t  status;
   uint32_t count;
 
-  if (TraceStatus == DAP_SWO_CAPTURE_ACTIVE) {
-    switch (TraceMode) {
-#if (SWO_UART != 0)
-      case DAP_SWO_UART:
-        UART_SWO_Update();
-        break;
-#endif
-#if (SWO_MANCHESTER != 0)
-      case DAP_SWO_MANCHESTER:
-        Manchester_SWO_Update();
-        break;
-#endif
-      default:
-        break;
-    }
-  }
-
   status = GetTraceStatus();
   count  = GetTraceCount();
 
@@ -531,78 +633,168 @@ uint32_t SWO_Status (uint8_t *response) {
 }
 
 
-// Process SWO Data command and prepare response
+// Process SWO Extended Status command and prepare response
 //   request:  pointer to request data
 //   response: pointer to response data
 //   return:   number of bytes in response (lower 16 bits)
 //             number of bytes in request (upper 16 bits)
-uint32_t SWO_Data (const uint8_t *request, uint8_t *response) {
+uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response) {
+  uint8_t  cmd;
   uint8_t  status;
   uint32_t count;
-  uint32_t n;
-
-  if (TraceStatus == DAP_SWO_CAPTURE_ACTIVE) {
-    switch (TraceMode) {
-#if (SWO_UART != 0)
-      case DAP_SWO_UART:
-        UART_SWO_Update();
-        break;
-#endif
-#if (SWO_MANCHESTER != 0)
-      case DAP_SWO_MANCHESTER:
-        Manchester_SWO_Update();
-        break;
+#if (TIMESTAMP_CLOCK != 0U) 
+  uint32_t index;
+  uint32_t tick;
 #endif
-      default:
-        break;
-    }
+  uint32_t num;
+
+  num = 0U;
+  cmd = *request;
+
+  if (cmd & 0x01U) {
+    status = GetTraceStatus();
+    *response++ = status;
+    num += 1U;
   }
 
+  if (cmd & 0x02U) {
+    count = GetTraceCount();
+    *response++ = (uint8_t)(count >>  0);
+    *response++ = (uint8_t)(count >>  8);
+    *response++ = (uint8_t)(count >> 16);
+    *response++ = (uint8_t)(count >> 24);
+    num += 4U;
+  }
+
+#if (TIMESTAMP_CLOCK != 0U) 
+  if (cmd & 0x04U) {
+    do {
+      TraceUpdate = 0U;
+      index = TraceTimestamp.index;
+      tick  = TraceTimestamp.tick;
+    } while (TraceUpdate != 0U);
+    *response++ = (uint8_t)(index >>  0);
+    *response++ = (uint8_t)(index >>  8);
+    *response++ = (uint8_t)(index >> 16);
+    *response++ = (uint8_t)(index >> 24);
+    *response++ = (uint8_t)(tick  >>  0);
+    *response++ = (uint8_t)(tick  >>  8);
+    *response++ = (uint8_t)(tick  >> 16);
+    *response++ = (uint8_t)(tick  >> 24);
+    num += 4U;
+  }
+#endif
+
+  return ((1U << 16) | num);
+}
+
+
+// Process SWO Data command and prepare response
+//   request:  pointer to request data
+//   response: pointer to response data
+//   return:   number of bytes in response (lower 16 bits)
+//             number of bytes in request (upper 16 bits)
+uint32_t SWO_Data (const uint8_t *request, uint8_t *response) {
+  uint8_t  status;
+  uint32_t count;
+  uint32_t index;
+  uint32_t n, i;
+
   status = GetTraceStatus();
   count  = GetTraceCount();
 
   if (TraceTransport == 1U) {
-    n = (*(request+0) << 0) |
-        (*(request+1) << 8);
+    n = (uint32_t)(*(request+0) << 0) |
+        (uint32_t)(*(request+1) << 8);
+    if (n > (DAP_PACKET_SIZE - 4U)) {
+      n = DAP_PACKET_SIZE - 4U;
+    }
+    if (count > n) {
+      count = n;
+    }
   } else {
-    n = 0U;
-  }
-  if (count > n) {
-    count = n;
+    count = 0U;
   }
 
   *response++ = status;
   *response++ = (uint8_t)(count >> 0);
   *response++ = (uint8_t)(count >> 8);
 
-  for (n = count; n; n--) {
-    *response++ = TraceBuf[TraceOut++ & (SWO_BUFFER_SIZE-1U)];
+  if (TraceTransport == 1U) {
+    index = TraceIndexO;
+    for (i = index, n = count; n; n--) {
+      i &= SWO_BUFFER_SIZE - 1U;
+      *response++ = TraceBuf[i++];
+    }
+    TraceIndexO = index + count;
+    ResumeTrace();
   }
 
-  if (TraceStatus == (DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED)) {
-    n = GetTraceSpace();
-    if (n != 0U) {
-      switch (TraceMode) {
-#if (SWO_UART != 0)
-        case DAP_SWO_UART:
-          UART_SWO_Capture(&TraceBuf[TraceIn & (SWO_BUFFER_SIZE-1U)], n);
-          TraceStatus = DAP_SWO_CAPTURE_ACTIVE;
-          break;
-#endif
-#if (SWO_MANCHESTER != 0)
-        case DAP_SWO_MANCHESTER:
-          Manchester_SWO_Capture(&TraceBuf[TraceIn & (SWO_BUFFER_SIZE-1U)], n);
-          TraceStatus = DAP_SWO_CAPTURE_ACTIVE;
-          break;
-#endif
-        default:
-          break;
+  return ((2U << 16) | (3U + count));
+}
+
+
+#if (SWO_STREAM != 0)
+
+// SWO Data Transfer complete callback
+void SWO_TransferComplete (void) {
+  TraceIndexO += TransferSize;
+  TransferBusy = 0U;
+  ResumeTrace();
+  osThreadFlagsSet(SWO_ThreadId, 1U);
+}
+
+// SWO Thread
+__NO_RETURN void SWO_Thread (void *argument) {
+  uint32_t timeout;
+  uint32_t flags;
+  uint32_t count;
+  uint32_t index;
+  uint32_t i, n;
+  (void)   argument;
+
+  timeout = osWaitForever;
+
+  for (;;) {
+    flags = osThreadFlagsWait(1U, osFlagsWaitAny, timeout);
+    if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) {
+      timeout = SWO_STREAM_TIMEOUT;
+    } else {
+      timeout = osWaitForever;
+      flags   = osFlagsErrorTimeout;
+    }
+    if (TransferBusy == 0U) {
+      count = GetTraceCount();
+      if (count != 0U) {
+        index = TraceIndexO & (SWO_BUFFER_SIZE - 1U);
+        n = SWO_BUFFER_SIZE - index;
+        if (count > n) {
+          count = n;
+        }
+        if (flags != osFlagsErrorTimeout) {
+          i = index & (USB_BLOCK_SIZE - 1U);
+          if (i == 0U) {
+            count &= ~(USB_BLOCK_SIZE - 1U);
+          } else {
+            n = USB_BLOCK_SIZE - i;
+            if (count >= n) {
+              count = n;
+            } else {
+              count = 0U;
+            }
+          }
+        }
+        if (count != 0U) {
+          TransferSize = count;
+          TransferBusy = 1U;
+          SWO_QueueTransfer(&TraceBuf[index], count);
+        }
       }
     }
   }
-
-  return ((2U << 16) | (3U + count));
 }
 
+#endif  /* (SWO_STREAM != 0) */
+
 
 #endif  /* ((SWO_UART != 0) || (SWO_MANCHESTER != 0)) */

CMSIS/DAP/Firmware/Source/SW_DP.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,8 +17,8 @@
  *
  * ----------------------------------------------------------------------
  *
- * $Date:        20. May 2015
- * $Revision:    V1.10
+ * $Date:        1. December 2017
+ * $Revision:    V2.0.0
  *
  * Project:      CMSIS-DAP Source
  * Title:        SW_DP.c CMSIS-DAP SW DP I/O
@@ -86,6 +86,46 @@ void SWJ_Sequence (uint32_t count, const uint8_t *data) {
 #endif
 
 
+// Generate SWD Sequence
+//   info:   sequence information
+//   swdo:   pointer to SWDIO generated data
+//   swdi:   pointer to SWDIO captured data
+//   return: none
+#if (DAP_SWD != 0)
+void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi) {
+  uint32_t val;
+  uint32_t bit;
+  uint32_t n, k;
+
+  n = info & SWD_SEQUENCE_CLK;
+  if (n == 0U) {
+    n = 64U;
+  }
+
+  if (info & SWD_SEQUENCE_DIN) {
+    while (n) {
+      val = 0U;
+      for (k = 8U; k && n; k--, n--) {
+        SW_READ_BIT(bit);
+        val >>= 1;
+        val  |= bit << 7;
+      }
+      val >>= k;
+      *swdi++ = (uint8_t)val;
+    }
+  } else {
+    while (n) {
+      val = *swdo++;
+      for (k = 8U; k && n; k--, n--) {
+        SW_WRITE_BIT(val);
+        val >>= 1;
+      }
+    }
+  }
+}
+#endif
+
+
 #if (DAP_SWD != 0)
 
 
@@ -94,7 +134,7 @@ void SWJ_Sequence (uint32_t count, const uint8_t *data) {
 //   data:    DATA[31:0]
 //   return:  ACK[2:0]
 #define SWD_TransferFunction(speed)     /**/                                    \
-uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) {                \
+static uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) {         \
   uint32_t ack;                                                                 \
   uint32_t bit;                                                                 \
   uint32_t val;                                                                 \
@@ -173,6 +213,10 @@ uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) {
       }                                                                         \
       SW_WRITE_BIT(parity);             /* Write Parity Bit */                  \
     }                                                                           \
+    /* Capture Timestamp */                                                     \
+    if (request & DAP_TRANSFER_TIMESTAMP) {                                     \
+      DAP_Data.timestamp = TIMESTAMP_GET();                                     \
+    }                                                                           \
     /* Idle cycles */                                                           \
     n = DAP_Data.transfer.idle_cycles;                                          \
     if (n) {                                                                    \
@@ -219,11 +263,11 @@ uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) {
 
 #undef  PIN_DELAY
 #define PIN_DELAY() PIN_DELAY_FAST()
-SWD_TransferFunction(Fast);
+SWD_TransferFunction(Fast)
 
 #undef  PIN_DELAY
 #define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay)
-SWD_TransferFunction(Slow);
+SWD_TransferFunction(Slow)
 
 
 // SWD Transfer I/O