Version numbers and revision history cleanup

CMSIS/DoxyGen/Core/core.dxy

@@ -38,7 +38,7 @@ PROJECT_NAME           = CMSIS-CORE
 # could be handy for archiving the generated documentation or if some version
 # control system is used.
 
-PROJECT_NUMBER         = "Version 5.0.0 - Beta"
+PROJECT_NUMBER         = "Version 5.0.0"
 
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a

CMSIS/DoxyGen/Core/src/Overview.txt

@@ -65,7 +65,7 @@ The ARMv8-M Architecture is described in the <a href="http://developer.arm.com/p
 The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified with the following toolchains:
  - ARM: ARM Compiler V5.6
  - ARM: ARM Compiler V6.6 (for Cortex-M23, Cortex-M33, ARMv8-M)
- - GNU: GNU Tools ARM Embedded 5.4 2016q2
+ - GNU: GNU Tools ARM Embedded 5.4 2016q3
  - IAR: IAR Embedded Workbench Kickstart Edition V6.10
 
 <hr>
@@ -81,7 +81,7 @@ The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified w
       <th>Description</th>
     </tr>
     <tr>
-      <td>V5.00 - Beta n</td>
+      <td>V5.00</td>
       <td>
 	     Added: Cortex-M23, Cortex-M33 support.\n	 
          Added: macro __SAU_PRESENT with __SAU_REGION_PRESENT. \n
@@ -97,7 +97,7 @@ The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified w
       </td>
     </tr>
     <tr>
-      <td>V5.00 - Beta 6</td>
+      <td>V5.00<br>Beta 6</td>
       <td>
          Added: SCB_CFSR register bit definitions. \n
          Added: function \ref NVIC_GetEnableIRQ. \n
@@ -105,14 +105,14 @@ The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified w
       </td>
     </tr>
     <tr>
-      <td>V5.00 - Beta 5</td>
+      <td>V5.00<br>Beta 5</td>
       <td>
          Moved: DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib. \n
          Added: DSP libraries build projects to CMSIS pack.
       </td>
     </tr>
     <tr>
-      <td>V5.00 - Beta 4</td>
+      <td>V5.00<br>Beta 4</td>
       <td>
          Updated: ARMv8M device files. \n
          Corrected: ARMv8MBL interrupts. \n
@@ -120,7 +120,7 @@ The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified w
       </td>
     </tr>
     <tr>
-      <td>V5.00 - Beta 2</td>
+      <td>V5.00<br>Beta 2</td>
       <td>
          Changed: ARMv8M SAU regions to 8. \n
          Changed: moved function \ref TZ_SAU_Setup to file partition_&lt;device&gt;.h. \n
@@ -132,7 +132,7 @@ The CMSIS-CORE \ref templates_pg supplied by ARM have been tested and verified w
       </td>
     </tr>
     <tr>
-      <td>V5.00 - Beta</td>
+      <td>V5.00<br>Beta 1</td>
       <td>
          Renamed: cmsis_armcc_V6.h to cmsis_armclang.h.\n
          Renamed: core\_*.h to lower case.\n

CMSIS/DoxyGen/General/src/introduction.txt

@@ -186,10 +186,14 @@ In addition, each CMSIS component has its own release history:
     <tr>
       <td>5.0.0</td>
       <td>
-        Added <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>ARMv8-M architecture</b></a> support.
-        - CMSIS-CORE 5.0.0 adding support for ARMv8-M and Cortex-M23, Cortex-M33 processors
-	    - CMSIS-RTOS 2.0.0 new API with RTX 5.0.0 reference implementation
+        Added support for: <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>ARMv8-M architecture</b></a> including TrustZone for ARMv8-M and Cortex-M23, Cortex-M33 processors
+        - CMSIS-CORE 5.0.0 added support for ARMv8-M and Cortex-M23, Cortex-M33 processors
+        - CMSIS-Driver 2.04.0 (unchanged)
+        - CMSIS-DSP 1.4.9 minor corrections and performance improvements
+        - CMSIS-RTOS 2.0.0 new API with RTX 5.0.0 reference implementation and corrections in RTX 4.8.2
         - CMSIS-PACK 1.4.4 introducing CPDSC project description
+        - CMSIS-SVD 1.3.3 several enhancements and rework of documentation
+        - CMSIS-DAP 1.1.0 (unchanged)
       </td>
     </tr>
     <tr>