CMSIS-DSP: Improvements to test framework

Better handling of the IPSS FVP when using gcc.
(IPSS FVP is different from other FVP so it still does not work on
normal FVP).

CMSIS/DSP/DSP_Lib_TestSuite/README.md

@@ -0,0 +1,5 @@
+README
+======
+
+This test suite is deprecated. Don't use it.
+It will be removed from the CMSIS-DSP folder in the future.

CMSIS/DSP/Platforms/FVP/ARMCA32/LinkScripts/GCC/mem_ARMCA32.h

@@ -43,8 +43,8 @@
 //   <o1> ROM Size (in Bytes) <0x0-0xFFFFFFFF:0x100000>
 // </h>
  *----------------------------------------------------------------------------*/
-#define __ROM_BASE       0x80000000
-#define __ROM_SIZE       0x00400000
+#define __ROM_BASE       0x00000000
+#define __ROM_SIZE       0x100000
 
 /*--------------------- RAM Configuration -----------------------------------
 // <h> RAM Configuration
@@ -68,13 +68,14 @@
 //   </h>
 // </h>
  *----------------------------------------------------------------------------*/
-#define __RAM_BASE       0x80400000
-#define __RAM_SIZE       0x00300000
+//#define __RAM_BASE       0x80200000#
+#define __RAM_BASE       0x00100000
+#define __RAM_SIZE       0x00200000
 
-#define __RW_DATA_SIZE   0x00100000
-#define __ZI_DATA_SIZE   0x000F0000
+#define __RW_DATA_SIZE   0xF0000
+#define __ZI_DATA_SIZE   0x00200000
 
-#define __STACK_SIZE     0x00003000
+#define __STACK_SIZE     0x00007000
 #define __HEAP_SIZE      0x00100000
 
 #define __UND_STACK_SIZE 0x00000100
@@ -94,7 +95,8 @@
 //   <o1> TTB Size (in Bytes) <0x0-0xFFFFFFFF:8>
 // </h>
  *----------------------------------------------------------------------------*/
-#define __TTB_BASE       0x80800000
+#define __TTB_BASE       0x00300000
 #define __TTB_SIZE       0x00005000
 
+
 #endif /* __MEM_ARMCA5_H */

CMSIS/DSP/Platforms/FVP/ARMCA32/Startup/GCC/startup_ARMCA32.c

@@ -27,6 +27,10 @@
 
 #include <ARMCA32.h>
 
+#define SERIAL_BASE_ADDRESS (0x13000000)
+
+#define SERIAL_DATA  *((volatile unsigned *) SERIAL_BASE_ADDRESS)
+
 /*----------------------------------------------------------------------------
   Definitions
  *----------------------------------------------------------------------------*/
@@ -38,8 +42,6 @@
 #define UND_MODE 0x1B            // Undefined Instruction mode
 #define SYS_MODE 0x1F            // System mode
 
-void support(void);
-
 /*----------------------------------------------------------------------------
   Internal References
  *----------------------------------------------------------------------------*/
@@ -56,6 +58,7 @@ void DAbt_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
 void IRQ_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
 void FIQ_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
 
+
 /*----------------------------------------------------------------------------
   Exception / Interrupt Vector Table
  *----------------------------------------------------------------------------*/
@@ -72,8 +75,6 @@ void Vectors(void) {
   );
 }
 
-extern void initialise_monitor_handles(void);
-
 /*----------------------------------------------------------------------------
   Reset Handler called on controller reset
  *----------------------------------------------------------------------------*/
@@ -95,14 +96,14 @@ void Reset_Handler(void) {
   "BIC     R0, R0, #(0x1 << 12)                    \n"  // Clear I bit 12 to disable I Cache
   "BIC     R0, R0, #(0x1 <<  2)                    \n"  // Clear C bit  2 to disable D Cache
   "BIC     R0, R0, #0x1                            \n"  // Clear M bit  0 to disable MMU
-  "BIC     R0, R0, #(0x1 << 11)                    \n"  // Clear Z bit 11 to disable branch prediction
-  "BIC     R0, R0, #(0x1 << 13)                    \n"  // Clear V bit 13 to disable hivecs
+  //"BIC     R0, R0, #(0x1 << 11)                    \n"  // Clear Z bit 11 to disable branch prediction
+  //"BIC     R0, R0, #(0x1 << 13)                    \n"  // Clear V bit 13 to disable hivecs
   "MCR     p15, 0, R0, c1, c0, 0                   \n"  // Write value back to CP15 System Control register
   "ISB                                             \n"
 
   // Configure ACTLR
   "MRC     p15, 0, r0, c1, c0, 1                   \n"  // Read CP15 Auxiliary Control Register
-  "ORR     r0, r0, #(1 <<  1)                      \n"  // Enable L2 prefetch hint (UNK/WI since r4p1)
+  "ORR     r0, r0, #(1 <<  6)                      \n"  // Enable L2 prefetch hint (UNK/WI since r4p1)
   "MCR     p15, 0, r0, c1, c0, 1                   \n"  // Write CP15 Auxiliary Control Register
 
   // Set Vector Base Address Register (VBAR) to point to this application's vector table
@@ -127,13 +128,16 @@ void Reset_Handler(void) {
   "BL     SystemInit                               \n"
 
   // Unmask interrupts
-  "CPSIE  if                                       \n"
+  //"CPSIE  if                                       \n"
 
   // Call __main
   "BL     _start                                   \n"
   );
 }
 
+
+
+
 /*----------------------------------------------------------------------------
   Default Handler for Exceptions / Interrupts
  *----------------------------------------------------------------------------*/

CMSIS/DSP/Platforms/FVP/ARMCA32/Startup/GCC/support.c

@@ -0,0 +1,37 @@
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+    
+char * _sbrk(int incr);
+
+void __malloc_lock() ;
+void __malloc_unlock();
+
+char __HeapBase, __HeapLimit;  // make sure to define these symbols in linker command file
+#ifdef   __cplusplus
+}
+#endif
+
+static int totalBytesProvidedBySBRK = 0;
+/*
+//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file).
+char * sbrk(int incr) {
+    static char *currentHeapEnd = &__HeapBase;
+    char *previousHeapEnd = currentHeapEnd;
+    if (currentHeapEnd + incr > &__HeapLimit) {
+        return (char *)-1; // the malloc-family routine that called sbrk will return 0
+    }
+    currentHeapEnd += incr;
+    
+    totalBytesProvidedBySBRK += incr;
+    
+    return (char *) previousHeapEnd;
+}
+//! Synonym for sbrk.
+char * _sbrk(int incr) { return sbrk(incr); };
+*/
+
+void __malloc_lock()     {       };
+void __malloc_unlock()   {  };

CMSIS/DSP/Platforms/FVP/ARMCA32/system_ARMCA32.c

@@ -88,6 +88,7 @@ void SystemInit (void)
 /* do not use global variables because this function is called before
    reaching pre-main. RW section may be overwritten afterwards.          */
 
+
   // Invalidate entire Unified TLB
   __set_TLBIALL(0);
 
@@ -112,6 +113,7 @@ void SystemInit (void)
   // Create Translation Table
   MMU_CreateTranslationTable();
 
+ 
   // Enable MMU
   MMU_Enable();
 
@@ -128,7 +130,6 @@ void SystemInit (void)
   // IRQ Initialize
   //IRQ_Initialize();
 
-
 }
 
 __attribute__((constructor(255)))

CMSIS/DSP/Platforms/FVP/ARMCM0/LinkScripts/GCC/lnk.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -21,17 +21,86 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#include "mem_ARMCM0.h" 
 
-__STACK_SIZE = 0x2000;
-__HEAP_SIZE  = 0x50000;
+/*
+ *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+ */
+
+/* memory regions are:
+       secure ROM: 0x10000000
+   non-secure ROM: 0x00000000
+
+       secure RAM: 0x30000000
+   non-secure RAM: 0x20000000
+ */
+
+/*---------------------- Flash Configuration ----------------------------------
+  <h> Flash Configuration
+    <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+    <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__ROM_BASE = 0x00000000;
+__ROM_SIZE = 0x00110000;
+
+/*--------------------- Embedded RAM Configuration ----------------------------
+  <h> RAM Configuration
+    <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+    <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+ -----------------------------------------------------------------------------*/
+__RAM_BASE = 0x20000000;
+__RAM_SIZE = 0x00100000;
+
+/*--------------------- Stack / Heap Configuration ----------------------------
+  <h> Stack / Heap Configuration
+    <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+    <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__STACK_SIZE = 0x00002000;
+__HEAP_SIZE  = 0x00050000;
+
+/*
+ *-------------------- <<< end of configuration section >>> -------------------
+ */
 
 MEMORY
 {
-  ITCM (rx)     : ORIGIN = 0x00000000, LENGTH = 512K
-  DTCM (xrw)    : ORIGIN = 0x20000000, LENGTH = 128K
-  DTCM2 (xrw)     : ORIGIN = 0x20020000, LENGTH = 384K
+  FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
+  RAM   (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
 }
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
 ENTRY(Reset_Handler)
 
 SECTIONS
@@ -61,7 +130,7 @@ SECTIONS
     *(.rodata*)
 
     KEEP(*(.eh_frame*))
-  } > ITCM
+  } > FLASH
 
   /*
    * SG veneers:
@@ -78,30 +147,32 @@ SECTIONS
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ITCM
+  } > FLASH
 
   __exidx_start = .;
   .ARM.exidx :
   {
     *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } > ITCM
+  } > FLASH
   __exidx_end = .;
 
   .copy.table :
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
-  } > ITCM
+  } > FLASH
 
   .zero.table :
   {
@@ -110,18 +181,19 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
-  } > DTCM
+  } > FLASH
 
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
-  
-  .data : 
+  __etext = ALIGN (4);
+
+  .data : AT (__etext)
   {
     __data_start__ = .;
     *(vtable)
@@ -141,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -154,9 +225,7 @@ SECTIONS
     /* All data end */
     __data_end__ = .;
 
-  } > ITCM AT > DTCM
-
-  __etext = ADDR(.data);
+  } > RAM
 
   /*
    * Secondary data section, optional
@@ -189,7 +258,7 @@ SECTIONS
     *(COMMON)
     . = ALIGN(4);
     __bss_end__ = .;
-  } > DTCM2
+  } > RAM AT > RAM
 
   /*
    * Secondary bss section, optional
@@ -218,21 +287,19 @@ SECTIONS
     . = . + __HEAP_SIZE;
     . = ALIGN(8);
     __HeapLimit = .;
-  } > DTCM2
+  } > RAM
+  PROVIDE(__HeapBase = __end__);
 
-  .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
     . = . + __STACK_SIZE;
     . = ALIGN(8);
     __StackTop = .;
-  } > DTCM2
+  } > RAM
   PROVIDE(__stack = __StackTop);
 
-  /* Check if data + heap + stack exceeds DTCM2 limit */
-  ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack")
+  /* Check if data + heap + stack exceeds RAM limit */
+  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
 }
-
-
-

CMSIS/DSP/Platforms/FVP/ARMCM0/Startup/GCC/startup_ARMCM0.c

@@ -119,7 +119,7 @@ extern const pFunc __VECTOR_TABLE[240];
 #pragma GCC diagnostic pop
 #endif
 
-#define SERIAL_BASE_ADDRESS (0xA8000000ul)
+#define SERIAL_BASE_ADDRESS (0x40000000ul)
 
 #define SERIAL_DATA  *((volatile unsigned *) SERIAL_BASE_ADDRESS)
 
@@ -147,6 +147,9 @@ __NO_RETURN void Reset_Handler(void)
  *----------------------------------------------------------------------------*/
 void HardFault_Handler(void)
 {
+  SERIAL_DATA = 'H';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 
@@ -155,6 +158,9 @@ void HardFault_Handler(void)
  *----------------------------------------------------------------------------*/
 void Default_Handler(void)
 {
+  SERIAL_DATA = 'D';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 

CMSIS/DSP/Platforms/FVP/ARMCM0/Startup/GCC/support.c

@@ -15,7 +15,7 @@ char __HeapBase, __HeapLimit;  // make sure to define these symbols in linker co
 #endif
 
 static int totalBytesProvidedBySBRK = 0;
-
+/*
 //! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file).
 char * sbrk(int incr) {
     static char *currentHeapEnd = &__HeapBase;
@@ -31,6 +31,7 @@ char * sbrk(int incr) {
 }
 //! Synonym for sbrk.
 char * _sbrk(int incr) { return sbrk(incr); };
+*/
 
 void __malloc_lock()     {       };
 void __malloc_unlock()   {  };

CMSIS/DSP/Platforms/FVP/ARMCM0/system_ARMCM0.c

@@ -87,7 +87,7 @@ void SystemInit (void)
   SystemCoreClock = SYSTEM_CLOCK;
 }
 
-#if 0
+#if 1
 int stdout_putchar(char txchar)
 {
     SERIAL_DATA = txchar;   

CMSIS/DSP/Platforms/FVP/ARMCM33/LinkScripts/GCC/lnk.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -21,18 +21,86 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#include "mem_ARMCM33.h" 
 
-__STACK_SIZE = 0x2000;
-__HEAP_SIZE  = 0x5000;
+/*
+ *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+ */
+
+/* memory regions are:
+       secure ROM: 0x10000000
+   non-secure ROM: 0x00000000
+
+       secure RAM: 0x30000000
+   non-secure RAM: 0x20000000
+ */
+
+/*---------------------- Flash Configuration ----------------------------------
+  <h> Flash Configuration
+    <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+    <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__ROM_BASE = 0x00000000;
+__ROM_SIZE = 0x00110000;
+
+/*--------------------- Embedded RAM Configuration ----------------------------
+  <h> RAM Configuration
+    <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+    <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+ -----------------------------------------------------------------------------*/
+__RAM_BASE = 0x20000000;
+__RAM_SIZE = 0x00100000;
+
+/*--------------------- Stack / Heap Configuration ----------------------------
+  <h> Stack / Heap Configuration
+    <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+    <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__STACK_SIZE = 0x00002000;
+__HEAP_SIZE  = 0x00050000;
 
+/*
+ *-------------------- <<< end of configuration section >>> -------------------
+ */
 
 MEMORY
 {
-  ITCM (rx)     : ORIGIN = 0x00000000, LENGTH = 512K
-  RAM (xrw)    : ORIGIN = 0x20000000, LENGTH = 512K
+  FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
+  RAM   (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
 }
 
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
 ENTRY(Reset_Handler)
 
 SECTIONS
@@ -62,7 +130,7 @@ SECTIONS
     *(.rodata*)
 
     KEEP(*(.eh_frame*))
-  } > ITCM
+  } > FLASH
 
   /*
    * SG veneers:
@@ -79,30 +147,32 @@ SECTIONS
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ITCM
+  } > FLASH
 
   __exidx_start = .;
   .ARM.exidx :
   {
     *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } > ITCM
+  } > FLASH
   __exidx_end = .;
 
   .copy.table :
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
-  } > ITCM
+  } > FLASH
 
   .zero.table :
   {
@@ -111,15 +181,15 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
-  } > RAM
+  } > FLASH
 
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -143,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -158,7 +227,6 @@ SECTIONS
 
   } > RAM
 
-
   /*
    * Secondary data section, optional
    *
@@ -215,13 +283,12 @@ SECTIONS
   {
     . = ALIGN(8);
     __end__ = .;
-    __HeapBase = .;
     PROVIDE(end = .);
     . = . + __HEAP_SIZE;
     . = ALIGN(8);
     __HeapLimit = .;
   } > RAM
-
+  PROVIDE(__HeapBase = __end__);
 
   .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
   {
@@ -236,6 +303,3 @@ SECTIONS
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
 }
-
-
-

CMSIS/DSP/Platforms/FVP/ARMCM33/Startup/GCC/startup_ARMCM33.c

@@ -53,6 +53,7 @@ typedef void( *pFunc )( void );
   External References
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -138,7 +139,7 @@ extern const pFunc __VECTOR_TABLE[240];
 
 #define SERIAL_DATA  *((volatile unsigned *) SERIAL_BASE_ADDRESS)
 
-extern const char* __StackLimit;
+//extern const char* __StackLimit;
 
 
 /*----------------------------------------------------------------------------
@@ -147,7 +148,13 @@ extern const char* __StackLimit;
 __NO_RETURN void Reset_Handler(void)
 {
 
+  SERIAL_DATA = 'S';
+  SERIAL_DATA = '\n';
+
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
 
   SystemInit();                             /* CMSIS System Initialization */
 
@@ -162,6 +169,9 @@ __NO_RETURN void Reset_Handler(void)
  *----------------------------------------------------------------------------*/
 void HardFault_Handler(void)
 {
+  SERIAL_DATA = 'H';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 
@@ -170,6 +180,9 @@ void HardFault_Handler(void)
  *----------------------------------------------------------------------------*/
 void Default_Handler(void)
 {
+  SERIAL_DATA = 'D';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 

CMSIS/DSP/Platforms/FVP/ARMCM33/Startup/GCC/support.c

@@ -21,7 +21,7 @@ static int totalBytesProvidedBySBRK = 0;
 #define SERIAL_DATA  *((volatile unsigned *) SERIAL_BASE_ADDRESS)
 
 
-
+/*
 //! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file).
 char * sbrk(unsigned int incr) {
     static  char *currentHeapEnd = &__HeapBase;
@@ -37,6 +37,7 @@ char * sbrk(unsigned int incr) {
 }
 //! Synonym for sbrk.
 char * _sbrk(int incr) { return sbrk(incr); };
+*/
 
 void __malloc_lock()     {       };
 void __malloc_unlock()   {  };

CMSIS/DSP/Platforms/FVP/ARMCM4/LinkScripts/GCC/lnk.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -21,18 +21,86 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#include "mem_ARMCM4.h" 
 
-__STACK_SIZE = 0x2000;
-__HEAP_SIZE  = 0x50000;
+/*
+ *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+ */
+
+/* memory regions are:
+       secure ROM: 0x10000000
+   non-secure ROM: 0x00000000
+
+       secure RAM: 0x30000000
+   non-secure RAM: 0x20000000
+ */
+
+/*---------------------- Flash Configuration ----------------------------------
+  <h> Flash Configuration
+    <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+    <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__ROM_BASE = 0x00000000;
+__ROM_SIZE = 0x00110000;
+
+/*--------------------- Embedded RAM Configuration ----------------------------
+  <h> RAM Configuration
+    <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+    <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+ -----------------------------------------------------------------------------*/
+__RAM_BASE = 0x20000000;
+__RAM_SIZE = 0x00100000;
+
+/*--------------------- Stack / Heap Configuration ----------------------------
+  <h> Stack / Heap Configuration
+    <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+    <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__STACK_SIZE = 0x00002000;
+__HEAP_SIZE  = 0x00050000;
+
+/*
+ *-------------------- <<< end of configuration section >>> -------------------
+ */
 
 MEMORY
 {
-  ITCM (rx)     : ORIGIN = 0x00000000, LENGTH = 512K
-  DTCM (xrw)    : ORIGIN = 0x20000000, LENGTH = 128K
-  DTCM2 (xrw)     : ORIGIN = 0x20020000, LENGTH = 384K
+  FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
+  RAM   (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
 }
 
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
 ENTRY(Reset_Handler)
 
 SECTIONS
@@ -62,7 +130,7 @@ SECTIONS
     *(.rodata*)
 
     KEEP(*(.eh_frame*))
-  } > ITCM
+  } > FLASH
 
   /*
    * SG veneers:
@@ -79,30 +147,32 @@ SECTIONS
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ITCM
+  } > FLASH
 
   __exidx_start = .;
   .ARM.exidx :
   {
     *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } > ITCM
+  } > FLASH
   __exidx_end = .;
 
   .copy.table :
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
-  } > ITCM
+  } > FLASH
 
   .zero.table :
   {
@@ -111,18 +181,19 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
-  } > DTCM
+  } > FLASH
 
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
-  
-  .data : 
+  __etext = ALIGN (4);
+
+  .data : AT (__etext)
   {
     __data_start__ = .;
     *(vtable)
@@ -142,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -155,9 +225,7 @@ SECTIONS
     /* All data end */
     __data_end__ = .;
 
-  } > ITCM AT > DTCM
-
-  __etext = ADDR(.data);
+  } > RAM
 
   /*
    * Secondary data section, optional
@@ -190,7 +258,7 @@ SECTIONS
     *(COMMON)
     . = ALIGN(4);
     __bss_end__ = .;
-  } > DTCM2
+  } > RAM AT > RAM
 
   /*
    * Secondary bss section, optional
@@ -216,25 +284,22 @@ SECTIONS
     . = ALIGN(8);
     __end__ = .;
     PROVIDE(end = .);
-    __HeapBase = .;
     . = . + __HEAP_SIZE;
     . = ALIGN(8);
     __HeapLimit = .;
-  } > DTCM2
+  } > RAM
+  PROVIDE(__HeapBase = __end__);
 
-  .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
     . = . + __STACK_SIZE;
     . = ALIGN(8);
     __StackTop = .;
-  } > DTCM2
+  } > RAM
   PROVIDE(__stack = __StackTop);
 
-  /* Check if data + heap + stack exceeds DTCM2 limit */
-  ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack")
+  /* Check if data + heap + stack exceeds RAM limit */
+  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
 }
-
-
-

CMSIS/DSP/Platforms/FVP/ARMCM4/Startup/GCC/support.c

@@ -15,7 +15,7 @@ char __HeapBase, __HeapLimit;  // make sure to define these symbols in linker co
 #endif
 
 static int totalBytesProvidedBySBRK = 0;
-
+/*
 //! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file).
 char * sbrk(int incr) {
     static char *currentHeapEnd = &__HeapBase;
@@ -31,6 +31,6 @@ char * sbrk(int incr) {
 }
 //! Synonym for sbrk.
 char * _sbrk(int incr) { return sbrk(incr); };
-
+*/
 void __malloc_lock()     {       };
 void __malloc_unlock()   {  };

CMSIS/DSP/Platforms/FVP/ARMCM7/LinkScripts/GCC/lnk.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -21,18 +21,86 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#include "mem_ARMCM7.h" 
 
-__STACK_SIZE = 0x2000;
-__HEAP_SIZE  = 0x50000;
+/*
+ *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+ */
+
+/* memory regions are:
+       secure ROM: 0x10000000
+   non-secure ROM: 0x00000000
+
+       secure RAM: 0x30000000
+   non-secure RAM: 0x20000000
+ */
+
+/*---------------------- Flash Configuration ----------------------------------
+  <h> Flash Configuration
+    <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+    <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__ROM_BASE = 0x00000000;
+__ROM_SIZE = 0x00110000;
+
+/*--------------------- Embedded RAM Configuration ----------------------------
+  <h> RAM Configuration
+    <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+    <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+ -----------------------------------------------------------------------------*/
+__RAM_BASE = 0x20000000;
+__RAM_SIZE = 0x00100000;
+
+/*--------------------- Stack / Heap Configuration ----------------------------
+  <h> Stack / Heap Configuration
+    <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+    <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  </h>
+  -----------------------------------------------------------------------------*/
+__STACK_SIZE = 0x00002000;
+__HEAP_SIZE  = 0x00050000;
+
+/*
+ *-------------------- <<< end of configuration section >>> -------------------
+ */
 
 MEMORY
 {
-  ITCM (rx)     : ORIGIN = 0x00000000, LENGTH = 512K
-  DTCM (xrw)    : ORIGIN = 0x20000000, LENGTH = 128K
-  DTCM2 (xrw)     : ORIGIN = 0x20020000, LENGTH = 384K
+  FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
+  RAM   (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
 }
 
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
 ENTRY(Reset_Handler)
 
 SECTIONS
@@ -62,7 +130,7 @@ SECTIONS
     *(.rodata*)
 
     KEEP(*(.eh_frame*))
-  } > ITCM
+  } > FLASH
 
   /*
    * SG veneers:
@@ -79,30 +147,32 @@ SECTIONS
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ITCM
+  } > FLASH
 
   __exidx_start = .;
   .ARM.exidx :
   {
     *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } > ITCM
+  } > FLASH
   __exidx_end = .;
 
   .copy.table :
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
-  } > ITCM
+  } > FLASH
 
   .zero.table :
   {
@@ -111,18 +181,19 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
-  } > DTCM
+  } > FLASH
 
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
-  
-  .data : 
+  __etext = ALIGN (4);
+
+  .data : AT (__etext)
   {
     __data_start__ = .;
     *(vtable)
@@ -142,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -155,9 +225,7 @@ SECTIONS
     /* All data end */
     __data_end__ = .;
 
-  } > ITCM AT > DTCM
-
-  __etext = ADDR(.data);
+  } > RAM
 
   /*
    * Secondary data section, optional
@@ -190,7 +258,7 @@ SECTIONS
     *(COMMON)
     . = ALIGN(4);
     __bss_end__ = .;
-  } > DTCM2
+  } > RAM AT > RAM
 
   /*
    * Secondary bss section, optional
@@ -219,21 +287,19 @@ SECTIONS
     . = . + __HEAP_SIZE;
     . = ALIGN(8);
     __HeapLimit = .;
-  } > DTCM2
+  } > RAM
+  PROVIDE(__HeapBase = __end__);
 
-  .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
     . = . + __STACK_SIZE;
     . = ALIGN(8);
     __StackTop = .;
-  } > DTCM2
+  } > RAM
   PROVIDE(__stack = __StackTop);
 
-  /* Check if data + heap + stack exceeds DTCM2 limit */
-  ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack")
+  /* Check if data + heap + stack exceeds RAM limit */
+  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
 }
-
-
-

CMSIS/DSP/Platforms/FVP/ARMCM7/Startup/GCC/startup_ARMCM7.c

@@ -151,6 +151,9 @@ __NO_RETURN void Reset_Handler(void)
  *----------------------------------------------------------------------------*/
 void HardFault_Handler(void)
 {
+  SERIAL_DATA = 'H';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 
@@ -159,6 +162,9 @@ void HardFault_Handler(void)
  *----------------------------------------------------------------------------*/
 void Default_Handler(void)
 {
+  SERIAL_DATA = 'D';
+  SERIAL_DATA = '\n';
+
   while(1);
 }
 

CMSIS/DSP/Platforms/FVP/ARMCM7/Startup/GCC/support.c

@@ -15,7 +15,7 @@ char __HeapBase, __HeapLimit;  // make sure to define these symbols in linker co
 #endif
 
 static int totalBytesProvidedBySBRK = 0;
-
+/*
 //! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file).
 char * sbrk(int incr) {
     static char *currentHeapEnd = &__HeapBase;
@@ -31,6 +31,7 @@ char * sbrk(int incr) {
 }
 //! Synonym for sbrk.
 char * _sbrk(int incr) { return sbrk(incr); };
+*/
 
 void __malloc_lock()     {       };
 void __malloc_unlock()   {  };