RTOS2/RTX: Updated all examples to use C Startup variant.

Change-Id: Ie116cb90fd09da7aba723ac03752600adc6dbe96

.gitignore

@@ -6,3 +6,5 @@ CMSIS/Documentation/
 CMSIS/RTOS2/RTX/Library/ARM/MDK/RTX_CM.uvguix.*
 CMSIS/CoreValidation/Tests/build
 CMSIS/CoreValidation/Tests/bootloader/build
+*.uvguix.*
+*.uvmpw.uvgui.*

CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvoptx

@@ -161,6 +161,11 @@
           <ItemText>g_phases</ItemText>
         </Ww>
       </WatchWindow1>
+      <ScvdPack>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
+        <SubType>1</SubType>
+      </ScvdPack>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>
@@ -285,7 +290,7 @@
 
   <Group>
     <GroupName>::Compiler</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulation</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -312,25 +312,25 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>7</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x1A000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -422,26 +422,26 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta15"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta11"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.1.0" condition="ARMCC Cortex-M with ITM">
-        <package name="ARM_Compiler" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.2.0-Dev9"/>
+      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with ITM">
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
@@ -456,32 +456,46 @@
       </file>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="Simulation"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -93,21 +93,21 @@
 //   <e>Object specific Memory allocation
 //   <i> Enables object specific memory allocation.
 #ifndef OS_THREAD_OBJ_MEM
-#define OS_THREAD_OBJ_MEM           1
+#define OS_THREAD_OBJ_MEM           0
 #endif
  
 //     <o>Number of user Threads <1-1000>
 //     <i> Defines maximum number of user threads that can be active at the same time.
 //     <i> Applies to user threads with system provided memory for control blocks.
 #ifndef OS_THREAD_NUM
-#define OS_THREAD_NUM               6
+#define OS_THREAD_NUM               1
 #endif
  
 //     <o>Number of user Threads with default Stack size <0-1000>
 //     <i> Defines maximum number of user threads with default stack size.
 //     <i> Applies to user threads with zero stack size specified.
 #ifndef OS_THREAD_DEF_STACK_NUM
-#define OS_THREAD_DEF_STACK_NUM     6
+#define OS_THREAD_DEF_STACK_NUM     0
 #endif
  
 //     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
@@ -124,7 +124,7 @@
 //   <i> Defines stack size for threads with zero stack size specified.
 //   <i> Default: 256
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               400
+#define OS_STACK_SIZE               256
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
@@ -153,7 +153,7 @@
 //   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
-#define OS_STACK_WATERMARK          1
+#define OS_STACK_WATERMARK          0
 #endif
  
 //   <o>Processor mode for Thread execution 
@@ -353,7 +353,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +364,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +513,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +530,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -0,0 +1,73 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m3 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00040000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/startup_ARMCM3.c

@@ -0,0 +1,122 @@
+/******************************************************************************
+ * @file     startup_ARMCM3.c
+ * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[240];
+       const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 223 are left out */
+};
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/startup_ARMCM3.s

@@ -1,163 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/MemPool/MemPool.uvoptx

@@ -22,7 +22,7 @@
   </DaveTm>
 
   <Target>
-    <TargetName>Fixed Virtual Platform</TargetName>
+    <TargetName>Simulator</TargetName>
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
@@ -77,7 +77,7 @@
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
-      <CpuCode>7</CpuCode>
+      <CpuCode>0</CpuCode>
       <DebugOpt>
         <uSim>1</uSim>
         <uTrg>0</uTrg>
@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>5</nTsel>
+        <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,34 +114,9 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>BIN\DbgFM.DLL</pMon>
+        <pMon>BIN\UL2CM3.DLL</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>PWSTATINFO</Key>
-          <Name>200,50,700</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>EVENTREC_CNF</Key>
-          <Name>-l0 -a1 -s0 -f0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGUARM</Key>
-          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=0,218,340,403,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF -MA</Name>
-        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>ARMRTXEVENTFLAGS</Key>
@@ -150,7 +125,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGDARM</Key>
-          <Name>(1010=75,104,525,661,0)(1007=105,137,292,412,0)(1008=-1,-1,-1,-1,0)(1009=120,128,364,676,0)(1012=-1,-1,-1,-1,0)</Name>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -165,13 +140,13 @@
       </TargetDriverDllRegistry>
       <Breakpoint/>
       <ScvdPack>
-        <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.1-dev7\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.3.1-dev7</Type>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <ScvdPack>
-        <Filename>C:\Keil_v5\ARM\PACK\Keil\ARM_Compiler\1.4.0\EventRecorder.scvd</Filename>
-        <Type>Keil.ARM_Compiler.1.4.0</Type>
+        <Filename>C:\tools\PACK\Keil\ARM_Compiler\1.6.1\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.1</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>
@@ -179,7 +154,7 @@
       </Tracepoint>
       <DebugFlag>
         <trace>0</trace>
-        <periodic>1</periodic>
+        <periodic>0</periodic>
         <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
@@ -203,13 +178,13 @@
         <newCpu>0</newCpu>
         <uProt>0</uProt>
       </DebugFlag>
-      <LintExecutable>C:\tools\lint\lint-nt.exe</LintExecutable>
+      <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
       <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>59</LntExFlags>
-      <pMisraName>.\Lint\MISRA_C_2012_Config.lnt</pMisraName>
-      <pszMrule>MISRA_C_2012_Config</pszMrule>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
       <pMisraNamep></pMisraNamep>
@@ -221,7 +196,7 @@
 
   <Group>
     <GroupName>Source Group 1</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>

CMSIS/RTOS2/RTX/Examples/MemPool/MemPool.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulator</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -133,7 +133,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>0</Capability>
+            <Capability>1</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -188,7 +188,7 @@
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -312,7 +312,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>7</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>
@@ -321,14 +321,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -417,32 +417,32 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.1-dev1"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.1-dev1"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.1.0" condition="Cortex-M Device">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.1"/>
+      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device">
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="EVR" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with EVR">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.1"/>
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -451,21 +451,21 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.0" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev2"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.0" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev2"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.0.0">
+      <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
         <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
@@ -473,18 +473,38 @@
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev2"/>
+      <file attr="config" category="linkerScript" condition="ARMCC5" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac5.sct" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\ARMCM3_ac5.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="Simulator"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev2"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -353,7 +353,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +364,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +513,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +530,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Compiler/EventRecorderConf.h

@@ -1,10 +1,10 @@
 /*------------------------------------------------------------------------------
  * MDK - Component ::Event Recorder
- * Copyright (c) 2016-2019 ARM Germany GmbH. All rights reserved.
+ * Copyright (c) 2016-2018 ARM Germany GmbH. All rights reserved.
  *------------------------------------------------------------------------------
  * Name:    EventRecorderConf.h
  * Purpose: Event Recorder Configuration
- * Rev.:    V1.0.1
+ * Rev.:    V1.1.0
  *----------------------------------------------------------------------------*/
 
 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
@@ -14,30 +14,20 @@
 //   <o>Number of Records
 //     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
 //     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-//     <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-//     <1048576=>1048576
-//   <i>Configure size of Event Record Buffer (each record is 16 bytes)
-//   <i>Must be 2^n (min=8, max=1048576)
+//     <65536=>65536
+//   <i>Configures size of Event Record Buffer (each record is 16 bytes)
+//   <i>Must be 2^n (min=8, max=65536)
 #define EVENT_RECORD_COUNT      64U
 
 //   <o>Time Stamp Source
-//      <0=> DWT Cycle Counter  <1=> SysTick
+//      <0=> DWT Cycle Counter  <1=> SysTick  <2=> CMSIS-RTOS2 System Timer
 //      <3=> User Timer (Normal Reset)  <4=> User Timer (Power-On Reset)
 //   <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE  2
+#define EVENT_TIMESTAMP_SOURCE  0
 
-//   <h>SysTick Configuration
-//   <i>Configure values when Time Stamp Source is set to SysTick
-
-//     <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-//     <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK           100000000U
-
-//     <o>SysTick Interrupt Period [us] <1-1000000000>
-//     <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US       1000U
-
-//   </h>
+//   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
+//   <i>Defines default time stamp clock frequency (0 when not used)
+#define EVENT_TIMESTAMP_FREQ    0U
 
 // </h>
 

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -0,0 +1,73 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m3 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000200
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Device/ARMCM3/startup_ARMCM3.c

@@ -0,0 +1,122 @@
+/******************************************************************************
+ * @file     startup_ARMCM3.c
+ * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[240];
+       const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 223 are left out */
+};
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/MemPool/RTE/Device/ARMCM3/startup_ARMCM3.s

@@ -1,163 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/Migration/Blinky.uvoptx

@@ -161,6 +161,11 @@
           <ItemText>g_phases</ItemText>
         </Ww>
       </WatchWindow1>
+      <ScvdPack>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
+        <SubType>1</SubType>
+      </ScvdPack>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>
@@ -285,7 +290,7 @@
 
   <Group>
     <GroupName>::Compiler</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/Migration/Blinky.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulation</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -312,25 +312,25 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>7</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x1A000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -428,32 +428,32 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta15"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="1.0" Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cvendor="ARM" Cversion="5.0.0" condition="RTOS RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta15"/>
+      <component Capiversion="1.0.0" Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cvendor="ARM" Cversion="5.5.1" condition="RTOS RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta11"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </component>
-      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.1.0" condition="ARMCC Cortex-M with ITM">
-        <package name="ARM_Compiler" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="Keil" version="1.2.0-Dev9"/>
+      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with ITM">
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
@@ -468,32 +468,46 @@
       </file>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 Lib"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 Lib"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="Simulation"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulation"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/Migration/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -93,21 +93,21 @@
 //   <e>Object specific Memory allocation
 //   <i> Enables object specific memory allocation.
 #ifndef OS_THREAD_OBJ_MEM
-#define OS_THREAD_OBJ_MEM           1
+#define OS_THREAD_OBJ_MEM           0
 #endif
  
 //     <o>Number of user Threads <1-1000>
 //     <i> Defines maximum number of user threads that can be active at the same time.
 //     <i> Applies to user threads with system provided memory for control blocks.
 #ifndef OS_THREAD_NUM
-#define OS_THREAD_NUM               6
+#define OS_THREAD_NUM               1
 #endif
  
 //     <o>Number of user Threads with default Stack size <0-1000>
 //     <i> Defines maximum number of user threads with default stack size.
 //     <i> Applies to user threads with zero stack size specified.
 #ifndef OS_THREAD_DEF_STACK_NUM
-#define OS_THREAD_DEF_STACK_NUM     6
+#define OS_THREAD_DEF_STACK_NUM     0
 #endif
  
 //     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
@@ -124,7 +124,7 @@
 //   <i> Defines stack size for threads with zero stack size specified.
 //   <i> Default: 256
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               400
+#define OS_STACK_SIZE               256
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
@@ -153,7 +153,7 @@
 //   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
-#define OS_STACK_WATERMARK          1
+#define OS_STACK_WATERMARK          0
 #endif
  
 //   <o>Processor mode for Thread execution 
@@ -353,7 +353,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +364,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +513,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +530,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/Migration/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -0,0 +1,73 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m3 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000200
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/Migration/RTE/Device/ARMCM3/startup_ARMCM3.c

@@ -0,0 +1,122 @@
+/******************************************************************************
+ * @file     startup_ARMCM3.c
+ * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[240];
+       const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 223 are left out */
+};
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/Migration/RTE/Device/ARMCM3/startup_ARMCM3.s

@@ -1,163 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/MsgQueue/MsqQueue.uvoptx

@@ -149,6 +149,16 @@
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
+      <ScvdPack>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
+        <SubType>1</SubType>
+      </ScvdPack>
+      <ScvdPack>
+        <Filename>C:\tools\PACK\Keil\ARM_Compiler\1.6.1\EventRecorder.scvd</Filename>
+        <Type>Keil.ARM_Compiler.1.6.1</Type>
+        <SubType>1</SubType>
+      </ScvdPack>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>

CMSIS/RTOS2/RTX/Examples/MsgQueue/MsqQueue.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>Simulator</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -312,7 +312,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>7</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>
@@ -321,14 +321,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM3\ARMCM3_ac6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -417,32 +417,32 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.1-dev1"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.1-dev1"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
-      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.1.0" condition="Cortex-M Device">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.1"/>
+      <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device">
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </component>
       <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="EVR" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with EVR">
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.1"/>
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
@@ -451,40 +451,60 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.0.0">
+      <file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
         <instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
         <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.4.0" condition="Cortex-M Device"/>
-        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.4.0"/>
+        <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.6.1"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="linkerScript" condition="ARMCC5" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac5.sct" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\ARMCM3_ac5.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM3\Source\ARM\ARMCM3_ac6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM3\ARMCM3_ac6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="Simulator"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\startup_ARMCM3.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM3 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="Simulator"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/CMSIS/RTX_Config.h

@@ -1,23 +1,11 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
+ * Licensed under the Arm Software Development Tools license LES-PRE-21260.
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -353,7 +341,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +352,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
+#endif
+ 
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
+#endif
+ 
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +501,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +518,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Compiler/EventRecorderConf.h

@@ -1,10 +1,10 @@
 /*------------------------------------------------------------------------------
  * MDK - Component ::Event Recorder
- * Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
+ * Copyright (c) 2016-2018 ARM Germany GmbH. All rights reserved.
  *------------------------------------------------------------------------------
  * Name:    EventRecorderConf.h
  * Purpose: Event Recorder Configuration
- * Rev.:    V1.0.0
+ * Rev.:    V1.1.0
  *----------------------------------------------------------------------------*/
 
 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
@@ -14,30 +14,20 @@
 //   <o>Number of Records
 //     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
 //     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-//     <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-//     <1048576=>1048576
-//   <i>Configure size of Event Record Buffer (each record is 16 bytes)
-//   <i>Must be 2^n (min=8, max=1048576)
+//     <65536=>65536
+//   <i>Configures size of Event Record Buffer (each record is 16 bytes)
+//   <i>Must be 2^n (min=8, max=65536)
 #define EVENT_RECORD_COUNT      64U
 
 //   <o>Time Stamp Source
-//      <0=> DWT Cycle Counter  <1=> SysTick
+//      <0=> DWT Cycle Counter  <1=> SysTick  <2=> CMSIS-RTOS2 System Timer
 //      <3=> User Timer (Normal Reset)  <4=> User Timer (Power-On Reset)
 //   <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE  2
+#define EVENT_TIMESTAMP_SOURCE  0
 
-//   <h>SysTick Configuration
-//   <i>Configure values when Time Stamp Source is set to SysTick
-
-//     <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-//     <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK           100000000U
-
-//     <o>SysTick Interrupt Period [us] <1-1000000000>
-//     <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US       1000U
-
-//   </h>
+//   <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
+//   <i>Defines default time stamp clock frequency (0 when not used)
+#define EVENT_TIMESTAMP_FREQ    0U
 
 // </h>
 

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Device/ARMCM3/ARMCM3_ac6.sct

@@ -0,0 +1,73 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m3 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000200
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Device/ARMCM3/startup_ARMCM3.c

@@ -0,0 +1,122 @@
+/******************************************************************************
+ * @file     startup_ARMCM3.c
+ * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[240];
+       const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 223 are left out */
+};
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/MsgQueue/RTE/Device/ARMCM3/startup_ARMCM3.s

@@ -1,163 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/CM33_ns.uvoptx

@@ -256,7 +256,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/CM33_ns.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>16</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Objects\CM33_ns.sct</ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -412,14 +412,14 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -438,26 +438,40 @@
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
         <targetInfos/>
       </file>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00200000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20200000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/CM33_s.uvoptx

@@ -117,6 +117,21 @@
         <pMon>BIN\DbgFMv8M.DLL</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
@@ -135,12 +150,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>0</periodic>
-        <aLwin>0</aLwin>
+        <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>0</viewmode>
+        <viewmode>1</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>
@@ -244,7 +259,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/CM33_s.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>1</nSecure>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc>--import-cmse-lib-out="..\CM33_s\Objects\CM33_s_CMSE_Lib.o"</Misc>
@@ -422,40 +422,54 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
     </components>
     <files>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS/NoRTOS.uvmpw

@@ -9,12 +9,12 @@
 
   <project>
     <PathAndName>.\CM33_s\CM33_s.uvprojx</PathAndName>
+    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>
 
   <project>
     <PathAndName>.\CM33_ns\CM33_ns.uvprojx</PathAndName>
-    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>
 

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/CM33_ns.uvoptx

@@ -175,8 +175,8 @@
         </Mm>
       </MemoryWindow1>
       <ScvdPack>
-        <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.1-dev7\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.3.1-dev7</Type>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>
@@ -285,7 +285,7 @@
 
   <Group>
     <GroupName>::CMSIS</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>
@@ -293,7 +293,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/CM33_ns.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6100001::V6.10.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>16</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Objects\CM33_ns.sct</ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -424,20 +424,20 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -446,16 +446,16 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -472,26 +472,40 @@
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
         <targetInfos/>
       </file>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -93,21 +93,21 @@
 //   <e>Object specific Memory allocation
 //   <i> Enables object specific memory allocation.
 #ifndef OS_THREAD_OBJ_MEM
-#define OS_THREAD_OBJ_MEM           1
+#define OS_THREAD_OBJ_MEM           0
 #endif
  
 //     <o>Number of user Threads <1-1000>
 //     <i> Defines maximum number of user threads that can be active at the same time.
 //     <i> Applies to user threads with system provided memory for control blocks.
 #ifndef OS_THREAD_NUM
-#define OS_THREAD_NUM               5
+#define OS_THREAD_NUM               1
 #endif
  
 //     <o>Number of user Threads with default Stack size <0-1000>
 //     <i> Defines maximum number of user threads with default stack size.
 //     <i> Applies to user threads with zero stack size specified.
 #ifndef OS_THREAD_DEF_STACK_NUM
-#define OS_THREAD_DEF_STACK_NUM     5
+#define OS_THREAD_DEF_STACK_NUM     0
 #endif
  
 //     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
@@ -124,7 +124,7 @@
 //   <i> Defines stack size for threads with zero stack size specified.
 //   <i> Default: 256
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               400
+#define OS_STACK_SIZE               256
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
@@ -153,7 +153,7 @@
 //   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
-#define OS_STACK_WATERMARK          1
+#define OS_STACK_WATERMARK          0
 #endif
  
 //   <o>Processor mode for Thread execution 
@@ -353,7 +353,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +364,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +513,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +530,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00200000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20200000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/CM33_s.uvoptx

@@ -143,40 +143,7 @@
           <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
-      <Breakpoint>
-        <Bp>
-          <Number>0</Number>
-          <Type>0</Type>
-          <LineNumber>70</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>1984</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>&lt;1&gt;.\main_s.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\CM33_s\main_s.c\70</Expression>
-        </Bp>
-        <Bp>
-          <Number>1</Number>
-          <Type>0</Type>
-          <LineNumber>92</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>2098482</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>&lt;2&gt;.\main_ns.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\CM33_ns\main_ns.c\92</Expression>
-        </Bp>
-      </Breakpoint>
+      <Breakpoint/>
       <WatchWindow1>
         <Ww>
           <count>0</count>
@@ -316,7 +283,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/CM33_s.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6100001::V6.10.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>1</nSecure>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -422,14 +422,14 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -442,26 +442,40 @@
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
         <targetInfos/>
       </file>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS/RTOS.uvmpw

@@ -9,12 +9,11 @@
 
   <project>
     <PathAndName>.\CM33_s\CM33_s.uvprojx</PathAndName>
-    <NodeIsExpanded>1</NodeIsExpanded>
+    <NodeIsActive>1</NodeIsActive>
   </project>
 
   <project>
     <PathAndName>.\CM33_ns\CM33_ns.uvprojx</PathAndName>
-    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>
 

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/CM33_ns.uvoptx

@@ -190,8 +190,8 @@
         </Mm>
       </MemoryWindow1>
       <ScvdPack>
-        <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.1-dev7\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
-        <Type>ARM.CMSIS.5.3.1-dev7</Type>
+        <Filename>C:\Users\jonant01\git\CMSIS_5\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+        <Type>ARM.CMSIS.5.5.2-dev5</Type>
         <SubType>1</SubType>
       </ScvdPack>
       <Tracepoint>
@@ -296,7 +296,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/CM33_ns.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6100001::V6.10.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -133,7 +133,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>16</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Objects\CM33_ns.sct</ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -419,20 +419,20 @@
       </api>
     </apis>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev4"/>
+      <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -441,16 +441,16 @@
     <files>
       <file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.1.0">
         <instance index="0">RTE\CMSIS\RTX_Config.c</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.4.0">
+      <file attr="config" category="header" name="CMSIS\RTOS2\RTX\Config\RTX_Config.h" version="5.5.0">
         <instance index="0">RTE\CMSIS\RTX_Config.h</instance>
-        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.4.0" condition="RTOS2 RTX5 NS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cvendor="ARM" Cversion="5.5.1" condition="RTOS2 RTX5 NS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -467,26 +467,40 @@
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
         <targetInfos/>
       </file>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/RTE/CMSIS/RTX_Config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.4.0
+ * $Revision:   V5.5.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -93,21 +93,21 @@
 //   <e>Object specific Memory allocation
 //   <i> Enables object specific memory allocation.
 #ifndef OS_THREAD_OBJ_MEM
-#define OS_THREAD_OBJ_MEM           1
+#define OS_THREAD_OBJ_MEM           0
 #endif
  
 //     <o>Number of user Threads <1-1000>
 //     <i> Defines maximum number of user threads that can be active at the same time.
 //     <i> Applies to user threads with system provided memory for control blocks.
 #ifndef OS_THREAD_NUM
-#define OS_THREAD_NUM               5
+#define OS_THREAD_NUM               1
 #endif
  
 //     <o>Number of user Threads with default Stack size <0-1000>
 //     <i> Defines maximum number of user threads with default stack size.
 //     <i> Applies to user threads with zero stack size specified.
 #ifndef OS_THREAD_DEF_STACK_NUM
-#define OS_THREAD_DEF_STACK_NUM     5
+#define OS_THREAD_DEF_STACK_NUM     0
 #endif
  
 //     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
@@ -124,7 +124,7 @@
 //   <i> Defines stack size for threads with zero stack size specified.
 //   <i> Default: 256
 #ifndef OS_STACK_SIZE
-#define OS_STACK_SIZE               400
+#define OS_STACK_SIZE               256
 #endif
  
 //   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
@@ -153,7 +153,7 @@
 //   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
 //   <i> Enabling this option increases significantly the execution time of thread creation.
 #ifndef OS_STACK_WATERMARK
-#define OS_STACK_WATERMARK          1
+#define OS_STACK_WATERMARK          0
 #endif
  
 //   <o>Processor mode for Thread execution 
@@ -353,7 +353,7 @@
 #endif
  
 //     <h>Global Event Filter Setup
-//     <i> Initial event filter settings applied to all components.
+//     <i> Initial recording level applied to all components.
 //       <o.0>Error events
 //       <o.1>API function call events
 //       <o.2>Operation events
@@ -364,106 +364,128 @@
 #endif
  
 //     <h>RTOS Event Filter Setup
-//     <i> Event filter settings for RTX components.
+//     <i> Recording levels for RTX components.
 //     <i> Only applicable if events for the respective component are generated.
  
-//       <e.7>Memory Management
-//       <i> Filter enable settings for Memory Management events.
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMORY_FILTER
-#define OS_EVR_MEMORY_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
 #endif
  
-//       <e.7>Kernel
-//       <i> Filter enable settings for Kernel events.
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_KERNEL_FILTER
-#define OS_EVR_KERNEL_FILTER        0x81U
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
 #endif
  
-//       <e.7>Thread
-//       <i> Filter enable settings for Thread events.
+//       <h>Thread
+//       <i> Recording level for Thread events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_THREAD_FILTER
-#define OS_EVR_THREAD_FILTER        0x85U
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
 #endif
  
-//       <e.7>Timer
-//       <i> Filter enable settings for Timer events.
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_TIMER_FILTER
-#define OS_EVR_TIMER_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
 #endif
  
-//       <e.7>Event Flags
-//       <i> Filter enable settings for Event Flags events.
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_EVFLAGS_FILTER
-#define OS_EVR_EVFLAGS_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Mutex
-//       <i> Filter enable settings for Mutex events.
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MUTEX_FILTER
-#define OS_EVR_MUTEX_FILTER         0x81U
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
 #endif
  
-//       <e.7>Semaphore
-//       <i> Filter enable settings for Semaphore events.
+//       <h>Timer
+//       <i> Recording level for Timer events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_SEMAPHORE_FILTER
-#define OS_EVR_SEMAPHORE_FILTER     0x81U
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
 #endif
  
-//       <e.7>Memory Pool
-//       <i> Filter enable settings for Memory Pool events.
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MEMPOOL_FILTER
-#define OS_EVR_MEMPOOL_FILTER       0x81U
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
 #endif
  
-//       <e.7>Message Queue
-//       <i> Filter enable settings for Message Queue events.
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
 //         <o.0>Error events
 //         <o.1>API function call events
 //         <o.2>Operation events
 //         <o.3>Detailed operation events
-//       </e>
-#ifndef OS_EVR_MSGQUEUE_FILTER
-#define OS_EVR_MSGQUEUE_FILTER      0x81U
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
 #endif
  
 //     </h>
@@ -491,10 +513,16 @@
 #define OS_EVR_THREAD               1
 #endif
  
-//     <q>Timer
-//     <i> Enables Timer event generation.
-#ifndef OS_EVR_TIMER
-#define OS_EVR_TIMER                1
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
 #endif
  
 //     <q>Event Flags
@@ -502,7 +530,13 @@
 #ifndef OS_EVR_EVFLAGS
 #define OS_EVR_EVFLAGS              1
 #endif
-  
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
 //     <q>Mutex
 //     <i> Enables Mutex event generation.
 #ifndef OS_EVR_MUTEX

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00200000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20200000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_ns/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/CM33_s.uvoptx

@@ -143,72 +143,7 @@
           <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
-      <Breakpoint>
-        <Bp>
-          <Number>0</Number>
-          <Type>0</Type>
-          <LineNumber>70</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>1984</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>&lt;1&gt;.\main_s.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\CM33_s\main_s.c\70</Expression>
-        </Bp>
-        <Bp>
-          <Number>1</Number>
-          <Type>0</Type>
-          <LineNumber>92</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>2098482</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>&lt;2&gt;.\main_ns.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\CM33_ns\main_ns.c\92</Expression>
-        </Bp>
-        <Bp>
-          <Number>2</Number>
-          <Type>0</Type>
-          <LineNumber>96</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>0</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>0</BreakIfRCount>
-          <Filename>&lt;2&gt;.\main_ns.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression></Expression>
-        </Bp>
-        <Bp>
-          <Number>3</Number>
-          <Type>0</Type>
-          <LineNumber>39</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>0</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>0</BreakIfRCount>
-          <Filename>&lt;1&gt;.\Hardfault.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression></Expression>
-        </Bp>
-      </Breakpoint>
+      <Breakpoint/>
       <WatchWindow1>
         <Ww>
           <count>0</count>
@@ -220,6 +155,11 @@
           <WinNumber>1</WinNumber>
           <ItemText>val2</ItemText>
         </Ww>
+        <Ww>
+          <count>2</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>TestCase</ItemText>
+        </Ww>
       </WatchWindow1>
       <MemoryWindow1>
         <Mm>
@@ -384,7 +324,7 @@
 
   <Group>
     <GroupName>::Device</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>1</RteFlg>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/CM33_s.uvprojx

@@ -10,13 +10,13 @@
       <TargetName>FVP Simulation Model</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6100001::V6.10.1::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6120000::V6.12 for Armv8.1-M and MVE::.\ARMCLANG_MVE</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.1-dev7</PackID>
+          <PackID>ARM.CMSIS.5.5.2-dev5</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -188,7 +188,7 @@
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>1</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>1</nSecure>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Objects\CM33_s.sct</ScatterFile>
+            <ScatterFile>.\RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -437,14 +437,14 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.0" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </component>
-      <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+      <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -457,26 +457,40 @@
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta16"/>
         <targetInfos/>
       </file>
-      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
+      <file attr="config" category="linkerScript" condition="ARMCC6" name="Device\ARM\ARMCM33\Source\ARM\ARMCM33_AC6.sct" version="1.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\ARMCM33_AC6.sct</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos>
+          <targetInfo name="FVP Simulation Model"/>
+        </targetInfos>
+      </file>
+      <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.1">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
-      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
-        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+      <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\startup_ARMCM33.c" version="2.0.0">
+        <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
       </file>
+      <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
+        <targetInfos/>
+      </file>
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
-        <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.1-dev7"/>
+        <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.0" condition="ARMCM33 CMSIS"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.2-dev5"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/Objects/CM33_s.sct

@@ -1,20 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-LR_IROM1 0x00000000 0x00200000  {    ; load region size_region
-  ER_IROM1 0x00000000 0x00200000  {  ; load address = execution address
-   *.o (RESET, +First)
-   *(InRoot$$Sections)
-   *(Veneer$$CMSE)                   ; check with partition.h
-   .ANY (+RO)
-   .ANY (+XO)
-  }
-  RW_IRAM1 0x20000000 0x00020000  {  ; RW data
-   .ANY (+RW +ZI)
-  }
-  NOINIT_IRAM1 +0 UNINIT {  ; RW data
-   *.o (.bss.noinit)
-  }
-}
-

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/ARMCM33_AC6.sct

@@ -0,0 +1,74 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00020000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)      /* starts at end of RAM */
+#define __HEAP_BASE        (AlignExpr(+0, 8))             /* starts after RW_RAM section, 8 byte aligned */
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/partition_ARMCM33.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     partition_ARMCM33.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMCM33
- * @version  V5.3.1
- * @date     09. July 2018
+ * @version  V1.1.1
+ * @date     12. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -400,7 +400,7 @@
 //   <o.30> Interrupt 30  <0=> Secure state <1=> Non-Secure state
 //   <o.31> Interrupt 31  <0=> Secure state <1=> Non-Secure state
 */
-#define NVIC_INIT_ITNS0_VAL      0x0000122B
+#define NVIC_INIT_ITNS0_VAL      0x00000000
 
 /*
 //   </e>
@@ -1180,7 +1180,7 @@ __STATIC_INLINE void TZ_SAU_Setup (void)
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
       defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
 
-    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) |
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
                    ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
 
     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.c

@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.c
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM33)
+  #include "ARMCM33.h"
+#elif defined (ARMCM33_TZ)
+  #include "ARMCM33_TZ.h"
+#elif defined (ARMCM33_DSP_FP)
+  #include "ARMCM33_DSP_FP.h"
+#elif defined (ARMCM33_DSP_FP_TZ)
+  #include "ARMCM33_DSP_FP_TZ.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+extern uint32_t __STACK_LIMIT;
+
+extern void __PROGRAM_START(void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __NO_RETURN;
+void Reset_Handler  (void) __NO_RETURN;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SecureFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[496];
+       const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  SecureFault_Handler,                      /*  -9 Secure Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 480 are left out */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/CM33_s/RTE/Device/ARMCM33_DSP_FP_TZ/startup_ARMCM33.s

@@ -1,167 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V5.3.1
-; * @date     09. July 2018
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  HardFault_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END

CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults/RTOS_Faults.uvmpw

@@ -9,12 +9,12 @@
 
   <project>
     <PathAndName>.\CM33_s\CM33_s.uvprojx</PathAndName>
+    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>
 
   <project>
     <PathAndName>.\CM33_ns\CM33_ns.uvprojx</PathAndName>
-    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>